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[linux-2.6/linux-mips.git] / drivers / pcmcia / au1000_pb1x00.c
blob9b57ca8a3f109ecabeffb5ace42b512c4fc6c030
1 /*
3 * Alchemy Semi Pb1x00 boards specific pcmcia routines.
5 * Copyright 2002 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * ppopov@mvista.com or source@mvista.com
9 * ########################################################################
11 * This program is free software; you can distribute it and/or modify it
12 * under the terms of the GNU General Public License (Version 2) as
13 * published by the Free Software Foundation.
15 * This program is distributed in the hope it will be useful, but WITHOUT
16 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * for more details.
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/ioport.h>
28 #include <linux/kernel.h>
29 #include <linux/tqueue.h>
30 #include <linux/timer.h>
31 #include <linux/mm.h>
32 #include <linux/proc_fs.h>
33 #include <linux/version.h>
34 #include <linux/types.h>
36 #include <pcmcia/version.h>
37 #include <pcmcia/cs_types.h>
38 #include <pcmcia/cs.h>
39 #include <pcmcia/ss.h>
40 #include <pcmcia/bulkmem.h>
41 #include <pcmcia/cistpl.h>
42 #include <pcmcia/bus_ops.h>
43 #include "cs_internal.h"
45 #include <asm/io.h>
46 #include <asm/irq.h>
47 #include <asm/system.h>
49 #include <asm/au1000.h>
50 #include <asm/au1000_pcmcia.h>
52 #ifdef CONFIG_MIPS_PB1000
53 #include <asm/pb1000.h>
54 #define PCMCIA_IRQ AU1000_GPIO_15
55 #elif defined (CONFIG_MIPS_PB1500)
56 #include <asm/pb1500.h>
57 #define PCMCIA_IRQ AU1000_GPIO_11 /* fixme */
58 #elif defined (CONFIG_MIPS_PB1100)
59 #include <asm/pb1100.h>
60 #define PCMCIA_IRQ AU1000_GPIO_11
61 #endif
63 static int pb1x00_pcmcia_init(struct pcmcia_init *init)
65 #ifdef CONFIG_MIPS_PB1000
66 u16 pcr;
67 pcr = PCR_SLOT_0_RST | PCR_SLOT_1_RST;
69 au_writel(0x8000, PB1000_MDR); /* clear pcmcia interrupt */
70 au_sync_delay(100);
71 au_writel(0x4000, PB1000_MDR); /* enable pcmcia interrupt */
72 au_sync();
74 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,0);
75 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,1);
76 au_writel(pcr, PB1000_PCR);
77 au_sync_delay(20);
79 return PCMCIA_NUM_SOCKS;
81 #else /* fixme -- take care of the Pb1500 at some point */
83 u16 pcr;
84 pcr = au_readw(PB1100_MEM_PCMCIA) & ~0xf; /* turn off power */
85 pcr &= ~(PB1100_PC_DEASSERT_RST | PB1100_PC_DRV_EN);
86 au_writew(pcr, PB1100_MEM_PCMCIA);
87 au_sync_delay(500);
88 return PCMCIA_NUM_SOCKS;
89 #endif
92 static int pb1x00_pcmcia_shutdown(void)
94 #ifdef CONFIG_MIPS_PB1000
95 u16 pcr;
96 pcr = PCR_SLOT_0_RST | PCR_SLOT_1_RST;
97 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,0);
98 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,1);
99 au_writel(pcr, PB1000_PCR);
100 au_sync_delay(20);
101 return 0;
102 #else
103 u16 pcr;
104 pcr = au_readw(PB1100_MEM_PCMCIA) & ~0xf; /* turn off power */
105 pcr &= ~(PB1100_PC_DEASSERT_RST | PB1100_PC_DRV_EN);
106 au_writew(pcr, PB1100_MEM_PCMCIA);
107 au_sync_delay(2);
108 return 0;
109 #endif
112 static int
113 pb1x00_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state)
115 u32 inserted0, inserted1;
116 u16 vs0, vs1;
118 #ifdef CONFIG_MIPS_PB1000
119 vs0 = vs1 = (u16)au_readl(PB1000_ACR1);
120 inserted0 = !(vs0 & (ACR1_SLOT_0_CD1 | ACR1_SLOT_0_CD2));
121 inserted1 = !(vs1 & (ACR1_SLOT_1_CD1 | ACR1_SLOT_1_CD2));
122 vs0 = (vs0 >> 4) & 0x3;
123 vs1 = (vs1 >> 12) & 0x3;
124 #else
125 vs0 = (au_readw(PB1100_BOARD_STATUS) >> 4) & 0x3;
126 inserted0 = !((au_readl(SYS_PINSTATERD) >> 9) & 0x1); /* gpio 9 */
127 #endif
129 state->ready = 0;
130 state->vs_Xv = 0;
131 state->vs_3v = 0;
132 state->detect = 0;
134 if (sock == 0) {
135 if (inserted0) {
136 switch (vs0) {
137 case 0:
138 case 2:
139 state->vs_3v=1;
140 break;
141 case 3: /* 5V */
142 break;
143 default:
144 /* return without setting 'detect' */
145 printk(KERN_ERR "pb1x00 bad VS (%d)\n",
146 vs0);
147 return;
149 state->detect = 1;
152 else {
153 if (inserted1) {
154 switch (vs1) {
155 case 0:
156 case 2:
157 state->vs_3v=1;
158 break;
159 case 3: /* 5V */
160 break;
161 default:
162 /* return without setting 'detect' */
163 printk(KERN_ERR "pb1x00 bad VS (%d)\n",
164 vs1);
165 return;
167 state->detect = 1;
171 if (state->detect) {
172 state->ready = 1;
175 state->bvd1=1;
176 state->bvd2=1;
177 state->wrprot=0;
178 return 1;
182 static int pb1x00_pcmcia_get_irq_info(struct pcmcia_irq_info *info)
185 if(info->sock > PCMCIA_MAX_SOCK) return -1;
188 * Even in the case of the Pb1000, both sockets are connected
189 * to the same irq line.
191 info->irq = PCMCIA_IRQ;
193 return 0;
197 static int
198 pb1x00_pcmcia_configure_socket(const struct pcmcia_configure *configure)
200 u16 pcr;
202 if(configure->sock > PCMCIA_MAX_SOCK) return -1;
204 #ifdef CONFIG_MIPS_PB1000
205 pcr = au_readl(PB1000_PCR);
207 if (configure->sock == 0) {
208 pcr &= ~(PCR_SLOT_0_VCC0 | PCR_SLOT_0_VCC1 |
209 PCR_SLOT_0_VPP0 | PCR_SLOT_0_VPP1);
211 else {
212 pcr &= ~(PCR_SLOT_1_VCC0 | PCR_SLOT_1_VCC1 |
213 PCR_SLOT_1_VPP0 | PCR_SLOT_1_VPP1);
216 pcr &= ~PCR_SLOT_0_RST;
217 DEBUG(KERN_INFO "Vcc %dV Vpp %dV, pcr %x\n",
218 configure->vcc, configure->vpp, pcr);
219 switch(configure->vcc){
220 case 0: /* Vcc 0 */
221 switch(configure->vpp) {
222 case 0:
223 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_GND,
224 configure->sock);
225 break;
226 case 12:
227 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_12V,
228 configure->sock);
229 break;
230 case 50:
231 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_5V,
232 configure->sock);
233 break;
234 case 33:
235 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_3V,
236 configure->sock);
237 break;
238 default:
239 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
240 configure->sock);
241 printk("%s: bad Vcc/Vpp (%d:%d)\n",
242 __FUNCTION__,
243 configure->vcc,
244 configure->vpp);
245 break;
247 break;
248 case 50: /* Vcc 5V */
249 switch(configure->vpp) {
250 case 0:
251 pcr |= SET_VCC_VPP(VCC_5V,VPP_GND,
252 configure->sock);
253 break;
254 case 50:
255 pcr |= SET_VCC_VPP(VCC_5V,VPP_5V,
256 configure->sock);
257 break;
258 case 12:
259 pcr |= SET_VCC_VPP(VCC_5V,VPP_12V,
260 configure->sock);
261 break;
262 case 33:
263 pcr |= SET_VCC_VPP(VCC_5V,VPP_3V,
264 configure->sock);
265 break;
266 default:
267 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
268 configure->sock);
269 printk("%s: bad Vcc/Vpp (%d:%d)\n",
270 __FUNCTION__,
271 configure->vcc,
272 configure->vpp);
273 break;
275 break;
276 case 33: /* Vcc 3.3V */
277 switch(configure->vpp) {
278 case 0:
279 pcr |= SET_VCC_VPP(VCC_3V,VPP_GND,
280 configure->sock);
281 break;
282 case 50:
283 pcr |= SET_VCC_VPP(VCC_3V,VPP_5V,
284 configure->sock);
285 break;
286 case 12:
287 pcr |= SET_VCC_VPP(VCC_3V,VPP_12V,
288 configure->sock);
289 break;
290 case 33:
291 pcr |= SET_VCC_VPP(VCC_3V,VPP_3V,
292 configure->sock);
293 break;
294 default:
295 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
296 configure->sock);
297 printk("%s: bad Vcc/Vpp (%d:%d)\n",
298 __FUNCTION__,
299 configure->vcc,
300 configure->vpp);
301 break;
303 break;
304 default: /* what's this ? */
305 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,configure->sock);
306 printk(KERN_ERR "%s: bad Vcc %d\n",
307 __FUNCTION__, configure->vcc);
308 break;
311 if (configure->sock == 0) {
312 pcr &= ~(PCR_SLOT_0_RST);
313 if (configure->reset)
314 pcr |= PCR_SLOT_0_RST;
316 else {
317 pcr &= ~(PCR_SLOT_1_RST);
318 if (configure->reset)
319 pcr |= PCR_SLOT_1_RST;
321 au_writel(pcr, PB1000_PCR);
322 au_sync_delay(300);
324 #else
326 pcr = au_readw(PB1100_MEM_PCMCIA) & ~0xf;
328 DEBUG(KERN_INFO "Vcc %dV Vpp %dV, pcr %x, reset %d\n",
329 configure->vcc, configure->vpp, pcr, configure->reset);
332 switch(configure->vcc){
333 case 0: /* Vcc 0 */
334 pcr |= SET_VCC_VPP(0,0);
335 break;
336 case 50: /* Vcc 5V */
337 switch(configure->vpp) {
338 case 0:
339 pcr |= SET_VCC_VPP(2,0);
340 break;
341 case 50:
342 pcr |= SET_VCC_VPP(2,1);
343 break;
344 case 12:
345 pcr |= SET_VCC_VPP(2,2);
346 break;
347 case 33:
348 default:
349 pcr |= SET_VCC_VPP(0,0);
350 printk("%s: bad Vcc/Vpp (%d:%d)\n",
351 __FUNCTION__,
352 configure->vcc,
353 configure->vpp);
354 break;
356 break;
357 case 33: /* Vcc 3.3V */
358 switch(configure->vpp) {
359 case 0:
360 pcr |= SET_VCC_VPP(1,0);
361 break;
362 case 12:
363 pcr |= SET_VCC_VPP(1,2);
364 break;
365 case 33:
366 pcr |= SET_VCC_VPP(1,1);
367 break;
368 case 50:
369 default:
370 pcr |= SET_VCC_VPP(0,0);
371 printk("%s: bad Vcc/Vpp (%d:%d)\n",
372 __FUNCTION__,
373 configure->vcc,
374 configure->vpp);
375 break;
377 break;
378 default: /* what's this ? */
379 pcr |= SET_VCC_VPP(0,0);
380 printk(KERN_ERR "%s: bad Vcc %d\n",
381 __FUNCTION__, configure->vcc);
382 break;
385 au_writew(pcr, PB1100_MEM_PCMCIA);
386 au_sync_delay(300);
388 if (!configure->reset) {
389 pcr |= PB1100_PC_DRV_EN;
390 au_writew(pcr, PB1100_MEM_PCMCIA);
391 au_sync_delay(100);
392 pcr |= PB1100_PC_DEASSERT_RST;
393 au_writew(pcr, PB1100_MEM_PCMCIA);
394 au_sync_delay(100);
396 else {
397 pcr &= ~(PB1100_PC_DEASSERT_RST | PB1100_PC_DRV_EN);
398 au_writew(pcr, PB1100_MEM_PCMCIA);
399 au_sync_delay(100);
401 #endif
402 return 0;
405 struct pcmcia_low_level pb1x00_pcmcia_ops = {
406 pb1x00_pcmcia_init,
407 pb1x00_pcmcia_shutdown,
408 pb1x00_pcmcia_socket_state,
409 pb1x00_pcmcia_get_irq_info,
410 pb1x00_pcmcia_configure_socket