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[linux-2.6/linux-mips.git] / drivers / net / sunlance.c
bloba2f21b82510d69465b288d718199bc21afc9374c
1 /* $Id: sunlance.c,v 1.112 2002/01/15 06:48:55 davem Exp $
2 * lance.c: Linux/Sparc/Lance driver
3 *
4 * Written 1995, 1996 by Miguel de Icaza
5 * Sources:
6 * The Linux depca driver
7 * The Linux lance driver.
8 * The Linux skeleton driver.
9 * The NetBSD Sparc/Lance driver.
10 * Theo de Raadt (deraadt@openbsd.org)
11 * NCR92C990 Lan Controller manual
12 *
13 * 1.4:
14 * Added support to run with a ledma on the Sun4m
15 *
16 * 1.5:
17 * Added multiple card detection.
18 *
19 * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost
20 * (ecd@skynet.be)
21 *
22 * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost
23 * (ecd@skynet.be)
24 *
25 * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller
26 * (davem@caip.rutgers.edu)
27 *
28 * 5/29/96: override option 'tpe-link-test?', if it is 'false', as
29 * this disables auto carrier detection on sun4m. Eddie C. Dost
30 * (ecd@skynet.be)
31 *
32 * 1.7:
33 * 6/26/96: Bug fix for multiple ledmas, miguel.
34 *
35 * 1.8:
36 * Stole multicast code from depca.c, fixed lance_tx.
37 *
38 * 1.9:
39 * 8/21/96: Fixed the multicast code (Pedro Roque)
40 *
41 * 8/28/96: Send fake packet in lance_open() if auto_select is true,
42 * so we can detect the carrier loss condition in time.
43 * Eddie C. Dost (ecd@skynet.be)
44 *
45 * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an
46 * MNA trap during chksum_partial_copy(). (ecd@skynet.be)
47 *
48 * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be)
49 *
50 * 12/22/96: Don't loop forever in lance_rx() on incomplete packets.
51 * This was the sun4c killer. Shit, stupid bug.
52 * (ecd@skynet.be)
53 *
54 * 1.10:
55 * 1/26/97: Modularize driver. (ecd@skynet.be)
56 *
57 * 1.11:
58 * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz)
59 *
60 * 1.12:
61 * 11/3/99: Fixed SMP race in lance_start_xmit found by davem.
62 * Anton Blanchard (anton@progsoc.uts.edu.au)
63 * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces.
64 * David S. Miller (davem@redhat.com)
65 * 2.01:
66 * 11/08/01: Use library crc32 functions (Matt_Domsch@dell.com)
67 *
68 */
69
70 #undef DEBUG_DRIVER
71
72 static char version[] =
73 "sunlance.c:v2.01 08/Nov/01 Miguel de Icaza (miguel@nuclecu.unam.mx)\n";
74
75 static char lancestr[] = "LANCE";
76
77 #include <linux/config.h>
78 #include <linux/module.h>
79 #include <linux/kernel.h>
80 #include <linux/types.h>
81 #include <linux/fcntl.h>
82 #include <linux/interrupt.h>
83 #include <linux/ioport.h>
84 #include <linux/in.h>
85 #include <linux/slab.h>
86 #include <linux/string.h>
87 #include <linux/delay.h>
88 #include <linux/init.h>
89 #include <linux/crc32.h>
90 #include <linux/errno.h>
91 #include <linux/socket.h> /* Used for the temporal inet entries and routing */
92 #include <linux/route.h>
93 #include <linux/netdevice.h>
94 #include <linux/etherdevice.h>
95 #include <linux/skbuff.h>
96
97 #include <asm/system.h>
98 #include <asm/bitops.h>
99 #include <asm/io.h>
100 #include <asm/dma.h>
101 #include <asm/pgtable.h>
102 #include <asm/byteorder.h> /* Used by the checksum routines */
103 #include <asm/idprom.h>
104 #include <asm/sbus.h>
105 #include <asm/openprom.h>
106 #include <asm/oplib.h>
107 #include <asm/auxio.h> /* For tpe-link-test? setting */
108 #include <asm/irq.h>
109
110 /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
111 #ifndef LANCE_LOG_TX_BUFFERS
112 #define LANCE_LOG_TX_BUFFERS 4
113 #define LANCE_LOG_RX_BUFFERS 4
114 #endif
115
116 #define LE_CSR0 0
117 #define LE_CSR1 1
118 #define LE_CSR2 2
119 #define LE_CSR3 3
120
121 #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
122
123 #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
124 #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
125 #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
126 #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
127 #define LE_C0_MERR 0x0800 /* ME: Memory error */
128 #define LE_C0_RINT 0x0400 /* Received interrupt */
129 #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
130 #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
131 #define LE_C0_INTR 0x0080 /* Interrupt or error */
132 #define LE_C0_INEA 0x0040 /* Interrupt enable */
133 #define LE_C0_RXON 0x0020 /* Receiver on */
134 #define LE_C0_TXON 0x0010 /* Transmitter on */
135 #define LE_C0_TDMD 0x0008 /* Transmitter demand */
136 #define LE_C0_STOP 0x0004 /* Stop the card */
137 #define LE_C0_STRT 0x0002 /* Start the card */
138 #define LE_C0_INIT 0x0001 /* Init the card */
139
140 #define LE_C3_BSWP 0x4 /* SWAP */
141 #define LE_C3_ACON 0x2 /* ALE Control */
142 #define LE_C3_BCON 0x1 /* Byte control */
143
144 /* Receive message descriptor 1 */
145 #define LE_R1_OWN 0x80 /* Who owns the entry */
146 #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
147 #define LE_R1_FRA 0x20 /* FRA: Frame error */
148 #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
149 #define LE_R1_CRC 0x08 /* CRC error */
150 #define LE_R1_BUF 0x04 /* BUF: Buffer error */
151 #define LE_R1_SOP 0x02 /* Start of packet */
152 #define LE_R1_EOP 0x01 /* End of packet */
153 #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
154
155 #define LE_T1_OWN 0x80 /* Lance owns the packet */
156 #define LE_T1_ERR 0x40 /* Error summary */
157 #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
158 #define LE_T1_EONE 0x08 /* Error: one retry needed */
159 #define LE_T1_EDEF 0x04 /* Error: deferred */
160 #define LE_T1_SOP 0x02 /* Start of packet */
161 #define LE_T1_EOP 0x01 /* End of packet */
162 #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
163
164 #define LE_T3_BUF 0x8000 /* Buffer error */
165 #define LE_T3_UFL 0x4000 /* Error underflow */
166 #define LE_T3_LCOL 0x1000 /* Error late collision */
167 #define LE_T3_CLOS 0x0800 /* Error carrier loss */
168 #define LE_T3_RTY 0x0400 /* Error retry */
169 #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
170
171 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
172 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
173 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
174 #define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK)
175
176 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
177 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
178 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
179 #define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK)
180
181 #define PKT_BUF_SZ 1544
182 #define RX_BUFF_SIZE PKT_BUF_SZ
183 #define TX_BUFF_SIZE PKT_BUF_SZ
184
185 struct lance_rx_desc {
186 u16 rmd0; /* low address of packet */
187 u8 rmd1_bits; /* descriptor bits */
188 u8 rmd1_hadr; /* high address of packet */
189 s16 length; /* This length is 2s complement (negative)!
190 * Buffer length
191 */
192 u16 mblength; /* This is the actual number of bytes received */
193 };
194
195 struct lance_tx_desc {
196 u16 tmd0; /* low address of packet */
197 u8 tmd1_bits; /* descriptor bits */
198 u8 tmd1_hadr; /* high address of packet */
199 s16 length; /* Length is 2s complement (negative)! */
200 u16 misc;
201 };
202
203 /* The LANCE initialization block, described in databook. */
204 /* On the Sparc, this block should be on a DMA region */
205 struct lance_init_block {
206 u16 mode; /* Pre-set mode (reg. 15) */
207 u8 phys_addr[6]; /* Physical ethernet address */
208 u32 filter[2]; /* Multicast filter. */
209
210 /* Receive and transmit ring base, along with extra bits. */
211 u16 rx_ptr; /* receive descriptor addr */
212 u16 rx_len; /* receive len and high addr */
213 u16 tx_ptr; /* transmit descriptor addr */
214 u16 tx_len; /* transmit len and high addr */
215
216 /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */
217 struct lance_rx_desc brx_ring[RX_RING_SIZE];
218 struct lance_tx_desc btx_ring[TX_RING_SIZE];
219
220 u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
221 u8 pad[2]; /* align rx_buf for copy_and_sum(). */
222 u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
223 };
224
225 #define libdesc_offset(rt, elem) \
226 ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
227
228 #define libbuff_offset(rt, elem) \
229 ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0])))))
230
231 struct lance_private {
232 unsigned long lregs; /* Lance RAP/RDP regs. */
233 unsigned long dregs; /* DMA controller regs. */
234 volatile struct lance_init_block *init_block;
235
236 spinlock_t lock;
237
238 int rx_new, tx_new;
239 int rx_old, tx_old;
240
241 struct net_device_stats stats;
242 struct sbus_dma *ledma; /* If set this points to ledma */
243 char tpe; /* cable-selection is TPE */
244 char auto_select; /* cable-selection by carrier */
245 char burst_sizes; /* ledma SBus burst sizes */
246 char pio_buffer; /* init block in PIO space? */
247
248 unsigned short busmaster_regval;
249
250 void (*init_ring)(struct net_device *);
251 void (*rx)(struct net_device *);
252 void (*tx)(struct net_device *);
253
254 char *name;
255 dma_addr_t init_block_dvma;
256 struct net_device *dev; /* Backpointer */
257 struct lance_private *next_module;
258 struct sbus_dev *sdev;
259 struct timer_list multicast_timer;
260 };
261
262 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
263 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
264 lp->tx_old - lp->tx_new-1)
265
266 /* Lance registers. */
267 #define RDP 0x00UL /* register data port */
268 #define RAP 0x02UL /* register address port */
269 #define LANCE_REG_SIZE 0x04UL
270
271 #define STOP_LANCE(__lp) \
272 do { unsigned long __base = (__lp)->lregs; \
273 sbus_writew(LE_CSR0, __base + RAP); \
274 sbus_writew(LE_C0_STOP, __base + RDP); \
275 } while (0)
276
277 int sparc_lance_debug = 2;
278
279 /* The Lance uses 24 bit addresses */
280 /* On the Sun4c the DVMA will provide the remaining bytes for us */
281 /* On the Sun4m we have to instruct the ledma to provide them */
282 /* Even worse, on scsi/ether SBUS cards, the init block and the
283 * transmit/receive buffers are addresses as offsets from absolute
284 * zero on the lebuffer PIO area. -DaveM
285 */
286
287 #define LANCE_ADDR(x) ((long)(x) & ~0xff000000)
288
289 static struct lance_private *root_lance_dev;
290
291 /* Load the CSR registers */
292 static void load_csrs(struct lance_private *lp)
293 {
294 u32 leptr;
295
296 if (lp->pio_buffer)
297 leptr = 0;
298 else
299 leptr = LANCE_ADDR(lp->init_block_dvma);
300
301 sbus_writew(LE_CSR1, lp->lregs + RAP);
302 sbus_writew(leptr & 0xffff, lp->lregs + RDP);
303 sbus_writew(LE_CSR2, lp->lregs + RAP);
304 sbus_writew(leptr >> 16, lp->lregs + RDP);
305 sbus_writew(LE_CSR3, lp->lregs + RAP);
306 sbus_writew(lp->busmaster_regval, lp->lregs + RDP);
307
308 /* Point back to csr0 */
309 sbus_writew(LE_CSR0, lp->lregs + RAP);
310 }
311
312 /* Setup the Lance Rx and Tx rings */
313 static void lance_init_ring_dvma(struct net_device *dev)
314 {
315 struct lance_private *lp = (struct lance_private *) dev->priv;
316 volatile struct lance_init_block *ib = lp->init_block;
317 dma_addr_t aib = lp->init_block_dvma;
318 __u32 leptr;
319 int i;
320
321 /* Lock out other processes while setting up hardware */
322 netif_stop_queue(dev);
323 lp->rx_new = lp->tx_new = 0;
324 lp->rx_old = lp->tx_old = 0;
325
326 /* Copy the ethernet address to the lance init block
327 * Note that on the sparc you need to swap the ethernet address.
328 */
329 ib->phys_addr [0] = dev->dev_addr [1];
330 ib->phys_addr [1] = dev->dev_addr [0];
331 ib->phys_addr [2] = dev->dev_addr [3];
332 ib->phys_addr [3] = dev->dev_addr [2];
333 ib->phys_addr [4] = dev->dev_addr [5];
334 ib->phys_addr [5] = dev->dev_addr [4];
335
336 /* Setup the Tx ring entries */
337 for (i = 0; i <= TX_RING_SIZE; i++) {
338 leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i));
339 ib->btx_ring [i].tmd0 = leptr;
340 ib->btx_ring [i].tmd1_hadr = leptr >> 16;
341 ib->btx_ring [i].tmd1_bits = 0;
342 ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */
343 ib->btx_ring [i].misc = 0;
344 }
345
346 /* Setup the Rx ring entries */
347 for (i = 0; i < RX_RING_SIZE; i++) {
348 leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i));
349
350 ib->brx_ring [i].rmd0 = leptr;
351 ib->brx_ring [i].rmd1_hadr = leptr >> 16;
352 ib->brx_ring [i].rmd1_bits = LE_R1_OWN;
353 ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000;
354 ib->brx_ring [i].mblength = 0;
355 }
356
357 /* Setup the initialization block */
358
359 /* Setup rx descriptor pointer */
360 leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0));
361 ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
362 ib->rx_ptr = leptr;
363
364 /* Setup tx descriptor pointer */
365 leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0));
366 ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
367 ib->tx_ptr = leptr;
368 }
369
370 static void lance_init_ring_pio(struct net_device *dev)
371 {
372 struct lance_private *lp = (struct lance_private *) dev->priv;
373 volatile struct lance_init_block *ib = lp->init_block;
374 u32 leptr;
375 int i;
376
377 /* Lock out other processes while setting up hardware */
378 netif_stop_queue(dev);
379 lp->rx_new = lp->tx_new = 0;
380 lp->rx_old = lp->tx_old = 0;
381
382 /* Copy the ethernet address to the lance init block
383 * Note that on the sparc you need to swap the ethernet address.
384 */
385 sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]);
386 sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]);
387 sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]);
388 sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]);
389 sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]);
390 sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]);
391
392 /* Setup the Tx ring entries */
393 for (i = 0; i <= TX_RING_SIZE; i++) {
394 leptr = libbuff_offset(tx_buf, i);
395 sbus_writew(leptr, &ib->btx_ring [i].tmd0);
396 sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr);
397 sbus_writeb(0, &ib->btx_ring [i].tmd1_bits);
398
399 /* The ones required by tmd2 */
400 sbus_writew(0xf000, &ib->btx_ring [i].length);
401 sbus_writew(0, &ib->btx_ring [i].misc);
402 }
403
404 /* Setup the Rx ring entries */
405 for (i = 0; i < RX_RING_SIZE; i++) {
406 leptr = libbuff_offset(rx_buf, i);
407
408 sbus_writew(leptr, &ib->brx_ring [i].rmd0);
409 sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr);
410 sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits);
411 sbus_writew(-RX_BUFF_SIZE|0xf000,
412 &ib->brx_ring [i].length);
413 sbus_writew(0, &ib->brx_ring [i].mblength);
414 }
415
416 /* Setup the initialization block */
417
418 /* Setup rx descriptor pointer */
419 leptr = libdesc_offset(brx_ring, 0);
420 sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16),
421 &ib->rx_len);
422 sbus_writew(leptr, &ib->rx_ptr);
423
424 /* Setup tx descriptor pointer */
425 leptr = libdesc_offset(btx_ring, 0);
426 sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16),
427 &ib->tx_len);
428 sbus_writew(leptr, &ib->tx_ptr);
429 }
430
431 static void init_restart_ledma(struct lance_private *lp)
432 {
433 u32 csr = sbus_readl(lp->dregs + DMA_CSR);
434
435 if (!(csr & DMA_HNDL_ERROR)) {
436 /* E-Cache draining */
437 while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
438 barrier();
439 }
440
441 csr = sbus_readl(lp->dregs + DMA_CSR);
442 csr &= ~DMA_E_BURSTS;
443 if (lp->burst_sizes & DMA_BURST32)
444 csr |= DMA_E_BURST32;
445 else
446 csr |= DMA_E_BURST16;
447
448 csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV);
449
450 if (lp->tpe)
451 csr |= DMA_EN_ENETAUI;
452 else
453 csr &= ~DMA_EN_ENETAUI;
454 udelay(20);
455 sbus_writel(csr, lp->dregs + DMA_CSR);
456 udelay(200);
457 }
458
459 static int init_restart_lance(struct lance_private *lp)
460 {
461 u16 regval = 0;
462 int i;
463
464 if (lp->dregs)
465 init_restart_ledma(lp);
466
467 sbus_writew(LE_CSR0, lp->lregs + RAP);
468 sbus_writew(LE_C0_INIT, lp->lregs + RDP);
469
470 /* Wait for the lance to complete initialization */
471 for (i = 0; i < 100; i++) {
472 regval = sbus_readw(lp->lregs + RDP);
473
474 if (regval & (LE_C0_ERR | LE_C0_IDON))
475 break;
476 barrier();
477 }
478 if (i == 100 || (regval & LE_C0_ERR)) {
479 printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n",
480 i, regval);
481 if (lp->dregs)
482 printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR));
483 return -1;
484 }
485
486 /* Clear IDON by writing a "1", enable interrupts and start lance */
487 sbus_writew(LE_C0_IDON, lp->lregs + RDP);
488 sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP);
489
490 if (lp->dregs) {
491 u32 csr = sbus_readl(lp->dregs + DMA_CSR);
492
493 csr |= DMA_INT_ENAB;
494 sbus_writel(csr, lp->dregs + DMA_CSR);
495 }
496
497 return 0;
498 }
499
500 static void lance_rx_dvma(struct net_device *dev)
501 {
502 struct lance_private *lp = (struct lance_private *) dev->priv;
503 volatile struct lance_init_block *ib = lp->init_block;
504 volatile struct lance_rx_desc *rd;
505 u8 bits;
506 int len, entry = lp->rx_new;
507 struct sk_buff *skb;
508
509 for (rd = &ib->brx_ring [entry];
510 !((bits = rd->rmd1_bits) & LE_R1_OWN);
511 rd = &ib->brx_ring [entry]) {
512
513 /* We got an incomplete frame? */
514 if ((bits & LE_R1_POK) != LE_R1_POK) {
515 lp->stats.rx_over_errors++;
516 lp->stats.rx_errors++;
517 } else if (bits & LE_R1_ERR) {
518 /* Count only the end frame as a rx error,
519 * not the beginning
520 */
521 if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++;
522 if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++;
523 if (bits & LE_R1_OFL) lp->stats.rx_over_errors++;
524 if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++;
525 if (bits & LE_R1_EOP) lp->stats.rx_errors++;
526 } else {
527 len = (rd->mblength & 0xfff) - 4;
528 skb = dev_alloc_skb(len + 2);
529
530 if (skb == NULL) {
531 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
532 dev->name);
533 lp->stats.rx_dropped++;
534 rd->mblength = 0;
535 rd->rmd1_bits = LE_R1_OWN;
536 lp->rx_new = RX_NEXT(entry);
537 return;
538 }
539
540 lp->stats.rx_bytes += len;
541
542 skb->dev = dev;
543 skb_reserve(skb, 2); /* 16 byte align */
544 skb_put(skb, len); /* make room */
545 eth_copy_and_sum(skb,
546 (unsigned char *)&(ib->rx_buf [entry][0]),
547 len, 0);
548 skb->protocol = eth_type_trans(skb, dev);
549 netif_rx(skb);
550 dev->last_rx = jiffies;
551 lp->stats.rx_packets++;
552 }
553
554 /* Return the packet to the pool */
555 rd->mblength = 0;
556 rd->rmd1_bits = LE_R1_OWN;
557 entry = RX_NEXT(entry);
558 }
559
560 lp->rx_new = entry;
561 }
562
563 static void lance_tx_dvma(struct net_device *dev)
564 {
565 struct lance_private *lp = (struct lance_private *) dev->priv;
566 volatile struct lance_init_block *ib = lp->init_block;
567 int i, j;
568
569 spin_lock(&lp->lock);
570
571 j = lp->tx_old;
572 for (i = j; i != lp->tx_new; i = j) {
573 volatile struct lance_tx_desc *td = &ib->btx_ring [i];
574 u8 bits = td->tmd1_bits;
575
576 /* If we hit a packet not owned by us, stop */
577 if (bits & LE_T1_OWN)
578 break;
579
580 if (bits & LE_T1_ERR) {
581 u16 status = td->misc;
582
583 lp->stats.tx_errors++;
584 if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++;
585 if (status & LE_T3_LCOL) lp->stats.tx_window_errors++;
586
587 if (status & LE_T3_CLOS) {
588 lp->stats.tx_carrier_errors++;
589 if (lp->auto_select) {
590 lp->tpe = 1 - lp->tpe;
591 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
592 dev->name, lp->tpe?"TPE":"AUI");
593 STOP_LANCE(lp);
594 lp->init_ring(dev);
595 load_csrs(lp);
596 init_restart_lance(lp);
597 goto out;
598 }
599 }
600
601 /* Buffer errors and underflows turn off the
602 * transmitter, restart the adapter.
603 */
604 if (status & (LE_T3_BUF|LE_T3_UFL)) {
605 lp->stats.tx_fifo_errors++;
606
607 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
608 dev->name);
609 STOP_LANCE(lp);
610 lp->init_ring(dev);
611 load_csrs(lp);
612 init_restart_lance(lp);
613 goto out;
614 }
615 } else if ((bits & LE_T1_POK) == LE_T1_POK) {
616 /*
617 * So we don't count the packet more than once.
618 */
619 td->tmd1_bits = bits & ~(LE_T1_POK);
620
621 /* One collision before packet was sent. */
622 if (bits & LE_T1_EONE)
623 lp->stats.collisions++;
624
625 /* More than one collision, be optimistic. */
626 if (bits & LE_T1_EMORE)
627 lp->stats.collisions += 2;
628
629 lp->stats.tx_packets++;
630 }
631
632 j = TX_NEXT(j);
633 }
634 lp->tx_old = j;
635 out:
636 if (netif_queue_stopped(dev) &&
637 TX_BUFFS_AVAIL > 0)
638 netif_wake_queue(dev);
639
640 spin_unlock(&lp->lock);
641 }
642
643 static void lance_piocopy_to_skb(struct sk_buff *skb, volatile void *piobuf, int len)
644 {
645 u16 *p16 = (u16 *) skb->data;
646 u32 *p32;
647 u8 *p8;
648 unsigned long pbuf = (unsigned long) piobuf;
649
650 /* We know here that both src and dest are on a 16bit boundary. */
651 *p16++ = sbus_readw(pbuf);
652 p32 = (u32 *) p16;
653 pbuf += 2;
654 len -= 2;
655
656 while (len >= 4) {
657 *p32++ = sbus_readl(pbuf);
658 pbuf += 4;
659 len -= 4;
660 }
661 p8 = (u8 *) p32;
662 if (len >= 2) {
663 p16 = (u16 *) p32;
664 *p16++ = sbus_readw(pbuf);
665 pbuf += 2;
666 len -= 2;
667 p8 = (u8 *) p16;
668 }
669 if (len >= 1)
670 *p8 = sbus_readb(pbuf);
671 }
672
673 static void lance_rx_pio(struct net_device *dev)
674 {
675 struct lance_private *lp = (struct lance_private *) dev->priv;
676 volatile struct lance_init_block *ib = lp->init_block;
677 volatile struct lance_rx_desc *rd;
678 unsigned char bits;
679 int len, entry;
680 struct sk_buff *skb;
681
682 entry = lp->rx_new;
683 for (rd = &ib->brx_ring [entry];
684 !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN);
685 rd = &ib->brx_ring [entry]) {
686
687 /* We got an incomplete frame? */
688 if ((bits & LE_R1_POK) != LE_R1_POK) {
689 lp->stats.rx_over_errors++;
690 lp->stats.rx_errors++;
691 } else if (bits & LE_R1_ERR) {
692 /* Count only the end frame as a rx error,
693 * not the beginning
694 */
695 if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++;
696 if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++;
697 if (bits & LE_R1_OFL) lp->stats.rx_over_errors++;
698 if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++;
699 if (bits & LE_R1_EOP) lp->stats.rx_errors++;
700 } else {
701 len = (sbus_readw(&rd->mblength) & 0xfff) - 4;
702 skb = dev_alloc_skb(len + 2);
703
704 if (skb == NULL) {
705 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
706 dev->name);
707 lp->stats.rx_dropped++;
708 sbus_writew(0, &rd->mblength);
709 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
710 lp->rx_new = RX_NEXT(entry);
711 return;
712 }
713
714 lp->stats.rx_bytes += len;
715
716 skb->dev = dev;
717 skb_reserve (skb, 2); /* 16 byte align */
718 skb_put(skb, len); /* make room */
719 lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len);
720 skb->protocol = eth_type_trans(skb, dev);
721 netif_rx(skb);
722 dev->last_rx = jiffies;
723 lp->stats.rx_packets++;
724 }
725
726 /* Return the packet to the pool */
727 sbus_writew(0, &rd->mblength);
728 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
729 entry = RX_NEXT(entry);
730 }
731
732 lp->rx_new = entry;
733 }
734
735 static void lance_tx_pio(struct net_device *dev)
736 {
737 struct lance_private *lp = (struct lance_private *) dev->priv;
738 volatile struct lance_init_block *ib = lp->init_block;
739 int i, j;
740
741 spin_lock(&lp->lock);
742
743 j = lp->tx_old;
744 for (i = j; i != lp->tx_new; i = j) {
745 volatile struct lance_tx_desc *td = &ib->btx_ring [i];
746 u8 bits = sbus_readb(&td->tmd1_bits);
747
748 /* If we hit a packet not owned by us, stop */
749 if (bits & LE_T1_OWN)
750 break;
751
752 if (bits & LE_T1_ERR) {
753 u16 status = sbus_readw(&td->misc);
754
755 lp->stats.tx_errors++;
756 if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++;
757 if (status & LE_T3_LCOL) lp->stats.tx_window_errors++;
758
759 if (status & LE_T3_CLOS) {
760 lp->stats.tx_carrier_errors++;
761 if (lp->auto_select) {
762 lp->tpe = 1 - lp->tpe;
763 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
764 dev->name, lp->tpe?"TPE":"AUI");
765 STOP_LANCE(lp);
766 lp->init_ring(dev);
767 load_csrs(lp);
768 init_restart_lance(lp);
769 goto out;
770 }
771 }
772
773 /* Buffer errors and underflows turn off the
774 * transmitter, restart the adapter.
775 */
776 if (status & (LE_T3_BUF|LE_T3_UFL)) {
777 lp->stats.tx_fifo_errors++;
778
779 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
780 dev->name);
781 STOP_LANCE(lp);
782 lp->init_ring(dev);
783 load_csrs(lp);
784 init_restart_lance(lp);
785 goto out;
786 }
787 } else if ((bits & LE_T1_POK) == LE_T1_POK) {
788 /*
789 * So we don't count the packet more than once.
790 */
791 sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits);
792
793 /* One collision before packet was sent. */
794 if (bits & LE_T1_EONE)
795 lp->stats.collisions++;
796
797 /* More than one collision, be optimistic. */
798 if (bits & LE_T1_EMORE)
799 lp->stats.collisions += 2;
800
801 lp->stats.tx_packets++;
802 }
803
804 j = TX_NEXT(j);
805 }
806 lp->tx_old = j;
807
808 if (netif_queue_stopped(dev) &&
809 TX_BUFFS_AVAIL > 0)
810 netif_wake_queue(dev);
811 out:
812 spin_unlock(&lp->lock);
813 }
814
815 static irqreturn_t lance_interrupt(int irq, void *dev_id, struct pt_regs *regs)
816 {
817 struct net_device *dev = (struct net_device *)dev_id;
818 struct lance_private *lp = (struct lance_private *)dev->priv;
819 int csr0;
820
821 sbus_writew(LE_CSR0, lp->lregs + RAP);
822 csr0 = sbus_readw(lp->lregs + RDP);
823
824 /* Acknowledge all the interrupt sources ASAP */
825 sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT),
826 lp->lregs + RDP);
827
828 if ((csr0 & LE_C0_ERR) != 0) {
829 /* Clear the error condition */
830 sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
831 LE_C0_CERR | LE_C0_MERR),
832 lp->lregs + RDP);
833 }
834
835 if (csr0 & LE_C0_RINT)
836 lp->rx(dev);
837
838 if (csr0 & LE_C0_TINT)
839 lp->tx(dev);
840
841 if (csr0 & LE_C0_BABL)
842 lp->stats.tx_errors++;
843
844 if (csr0 & LE_C0_MISS)
845 lp->stats.rx_errors++;
846
847 if (csr0 & LE_C0_MERR) {
848 if (lp->dregs) {
849 u32 addr = sbus_readl(lp->dregs + DMA_ADDR);
850
851 printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n",
852 dev->name, csr0, addr & 0xffffff);
853 } else {
854 printk(KERN_ERR "%s: Memory error, status %04x\n",
855 dev->name, csr0);
856 }
857
858 sbus_writew(LE_C0_STOP, lp->lregs + RDP);
859
860 if (lp->dregs) {
861 u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR);
862
863 dma_csr |= DMA_FIFO_INV;
864 sbus_writel(dma_csr, lp->dregs + DMA_CSR);
865 }
866
867 lp->init_ring(dev);
868 load_csrs(lp);
869 init_restart_lance(lp);
870 netif_wake_queue(dev);
871 }
872
873 sbus_writew(LE_C0_INEA, lp->lregs + RDP);
874
875 return IRQ_HANDLED;
876 }
877
878 /* Build a fake network packet and send it to ourselves. */
879 static void build_fake_packet(struct lance_private *lp)
880 {
881 struct net_device *dev = lp->dev;
882 volatile struct lance_init_block *ib = lp->init_block;
883 u16 *packet;
884 struct ethhdr *eth;
885 int i, entry;
886
887 entry = lp->tx_new & TX_RING_MOD_MASK;
888 packet = (u16 *) &(ib->tx_buf[entry][0]);
889 eth = (struct ethhdr *) packet;
890 if (lp->pio_buffer) {
891 for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++)
892 sbus_writew(0, &packet[i]);
893 for (i = 0; i < 6; i++) {
894 sbus_writeb(dev->dev_addr[i], &eth->h_dest[i]);
895 sbus_writeb(dev->dev_addr[i], &eth->h_source[i]);
896 }
897 sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length);
898 sbus_writew(0, &ib->btx_ring[entry].misc);
899 sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
900 } else {
901 memset(packet, 0, ETH_ZLEN);
902 for (i = 0; i < 6; i++) {
903 eth->h_dest[i] = dev->dev_addr[i];
904 eth->h_source[i] = dev->dev_addr[i];
905 }
906 ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000;
907 ib->btx_ring[entry].misc = 0;
908 ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
909 }
910 lp->tx_new = TX_NEXT(entry);
911 }
912
913 struct net_device *last_dev = 0;
914
915 static int lance_open(struct net_device *dev)
916 {
917 struct lance_private *lp = (struct lance_private *)dev->priv;
918 volatile struct lance_init_block *ib = lp->init_block;
919 int status = 0;
920
921 last_dev = dev;
922
923 STOP_LANCE(lp);
924
925 if (request_irq(dev->irq, &lance_interrupt, SA_SHIRQ,
926 lancestr, (void *) dev)) {
927 printk(KERN_ERR "Lance: Can't get irq %s\n", __irq_itoa(dev->irq));
928 return -EAGAIN;
929 }
930
931 /* On the 4m, setup the ledma to provide the upper bits for buffers */
932 if (lp->dregs) {
933 u32 regval = lp->init_block_dvma & 0xff000000;
934
935 sbus_writel(regval, lp->dregs + DMA_TEST);
936 }
937
938 /* Set mode and clear multicast filter only at device open,
939 * so that lance_init_ring() called at any error will not
940 * forget multicast filters.
941 *
942 * BTW it is common bug in all lance drivers! --ANK
943 */
944 if (lp->pio_buffer) {
945 sbus_writew(0, &ib->mode);
946 sbus_writel(0, &ib->filter[0]);
947 sbus_writel(0, &ib->filter[1]);
948 } else {
949 ib->mode = 0;
950 ib->filter [0] = 0;
951 ib->filter [1] = 0;
952 }
953
954 lp->init_ring(dev);
955 load_csrs(lp);
956
957 netif_start_queue(dev);
958
959 status = init_restart_lance(lp);
960 if (!status && lp->auto_select) {
961 build_fake_packet(lp);
962 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
963 }
964
965 return status;
966 }
967
968 static int lance_close(struct net_device *dev)
969 {
970 struct lance_private *lp = (struct lance_private *) dev->priv;
971
972 netif_stop_queue(dev);
973 del_timer_sync(&lp->multicast_timer);
974
975 STOP_LANCE(lp);
976
977 free_irq(dev->irq, (void *) dev);
978 return 0;
979 }
980
981 static int lance_reset(struct net_device *dev)
982 {
983 struct lance_private *lp = (struct lance_private *) dev->priv;
984 int status;
985
986 STOP_LANCE(lp);
987
988 /* On the 4m, reset the dma too */
989 if (lp->dregs) {
990 u32 csr, addr;
991
992 printk(KERN_ERR "resetting ledma\n");
993 csr = sbus_readl(lp->dregs + DMA_CSR);
994 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
995 udelay(200);
996 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
997
998 addr = lp->init_block_dvma & 0xff000000;
999 sbus_writel(addr, lp->dregs + DMA_TEST);
1000 }
1001 lp->init_ring(dev);
1002 load_csrs(lp);
1003 dev->trans_start = jiffies;
1004 status = init_restart_lance(lp);
1005 return status;
1006 }
1007
1008 static void lance_piocopy_from_skb(volatile void *dest, unsigned char *src, int len)
1009 {
1010 unsigned long piobuf = (unsigned long) dest;
1011 u32 *p32;
1012 u16 *p16;
1013 u8 *p8;
1014
1015 switch ((unsigned long)src & 0x3) {
1016 case 0:
1017 p32 = (u32 *) src;
1018 while (len >= 4) {
1019 sbus_writel(*p32, piobuf);
1020 p32++;
1021 piobuf += 4;
1022 len -= 4;
1023 }
1024 src = (char *) p32;
1025 break;
1026 case 1:
1027 case 3:
1028 p8 = (u8 *) src;
1029 while (len >= 4) {
1030 u32 val;
1031
1032 val = p8[0] << 24;
1033 val |= p8[1] << 16;
1034 val |= p8[2] << 8;
1035 val |= p8[3];
1036 sbus_writel(val, piobuf);
1037 p8 += 4;
1038 piobuf += 4;
1039 len -= 4;
1040 }
1041 src = (char *) p8;
1042 break;
1043 case 2:
1044 p16 = (u16 *) src;
1045 while (len >= 4) {
1046 u32 val = p16[0]<<16 | p16[1];
1047 sbus_writel(val, piobuf);
1048 p16 += 2;
1049 piobuf += 4;
1050 len -= 4;
1051 }
1052 src = (char *) p16;
1053 break;
1054 };
1055 if (len >= 2) {
1056 u16 val = src[0] << 8 | src[1];
1057 sbus_writew(val, piobuf);
1058 src += 2;
1059 piobuf += 2;
1060 len -= 2;
1061 }
1062 if (len >= 1)
1063 sbus_writeb(src[0], piobuf);
1064 }
1065
1066 static void lance_piozero(volatile void *dest, int len)
1067 {
1068 unsigned long piobuf = (unsigned long) dest;
1069
1070 if (piobuf & 1) {
1071 sbus_writeb(0, piobuf);
1072 piobuf += 1;
1073 len -= 1;
1074 if (len == 0)
1075 return;
1076 }
1077 if (len == 1) {
1078 sbus_writeb(0, piobuf);
1079 return;
1080 }
1081 if (piobuf & 2) {
1082 sbus_writew(0, piobuf);
1083 piobuf += 2;
1084 len -= 2;
1085 if (len == 0)
1086 return;
1087 }
1088 while (len >= 4) {
1089 sbus_writel(0, piobuf);
1090 piobuf += 4;
1091 len -= 4;
1092 }
1093 if (len >= 2) {
1094 sbus_writew(0, piobuf);
1095 piobuf += 2;
1096 len -= 2;
1097 }
1098 if (len >= 1)
1099 sbus_writeb(0, piobuf);
1100 }
1101
1102 static void lance_tx_timeout(struct net_device *dev)
1103 {
1104 struct lance_private *lp = (struct lance_private *) dev->priv;
1105
1106 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
1107 dev->name, sbus_readw(lp->lregs + RDP));
1108 lance_reset(dev);
1109 netif_wake_queue(dev);
1110 }
1111
1112 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
1113 {
1114 struct lance_private *lp = (struct lance_private *) dev->priv;
1115 volatile struct lance_init_block *ib = lp->init_block;
1116 int entry, skblen, len;
1117
1118 skblen = skb->len;
1119
1120 len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
1121
1122 spin_lock_irq(&lp->lock);
1123
1124 lp->stats.tx_bytes += len;
1125
1126 entry = lp->tx_new & TX_RING_MOD_MASK;
1127 if (lp->pio_buffer) {
1128 sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length);
1129 sbus_writew(0, &ib->btx_ring[entry].misc);
1130 lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen);
1131 if (len != skblen)
1132 lance_piozero(&ib->tx_buf[entry][skblen], len - skblen);
1133 sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
1134 } else {
1135 ib->btx_ring [entry].length = (-len) | 0xf000;
1136 ib->btx_ring [entry].misc = 0;
1137 memcpy((char *)&ib->tx_buf [entry][0], skb->data, skblen);
1138 if (len != skblen)
1139 memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen);
1140 ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
1141 }
1142
1143 lp->tx_new = TX_NEXT(entry);
1144
1145 if (TX_BUFFS_AVAIL <= 0)
1146 netif_stop_queue(dev);
1147
1148 /* Kick the lance: transmit now */
1149 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
1150
1151 /* Read back CSR to invalidate the E-Cache.
1152 * This is needed, because DMA_DSBL_WR_INV is set.
1153 */
1154 if (lp->dregs)
1155 sbus_readw(lp->lregs + RDP);
1156
1157 spin_unlock_irq(&lp->lock);
1158
1159 dev->trans_start = jiffies;
1160 dev_kfree_skb(skb);
1161
1162 return 0;
1163 }
1164
1165 static struct net_device_stats *lance_get_stats(struct net_device *dev)
1166 {
1167 struct lance_private *lp = (struct lance_private *) dev->priv;
1168
1169 return &lp->stats;
1170 }
1171
1172 /* taken from the depca driver */
1173 static void lance_load_multicast(struct net_device *dev)
1174 {
1175 struct lance_private *lp = (struct lance_private *) dev->priv;
1176 volatile struct lance_init_block *ib = lp->init_block;
1177 volatile u16 *mcast_table = (u16 *) &ib->filter;
1178 struct dev_mc_list *dmi = dev->mc_list;
1179 char *addrs;
1180 int i;
1181 u32 crc;
1182
1183 /* set all multicast bits */
1184 if (dev->flags & IFF_ALLMULTI) {
1185 if (lp->pio_buffer) {
1186 sbus_writel(0xffffffff, &ib->filter[0]);
1187 sbus_writel(0xffffffff, &ib->filter[1]);
1188 } else {
1189 ib->filter [0] = 0xffffffff;
1190 ib->filter [1] = 0xffffffff;
1191 }
1192 return;
1193 }
1194 /* clear the multicast filter */
1195 if (lp->pio_buffer) {
1196 sbus_writel(0, &ib->filter[0]);
1197 sbus_writel(0, &ib->filter[1]);
1198 } else {
1199 ib->filter [0] = 0;
1200 ib->filter [1] = 0;
1201 }
1202
1203 /* Add addresses */
1204 for (i = 0; i < dev->mc_count; i++) {
1205 addrs = dmi->dmi_addr;
1206 dmi = dmi->next;
1207
1208 /* multicast address? */
1209 if (!(*addrs & 1))
1210 continue;
1211 crc = ether_crc_le(6, addrs);
1212 crc = crc >> 26;
1213 if (lp->pio_buffer) {
1214 u16 tmp = sbus_readw(&mcast_table[crc>>4]);
1215 tmp |= 1 << (crc & 0xf);
1216 sbus_writew(tmp, &mcast_table[crc>>4]);
1217 } else {
1218 mcast_table [crc >> 4] |= 1 << (crc & 0xf);
1219 }
1220 }
1221 }
1222
1223 static void lance_set_multicast(struct net_device *dev)
1224 {
1225 struct lance_private *lp = (struct lance_private *) dev->priv;
1226 volatile struct lance_init_block *ib = lp->init_block;
1227 u16 mode;
1228
1229 if (!netif_running(dev))
1230 return;
1231
1232 if (lp->tx_old != lp->tx_new) {
1233 mod_timer(&lp->multicast_timer, jiffies + 4);
1234 netif_wake_queue(dev);
1235 return;
1236 }
1237
1238 netif_stop_queue(dev);
1239
1240 STOP_LANCE(lp);
1241 lp->init_ring(dev);
1242
1243 if (lp->pio_buffer)
1244 mode = sbus_readw(&ib->mode);
1245 else
1246 mode = ib->mode;
1247 if (dev->flags & IFF_PROMISC) {
1248 mode |= LE_MO_PROM;
1249 if (lp->pio_buffer)
1250 sbus_writew(mode, &ib->mode);
1251 else
1252 ib->mode = mode;
1253 } else {
1254 mode &= ~LE_MO_PROM;
1255 if (lp->pio_buffer)
1256 sbus_writew(mode, &ib->mode);
1257 else
1258 ib->mode = mode;
1259 lance_load_multicast(dev);
1260 }
1261 load_csrs(lp);
1262 init_restart_lance(lp);
1263 netif_wake_queue(dev);
1264 }
1265
1266 static void lance_set_multicast_retry(unsigned long _opaque)
1267 {
1268 struct net_device *dev = (struct net_device *) _opaque;
1269
1270 lance_set_multicast(dev);
1271 }
1272
1273 static void lance_free_hwresources(struct lance_private *lp)
1274 {
1275 if (lp->lregs)
1276 sbus_iounmap(lp->lregs, LANCE_REG_SIZE);
1277 if (lp->init_block != NULL) {
1278 if (lp->pio_buffer) {
1279 sbus_iounmap((unsigned long)lp->init_block,
1280 sizeof(struct lance_init_block));
1281 } else {
1282 sbus_free_consistent(lp->sdev,
1283 sizeof(struct lance_init_block),
1284 (void *)lp->init_block,
1285 lp->init_block_dvma);
1286 }
1287 }
1288 }
1289
1290 static int __init sparc_lance_init(struct net_device *dev,
1291 struct sbus_dev *sdev,
1292 struct sbus_dma *ledma,
1293 struct sbus_dev *lebuffer)
1294 {
1295 static unsigned version_printed;
1296 struct lance_private *lp = NULL;
1297 int i;
1298
1299 if (dev == NULL) {
1300 dev = init_etherdev (0, sizeof (struct lance_private) + 8);
1301 } else {
1302 dev->priv = kmalloc(sizeof (struct lance_private) + 8,
1303 GFP_KERNEL);
1304 if (dev->priv == NULL)
1305 return -ENOMEM;
1306 memset(dev->priv, 0, sizeof (struct lance_private) + 8);
1307 }
1308 if (sparc_lance_debug && version_printed++ == 0)
1309 printk (KERN_INFO "%s", version);
1310
1311 printk(KERN_INFO "%s: LANCE ", dev->name);
1312
1313 /* Make certain the data structures used by the LANCE are aligned. */
1314 dev->priv = (void *)(((unsigned long)dev->priv + 7) & ~7);
1315 lp = (struct lance_private *) dev->priv;
1316 spin_lock_init(&lp->lock);
1317
1318 /* Copy the IDPROM ethernet address to the device structure, later we
1319 * will copy the address in the device structure to the lance
1320 * initialization block.
1321 */
1322 for (i = 0; i < 6; i++)
1323 printk("%2.2x%c", dev->dev_addr[i] = idprom->id_ethaddr[i],
1324 i == 5 ? ' ': ':');
1325 printk("\n");
1326
1327 /* Get the IO region */
1328 lp->lregs = sbus_ioremap(&sdev->resource[0], 0,
1329 LANCE_REG_SIZE, lancestr);
1330 if (lp->lregs == 0UL) {
1331 printk(KERN_ERR "%s: Cannot map SunLance registers.\n",
1332 dev->name);
1333 goto fail;
1334 }
1335
1336 lp->sdev = sdev;
1337 if (lebuffer) {
1338 lp->init_block = (volatile struct lance_init_block *)
1339 sbus_ioremap(&lebuffer->resource[0], 0,
1340 sizeof(struct lance_init_block), "lebuffer");
1341 if (lp->init_block == NULL) {
1342 printk(KERN_ERR "%s: Cannot map SunLance PIO buffer.\n",
1343 dev->name);
1344 goto fail;
1345 }
1346 lp->init_block_dvma = 0;
1347 lp->pio_buffer = 1;
1348 lp->init_ring = lance_init_ring_pio;
1349 lp->rx = lance_rx_pio;
1350 lp->tx = lance_tx_pio;
1351 } else {
1352 lp->init_block = (volatile struct lance_init_block *)
1353 sbus_alloc_consistent(sdev, sizeof(struct lance_init_block),
1354 &lp->init_block_dvma);
1355 if (lp->init_block == NULL ||
1356 lp->init_block_dvma == 0) {
1357 printk(KERN_ERR "%s: Cannot allocate consistent DMA memory.\n",
1358 dev->name);
1359 goto fail;
1360 }
1361 lp->pio_buffer = 0;
1362 lp->init_ring = lance_init_ring_dvma;
1363 lp->rx = lance_rx_dvma;
1364 lp->tx = lance_tx_dvma;
1365 }
1366 lp->busmaster_regval = prom_getintdefault(sdev->prom_node,
1367 "busmaster-regval",
1368 (LE_C3_BSWP | LE_C3_ACON |
1369 LE_C3_BCON));
1370
1371 lp->name = lancestr;
1372 lp->ledma = ledma;
1373
1374 lp->burst_sizes = 0;
1375 if (lp->ledma) {
1376 char prop[6];
1377 unsigned int sbmask;
1378 u32 csr;
1379
1380 /* Find burst-size property for ledma */
1381 lp->burst_sizes = prom_getintdefault(ledma->sdev->prom_node,
1382 "burst-sizes", 0);
1383
1384 /* ledma may be capable of fast bursts, but sbus may not. */
1385 sbmask = prom_getintdefault(ledma->sdev->bus->prom_node,
1386 "burst-sizes", DMA_BURSTBITS);
1387 lp->burst_sizes &= sbmask;
1388
1389 /* Get the cable-selection property */
1390 memset(prop, 0, sizeof(prop));
1391 prom_getstring(ledma->sdev->prom_node, "cable-selection",
1392 prop, sizeof(prop));
1393 if (prop[0] == 0) {
1394 int topnd, nd;
1395
1396 printk(KERN_INFO "%s: using auto-carrier-detection.\n",
1397 dev->name);
1398
1399 /* Is this found at /options .attributes in all
1400 * Prom versions? XXX
1401 */
1402 topnd = prom_getchild(prom_root_node);
1403
1404 nd = prom_searchsiblings(topnd, "options");
1405 if (!nd)
1406 goto no_link_test;
1407
1408 if (!prom_node_has_property(nd, "tpe-link-test?"))
1409 goto no_link_test;
1410
1411 memset(prop, 0, sizeof(prop));
1412 prom_getstring(nd, "tpe-link-test?", prop,
1413 sizeof(prop));
1414
1415 if (strcmp(prop, "true")) {
1416 printk(KERN_NOTICE "%s: warning: overriding option "
1417 "'tpe-link-test?'\n", dev->name);
1418 printk(KERN_NOTICE "%s: warning: mail any problems "
1419 "to ecd@skynet.be\n", dev->name);
1420 auxio_set_lte(AUXIO_LTE_ON);
1421 }
1422 no_link_test:
1423 lp->auto_select = 1;
1424 lp->tpe = 0;
1425 } else if (!strcmp(prop, "aui")) {
1426 lp->auto_select = 0;
1427 lp->tpe = 0;
1428 } else {
1429 lp->auto_select = 0;
1430 lp->tpe = 1;
1431 }
1432
1433 lp->dregs = ledma->regs;
1434
1435 /* Reset ledma */
1436 csr = sbus_readl(lp->dregs + DMA_CSR);
1437 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
1438 udelay(200);
1439 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
1440 } else
1441 lp->dregs = 0;
1442
1443 /* This should never happen. */
1444 if ((unsigned long)(lp->init_block->brx_ring) & 0x07) {
1445 printk(KERN_ERR "%s: ERROR: Rx and Tx rings not on even boundary.\n",
1446 dev->name);
1447 goto fail;
1448 }
1449
1450 lp->dev = dev;
1451 SET_MODULE_OWNER(dev);
1452 dev->open = &lance_open;
1453 dev->stop = &lance_close;
1454 dev->hard_start_xmit = &lance_start_xmit;
1455 dev->tx_timeout = &lance_tx_timeout;
1456 dev->watchdog_timeo = 5*HZ;
1457 dev->get_stats = &lance_get_stats;
1458 dev->set_multicast_list = &lance_set_multicast;
1459
1460 dev->irq = sdev->irqs[0];
1461
1462 dev->dma = 0;
1463 ether_setup(dev);
1464
1465 /* We cannot sleep if the chip is busy during a
1466 * multicast list update event, because such events
1467 * can occur from interrupts (ex. IPv6). So we
1468 * use a timer to try again later when necessary. -DaveM
1469 */
1470 init_timer(&lp->multicast_timer);
1471 lp->multicast_timer.data = (unsigned long) dev;
1472 lp->multicast_timer.function = &lance_set_multicast_retry;
1473
1474 dev->ifindex = dev_new_index();
1475 lp->next_module = root_lance_dev;
1476 root_lance_dev = lp;
1477
1478 return 0;
1479
1480 fail:
1481 if (lp != NULL)
1482 lance_free_hwresources(lp);
1483 return -ENODEV;
1484 }
1485
1486 /* On 4m, find the associated dma for the lance chip */
1487 static inline struct sbus_dma *find_ledma(struct sbus_dev *sdev)
1488 {
1489 struct sbus_dma *p;
1490
1491 for_each_dvma(p) {
1492 if (p->sdev == sdev)
1493 return p;
1494 }
1495 return NULL;
1496 }
1497
1498 #ifdef CONFIG_SUN4
1499
1500 #include <asm/sun4paddr.h>
1501 #include <asm/machines.h>
1502
1503 /* Find all the lance cards on the system and initialize them */
1504 static int __init sparc_lance_probe(void)
1505 {
1506 static struct sbus_dev sdev;
1507 static int called;
1508
1509 root_lance_dev = NULL;
1510
1511 if (called)
1512 return -ENODEV;
1513 called++;
1514
1515 if ((idprom->id_machtype == (SM_SUN4|SM_4_330)) ||
1516 (idprom->id_machtype == (SM_SUN4|SM_4_470))) {
1517 memset(&sdev, 0, sizeof(sdev));
1518 sdev.reg_addrs[0].phys_addr = sun4_eth_physaddr;
1519 sdev.irqs[0] = 6;
1520 return sparc_lance_init(NULL, &sdev, 0, 0);
1521 }
1522 return -ENODEV;
1523 }
1524
1525 #else /* !CONFIG_SUN4 */
1526
1527 /* Find all the lance cards on the system and initialize them */
1528 static int __init sparc_lance_probe(void)
1529 {
1530 struct sbus_bus *bus;
1531 struct sbus_dev *sdev = 0;
1532 struct net_device *dev = NULL;
1533 struct sbus_dma *ledma = 0;
1534 static int called;
1535 int cards = 0, v;
1536
1537 root_lance_dev = NULL;
1538
1539 if (called)
1540 return -ENODEV;
1541 called++;
1542
1543 for_each_sbus (bus) {
1544 for_each_sbusdev (sdev, bus) {
1545 if (cards)
1546 dev = NULL;
1547 if (strcmp(sdev->prom_name, "le") == 0) {
1548 cards++;
1549 if ((v = sparc_lance_init(dev, sdev, 0, 0)))
1550 return v;
1551 continue;
1552 }
1553 if (strcmp(sdev->prom_name, "ledma") == 0) {
1554 cards++;
1555 ledma = find_ledma(sdev);
1556 if ((v = sparc_lance_init(dev, sdev->child,
1557 ledma, 0)))
1558 return v;
1559 continue;
1560 }
1561 if (strcmp(sdev->prom_name, "lebuffer") == 0){
1562 cards++;
1563 if ((v = sparc_lance_init(dev, sdev->child,
1564 0, sdev)))
1565 return v;
1566 continue;
1567 }
1568 } /* for each sbusdev */
1569 } /* for each sbus */
1570 if (!cards)
1571 return -ENODEV;
1572 return 0;
1573 }
1574 #endif /* !CONFIG_SUN4 */
1575
1576 static void __exit sparc_lance_cleanup(void)
1577 {
1578 struct lance_private *lp;
1579
1580 while (root_lance_dev) {
1581 lp = root_lance_dev->next_module;
1582
1583 unregister_netdev(root_lance_dev->dev);
1584 lance_free_hwresources(root_lance_dev);
1585 kfree(root_lance_dev->dev);
1586 root_lance_dev = lp;
1587 }
1588 }
1589
1590 module_init(sparc_lance_probe);
1591 module_exit(sparc_lance_cleanup);
1592 MODULE_LICENSE("GPL");
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