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[linux-2.6/linux-mips.git] / drivers / net / sun3lance.c
blob5bfad9ba4a8a598b0da8216de11d832753cf5d01
1 /* sun3lance.c: Ethernet driver for SUN3 Lance chip */
2 /*
3
4 Sun3 Lance ethernet driver, by Sam Creasey (sammy@users.qual.net).
5 This driver is a part of the linux kernel, and is thus distributed
6 under the GNU General Public License.
7
8 The values used in LANCE_OBIO and LANCE_IRQ seem to be empirically
9 true for the correct IRQ and address of the lance registers. They
10 have not been widely tested, however. What we probably need is a
11 "proper" way to search for a device in the sun3's prom, but, alas,
12 linux has no such thing.
13
14 This driver is largely based on atarilance.c, by Roman Hodek. Other
15 sources of inspiration were the NetBSD sun3 am7990 driver, and the
16 linux sparc lance driver (sunlance.c).
17
18 There are more assumptions made throughout this driver, it almost
19 certainly still needs work, but it does work at least for RARP/BOOTP and
20 mounting the root NFS filesystem.
21
22 */
23
24 static char *version = "sun3lance.c: v1.2 1/12/2001 Sam Creasey (sammy@sammy.net)\n";
25
26 #include <linux/module.h>
27 #include <linux/stddef.h>
28 #include <linux/kernel.h>
29 #include <linux/string.h>
30 #include <linux/errno.h>
31 #include <linux/slab.h>
32 #include <linux/interrupt.h>
33 #include <linux/init.h>
34 #include <linux/ioport.h>
35 #include <linux/delay.h>
36 #include <linux/netdevice.h>
37 #include <linux/etherdevice.h>
38 #include <linux/skbuff.h>
39
40 #include <asm/setup.h>
41 #include <asm/irq.h>
42 #include <asm/bitops.h>
43 #include <asm/io.h>
44 #include <asm/pgtable.h>
45 #include <asm/pgalloc.h>
46 #include <asm/dvma.h>
47 #include <asm/idprom.h>
48 #include <asm/machines.h>
49
50 #ifdef CONFIG_SUN3
51 #include <asm/sun3mmu.h>
52 #else
53 #include <asm/sun3xprom.h>
54 #endif
55
56 /* sun3/60 addr/irq for the lance chip. If your sun is different,
57 change this. */
58 #define LANCE_OBIO 0x120000
59 #define LANCE_IRQ IRQ3
60
61 /* Debug level:
62 * 0 = silent, print only serious errors
63 * 1 = normal, print error messages
64 * 2 = debug, print debug infos
65 * 3 = debug, print even more debug infos (packet data)
66 */
67
68 #define LANCE_DEBUG 0
69
70 #ifdef LANCE_DEBUG
71 static int lance_debug = LANCE_DEBUG;
72 #else
73 static int lance_debug = 1;
74 #endif
75 MODULE_PARM(lance_debug, "i");
76 MODULE_PARM_DESC(lance_debug, "SUN3 Lance debug level (0-3)");
77 MODULE_LICENSE("GPL");
78
79 #define DPRINTK(n,a) \
80 do { \
81 if (lance_debug >= n) \
82 printk a; \
83 } while( 0 )
84
85
86 /* we're only using 32k of memory, so we use 4 TX
87 buffers and 16 RX buffers. These values are expressed as log2. */
88
89 #define TX_LOG_RING_SIZE 3
90 #define RX_LOG_RING_SIZE 5
91
92 /* These are the derived values */
93
94 #define TX_RING_SIZE (1 << TX_LOG_RING_SIZE)
95 #define TX_RING_LEN_BITS (TX_LOG_RING_SIZE << 5)
96 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
97
98 #define RX_RING_SIZE (1 << RX_LOG_RING_SIZE)
99 #define RX_RING_LEN_BITS (RX_LOG_RING_SIZE << 5)
100 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
101
102 /* Definitions for packet buffer access: */
103 #define PKT_BUF_SZ 1544
104
105 /* Get the address of a packet buffer corresponding to a given buffer head */
106 #define PKTBUF_ADDR(head) (void *)((unsigned long)(MEM) | (head)->base)
107
108
109 /* The LANCE Rx and Tx ring descriptors. */
110 struct lance_rx_head {
111 unsigned short base; /* Low word of base addr */
112 volatile unsigned char flag;
113 unsigned char base_hi; /* High word of base addr (unused) */
114 short buf_length; /* This length is 2s complement! */
115 volatile short msg_length; /* This length is "normal". */
116 };
117
118 struct lance_tx_head {
119 unsigned short base; /* Low word of base addr */
120 volatile unsigned char flag;
121 unsigned char base_hi; /* High word of base addr (unused) */
122 short length; /* Length is 2s complement! */
123 volatile short misc;
124 };
125
126 /* The LANCE initialization block, described in databook. */
127 struct lance_init_block {
128 unsigned short mode; /* Pre-set mode */
129 unsigned char hwaddr[6]; /* Physical ethernet address */
130 unsigned int filter[2]; /* Multicast filter (unused). */
131 /* Receive and transmit ring base, along with length bits. */
132 unsigned short rdra;
133 unsigned short rlen;
134 unsigned short tdra;
135 unsigned short tlen;
136 unsigned short pad[4]; /* is thie needed? */
137 };
138
139 /* The whole layout of the Lance shared memory */
140 struct lance_memory {
141 struct lance_init_block init;
142 struct lance_tx_head tx_head[TX_RING_SIZE];
143 struct lance_rx_head rx_head[RX_RING_SIZE];
144 char rx_data[RX_RING_SIZE][PKT_BUF_SZ];
145 char tx_data[TX_RING_SIZE][PKT_BUF_SZ];
146 };
147
148 /* The driver's private device structure */
149
150 struct lance_private {
151 volatile unsigned short *iobase;
152 struct lance_memory *mem;
153 int new_rx, new_tx; /* The next free ring entry */
154 int old_tx, old_rx; /* ring entry to be processed */
155 struct net_device_stats stats;
156 /* These two must be longs for set_bit() */
157 long tx_full;
158 long lock;
159 };
160
161 /* I/O register access macros */
162
163 #define MEM lp->mem
164 #define DREG lp->iobase[0]
165 #define AREG lp->iobase[1]
166 #define REGA(a) ( AREG = (a), DREG )
167
168 /* Definitions for the Lance */
169
170 /* tx_head flags */
171 #define TMD1_ENP 0x01 /* end of packet */
172 #define TMD1_STP 0x02 /* start of packet */
173 #define TMD1_DEF 0x04 /* deferred */
174 #define TMD1_ONE 0x08 /* one retry needed */
175 #define TMD1_MORE 0x10 /* more than one retry needed */
176 #define TMD1_ERR 0x40 /* error summary */
177 #define TMD1_OWN 0x80 /* ownership (set: chip owns) */
178
179 #define TMD1_OWN_CHIP TMD1_OWN
180 #define TMD1_OWN_HOST 0
181
182 /* tx_head misc field */
183 #define TMD3_TDR 0x03FF /* Time Domain Reflectometry counter */
184 #define TMD3_RTRY 0x0400 /* failed after 16 retries */
185 #define TMD3_LCAR 0x0800 /* carrier lost */
186 #define TMD3_LCOL 0x1000 /* late collision */
187 #define TMD3_UFLO 0x4000 /* underflow (late memory) */
188 #define TMD3_BUFF 0x8000 /* buffering error (no ENP) */
189
190 /* rx_head flags */
191 #define RMD1_ENP 0x01 /* end of packet */
192 #define RMD1_STP 0x02 /* start of packet */
193 #define RMD1_BUFF 0x04 /* buffer error */
194 #define RMD1_CRC 0x08 /* CRC error */
195 #define RMD1_OFLO 0x10 /* overflow */
196 #define RMD1_FRAM 0x20 /* framing error */
197 #define RMD1_ERR 0x40 /* error summary */
198 #define RMD1_OWN 0x80 /* ownership (set: ship owns) */
199
200 #define RMD1_OWN_CHIP RMD1_OWN
201 #define RMD1_OWN_HOST 0
202
203 /* register names */
204 #define CSR0 0 /* mode/status */
205 #define CSR1 1 /* init block addr (low) */
206 #define CSR2 2 /* init block addr (high) */
207 #define CSR3 3 /* misc */
208 #define CSR8 8 /* address filter */
209 #define CSR15 15 /* promiscuous mode */
210
211 /* CSR0 */
212 /* (R=readable, W=writeable, S=set on write, C=clear on write) */
213 #define CSR0_INIT 0x0001 /* initialize (RS) */
214 #define CSR0_STRT 0x0002 /* start (RS) */
215 #define CSR0_STOP 0x0004 /* stop (RS) */
216 #define CSR0_TDMD 0x0008 /* transmit demand (RS) */
217 #define CSR0_TXON 0x0010 /* transmitter on (R) */
218 #define CSR0_RXON 0x0020 /* receiver on (R) */
219 #define CSR0_INEA 0x0040 /* interrupt enable (RW) */
220 #define CSR0_INTR 0x0080 /* interrupt active (R) */
221 #define CSR0_IDON 0x0100 /* initialization done (RC) */
222 #define CSR0_TINT 0x0200 /* transmitter interrupt (RC) */
223 #define CSR0_RINT 0x0400 /* receiver interrupt (RC) */
224 #define CSR0_MERR 0x0800 /* memory error (RC) */
225 #define CSR0_MISS 0x1000 /* missed frame (RC) */
226 #define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */
227 #define CSR0_BABL 0x4000 /* babble: tx-ed too many bits (RC) */
228 #define CSR0_ERR 0x8000 /* error (RC) */
229
230 /* CSR3 */
231 #define CSR3_BCON 0x0001 /* byte control */
232 #define CSR3_ACON 0x0002 /* ALE control */
233 #define CSR3_BSWP 0x0004 /* byte swap (1=big endian) */
234
235 /***************************** Prototypes *****************************/
236
237 static int lance_probe( struct net_device *dev);
238 static int lance_open( struct net_device *dev );
239 static void lance_init_ring( struct net_device *dev );
240 static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev );
241 static irqreturn_t lance_interrupt( int irq, void *dev_id, struct pt_regs *fp );
242 static int lance_rx( struct net_device *dev );
243 static int lance_close( struct net_device *dev );
244 static struct net_device_stats *lance_get_stats( struct net_device *dev );
245 static void set_multicast_list( struct net_device *dev );
246
247 /************************* End of Prototypes **************************/
248
249 int __init sun3lance_probe( struct net_device *dev )
250 {
251 static int found;
252
253 /* check that this machine has an onboard lance */
254 switch(idprom->id_machtype) {
255 case SM_SUN3|SM_3_50:
256 case SM_SUN3|SM_3_60:
257 case SM_SUN3X|SM_3_80:
258 /* these machines have lance */
259 break;
260
261 default:
262 return(-ENODEV);
263 }
264
265 if(found)
266 return(-ENODEV);
267
268 if (lance_probe(dev)) {
269 found = 1;
270 return( 0 );
271 }
272
273 return( -ENODEV );
274 }
275
276 static int __init lance_probe( struct net_device *dev)
277 {
278 unsigned long ioaddr;
279
280 struct lance_private *lp;
281 int i;
282 static int did_version;
283 volatile unsigned short *ioaddr_probe;
284 unsigned short tmp1, tmp2;
285
286 #ifdef CONFIG_SUN3
287 ioaddr = (unsigned long)ioremap(LANCE_OBIO, PAGE_SIZE);
288 #else
289 ioaddr = SUN3X_LANCE;
290 #endif
291
292 /* test to see if there's really a lance here */
293 /* (CSRO_INIT shouldn't be readable) */
294
295 ioaddr_probe = (volatile unsigned short *)ioaddr;
296 tmp1 = ioaddr_probe[0];
297 tmp2 = ioaddr_probe[1];
298
299 ioaddr_probe[1] = CSR0;
300 ioaddr_probe[0] = CSR0_INIT | CSR0_STOP;
301
302 if(ioaddr_probe[0] != CSR0_STOP) {
303 ioaddr_probe[0] = tmp1;
304 ioaddr_probe[1] = tmp2;
305
306 return 0;
307 }
308
309 init_etherdev( dev, sizeof(struct lance_private) );
310 if (!dev->priv) {
311 dev->priv = kmalloc( sizeof(struct lance_private), GFP_KERNEL );
312 if (!dev->priv)
313 return 0;
314 }
315 lp = (struct lance_private *)dev->priv;
316
317 MEM = dvma_malloc_align(sizeof(struct lance_memory), 0x10000);
318
319 lp->iobase = (volatile unsigned short *)ioaddr;
320 dev->base_addr = (unsigned long)ioaddr; /* informational only */
321
322 REGA(CSR0) = CSR0_STOP;
323
324 request_irq(LANCE_IRQ, lance_interrupt, 0, "SUN3 Lance", dev);
325 dev->irq = (unsigned short)LANCE_IRQ;
326
327
328 printk("%s: SUN3 Lance at io %#lx, mem %#lx, irq %d, hwaddr ",
329 dev->name,
330 (unsigned long)ioaddr,
331 (unsigned long)MEM,
332 dev->irq);
333
334 /* copy in the ethernet address from the prom */
335 for(i = 0; i < 6 ; i++)
336 dev->dev_addr[i] = idprom->id_ethaddr[i];
337
338 /* tell the card it's ether address, bytes swapped */
339 MEM->init.hwaddr[0] = dev->dev_addr[1];
340 MEM->init.hwaddr[1] = dev->dev_addr[0];
341 MEM->init.hwaddr[2] = dev->dev_addr[3];
342 MEM->init.hwaddr[3] = dev->dev_addr[2];
343 MEM->init.hwaddr[4] = dev->dev_addr[5];
344 MEM->init.hwaddr[5] = dev->dev_addr[4];
345
346 for( i = 0; i < 6; ++i )
347 printk( "%02x%s", dev->dev_addr[i], (i < 5) ? ":" : "\n" );
348
349 MEM->init.mode = 0x0000;
350 MEM->init.filter[0] = 0x00000000;
351 MEM->init.filter[1] = 0x00000000;
352 MEM->init.rdra = dvma_vtob(MEM->rx_head);
353 MEM->init.rlen = (RX_LOG_RING_SIZE << 13) |
354 (dvma_vtob(MEM->rx_head) >> 16);
355 MEM->init.tdra = dvma_vtob(MEM->tx_head);
356 MEM->init.tlen = (TX_LOG_RING_SIZE << 13) |
357 (dvma_vtob(MEM->tx_head) >> 16);
358
359 DPRINTK(2, ("initaddr: %08lx rx_ring: %08lx tx_ring: %08lx\n",
360 dvma_vtob(&(MEM->init)), dvma_vtob(MEM->rx_head),
361 (dvma_vtob(MEM->tx_head))));
362
363 if (did_version++ == 0)
364 printk( version );
365
366 /* The LANCE-specific entries in the device structure. */
367 dev->open = &lance_open;
368 dev->hard_start_xmit = &lance_start_xmit;
369 dev->stop = &lance_close;
370 dev->get_stats = &lance_get_stats;
371 dev->set_multicast_list = &set_multicast_list;
372 dev->set_mac_address = 0;
373 // KLUDGE -- REMOVE ME
374 set_bit(__LINK_STATE_PRESENT, &dev->state);
375
376
377 memset( &lp->stats, 0, sizeof(lp->stats) );
378
379 return 1;
380 }
381
382 static int lance_open( struct net_device *dev )
383 {
384 struct lance_private *lp = (struct lance_private *)dev->priv;
385 int i;
386
387 DPRINTK( 2, ( "%s: lance_open()\n", dev->name ));
388
389 REGA(CSR0) = CSR0_STOP;
390
391 lance_init_ring(dev);
392
393 /* From now on, AREG is kept to point to CSR0 */
394 REGA(CSR0) = CSR0_INIT;
395
396 i = 1000000;
397 while (--i > 0)
398 if (DREG & CSR0_IDON)
399 break;
400 if (i < 0 || (DREG & CSR0_ERR)) {
401 DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n",
402 dev->name, i, DREG ));
403 DREG = CSR0_STOP;
404 return( -EIO );
405 }
406
407 DREG = CSR0_IDON | CSR0_STRT | CSR0_INEA;
408
409 netif_start_queue(dev);
410
411 DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG ));
412 MOD_INC_USE_COUNT;
413
414 return( 0 );
415 }
416
417
418 /* Initialize the LANCE Rx and Tx rings. */
419
420 static void lance_init_ring( struct net_device *dev )
421 {
422 struct lance_private *lp = (struct lance_private *)dev->priv;
423 int i;
424
425 lp->lock = 0;
426 lp->tx_full = 0;
427 lp->new_rx = lp->new_tx = 0;
428 lp->old_rx = lp->old_tx = 0;
429
430 for( i = 0; i < TX_RING_SIZE; i++ ) {
431 MEM->tx_head[i].base = dvma_vtob(MEM->tx_data[i]);
432 MEM->tx_head[i].flag = 0;
433 MEM->tx_head[i].base_hi =
434 (dvma_vtob(MEM->tx_data[i])) >>16;
435 MEM->tx_head[i].length = 0;
436 MEM->tx_head[i].misc = 0;
437 }
438
439 for( i = 0; i < RX_RING_SIZE; i++ ) {
440 MEM->rx_head[i].base = dvma_vtob(MEM->rx_data[i]);
441 MEM->rx_head[i].flag = RMD1_OWN_CHIP;
442 MEM->rx_head[i].base_hi =
443 (dvma_vtob(MEM->rx_data[i])) >> 16;
444 MEM->rx_head[i].buf_length = -PKT_BUF_SZ | 0xf000;
445 MEM->rx_head[i].msg_length = 0;
446 }
447
448 /* tell the card it's ether address, bytes swapped */
449 MEM->init.hwaddr[0] = dev->dev_addr[1];
450 MEM->init.hwaddr[1] = dev->dev_addr[0];
451 MEM->init.hwaddr[2] = dev->dev_addr[3];
452 MEM->init.hwaddr[3] = dev->dev_addr[2];
453 MEM->init.hwaddr[4] = dev->dev_addr[5];
454 MEM->init.hwaddr[5] = dev->dev_addr[4];
455
456 MEM->init.mode = 0x0000;
457 MEM->init.filter[0] = 0x00000000;
458 MEM->init.filter[1] = 0x00000000;
459 MEM->init.rdra = dvma_vtob(MEM->rx_head);
460 MEM->init.rlen = (RX_LOG_RING_SIZE << 13) |
461 (dvma_vtob(MEM->rx_head) >> 16);
462 MEM->init.tdra = dvma_vtob(MEM->tx_head);
463 MEM->init.tlen = (TX_LOG_RING_SIZE << 13) |
464 (dvma_vtob(MEM->tx_head) >> 16);
465
466
467 /* tell the lance the address of its init block */
468 REGA(CSR1) = dvma_vtob(&(MEM->init));
469 REGA(CSR2) = dvma_vtob(&(MEM->init)) >> 16;
470
471 #ifdef CONFIG_SUN3X
472 REGA(CSR3) = CSR3_BSWP | CSR3_ACON | CSR3_BCON;
473 #else
474 REGA(CSR3) = CSR3_BSWP;
475 #endif
476
477 }
478
479
480 static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev )
481 {
482 struct lance_private *lp = (struct lance_private *)dev->priv;
483 int entry, len;
484 struct lance_tx_head *head;
485 unsigned long flags;
486
487 /* Transmitter timeout, serious problems. */
488 if (netif_queue_stopped(dev)) {
489 int tickssofar = jiffies - dev->trans_start;
490 if (tickssofar < 20)
491 return( 1 );
492
493 DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n",
494 dev->name, DREG ));
495 DREG = CSR0_STOP;
496 /*
497 * Always set BSWP after a STOP as STOP puts it back into
498 * little endian mode.
499 */
500 REGA(CSR3) = CSR3_BSWP;
501 lp->stats.tx_errors++;
502
503 if(lance_debug >= 2) {
504 int i;
505 printk("Ring data: old_tx %d new_tx %d%s new_rx %d\n",
506 lp->old_tx, lp->new_tx,
507 lp->tx_full ? " (full)" : "",
508 lp->new_rx );
509 for( i = 0 ; i < RX_RING_SIZE; i++ )
510 printk( "rx #%d: base=%04x blen=%04x mlen=%04x\n",
511 i, MEM->rx_head[i].base,
512 -MEM->rx_head[i].buf_length,
513 MEM->rx_head[i].msg_length);
514 for( i = 0 ; i < TX_RING_SIZE; i++ )
515 printk("tx #%d: base=%04x len=%04x misc=%04x\n",
516 i, MEM->tx_head[i].base,
517 -MEM->tx_head[i].length,
518 MEM->tx_head[i].misc );
519 }
520
521 lance_init_ring(dev);
522 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT;
523
524 netif_start_queue(dev);
525 dev->trans_start = jiffies;
526
527 return 0;
528 }
529
530
531 /* Block a timer-based transmit from overlapping. This could better be
532 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
533
534 /* Block a timer-based transmit from overlapping with us by
535 stopping the queue for a bit... */
536
537 netif_stop_queue(dev);
538
539 if (test_and_set_bit( 0, (void*)&lp->lock ) != 0) {
540 printk( "%s: tx queue lock!.\n", dev->name);
541 /* don't clear dev->tbusy flag. */
542 return 1;
543 }
544
545 AREG = CSR0;
546 DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n",
547 dev->name, DREG ));
548
549 #ifdef CONFIG_SUN3X
550 /* this weirdness doesn't appear on sun3... */
551 if(!(DREG & CSR0_INIT)) {
552 DPRINTK( 1, ("INIT not set, reinitializing...\n"));
553 REGA( CSR0 ) = CSR0_STOP;
554 lance_init_ring(dev);
555 REGA( CSR0 ) = CSR0_INIT | CSR0_STRT;
556 }
557 #endif
558
559 /* Fill in a Tx ring entry */
560 #if 0
561 if (lance_debug >= 2) {
562 u_char *p;
563 int i;
564 printk( "%s: TX pkt %d type 0x%04x from ", dev->name,
565 lp->new_tx, ((u_short *)skb->data)[6]);
566 for( p = &((u_char *)skb->data)[6], i = 0; i < 6; i++ )
567 printk("%02x%s", *p++, i != 5 ? ":" : "" );
568 printk(" to ");
569 for( p = (u_char *)skb->data, i = 0; i < 6; i++ )
570 printk("%02x%s", *p++, i != 5 ? ":" : "" );
571 printk(" data at 0x%08x len %d\n", (int)skb->data,
572 (int)skb->len );
573 }
574 #endif
575 /* We're not prepared for the int until the last flags are set/reset.
576 * And the int may happen already after setting the OWN_CHIP... */
577 local_irq_save(flags);
578
579 /* Mask to ring buffer boundary. */
580 entry = lp->new_tx;
581 head = &(MEM->tx_head[entry]);
582
583 /* Caution: the write order is important here, set the "ownership" bits
584 * last.
585 */
586
587 /* the sun3's lance needs it's buffer padded to the minimum
588 size */
589 len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
590
591 // head->length = -len;
592 head->length = (-len) | 0xf000;
593 head->misc = 0;
594
595 memcpy( PKTBUF_ADDR(head), (void *)skb->data, skb->len );
596 if (len != skb->len)
597 memset(PKTBUF_ADDR(head) + skb->len, 0, len-skb->len);
598
599 head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP;
600 lp->new_tx = (lp->new_tx + 1) & TX_RING_MOD_MASK;
601 lp->stats.tx_bytes += skb->len;
602
603 /* Trigger an immediate send poll. */
604 REGA(CSR0) = CSR0_INEA | CSR0_TDMD | CSR0_STRT;
605 AREG = CSR0;
606 DPRINTK( 2, ( "%s: lance_start_xmit() exiting, csr0 %4.4x.\n",
607 dev->name, DREG ));
608 dev->trans_start = jiffies;
609 dev_kfree_skb( skb );
610
611 lp->lock = 0;
612 if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) ==
613 TMD1_OWN_HOST)
614 netif_start_queue(dev);
615
616 local_irq_restore(flags);
617
618 return 0;
619 }
620
621 /* The LANCE interrupt handler. */
622
623 static irqreturn_t lance_interrupt( int irq, void *dev_id, struct pt_regs *fp)
624 {
625 struct net_device *dev = dev_id;
626 struct lance_private *lp = dev->priv;
627 int csr0;
628 static int in_interrupt;
629
630 if (dev == NULL) {
631 DPRINTK( 1, ( "lance_interrupt(): invalid dev_id\n" ));
632 return IRQ_NONE;
633 }
634
635 if (in_interrupt)
636 DPRINTK( 2, ( "%s: Re-entering the interrupt handler.\n", dev->name ));
637 in_interrupt = 1;
638
639 still_more:
640 flush_cache_all();
641
642 AREG = CSR0;
643 csr0 = DREG;
644
645 /* ack interrupts */
646 DREG = csr0 & (CSR0_TINT | CSR0_RINT | CSR0_IDON);
647
648 /* clear errors */
649 if(csr0 & CSR0_ERR)
650 DREG = CSR0_BABL | CSR0_MERR | CSR0_CERR | CSR0_MISS;
651
652
653 DPRINTK( 2, ( "%s: interrupt csr0=%04x new csr=%04x.\n",
654 dev->name, csr0, DREG ));
655
656 if (csr0 & CSR0_TINT) { /* Tx-done interrupt */
657 int old_tx = lp->old_tx;
658
659 // if(lance_debug >= 3) {
660 // int i;
661 //
662 // printk("%s: tx int\n", dev->name);
663 //
664 // for(i = 0; i < TX_RING_SIZE; i++)
665 // printk("ring %d flag=%04x\n", i,
666 // MEM->tx_head[i].flag);
667 // }
668
669 while( old_tx != lp->new_tx) {
670 struct lance_tx_head *head = &(MEM->tx_head[old_tx]);
671
672 DPRINTK(3, ("on tx_ring %d\n", old_tx));
673
674 if (head->flag & TMD1_OWN_CHIP)
675 break; /* It still hasn't been Txed */
676
677 if (head->flag & TMD1_ERR) {
678 int status = head->misc;
679 lp->stats.tx_errors++;
680 if (status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
681 if (status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
682 if (status & TMD3_LCOL) lp->stats.tx_window_errors++;
683 if (status & (TMD3_UFLO | TMD3_BUFF)) {
684 lp->stats.tx_fifo_errors++;
685 printk("%s: Tx FIFO error\n",
686 dev->name);
687 REGA(CSR0) = CSR0_STOP;
688 REGA(CSR3) = CSR3_BSWP;
689 lance_init_ring(dev);
690 REGA(CSR0) = CSR0_STRT | CSR0_INEA;
691 return IRQ_HANDLED;
692 }
693 } else if(head->flag & (TMD1_ENP | TMD1_STP)) {
694
695 head->flag &= ~(TMD1_ENP | TMD1_STP);
696 if(head->flag & (TMD1_ONE | TMD1_MORE))
697 lp->stats.collisions++;
698
699 lp->stats.tx_packets++;
700 DPRINTK(3, ("cleared tx ring %d\n", old_tx));
701 }
702 old_tx = (old_tx +1) & TX_RING_MOD_MASK;
703 }
704
705 lp->old_tx = old_tx;
706 }
707
708
709 if (netif_queue_stopped(dev)) {
710 /* The ring is no longer full, clear tbusy. */
711 netif_start_queue(dev);
712 netif_wake_queue(dev);
713 }
714
715 if (csr0 & CSR0_RINT) /* Rx interrupt */
716 lance_rx( dev );
717
718 /* Log misc errors. */
719 if (csr0 & CSR0_BABL) lp->stats.tx_errors++; /* Tx babble. */
720 if (csr0 & CSR0_MISS) lp->stats.rx_errors++; /* Missed a Rx frame. */
721 if (csr0 & CSR0_MERR) {
722 DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), "
723 "status %04x.\n", dev->name, csr0 ));
724 /* Restart the chip. */
725 REGA(CSR0) = CSR0_STOP;
726 REGA(CSR3) = CSR3_BSWP;
727 lance_init_ring(dev);
728 REGA(CSR0) = CSR0_STRT | CSR0_INEA;
729 }
730
731
732 /* Clear any other interrupt, and set interrupt enable. */
733 // DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR |
734 // CSR0_IDON | CSR0_INEA;
735
736 REGA(CSR0) = CSR0_INEA;
737
738 if(DREG & (CSR0_RINT | CSR0_TINT)) {
739 DPRINTK(2, ("restarting interrupt, csr0=%#04x\n", DREG));
740 goto still_more;
741 }
742
743 DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n",
744 dev->name, DREG ));
745 in_interrupt = 0;
746 return IRQ_HANDLED;
747 }
748
749 /* get packet, toss into skbuff */
750 static int lance_rx( struct net_device *dev )
751 {
752 struct lance_private *lp = (struct lance_private *)dev->priv;
753 int entry = lp->new_rx;
754
755 /* If we own the next entry, it's a new packet. Send it up. */
756 while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) {
757 struct lance_rx_head *head = &(MEM->rx_head[entry]);
758 int status = head->flag;
759
760 if (status != (RMD1_ENP|RMD1_STP)) { /* There was an error. */
761 /* There is a tricky error noted by John Murphy,
762 <murf@perftech.com> to Russ Nelson: Even with
763 full-sized buffers it's possible for a jabber packet to use two
764 buffers, with only the last correctly noting the error. */
765 if (status & RMD1_ENP) /* Only count a general error at the */
766 lp->stats.rx_errors++; /* end of a packet.*/
767 if (status & RMD1_FRAM) lp->stats.rx_frame_errors++;
768 if (status & RMD1_OFLO) lp->stats.rx_over_errors++;
769 if (status & RMD1_CRC) lp->stats.rx_crc_errors++;
770 if (status & RMD1_BUFF) lp->stats.rx_fifo_errors++;
771 head->flag &= (RMD1_ENP|RMD1_STP);
772 } else {
773 /* Malloc up new buffer, compatible with net-3. */
774 // short pkt_len = head->msg_length;// & 0xfff;
775 short pkt_len = (head->msg_length & 0xfff) - 4;
776 struct sk_buff *skb;
777
778 if (pkt_len < 60) {
779 printk( "%s: Runt packet!\n", dev->name );
780 lp->stats.rx_errors++;
781 }
782 else {
783 skb = dev_alloc_skb( pkt_len+2 );
784 if (skb == NULL) {
785 DPRINTK( 1, ( "%s: Memory squeeze, deferring packet.\n",
786 dev->name ));
787
788 lp->stats.rx_dropped++;
789 head->msg_length = 0;
790 head->flag |= RMD1_OWN_CHIP;
791 lp->new_rx = (lp->new_rx+1) &
792 RX_RING_MOD_MASK;
793 }
794
795 #if 0
796 if (lance_debug >= 3) {
797 u_char *data = PKTBUF_ADDR(head), *p;
798 printk( "%s: RX pkt %d type 0x%04x from ", dev->name, entry, ((u_short *)data)[6]);
799 for( p = &data[6], i = 0; i < 6; i++ )
800 printk("%02x%s", *p++, i != 5 ? ":" : "" );
801 printk(" to ");
802 for( p = data, i = 0; i < 6; i++ )
803 printk("%02x%s", *p++, i != 5 ? ":" : "" );
804 printk(" data %02x %02x %02x %02x %02x %02x %02x %02x "
805 "len %d at %08x\n",
806 data[15], data[16], data[17], data[18],
807 data[19], data[20], data[21], data[22],
808 pkt_len, data);
809 }
810 #endif
811 if (lance_debug >= 3) {
812 u_char *data = PKTBUF_ADDR(head);
813 printk( "%s: RX pkt %d type 0x%04x len %d\n ", dev->name, entry, ((u_short *)data)[6], pkt_len);
814 }
815
816
817 skb->dev = dev;
818 skb_reserve( skb, 2 ); /* 16 byte align */
819 skb_put( skb, pkt_len ); /* Make room */
820 // memcpy( skb->data, PKTBUF_ADDR(head), pkt_len );
821 eth_copy_and_sum(skb,
822 PKTBUF_ADDR(head),
823 pkt_len, 0);
824
825 skb->protocol = eth_type_trans( skb, dev );
826 netif_rx( skb );
827 dev->last_rx = jiffies;
828 lp->stats.rx_packets++;
829 lp->stats.rx_bytes += pkt_len;
830 }
831 }
832
833 // head->buf_length = -PKT_BUF_SZ | 0xf000;
834 head->msg_length = 0;
835 head->flag = RMD1_OWN_CHIP;
836
837 entry = lp->new_rx = (lp->new_rx +1) & RX_RING_MOD_MASK;
838 }
839
840 /* From lance.c (Donald Becker): */
841 /* We should check that at least two ring entries are free.
842 If not, we should free one and mark stats->rx_dropped++. */
843
844 return 0;
845 }
846
847
848 static int lance_close( struct net_device *dev )
849 {
850 struct lance_private *lp = (struct lance_private *)dev->priv;
851
852 netif_stop_queue(dev);
853
854 AREG = CSR0;
855
856 DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n",
857 dev->name, DREG ));
858
859 /* We stop the LANCE here -- it occasionally polls
860 memory if we don't. */
861 DREG = CSR0_STOP;
862
863 MOD_DEC_USE_COUNT;
864 return 0;
865 }
866
867
868 static struct net_device_stats *lance_get_stats( struct net_device *dev )
869 {
870 struct lance_private *lp = (struct lance_private *)dev->priv;
871
872 return &lp->stats;
873 }
874
875
876 /* Set or clear the multicast filter for this adaptor.
877 num_addrs == -1 Promiscuous mode, receive all packets
878 num_addrs == 0 Normal mode, clear multicast list
879 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
880 best-effort filtering.
881 */
882
883 /* completely untested on a sun3 */
884 static void set_multicast_list( struct net_device *dev )
885 {
886 struct lance_private *lp = (struct lance_private *)dev->priv;
887
888 if(netif_queue_stopped(dev))
889 /* Only possible if board is already started */
890 return;
891
892 /* We take the simple way out and always enable promiscuous mode. */
893 DREG = CSR0_STOP; /* Temporarily stop the lance. */
894
895 if (dev->flags & IFF_PROMISC) {
896 /* Log any net taps. */
897 DPRINTK( 1, ( "%s: Promiscuous mode enabled.\n", dev->name ));
898 REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */
899 } else {
900 short multicast_table[4];
901 int num_addrs = dev->mc_count;
902 int i;
903 /* We don't use the multicast table, but rely on upper-layer
904 * filtering. */
905 memset( multicast_table, (num_addrs == 0) ? 0 : -1,
906 sizeof(multicast_table) );
907 for( i = 0; i < 4; i++ )
908 REGA( CSR8+i ) = multicast_table[i];
909 REGA( CSR15 ) = 0; /* Unset promiscuous mode */
910 }
911
912 /*
913 * Always set BSWP after a STOP as STOP puts it back into
914 * little endian mode.
915 */
916 REGA( CSR3 ) = CSR3_BSWP;
917
918 /* Resume normal operation and reset AREG to CSR0 */
919 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT;
920 }
921
922
923 #ifdef MODULE
924 static char devicename[9];
925
926 static struct net_device sun3lance_dev =
927 {
928 devicename, /* filled in by register_netdev() */
929 0, 0, 0, 0, /* memory */
930 0, 0, /* base, irq */
931 0, 0, 0, NULL, sun3lance_probe,
932 };
933
934 int init_module(void)
935 {
936 int err;
937
938 if ((err = register_netdev( &sun3lance_dev ))) {
939 if (err == -EIO) {
940 printk( "SUN3 Lance not detected. Module not loaded.\n");
941 }
942 return( err );
943 }
944 return( 0 );
945 }
946
947 void cleanup_module(void)
948 {
949 unregister_netdev( &sun3lance_dev );
950 }
951
952 #endif /* MODULE */
953
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