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[linux-2.6/linux-mips.git] / drivers / net / rclanmtl.c
blob14bd88ab271b03e1e7df1fbbebc7039f776f784c
1 /*
2 ** *************************************************************************
3 **
4 **
5 ** R C L A N M T L . C $Revision: 6 $
6 **
7 **
8 ** RedCreek I2O LAN Message Transport Layer program module.
9 **
10 ** ---------------------------------------------------------------------
11 ** --- Copyright (c) 1997-1999, RedCreek Communications Inc. ---
12 ** --- All rights reserved. ---
13 ** ---------------------------------------------------------------------
14 **
15 ** File Description:
16 **
17 ** Host side I2O (Intelligent I/O) LAN message transport layer.
18 **
19 ** This program is free software; you can redistribute it and/or modify
20 ** it under the terms of the GNU General Public License as published by
21 ** the Free Software Foundation; either version 2 of the License, or
22 ** (at your option) any later version.
23
24 ** This program is distributed in the hope that it will be useful,
25 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
26 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 ** GNU General Public License for more details.
28
29 ** You should have received a copy of the GNU General Public License
30 ** along with this program; if not, write to the Free Software
31 ** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
32 **
33 ** 1998-1999, LAN API was modified and enhanced by Alice Hennessy.
34 **
35 ** Sometime in 1997, LAN API was written from scratch by Wendell Nichols.
36 ** *************************************************************************
37 */
38
39 #define DEBUG 1
40
41 #define RC_LINUX_MODULE
42 #include "rclanmtl.h"
43
44 /* RedCreek LAN device Target ID */
45 #define RC_LAN_TARGET_ID 0x10
46 /* RedCreek's OSM default LAN receive Initiator */
47 #define DEFAULT_RECV_INIT_CONTEXT 0xA17
48
49 /*
50 ** I2O message structures
51 */
52
53 #define I2O_TID_SZ 12
54 #define I2O_FUNCTION_SZ 8
55
56 /* Transaction Reply Lists (TRL) Control Word structure */
57
58 #define I2O_TRL_FLAGS_SINGLE_FIXED_LENGTH 0x00
59 #define I2O_TRL_FLAGS_SINGLE_VARIABLE_LENGTH 0x40
60 #define I2O_TRL_FLAGS_MULTIPLE_FIXED_LENGTH 0x80
61
62 /* LAN Class specific functions */
63
64 #define I2O_LAN_PACKET_SEND 0x3B
65 #define I2O_LAN_SDU_SEND 0x3D
66 #define I2O_LAN_RECEIVE_POST 0x3E
67 #define I2O_LAN_RESET 0x35
68 #define I2O_LAN_SHUTDOWN 0x37
69
70 /* Private Class specfic function */
71 #define I2O_PRIVATE 0xFF
72
73 /* I2O Executive Function Codes. */
74
75 #define I2O_EXEC_ADAPTER_ASSIGN 0xB3
76 #define I2O_EXEC_ADAPTER_READ 0xB2
77 #define I2O_EXEC_ADAPTER_RELEASE 0xB5
78 #define I2O_EXEC_BIOS_INFO_SET 0xA5
79 #define I2O_EXEC_BOOT_DEVICE_SET 0xA7
80 #define I2O_EXEC_CONFIG_VALIDATE 0xBB
81 #define I2O_EXEC_CONN_SETUP 0xCA
82 #define I2O_EXEC_DEVICE_ASSIGN 0xB7
83 #define I2O_EXEC_DEVICE_RELEASE 0xB9
84 #define I2O_EXEC_HRT_GET 0xA8
85 #define I2O_EXEC_IOP_CLEAR 0xBE
86 #define I2O_EXEC_IOP_CONNECT 0xC9
87 #define I2O_EXEC_IOP_RESET 0xBD
88 #define I2O_EXEC_LCT_NOTIFY 0xA2
89 #define I2O_EXEC_OUTBOUND_INIT 0xA1
90 #define I2O_EXEC_PATH_ENABLE 0xD3
91 #define I2O_EXEC_PATH_QUIESCE 0xC5
92 #define I2O_EXEC_PATH_RESET 0xD7
93 #define I2O_EXEC_STATIC_MF_CREATE 0xDD
94 #define I2O_EXEC_STATIC_MF_RELEASE 0xDF
95 #define I2O_EXEC_STATUS_GET 0xA0
96 #define I2O_EXEC_SW_DOWNLOAD 0xA9
97 #define I2O_EXEC_SW_UPLOAD 0xAB
98 #define I2O_EXEC_SW_REMOVE 0xAD
99 #define I2O_EXEC_SYS_ENABLE 0xD1
100 #define I2O_EXEC_SYS_MODIFY 0xC1
101 #define I2O_EXEC_SYS_QUIESCE 0xC3
102 #define I2O_EXEC_SYS_TAB_SET 0xA3
103
104 /* Init Outbound Q status */
105 #define I2O_EXEC_OUTBOUND_INIT_IN_PROGRESS 0x01
106 #define I2O_EXEC_OUTBOUND_INIT_REJECTED 0x02
107 #define I2O_EXEC_OUTBOUND_INIT_FAILED 0x03
108 #define I2O_EXEC_OUTBOUND_INIT_COMPLETE 0x04
109
110 #define I2O_UTIL_NOP 0x00
111
112 /* I2O Get Status State values */
113
114 #define I2O_IOP_STATE_INITIALIZING 0x01
115 #define I2O_IOP_STATE_RESET 0x02
116 #define I2O_IOP_STATE_HOLD 0x04
117 #define I2O_IOP_STATE_READY 0x05
118 #define I2O_IOP_STATE_OPERATIONAL 0x08
119 #define I2O_IOP_STATE_FAILED 0x10
120 #define I2O_IOP_STATE_FAULTED 0x11
121
122 /* Defines for Request Status Codes: Table 3-1 Reply Status Codes. */
123
124 #define I2O_REPLY_STATUS_SUCCESS 0x00
125 #define I2O_REPLY_STATUS_ABORT_DIRTY 0x01
126 #define I2O_REPLY_STATUS_ABORT_NO_DATA_TRANSFER 0x02
127 #define I2O_REPLY_STATUS_ABORT_PARTIAL_TRANSFER 0x03
128 #define I2O_REPLY_STATUS_ERROR_DIRTY 0x04
129 #define I2O_REPLY_STATUS_ERROR_NO_DATA_TRANSFER 0x05
130 #define I2O_REPLY_STATUS_ERROR_PARTIAL_TRANSFER 0x06
131 #define I2O_REPLY_STATUS_PROCESS_ABORT_DIRTY 0x07
132 #define I2O_REPLY_STATUS_PROCESS_ABORT_NO_DATA_TRANSFER 0x08
133 #define I2O_REPLY_STATUS_PROCESS_ABORT_PARTIAL_TRANSFER 0x09
134 #define I2O_REPLY_STATUS_TRANSACTION_ERROR 0x0A
135 #define I2O_REPLY_STATUS_PROGRESS_REPORT 0x80
136
137 /* DetailedStatusCode defines for ALL messages: Table 3-2 Detailed Status Codes.*/
138
139 #define I2O_DETAIL_STATUS_SUCCESS 0x0000
140 #define I2O_DETAIL_STATUS_BAD_KEY 0x0001
141 #define I2O_DETAIL_STATUS_CHAIN_BUFFER_TOO_LARGE 0x0002
142 #define I2O_DETAIL_STATUS_DEVICE_BUSY 0x0003
143 #define I2O_DETAIL_STATUS_DEVICE_LOCKED 0x0004
144 #define I2O_DETAIL_STATUS_DEVICE_NOT_AVAILABLE 0x0005
145 #define I2O_DETAIL_STATUS_DEVICE_RESET 0x0006
146 #define I2O_DETAIL_STATUS_INAPPROPRIATE_FUNCTION 0x0007
147 #define I2O_DETAIL_STATUS_INSUFFICIENT_RESOURCE_HARD 0x0008
148 #define I2O_DETAIL_STATUS_INSUFFICIENT_RESOURCE_SOFT 0x0009
149 #define I2O_DETAIL_STATUS_INVALID_INITIATOR_ADDRESS 0x000A
150 #define I2O_DETAIL_STATUS_INVALID_MESSAGE_FLAGS 0x000B
151 #define I2O_DETAIL_STATUS_INVALID_OFFSET 0x000C
152 #define I2O_DETAIL_STATUS_INVALID_PARAMETER 0x000D
153 #define I2O_DETAIL_STATUS_INVALID_REQUEST 0x000E
154 #define I2O_DETAIL_STATUS_INVALID_TARGET_ADDRESS 0x000F
155 #define I2O_DETAIL_STATUS_MESSAGE_TOO_LARGE 0x0010
156 #define I2O_DETAIL_STATUS_MESSAGE_TOO_SMALL 0x0011
157 #define I2O_DETAIL_STATUS_MISSING_PARAMETER 0x0012
158 #define I2O_DETAIL_STATUS_NO_SUCH_PAGE 0x0013
159 #define I2O_DETAIL_STATUS_REPLY_BUFFER_FULL 0x0014
160 #define I2O_DETAIL_STATUS_TCL_ERROR 0x0015
161 #define I2O_DETAIL_STATUS_TIMEOUT 0x0016
162 #define I2O_DETAIL_STATUS_UNKNOWN_ERROR 0x0017
163 #define I2O_DETAIL_STATUS_UNKNOWN_FUNCTION 0x0018
164 #define I2O_DETAIL_STATUS_UNSUPPORTED_FUNCTION 0x0019
165 #define I2O_DETAIL_STATUS_UNSUPPORTED_VERSION 0x001A
166
167 /* I2O msg header defines for VersionOffset */
168 #define I2OMSGVER_1_5 0x0001
169 #define SGL_OFFSET_0 I2OMSGVER_1_5
170 #define SGL_OFFSET_4 (0x0040 | I2OMSGVER_1_5)
171 #define TRL_OFFSET_5 (0x0050 | I2OMSGVER_1_5)
172 #define TRL_OFFSET_6 (0x0060 | I2OMSGVER_1_5)
173
174 /* I2O msg header defines for MsgFlags */
175 #define MSG_STATIC 0x0100
176 #define MSG_64BIT_CNTXT 0x0200
177 #define MSG_MULTI_TRANS 0x1000
178 #define MSG_FAIL 0x2000
179 #define MSG_LAST 0x4000
180 #define MSG_REPLY 0x8000
181
182 /* normal LAN request message MsgFlags and VersionOffset (0x1041) */
183 #define LAN_MSG_REQST (MSG_MULTI_TRANS | SGL_OFFSET_4)
184
185 /* minimum size msg */
186 #define THREE_WORD_MSG_SIZE 0x00030000
187 #define FOUR_WORD_MSG_SIZE 0x00040000
188 #define FIVE_WORD_MSG_SIZE 0x00050000
189 #define SIX_WORD_MSG_SIZE 0x00060000
190 #define SEVEN_WORD_MSG_SIZE 0x00070000
191 #define EIGHT_WORD_MSG_SIZE 0x00080000
192 #define NINE_WORD_MSG_SIZE 0x00090000
193
194 /* Special TID Assignments */
195
196 #define I2O_IOP_TID 0
197 #define I2O_HOST_TID 0xB91
198
199 /* RedCreek I2O private message codes */
200 #define RC_PRIVATE_GET_MAC_ADDR 0x0001/**/ /* OBSOLETE */
201 #define RC_PRIVATE_SET_MAC_ADDR 0x0002
202 #define RC_PRIVATE_GET_NIC_STATS 0x0003
203 #define RC_PRIVATE_GET_LINK_STATUS 0x0004
204 #define RC_PRIVATE_SET_LINK_SPEED 0x0005
205 #define RC_PRIVATE_SET_IP_AND_MASK 0x0006
206 /* #define RC_PRIVATE_GET_IP_AND_MASK 0x0007 *//* OBSOLETE */
207 #define RC_PRIVATE_GET_LINK_SPEED 0x0008
208 #define RC_PRIVATE_GET_FIRMWARE_REV 0x0009
209 /* #define RC_PRIVATE_GET_MAC_ADDR 0x000A */
210 #define RC_PRIVATE_GET_IP_AND_MASK 0x000B
211 #define RC_PRIVATE_DEBUG_MSG 0x000C
212 #define RC_PRIVATE_REPORT_DRIVER_CAPABILITY 0x000D
213 #define RC_PRIVATE_SET_PROMISCUOUS_MODE 0x000e
214 #define RC_PRIVATE_GET_PROMISCUOUS_MODE 0x000f
215 #define RC_PRIVATE_SET_BROADCAST_MODE 0x0010
216 #define RC_PRIVATE_GET_BROADCAST_MODE 0x0011
217
218 #define RC_PRIVATE_REBOOT 0x00FF
219
220 /* I2O message header */
221 typedef struct _I2O_MESSAGE_FRAME {
222 U8 VersionOffset;
223 U8 MsgFlags;
224 U16 MessageSize;
225 BF TargetAddress:I2O_TID_SZ;
226 BF InitiatorAddress:I2O_TID_SZ;
227 BF Function:I2O_FUNCTION_SZ;
228 U32 InitiatorContext;
229 /* SGL[] */
230 } I2O_MESSAGE_FRAME, *PI2O_MESSAGE_FRAME;
231
232 /* assumed a 16K minus 256 byte space for outbound queue message frames */
233 #define MSG_FRAME_SIZE 512
234 #define NMBR_MSG_FRAMES 30
235
236 /*
237 ** in reserved space right after PAB in host memory is area for returning
238 ** values from card
239 */
240
241 /*
242 ** typedef NICSTAT
243 **
244 ** Data structure for NIC statistics retruned from PCI card. Data copied from
245 ** here to user allocated RCLINKSTATS (see rclanmtl.h) structure.
246 */
247 typedef struct tag_NicStat {
248 unsigned long TX_good;
249 unsigned long TX_maxcol;
250 unsigned long TX_latecol;
251 unsigned long TX_urun;
252 unsigned long TX_crs; /* lost carrier sense */
253 unsigned long TX_def; /* transmit deferred */
254 unsigned long TX_singlecol; /* single collisions */
255 unsigned long TX_multcol;
256 unsigned long TX_totcol;
257 unsigned long Rcv_good;
258 unsigned long Rcv_CRCerr;
259 unsigned long Rcv_alignerr;
260 unsigned long Rcv_reserr; /* rnr'd pkts */
261 unsigned long Rcv_orun;
262 unsigned long Rcv_cdt;
263 unsigned long Rcv_runt;
264 unsigned long dump_status; /* last field directly from the chip */
265 } NICSTAT, *P_NICSTAT;
266
267 #define DUMP_DONE 0x0000A005 /* completed statistical dump */
268 #define DUMP_CLEAR 0x0000A007 /* completed stat dump and clear counters */
269
270 static volatile int msgFlag;
271
272 /* local function prototypes */
273 static void ProcessOutboundI2OMsg (PPAB pPab, U32 phyMsgAddr);
274 static int FillI2OMsgSGLFromTCB (PU32 pMsg, PRCTCB pXmitCntrlBlock);
275 static int GetI2OStatus (PPAB pPab);
276 static int SendI2OOutboundQInitMsg (PPAB pPab);
277 static int SendEnableSysMsg (PPAB pPab);
278
279 /*
280 ** =========================================================================
281 ** RCInitI2OMsgLayer()
282 **
283 ** Initialize the RedCreek I2O Module and adapter.
284 **
285 ** Inputs: dev - the devices net_device struct
286 ** TransmitCallbackFunction - address of transmit callback function
287 ** ReceiveCallbackFunction - address of receive callback function
288 **
289 ** private message block is allocated by user. It must be in locked pages.
290 ** p_msgbuf and p_phymsgbuf point to the same location. Must be contigous
291 ** memory block of a minimum of 16K byte and long word aligned.
292 ** =========================================================================
293 */
294 RC_RETURN
295 RCInitI2OMsgLayer (struct net_device *dev,
296 PFNTXCALLBACK TransmitCallbackFunction,
297 PFNRXCALLBACK ReceiveCallbackFunction,
298 PFNCALLBACK RebootCallbackFunction)
299 {
300 int result;
301 PPAB pPab;
302 U32 pciBaseAddr = dev->base_addr;
303 PDPA pDpa = dev->priv;
304 PU8 p_msgbuf = pDpa->msgbuf;
305 PU8 p_phymsgbuf = (PU8) pDpa->msgbuf_dma;
306
307 dprintk
308 ("InitI2O: Adapter:0x%04ux ATU:0x%08ulx msgbuf:%p phymsgbuf:0x%08ulx\n"
309 "TransmitCallbackFunction:0x%08ulx ReceiveCallbackFunction:0x%08ulx\n",
310 pDpa->id, pciBaseAddr, p_msgbuf, (u32) p_phymsgbuf,
311 (u32) TransmitCallbackFunction, (u32) ReceiveCallbackFunction);
312
313 /* Check if this interface already initialized - if so, shut it down */
314 if (pDpa->pPab != NULL) {
315 printk (KERN_WARNING
316 "(rcpci45 driver:) pDpa->pPab [%d] != NULL\n",
317 pDpa->id);
318 /* RCResetLANCard(pDpa->id, 0, (PU32)NULL, (PFNCALLBACK)NULL); */
319 pDpa->pPab = NULL;
320 }
321
322 /* store adapter instance values in adapter block.
323 * Adapter block is at beginning of message buffer */
324
325 pPab = kmalloc (sizeof (*pPab), GFP_KERNEL);
326 if (!pPab) {
327 printk (KERN_ERR
328 "(rcpci45 driver:) RCInitI2OMsgLayer: Could not allocate memory for PAB struct!\n");
329 result = RC_RTN_MALLOC_ERROR;
330 goto err_out;
331 }
332
333 memset (pPab, 0, sizeof (*pPab));
334 pDpa->pPab = pPab;
335 pPab->p_atu = (PATU) pciBaseAddr;
336 pPab->pPci45LinBaseAddr = (PU8) pciBaseAddr;
337
338 /* Set outbound message frame addr */
339 pPab->outMsgBlockPhyAddr = (U32) p_phymsgbuf;
340 pPab->pLinOutMsgBlock = (PU8) p_msgbuf;
341
342 /* store callback function addresses */
343 pPab->pTransCallbackFunc = TransmitCallbackFunction;
344 pPab->pRecvCallbackFunc = ReceiveCallbackFunction;
345 pPab->pRebootCallbackFunc = RebootCallbackFunction;
346 pPab->pCallbackFunc = (PFNCALLBACK) NULL;
347
348 /*
349 ** Initialize I2O IOP
350 */
351 result = GetI2OStatus (pPab);
352
353 if (result != RC_RTN_NO_ERROR)
354 goto err_out_dealloc;
355
356 if (pPab->IOPState == I2O_IOP_STATE_OPERATIONAL) {
357 printk (KERN_INFO
358 "(rcpci45 driver:) pPab->IOPState == op: resetting adapter\n");
359 RCResetLANCard (dev, 0, (PU32) NULL, (PFNCALLBACK) NULL);
360 }
361
362 result = SendI2OOutboundQInitMsg (pPab);
363
364 if (result != RC_RTN_NO_ERROR)
365 goto err_out_dealloc;
366
367 result = SendEnableSysMsg (pPab);
368
369 if (result != RC_RTN_NO_ERROR)
370 goto err_out_dealloc;
371
372 return RC_RTN_NO_ERROR;
373
374 err_out_dealloc:
375 kfree (pPab);
376 err_out:
377 return result;
378 }
379
380 /*
381 ** =========================================================================
382 ** Disable and Enable I2O interrupts. I2O interrupts are enabled at Init time
383 ** but can be disabled and re-enabled through these two function calls.
384 ** Packets will still be put into any posted received buffers and packets will
385 ** be sent through RCI2OSendPacket() functions. Disabling I2O interrupts
386 ** will prevent hardware interrupt to host even though the outbound I2O msg
387 ** queue is not emtpy.
388 ** =========================================================================
389 */
390 #define i960_OUT_POST_Q_INT_BIT 0x0008 /* bit set masks interrupts */
391
392 RC_RETURN
393 RCDisableI2OInterrupts (struct net_device * dev)
394 {
395 PPAB pPab = ((PDPA) dev->priv)->pPab;
396
397 if (pPab == NULL)
398 return RC_RTN_ADPTR_NOT_REGISTERED;
399
400 pPab->p_atu->OutIntMask |= i960_OUT_POST_Q_INT_BIT;
401
402 return RC_RTN_NO_ERROR;
403 }
404
405 RC_RETURN
406 RCEnableI2OInterrupts (struct net_device * dev)
407 {
408 PPAB pPab = ((PDPA) dev->priv)->pPab;
409
410 if (pPab == NULL)
411 return RC_RTN_ADPTR_NOT_REGISTERED;
412
413 pPab->p_atu->OutIntMask &= ~i960_OUT_POST_Q_INT_BIT;
414
415 return RC_RTN_NO_ERROR;
416
417 }
418
419 /*
420 ** =========================================================================
421 ** RCI2OSendPacket()
422 ** =========================================================================
423 */
424 RC_RETURN
425 RCI2OSendPacket (struct net_device * dev, U32 InitiatorContext,
426 PRCTCB pTransCtrlBlock)
427 {
428 U32 msgOffset;
429 PU32 pMsg;
430 int size;
431 PPAB pPab = ((PDPA) dev->priv)->pPab;
432
433 dprintk ("RCI2OSendPacket()...\n");
434
435 if (pPab == NULL)
436 return RC_RTN_ADPTR_NOT_REGISTERED;
437
438 /* get Inbound free Q entry - reading from In Q gets free Q entry */
439 /* offset to Msg Frame in PCI msg block */
440
441 msgOffset = pPab->p_atu->InQueue;
442
443 if (msgOffset == 0xFFFFFFFF) {
444 dprintk ("RCI2OSendPacket(): Inbound Free Q empty!\n");
445 return RC_RTN_FREE_Q_EMPTY;
446 }
447
448 /* calc virtual address of msg - virtual already mapped to physical */
449 pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
450
451 size = FillI2OMsgSGLFromTCB (pMsg + 4, pTransCtrlBlock);
452
453 if (size == -1) { /* error processing TCB - send NOP msg */
454 dprintk ("RCI2OSendPacket(): Error Rrocess TCB!\n");
455 pMsg[0] = THREE_WORD_MSG_SIZE | SGL_OFFSET_0;
456 pMsg[1] =
457 I2O_UTIL_NOP << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
458 return RC_RTN_TCB_ERROR;
459 } else { /* send over msg header */
460
461 pMsg[0] = (size + 4) << 16 | LAN_MSG_REQST; /* send over message size and flags */
462 pMsg[1] =
463 I2O_LAN_PACKET_SEND << 24 | I2O_HOST_TID << 12 |
464 RC_LAN_TARGET_ID;
465 pMsg[2] = InitiatorContext;
466 pMsg[3] = 0; /* batch reply */
467 /* post to Inbound Post Q */
468 pPab->p_atu->InQueue = msgOffset;
469 return RC_RTN_NO_ERROR;
470 }
471 }
472
473 /*
474 ** =========================================================================
475 ** RCI2OPostRecvBuffer()
476 **
477 ** inputs: pBufrCntrlBlock - pointer to buffer control block
478 **
479 ** returns TRUE if successful in sending message, else FALSE.
480 ** =========================================================================
481 */
482 RC_RETURN
483 RCPostRecvBuffers (struct net_device * dev, PRCTCB pTransCtrlBlock)
484 {
485 U32 msgOffset;
486 PU32 pMsg;
487 int size;
488 PPAB pPab = ((PDPA) dev->priv)->pPab;
489
490 dprintk ("RCPostRecvBuffers()...\n");
491
492 /* search for DeviceHandle */
493
494 if (pPab == NULL)
495 return RC_RTN_ADPTR_NOT_REGISTERED;
496
497 /* get Inbound free Q entry - reading from In Q gets free Q entry */
498 /* offset to Msg Frame in PCI msg block */
499 msgOffset = pPab->p_atu->InQueue;
500
501 if (msgOffset == 0xFFFFFFFF) {
502 dprintk ("RCPostRecvBuffers(): Inbound Free Q empty!\n");
503 return RC_RTN_FREE_Q_EMPTY;
504 }
505 /* calc virtual address of msg - virtual already mapped to physical */
506 pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
507
508 size = FillI2OMsgSGLFromTCB (pMsg + 4, pTransCtrlBlock);
509
510 if (size == -1) { /* error prcessing TCB - send 3 DWORD private msg == NOP */
511 dprintk
512 ("RCPostRecvBuffers(): Error Processing TCB! size = %d\n",
513 size);
514 pMsg[0] = THREE_WORD_MSG_SIZE | SGL_OFFSET_0;
515 pMsg[1] =
516 I2O_UTIL_NOP << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
517 /* post to Post Q */
518 pPab->p_atu->InQueue = msgOffset;
519 return RC_RTN_TCB_ERROR;
520 } else { /* send over size msg header */
521
522 pMsg[0] = (size + 4) << 16 | LAN_MSG_REQST; /* send over message size and flags */
523 pMsg[1] =
524 I2O_LAN_RECEIVE_POST << 24 | I2O_HOST_TID << 12 |
525 RC_LAN_TARGET_ID;
526 pMsg[2] = DEFAULT_RECV_INIT_CONTEXT;
527 pMsg[3] = *(PU32) pTransCtrlBlock; /* number of packet buffers */
528 /* post to Post Q */
529 pPab->p_atu->InQueue = msgOffset;
530 return RC_RTN_NO_ERROR;
531 }
532 }
533
534 /*
535 ** =========================================================================
536 ** RCProcI2OMsgQ()
537 **
538 ** Process I2O outbound message queue until empty.
539 ** =========================================================================
540 */
541 irqreturn_t
542 RCProcI2OMsgQ (struct net_device *dev)
543 {
544 U32 phyAddrMsg;
545 PU8 p8Msg;
546 PU32 p32;
547 U16 count;
548 PPAB pPab = ((PDPA) dev->priv)->pPab;
549 unsigned char debug_msg[20];
550
551 if (pPab == NULL)
552 return IRQ_NONE;
553
554 phyAddrMsg = pPab->p_atu->OutQueue;
555
556 while (phyAddrMsg != 0xFFFFFFFF) {
557 p8Msg =
558 pPab->pLinOutMsgBlock + (phyAddrMsg -
559 pPab->outMsgBlockPhyAddr);
560 p32 = (PU32) p8Msg;
561
562 dprintk ("msg: 0x%x 0x%x \n", p8Msg[7], p32[5]);
563
564 /* Send Packet Reply Msg */
565 if (I2O_LAN_PACKET_SEND == p8Msg[7]) { /* function code byte */
566 count = *(PU16) (p8Msg + 2);
567 count -= p8Msg[0] >> 4;
568 /* status, count, context[], adapter */
569 (*pPab->pTransCallbackFunc) (p8Msg[19], count, p32 + 5,
570 dev);
571 } else if (I2O_LAN_RECEIVE_POST == p8Msg[7]) { /* Receive Packet Reply Msg */
572 dprintk
573 ("I2O_RECV_REPLY pPab:0x%08ulx p8Msg:0x%08ulx p32:0x%08ulx\n",
574 (u32) pPab, (u32) p8Msg, (u32) p32);
575 dprintk ("msg: 0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n",
576 p32[0], p32[1], p32[2], p32[3]);
577 dprintk (" 0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n",
578 p32[4], p32[5], p32[6], p32[7]);
579 dprintk (" 0x%08ulx:0X%08ulx:0x%08ulx:0x%08ulx\n",
580 p32[8], p32[9], p32[10], p32[11]);
581 /* status, count, buckets remaining, packetParmBlock, adapter */
582 (*pPab->pRecvCallbackFunc) (p8Msg[19], p8Msg[12],
583 p32[5], p32 + 6, dev);
584 } else if (I2O_LAN_RESET == p8Msg[7]
585 || I2O_LAN_SHUTDOWN == p8Msg[7])
586 if (pPab->pCallbackFunc)
587 (*pPab->pCallbackFunc) (p8Msg[19], 0, 0, dev);
588 else
589 pPab->pCallbackFunc = (PFNCALLBACK) 1;
590 else if (I2O_PRIVATE == p8Msg[7]) {
591 dprintk ("i2o private 0x%x, 0x%x \n", p8Msg[7], p32[5]);
592 switch (p32[5]) {
593 case RC_PRIVATE_DEBUG_MSG:
594 msgFlag = 1;
595 dprintk ("Received I2O_PRIVATE msg\n");
596 debug_msg[15] = (p32[6] & 0xff000000) >> 24;
597 debug_msg[14] = (p32[6] & 0x00ff0000) >> 16;
598 debug_msg[13] = (p32[6] & 0x0000ff00) >> 8;
599 debug_msg[12] = (p32[6] & 0x000000ff);
600
601 debug_msg[11] = (p32[7] & 0xff000000) >> 24;
602 debug_msg[10] = (p32[7] & 0x00ff0000) >> 16;
603 debug_msg[9] = (p32[7] & 0x0000ff00) >> 8;
604 debug_msg[8] = (p32[7] & 0x000000ff);
605
606 debug_msg[7] = (p32[8] & 0xff000000) >> 24;
607 debug_msg[6] = (p32[8] & 0x00ff0000) >> 16;
608 debug_msg[5] = (p32[8] & 0x0000ff00) >> 8;
609 debug_msg[4] = (p32[8] & 0x000000ff);
610
611 debug_msg[3] = (p32[9] & 0xff000000) >> 24;
612 debug_msg[2] = (p32[9] & 0x00ff0000) >> 16;
613 debug_msg[1] = (p32[9] & 0x0000ff00) >> 8;
614 debug_msg[0] = (p32[9] & 0x000000ff);
615
616 debug_msg[16] = '\0';
617 dprintk ("%s", debug_msg);
618 break;
619 case RC_PRIVATE_REBOOT:
620 dprintk ("Adapter reboot initiated...\n");
621 if (pPab->pRebootCallbackFunc)
622 (*pPab->pRebootCallbackFunc) (0, 0, 0,
623 dev);
624 break;
625 default:
626 printk (KERN_WARNING
627 "(rcpci45 driver:) Unknown private I2O msg received: 0x%x\n",
628 p32[5]);
629 break;
630 }
631 }
632
633 /*
634 ** Process other Msg's
635 */
636 else
637 ProcessOutboundI2OMsg (pPab, phyAddrMsg);
638
639 /* return MFA to outbound free Q */
640 pPab->p_atu->OutQueue = phyAddrMsg;
641
642 /* any more msgs? */
643 phyAddrMsg = pPab->p_atu->OutQueue;
644 }
645
646 return IRQ_HANDLED;
647 }
648
649 /*
650 ** =========================================================================
651 ** Returns LAN interface statistical counters to space provided by caller at
652 ** StatsReturnAddr. Returns 0 if success, else RC_RETURN code.
653 ** This function will call the WaitCallback function provided by
654 ** user while waiting for card to respond.
655 ** =========================================================================
656 */
657 RC_RETURN
658 RCGetLinkStatistics (struct net_device *dev,
659 P_RCLINKSTATS StatsReturnAddr,
660 PFNWAITCALLBACK WaitCallback)
661 {
662 U32 msgOffset;
663 volatile U32 timeout;
664 volatile PU32 pMsg;
665 volatile PU32 p32, pReturnAddr;
666 P_NICSTAT pStats;
667 int i;
668 PPAB pPab = ((PDPA) dev->priv)->pPab;
669
670 /*dprintk("Get82558Stats() StatsReturnAddr:0x%08ulx\n", StatsReturnAddr); */
671
672 if (pPab == NULL)
673 return RC_RTN_ADPTR_NOT_REGISTERED;
674
675 msgOffset = pPab->p_atu->InQueue;
676
677 if (msgOffset == 0xFFFFFFFF) {
678 dprintk ("Get8255XStats(): Inbound Free Q empty!\n");
679 return RC_RTN_FREE_Q_EMPTY;
680 }
681
682 /* calc virtual address of msg - virtual already mapped to physical */
683 pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
684
685 /*dprintk("Get82558Stats - pMsg = 0x%08ulx, InQ msgOffset = 0x%08ulx\n", pMsg, msgOffset);*/
686 /*dprintk("Get82558Stats - pMsg = 0x%08X, InQ msgOffset = 0x%08X\n", pMsg, msgOffset);*/
687
688 pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
689 pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
690 pMsg[2] = DEFAULT_RECV_INIT_CONTEXT;
691 pMsg[3] = 0x112; /* transaction context */
692 pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_GET_NIC_STATS;
693 pMsg[5] = pPab->outMsgBlockPhyAddr;
694
695 p32 = (PU32) pPab->outMsgBlockPhyAddr;
696 pStats = (P_NICSTAT) pPab->pLinOutMsgBlock;
697 pStats->dump_status = 0xFFFFFFFF;
698
699 /* post to Inbound Post Q */
700 pPab->p_atu->InQueue = msgOffset;
701
702 timeout = 100000;
703 while (1) {
704 if (WaitCallback)
705 (*WaitCallback) ();
706
707 udelay (10);
708
709 if (pStats->dump_status != 0xFFFFFFFF)
710 break;
711
712 if (!timeout--) {
713 dprintk
714 ("RCGet82558Stats() Timeout waiting for NIC statistics\n");
715 return RC_RTN_MSG_REPLY_TIMEOUT;
716 }
717 }
718
719 pReturnAddr = (PU32) StatsReturnAddr;
720
721 /* copy Nic stats to user's structure */
722 for (i = 0; i < (int) sizeof (RCLINKSTATS) / 4; i++)
723 pReturnAddr[i] = p32[i];
724
725 return RC_RTN_NO_ERROR;
726 }
727
728 /*
729 ** =========================================================================
730 ** Get82558LinkStatus()
731 ** =========================================================================
732 */
733 RC_RETURN
734 RCGetLinkStatus (struct net_device * dev, PU32 ReturnAddr,
735 PFNWAITCALLBACK WaitCallback)
736 {
737 U32 msgOffset;
738 volatile U32 timeout;
739 volatile PU32 pMsg;
740 volatile PU32 p32;
741 PPAB pPab = ((PDPA) dev->priv)->pPab;
742
743 dprintk ("Get82558LinkStatus() ReturnPhysAddr:0x%08ulx\n",
744 (u32) ReturnAddr);
745
746 if (pPab == NULL)
747 return RC_RTN_ADPTR_NOT_REGISTERED;
748
749 msgOffset = pPab->p_atu->InQueue;
750
751 if (msgOffset == 0xFFFFFFFF) {
752 dprintk ("Get82558LinkStatus(): Inbound Free Q empty!\n");
753 return RC_RTN_FREE_Q_EMPTY;
754 }
755
756 /* calc virtual address of msg - virtual already mapped to physical */
757 pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
758 /*dprintk("Get82558LinkStatus - pMsg = 0x%08ulx, InQ msgOffset = 0x%08ulx\n", pMsg, msgOffset);*/
759 /*dprintk("Get82558LinkStatus - pMsg = 0x%08X, InQ msgOffset = 0x%08X\n", pMsg, msgOffset);*/
760
761 pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
762 pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
763 pMsg[2] = DEFAULT_RECV_INIT_CONTEXT;
764 pMsg[3] = 0x112; /* transaction context */
765 pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_GET_LINK_STATUS;
766 pMsg[5] = pPab->outMsgBlockPhyAddr;
767
768 p32 = (PU32) pPab->pLinOutMsgBlock;
769 *p32 = 0xFFFFFFFF;
770
771 /* post to Inbound Post Q */
772 pPab->p_atu->InQueue = msgOffset;
773
774 timeout = 100000;
775 while (1) {
776 if (WaitCallback)
777 (*WaitCallback) ();
778
779 udelay (10);
780
781 if (*p32 != 0xFFFFFFFF)
782 break;
783
784 if (!timeout--) {
785 dprintk ("Timeout waiting for link status\n");
786 return RC_RTN_MSG_REPLY_TIMEOUT;
787 }
788 }
789
790 *ReturnAddr = *p32; /* 1 = up 0 = down */
791
792 return RC_RTN_NO_ERROR;
793
794 }
795
796 /*
797 ** =========================================================================
798 ** RCGetMAC()
799 **
800 ** get the MAC address the adapter is listening for in non-promiscous mode.
801 ** MAC address is in media format.
802 ** =========================================================================
803 */
804 RC_RETURN
805 RCGetMAC (struct net_device * dev, PFNWAITCALLBACK WaitCallback)
806 {
807 unsigned timeout;
808 U32 off;
809 PU8 mac = dev->dev_addr;
810 PU32 p;
811 U32 temp[2];
812 PPAB pPab = ((PDPA) dev->priv)->pPab;
813 PATU p_atu;
814
815 if (pPab == NULL)
816 return RC_RTN_ADPTR_NOT_REGISTERED;
817
818 p_atu = pPab->p_atu;
819
820 p_atu->EtherMacLow = 0; /* first zero return data */
821 p_atu->EtherMacHi = 0;
822
823 off = p_atu->InQueue; /* get addresss of message */
824
825 if (0xFFFFFFFF == off)
826 return RC_RTN_FREE_Q_EMPTY;
827
828 p = (PU32) (pPab->pPci45LinBaseAddr + off);
829
830 dprintk ("RCGetMAC: p_atu 0x%08x, off 0x%08x, p 0x%08x\n",
831 (uint) p_atu, (uint) off, (uint) p);
832 /* setup private message */
833 p[0] = FIVE_WORD_MSG_SIZE | SGL_OFFSET_0;
834 p[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
835 p[2] = 0; /* initiator context */
836 p[3] = 0x218; /* transaction context */
837 p[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_GET_MAC_ADDR;
838
839 p_atu->InQueue = off; /* send it to the I2O device */
840 dprintk ("RCGetMAC: p_atu 0x%08x, off 0x%08x, p 0x%08x\n",
841 (uint) p_atu, (uint) off, (uint) p);
842
843 /* wait for the rcpci45 board to update the info */
844 timeout = 1000000;
845 while (0 == p_atu->EtherMacLow) {
846 if (WaitCallback)
847 (*WaitCallback) ();
848
849 udelay (10);
850
851 if (!timeout--) {
852 printk ("rc_getmac: Timeout\n");
853 return RC_RTN_MSG_REPLY_TIMEOUT;
854 }
855 }
856
857 /* read the mac address */
858 temp[0] = p_atu->EtherMacLow;
859 temp[1] = p_atu->EtherMacHi;
860 memcpy ((char *) mac, (char *) temp, 6);
861
862 dprintk ("rc_getmac: 0x%x\n", (u32) mac);
863
864 return RC_RTN_NO_ERROR;
865 }
866
867 /*
868 ** =========================================================================
869 ** RCSetMAC()
870 **
871 ** set MAC address the adapter is listening for in non-promiscous mode.
872 ** MAC address is in media format.
873 ** =========================================================================
874 */
875 RC_RETURN
876 RCSetMAC (struct net_device * dev, PU8 mac)
877 {
878 U32 off;
879 PU32 pMsg;
880 PPAB pPab = ((PDPA) dev->priv)->pPab;
881
882 if (pPab == NULL)
883 return RC_RTN_ADPTR_NOT_REGISTERED;
884
885 off = pPab->p_atu->InQueue; /* get addresss of message */
886
887 if (0xFFFFFFFF == off)
888 return RC_RTN_FREE_Q_EMPTY;
889
890 pMsg = (PU32) (pPab->pPci45LinBaseAddr + off);
891
892 /* setup private message */
893 pMsg[0] = SEVEN_WORD_MSG_SIZE | SGL_OFFSET_0;
894 pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
895 pMsg[2] = 0; /* initiator context */
896 pMsg[3] = 0x219; /* transaction context */
897 pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_SET_MAC_ADDR;
898 pMsg[5] = *(unsigned *) mac; /* first four bytes */
899 pMsg[6] = *(unsigned *) (mac + 4); /* last two bytes */
900
901 pPab->p_atu->InQueue = off; /* send it to the I2O device */
902
903 return RC_RTN_NO_ERROR;
904 }
905
906 /*
907 ** =========================================================================
908 ** RCSetLinkSpeed()
909 **
910 ** set ethernet link speed.
911 ** input: speedControl - determines action to take as follows
912 ** 0 = reset and auto-negotiate (NWay)
913 ** 1 = Full Duplex 100BaseT
914 ** 2 = Half duplex 100BaseT
915 ** 3 = Full Duplex 10BaseT
916 ** 4 = Half duplex 10BaseT
917 ** all other values are ignore (do nothing)
918 ** =========================================================================
919 */
920 RC_RETURN
921 RCSetLinkSpeed (struct net_device * dev, U16 LinkSpeedCode)
922 {
923 U32 off;
924 PU32 pMsg;
925 PPAB pPab = ((PDPA) dev->priv)->pPab;
926
927 if (pPab == NULL)
928 return RC_RTN_ADPTR_NOT_REGISTERED;
929
930 off = pPab->p_atu->InQueue; /* get addresss of message */
931
932 if (0xFFFFFFFF == off)
933 return RC_RTN_FREE_Q_EMPTY;
934
935 pMsg = (PU32) (pPab->pPci45LinBaseAddr + off);
936
937 /* setup private message */
938 pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
939 pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
940 pMsg[2] = 0; /* initiator context */
941 pMsg[3] = 0x219; /* transaction context */
942 pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_SET_LINK_SPEED;
943 pMsg[5] = LinkSpeedCode; /* link speed code */
944
945 pPab->p_atu->InQueue = off; /* send it to the I2O device */
946
947 return RC_RTN_NO_ERROR;
948 }
949
950 /*
951 ** =========================================================================
952 ** RCSetPromiscuousMode()
953 **
954 ** Defined values for Mode:
955 ** 0 - turn off promiscuous mode
956 ** 1 - turn on promiscuous mode
957 **
958 ** =========================================================================
959 */
960 RC_RETURN
961 RCSetPromiscuousMode (struct net_device * dev, U16 Mode)
962 {
963 U32 off;
964 PU32 pMsg;
965 PPAB pPab = ((PDPA) dev->priv)->pPab;
966
967 if (pPab == NULL)
968 return RC_RTN_ADPTR_NOT_REGISTERED;
969
970 off = pPab->p_atu->InQueue; /* get addresss of message */
971
972 if (0xFFFFFFFF == off)
973 return RC_RTN_FREE_Q_EMPTY;
974
975 pMsg = (PU32) (pPab->pPci45LinBaseAddr + off);
976
977 /* setup private message */
978 pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
979 pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
980 pMsg[2] = 0; /* initiator context */
981 pMsg[3] = 0x219; /* transaction context */
982 pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_SET_PROMISCUOUS_MODE;
983 pMsg[5] = Mode; /* promiscuous mode setting */
984
985 pPab->p_atu->InQueue = off; /* send it to the device */
986
987 return RC_RTN_NO_ERROR;
988 }
989
990 /*
991 ** =========================================================================
992 ** RCGetPromiscuousMode()
993 **
994 ** get promiscuous mode setting
995 **
996 ** Possible return values placed in pMode:
997 ** 0 = promisuous mode not set
998 ** 1 = promisuous mode is set
999 **
1000 ** =========================================================================
1001 */
1002 RC_RETURN
1003 RCGetPromiscuousMode (struct net_device * dev, PU32 pMode,
1004 PFNWAITCALLBACK WaitCallback)
1005 {
1006 U32 msgOffset, timeout;
1007 PU32 pMsg;
1008 volatile PU32 p32;
1009 PPAB pPab = ((PDPA) dev->priv)->pPab;
1010
1011 msgOffset = pPab->p_atu->InQueue;
1012
1013 if (msgOffset == 0xFFFFFFFF) {
1014 printk (KERN_WARNING
1015 "(rcpci45 driver:) RCGetLinkSpeed(): Inbound Free Q empty!\n");
1016 return RC_RTN_FREE_Q_EMPTY;
1017 }
1018
1019 /* calc virtual address of msg - virtual already mapped to physical */
1020 pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
1021
1022 /* virtual pointer to return buffer - clear first two dwords */
1023 p32 = (volatile PU32) pPab->pLinOutMsgBlock;
1024 p32[0] = 0xff;
1025
1026 /* setup private message */
1027 pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
1028 pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
1029 pMsg[2] = 0; /* initiator context */
1030 pMsg[3] = 0x219; /* transaction context */
1031 pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_GET_PROMISCUOUS_MODE;
1032 /* phys address to return status - area right after PAB */
1033 pMsg[5] = pPab->outMsgBlockPhyAddr;
1034
1035 /* post to Inbound Post Q */
1036
1037 pPab->p_atu->InQueue = msgOffset;
1038
1039 /* wait for response */
1040 timeout = 1000000;
1041 while (1) {
1042 if (WaitCallback)
1043 (*WaitCallback) ();
1044
1045 udelay (10); /* please don't hog the bus!!! */
1046
1047 if (p32[0] != 0xff)
1048 break;
1049
1050 if (!timeout--) {
1051 dprintk
1052 ("Timeout waiting for promiscuous mode from adapter\n");
1053 dprintk ("0x%8x\n", p32[0]);
1054 return RC_RTN_NO_LINK_SPEED;
1055 }
1056 }
1057
1058 /* get mode */
1059 *pMode = (U8) ((volatile PU8) p32)[0] & 0x0f;
1060
1061 return RC_RTN_NO_ERROR;
1062 }
1063
1064 /*
1065 ** =========================================================================
1066 ** RCSetBroadcastMode()
1067 **
1068 ** Defined values for Mode:
1069 ** 0 - turn off promiscuous mode
1070 ** 1 - turn on promiscuous mode
1071 **
1072 ** =========================================================================
1073 */
1074 RC_RETURN
1075 RCSetBroadcastMode (struct net_device * dev, U16 Mode)
1076 {
1077 U32 off;
1078 PU32 pMsg;
1079 PPAB pPab = ((PDPA) dev->priv)->pPab;
1080
1081 if (pPab == NULL)
1082 return RC_RTN_ADPTR_NOT_REGISTERED;
1083
1084 off = pPab->p_atu->InQueue; /* get addresss of message */
1085
1086 if (0xFFFFFFFF == off)
1087 return RC_RTN_FREE_Q_EMPTY;
1088
1089 pMsg = (PU32) (pPab->pPci45LinBaseAddr + off);
1090
1091 /* setup private message */
1092 pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
1093 pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
1094 pMsg[2] = 0; /* initiator context */
1095 pMsg[3] = 0x219; /* transaction context */
1096 pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_SET_BROADCAST_MODE;
1097 pMsg[5] = Mode; /* promiscuous mode setting */
1098
1099 pPab->p_atu->InQueue = off; /* send it to the device */
1100
1101 return RC_RTN_NO_ERROR;
1102 }
1103
1104 /*
1105 ** =========================================================================
1106 ** RCGetBroadcastMode()
1107 **
1108 ** get promiscuous mode setting
1109 **
1110 ** Possible return values placed in pMode:
1111 ** 0 = promisuous mode not set
1112 ** 1 = promisuous mode is set
1113 **
1114 ** =========================================================================
1115 */
1116 RC_RETURN
1117 RCGetBroadcastMode (struct net_device * dev, PU32 pMode,
1118 PFNWAITCALLBACK WaitCallback)
1119 {
1120 U32 msgOffset, timeout;
1121 PU32 pMsg;
1122 volatile PU32 p32;
1123 PPAB pPab = ((PDPA) dev->priv)->pPab;
1124
1125 msgOffset = pPab->p_atu->InQueue;
1126
1127 if (msgOffset == 0xFFFFFFFF) {
1128 printk (KERN_WARNING
1129 "(rcpci45 driver:) RCGetLinkSpeed(): Inbound Free Q empty!\n");
1130 return RC_RTN_FREE_Q_EMPTY;
1131 }
1132
1133 /* calc virtual address of msg - virtual already mapped to physical */
1134 pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
1135
1136 /* virtual pointer to return buffer - clear first two dwords */
1137 p32 = (volatile PU32) pPab->pLinOutMsgBlock;
1138 p32[0] = 0xff;
1139
1140 /* setup private message */
1141 pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
1142 pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
1143 pMsg[2] = 0; /* initiator context */
1144 pMsg[3] = 0x219; /* transaction context */
1145 pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_GET_BROADCAST_MODE;
1146 /* phys address to return status - area right after PAB */
1147 pMsg[5] = pPab->outMsgBlockPhyAddr;
1148
1149 /* post to Inbound Post Q */
1150
1151 pPab->p_atu->InQueue = msgOffset;
1152
1153 /* wait for response */
1154 timeout = 1000000;
1155 while (1) {
1156 if (WaitCallback)
1157 (*WaitCallback) ();
1158
1159 udelay (10); /* please don't hog the bus!!! */
1160
1161 if (p32[0] != 0xff)
1162 break;
1163
1164 if (!timeout--) {
1165 printk (KERN_WARNING
1166 "(rcpci45 driver:) Timeout waiting for promiscuous mode from adapter\n");
1167 printk (KERN_WARNING "(rcpci45 driver:) 0x%8x\n",
1168 p32[0]);
1169 return RC_RTN_NO_LINK_SPEED;
1170 }
1171 }
1172
1173 /* get mode */
1174 *pMode = (U8) ((volatile PU8) p32)[0] & 0x0f;
1175
1176 return RC_RTN_NO_ERROR;
1177 }
1178
1179 /*
1180 ** =========================================================================
1181 ** RCGetLinkSpeed()
1182 **
1183 ** get ethernet link speed.
1184 **
1185 ** 0 = Unknown
1186 ** 1 = Full Duplex 100BaseT
1187 ** 2 = Half duplex 100BaseT
1188 ** 3 = Full Duplex 10BaseT
1189 ** 4 = Half duplex 10BaseT
1190 **
1191 ** =========================================================================
1192 */
1193 RC_RETURN
1194 RCGetLinkSpeed (struct net_device * dev, PU32 pLinkSpeedCode,
1195 PFNWAITCALLBACK WaitCallback)
1196 {
1197 U32 msgOffset, timeout;
1198 PU32 pMsg;
1199 volatile PU32 p32;
1200 U8 IOPLinkSpeed;
1201 PPAB pPab = ((PDPA) dev->priv)->pPab;
1202
1203 msgOffset = pPab->p_atu->InQueue;
1204
1205 if (msgOffset == 0xFFFFFFFF) {
1206 printk (KERN_WARNING
1207 "(rcpci45 driver:) RCGetLinkSpeed(): Inbound Free Q empty!\n");
1208 return RC_RTN_FREE_Q_EMPTY;
1209 }
1210
1211 /* calc virtual address of msg - virtual already mapped to physical */
1212 pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
1213
1214 /* virtual pointer to return buffer - clear first two dwords */
1215 p32 = (volatile PU32) pPab->pLinOutMsgBlock;
1216 p32[0] = 0xff;
1217
1218 /* setup private message */
1219 pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
1220 pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
1221 pMsg[2] = 0; /* initiator context */
1222 pMsg[3] = 0x219; /* transaction context */
1223 pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_GET_LINK_SPEED;
1224 /* phys address to return status - area right after PAB */
1225 pMsg[5] = pPab->outMsgBlockPhyAddr;
1226
1227 /* post to Inbound Post Q */
1228
1229 pPab->p_atu->InQueue = msgOffset;
1230
1231 /* wait for response */
1232 timeout = 1000000;
1233 while (1) {
1234 if (WaitCallback)
1235 (*WaitCallback) ();
1236
1237 udelay (10); /* please don't hog the bus!!! */
1238
1239 if (p32[0] != 0xff)
1240 break;
1241
1242 if (!timeout--) {
1243 dprintk ("Timeout waiting for link speed from IOP\n");
1244 dprintk ("0x%8x\n", p32[0]);
1245 return RC_RTN_NO_LINK_SPEED;
1246 }
1247 }
1248
1249 /* get Link speed */
1250 IOPLinkSpeed = (U8) ((volatile PU8) p32)[0] & 0x0f;
1251
1252 *pLinkSpeedCode = IOPLinkSpeed;
1253
1254 return RC_RTN_NO_ERROR;
1255 }
1256
1257 /*
1258 ** =========================================================================
1259 ** RCReportDriverCapability(struct net_device *dev, U32 capability)
1260 **
1261 ** Currently defined bits:
1262 ** WARM_REBOOT_CAPABLE 0x01
1263 **
1264 ** =========================================================================
1265 */
1266 RC_RETURN
1267 RCReportDriverCapability (struct net_device * dev, U32 capability)
1268 {
1269 U32 off;
1270 PU32 pMsg;
1271 PPAB pPab = ((PDPA) dev->priv)->pPab;
1272
1273 if (pPab == NULL)
1274 return RC_RTN_ADPTR_NOT_REGISTERED;
1275
1276 off = pPab->p_atu->InQueue; /* get addresss of message */
1277
1278 if (0xFFFFFFFF == off)
1279 return RC_RTN_FREE_Q_EMPTY;
1280
1281 pMsg = (PU32) (pPab->pPci45LinBaseAddr + off);
1282
1283 /* setup private message */
1284 pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
1285 pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
1286 pMsg[2] = 0; /* initiator context */
1287 pMsg[3] = 0x219; /* transaction context */
1288 pMsg[4] =
1289 RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_REPORT_DRIVER_CAPABILITY;
1290 pMsg[5] = capability;
1291
1292 pPab->p_atu->InQueue = off; /* send it to the I2O device */
1293
1294 return RC_RTN_NO_ERROR;
1295 }
1296
1297 /*
1298 ** =========================================================================
1299 ** RCGetFirmwareVer()
1300 **
1301 ** Return firmware version in the form "SoftwareVersion : Bt BootVersion"
1302 **
1303 ** =========================================================================
1304 */
1305 RC_RETURN
1306 RCGetFirmwareVer (struct net_device * dev, PU8 pFirmString,
1307 PFNWAITCALLBACK WaitCallback)
1308 {
1309 U32 msgOffset, timeout;
1310 PU32 pMsg;
1311 volatile PU32 p32;
1312 PPAB pPab = ((PDPA) dev->priv)->pPab;
1313
1314 msgOffset = pPab->p_atu->InQueue;
1315 if (msgOffset == 0xFFFFFFFF) {
1316 dprintk ("RCGetFirmwareVer(): Inbound Free Q empty!\n");
1317 return RC_RTN_FREE_Q_EMPTY;
1318 }
1319
1320 /* calc virtual address of msg - virtual already mapped to physical */
1321 pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
1322
1323 /* virtual pointer to return buffer - clear first two dwords */
1324 p32 = (volatile PU32) pPab->pLinOutMsgBlock;
1325 p32[0] = 0xff;
1326
1327 /* setup private message */
1328 pMsg[0] = SIX_WORD_MSG_SIZE | SGL_OFFSET_0;
1329 pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
1330 pMsg[2] = 0; /* initiator context */
1331 pMsg[3] = 0x219; /* transaction context */
1332 pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_GET_FIRMWARE_REV;
1333 /* phys address to return status - area right after PAB */
1334 pMsg[5] = pPab->outMsgBlockPhyAddr;
1335
1336 /* post to Inbound Post Q */
1337
1338 pPab->p_atu->InQueue = msgOffset;
1339
1340 /* wait for response */
1341 timeout = 1000000;
1342 while (1) {
1343 if (WaitCallback)
1344 (*WaitCallback) ();
1345
1346 udelay (10); /* please don't hog the bus!!! */
1347
1348 if (p32[0] != 0xff)
1349 break;
1350
1351 if (!timeout--) {
1352 dprintk ("Timeout waiting for link speed from IOP\n");
1353 return RC_RTN_NO_FIRM_VER;
1354 }
1355 }
1356
1357 strcpy (pFirmString, (PU8) p32);
1358 return RC_RTN_NO_ERROR;
1359 }
1360
1361 /*
1362 ** =========================================================================
1363 ** RCResetLANCard()
1364 **
1365 ** ResourceFlags indicates whether to return buffer resource explicitly
1366 ** to host or keep and reuse.
1367 ** CallbackFunction (if not NULL) is the function to be called when
1368 ** reset is complete.
1369 ** If CallbackFunction is NULL, ReturnAddr will have a 1 placed in it when
1370 ** reset is done (if not NULL).
1371 **
1372 ** =========================================================================
1373 */
1374 RC_RETURN
1375 RCResetLANCard (struct net_device * dev, U16 ResourceFlags, PU32 ReturnAddr,
1376 PFNCALLBACK CallbackFunction)
1377 {
1378 unsigned long off;
1379 PU32 pMsg;
1380 PPAB pPab = ((PDPA) dev->priv)->pPab;
1381 long timeout = 0;
1382
1383 if (pPab == NULL)
1384 return RC_RTN_ADPTR_NOT_REGISTERED;
1385
1386 off = pPab->p_atu->InQueue; /* get addresss of message */
1387
1388 if (0xFFFFFFFF == off)
1389 return RC_RTN_FREE_Q_EMPTY;
1390
1391 pPab->pCallbackFunc = CallbackFunction;
1392
1393 pMsg = (PU32) (pPab->pPci45LinBaseAddr + off);
1394
1395 /* setup message */
1396 pMsg[0] = FOUR_WORD_MSG_SIZE | SGL_OFFSET_0;
1397 pMsg[1] = I2O_LAN_RESET << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
1398 pMsg[2] = DEFAULT_RECV_INIT_CONTEXT;
1399 pMsg[3] = ResourceFlags << 16; /* resource flags */
1400
1401 pPab->p_atu->InQueue = off; /* send it to the I2O device */
1402
1403 if (CallbackFunction == (PFNCALLBACK) NULL) {
1404 /* call RCProcI2OMsgQ() until something in pPab->pCallbackFunc
1405 or until timer goes off */
1406 while (pPab->pCallbackFunc == (PFNCALLBACK) NULL) {
1407 RCProcI2OMsgQ (dev);
1408 udelay (1000); /* please don't hog the bus!!! */
1409 timeout++;
1410 if (timeout > 10000) {
1411 break;
1412 }
1413 }
1414 if (ReturnAddr != (PU32) NULL)
1415 *ReturnAddr = (U32) pPab->pCallbackFunc;
1416 }
1417
1418 return RC_RTN_NO_ERROR;
1419 }
1420
1421 /*
1422 ** =========================================================================
1423 ** RCResetIOP()
1424 **
1425 ** Send StatusGet Msg, wait for results return directly to buffer.
1426 **
1427 ** =========================================================================
1428 */
1429 RC_RETURN
1430 RCResetIOP (struct net_device * dev)
1431 {
1432 U32 msgOffset, timeout;
1433 PU32 pMsg;
1434 PPAB pPab = ((PDPA) dev->priv)->pPab;
1435 volatile PU32 p32;
1436
1437 msgOffset = pPab->p_atu->InQueue;
1438
1439 if (msgOffset == 0xFFFFFFFF) {
1440 return RC_RTN_FREE_Q_EMPTY;
1441 }
1442
1443 /* calc virtual address of msg - virtual already mapped to physical */
1444 pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
1445
1446 pMsg[0] = NINE_WORD_MSG_SIZE | SGL_OFFSET_0;
1447 pMsg[1] = I2O_EXEC_IOP_RESET << 24 | I2O_HOST_TID << 12 | I2O_IOP_TID;
1448 pMsg[2] = 0; /* universal context */
1449 pMsg[3] = 0; /* universal context */
1450 pMsg[4] = 0; /* universal context */
1451 pMsg[5] = 0; /* universal context */
1452 /* phys address to return status - area right after PAB */
1453 pMsg[6] = pPab->outMsgBlockPhyAddr;
1454 pMsg[7] = 0;
1455 pMsg[8] = 1; /* return 1 byte */
1456
1457 /* virtual pointer to return buffer - clear first two dwords */
1458 p32 = (volatile PU32) pPab->pLinOutMsgBlock;
1459 p32[0] = 0;
1460 p32[1] = 0;
1461
1462 /* post to Inbound Post Q */
1463
1464 pPab->p_atu->InQueue = msgOffset;
1465
1466 /* wait for response */
1467 timeout = 1000000;
1468 while (1) {
1469 udelay (10); /* please don't hog the bus!!! */
1470
1471 if (p32[0] || p32[1])
1472 break;
1473
1474 if (!timeout--) {
1475 dprintk ("RCResetIOP timeout\n");
1476 return RC_RTN_MSG_REPLY_TIMEOUT;
1477 }
1478 }
1479 return RC_RTN_NO_ERROR;
1480 }
1481
1482 /*
1483 ** =========================================================================
1484 ** RCShutdownLANCard()
1485 **
1486 ** ResourceFlags indicates whether to return buffer resource explicitly
1487 ** to host or keep and reuse.
1488 ** CallbackFunction (if not NULL) is the function to be called when
1489 ** shutdown is complete.
1490 ** If CallbackFunction is NULL, ReturnAddr will have a 1 placed in it when
1491 ** shutdown is done (if not NULL).
1492 **
1493 ** =========================================================================
1494 */
1495 RC_RETURN
1496 RCShutdownLANCard (struct net_device * dev, U16 ResourceFlags,
1497 PU32 ReturnAddr, PFNCALLBACK CallbackFunction)
1498 {
1499 volatile PU32 pMsg;
1500 U32 off;
1501 PPAB pPab = ((PDPA) dev->priv)->pPab;
1502 long timeout = 0;
1503
1504 if (pPab == NULL)
1505 return RC_RTN_ADPTR_NOT_REGISTERED;
1506
1507 off = pPab->p_atu->InQueue; /* get addresss of message */
1508
1509 if (0xFFFFFFFF == off)
1510 return RC_RTN_FREE_Q_EMPTY;
1511
1512 pPab->pCallbackFunc = CallbackFunction;
1513
1514 pMsg = (PU32) (pPab->pPci45LinBaseAddr + off);
1515
1516 /* setup message */
1517 pMsg[0] = FOUR_WORD_MSG_SIZE | SGL_OFFSET_0;
1518 pMsg[1] =
1519 I2O_LAN_SHUTDOWN << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
1520 pMsg[2] = DEFAULT_RECV_INIT_CONTEXT;
1521 pMsg[3] = ResourceFlags << 16; /* resource flags */
1522
1523 pPab->p_atu->InQueue = off; /* send it to the I2O device */
1524
1525 if (CallbackFunction == (PFNCALLBACK) NULL) {
1526 /* call RCProcI2OMsgQ() until something in pPab->pCallbackFunc
1527 or until timer goes off */
1528 while (pPab->pCallbackFunc == (PFNCALLBACK) NULL) {
1529 RCProcI2OMsgQ (dev);
1530 udelay (1000); /* please don't hog the bus!!! */
1531 timeout++;
1532 if (timeout > 10000) {
1533 printk (KERN_WARNING
1534 "(rcpci45 driver:) RCShutdownLANCard(): timeout\n");
1535 break;
1536 }
1537 }
1538 if (ReturnAddr != (PU32) NULL)
1539 *ReturnAddr = (U32) pPab->pCallbackFunc;
1540 }
1541 return RC_RTN_NO_ERROR;
1542 }
1543
1544 /*
1545 ** =========================================================================
1546 ** RCSetRavlinIPandMask()
1547 **
1548 ** Set the Ravlin 45/PCI cards IP address and network mask.
1549 **
1550 ** IP address and mask must be in network byte order.
1551 ** For example, IP address 1.2.3.4 and mask 255.255.255.0 would be
1552 ** 0x04030201 and 0x00FFFFFF on a little endian machine.
1553 **
1554 ** =========================================================================
1555 */
1556 RC_RETURN
1557 RCSetRavlinIPandMask (struct net_device * dev, U32 ipAddr, U32 netMask)
1558 {
1559 volatile PU32 pMsg;
1560 U32 off;
1561 PPAB pPab = ((PDPA) dev->priv)->pPab;
1562
1563 if (pPab == NULL)
1564 return RC_RTN_ADPTR_NOT_REGISTERED;
1565
1566 off = pPab->p_atu->InQueue; /* get addresss of message */
1567
1568 if (0xFFFFFFFF == off)
1569 return RC_RTN_FREE_Q_EMPTY;
1570
1571 pMsg = (PU32) (pPab->pPci45LinBaseAddr + off);
1572
1573 /* setup private message */
1574 pMsg[0] = SEVEN_WORD_MSG_SIZE | SGL_OFFSET_0;
1575 pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
1576 pMsg[2] = 0; /* initiator context */
1577 pMsg[3] = 0x219; /* transaction context */
1578 pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_SET_IP_AND_MASK;
1579 pMsg[5] = ipAddr;
1580 pMsg[6] = netMask;
1581
1582 pPab->p_atu->InQueue = off; /* send it to the I2O device */
1583 return RC_RTN_NO_ERROR;
1584
1585 }
1586
1587 /*
1588 ** =========================================================================
1589 ** RCGetRavlinIPandMask()
1590 **
1591 ** get the IP address and MASK from the card
1592 **
1593 ** =========================================================================
1594 */
1595 RC_RETURN
1596 RCGetRavlinIPandMask (struct net_device * dev, PU32 pIpAddr, PU32 pNetMask,
1597 PFNWAITCALLBACK WaitCallback)
1598 {
1599 unsigned timeout;
1600 U32 off;
1601 PU32 pMsg, p32;
1602 PPAB pPab = ((PDPA) dev->priv)->pPab;
1603 PATU p_atu;
1604
1605 dprintk
1606 ("RCGetRavlinIPandMask: pIpAddr is 0x%08ulx, *IpAddr is 0x%08ulx\n",
1607 (u32) pIpAddr, *pIpAddr);
1608
1609 if (pPab == NULL)
1610 return RC_RTN_ADPTR_NOT_REGISTERED;
1611
1612 p_atu = pPab->p_atu;
1613 off = p_atu->InQueue; /* get addresss of message */
1614
1615 if (0xFFFFFFFF == off)
1616 return RC_RTN_FREE_Q_EMPTY;
1617
1618 p32 = (volatile PU32) pPab->pLinOutMsgBlock;
1619 *p32 = 0xFFFFFFFF;
1620
1621 pMsg = (PU32) (pPab->pPci45LinBaseAddr + off);
1622
1623 dprintk
1624 ("RCGetRavlinIPandMask: p_atu 0x%08ulx, off 0x%08ulx, p32 0x%08ulx\n",
1625 (u32) p_atu, off, (u32) p32);
1626 /* setup private message */
1627 pMsg[0] = FIVE_WORD_MSG_SIZE | SGL_OFFSET_0;
1628 pMsg[1] = I2O_PRIVATE << 24 | I2O_HOST_TID << 12 | RC_LAN_TARGET_ID;
1629 pMsg[2] = 0; /* initiator context */
1630 pMsg[3] = 0x218; /* transaction context */
1631 pMsg[4] = RC_PCI45_VENDOR_ID << 16 | RC_PRIVATE_GET_IP_AND_MASK;
1632 pMsg[5] = pPab->outMsgBlockPhyAddr;
1633
1634 p_atu->InQueue = off; /* send it to the I2O device */
1635 dprintk
1636 ("RCGetRavlinIPandMask: p_atu 0x%08ulx, off 0x%08ulx, p32 0x%08ulx\n",
1637 (u32) p_atu, off, (u32) p32);
1638
1639 /* wait for the rcpci45 board to update the info */
1640 timeout = 100000;
1641 while (0xffffffff == *p32) {
1642 if (WaitCallback)
1643 (*WaitCallback) ();
1644
1645 udelay (10);
1646
1647 if (!timeout--) {
1648 dprintk ("RCGetRavlinIPandMask: Timeout\n");
1649 return RC_RTN_MSG_REPLY_TIMEOUT;
1650 }
1651 }
1652
1653 dprintk
1654 ("RCGetRavlinIPandMask: after time out\np32[0] (IpAddr) 0x%08ulx, p32[1] (IPmask) 0x%08ulx\n",
1655 p32[0], p32[1]);
1656
1657 /* send IP and mask to user's space */
1658 *pIpAddr = p32[0];
1659 *pNetMask = p32[1];
1660
1661 dprintk
1662 ("RCGetRavlinIPandMask: pIpAddr is 0x%08ulx, *IpAddr is 0x%08ulx\n",
1663 (u32) pIpAddr, *pIpAddr);
1664
1665 return RC_RTN_NO_ERROR;
1666 }
1667
1668 /*
1669 ** /////////////////////////////////////////////////////////////////////////
1670 ** /////////////////////////////////////////////////////////////////////////
1671 **
1672 ** local functions
1673 **
1674 ** /////////////////////////////////////////////////////////////////////////
1675 ** /////////////////////////////////////////////////////////////////////////
1676 */
1677
1678 /*
1679 ** =========================================================================
1680 ** SendI2OOutboundQInitMsg()
1681 **
1682 ** =========================================================================
1683 */
1684 static int
1685 SendI2OOutboundQInitMsg (PPAB pPab)
1686 {
1687 U32 msgOffset, timeout, phyOutQFrames, i;
1688 volatile PU32 pMsg;
1689 volatile PU32 p32;
1690
1691 msgOffset = pPab->p_atu->InQueue;
1692
1693 if (msgOffset == 0xFFFFFFFF) {
1694 dprintk ("SendI2OOutboundQInitMsg(): Inbound Free Q empty!\n");
1695 return RC_RTN_FREE_Q_EMPTY;
1696 }
1697
1698 /* calc virtual address of msg - virtual already mapped to physical */
1699 pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
1700
1701 dprintk
1702 ("SendI2OOutboundQInitMsg - pMsg = 0x%08ulx, InQ msgOffset = 0x%08ulx\n",
1703 (u32) pMsg, msgOffset);
1704
1705 pMsg[0] = EIGHT_WORD_MSG_SIZE | TRL_OFFSET_6;
1706 pMsg[1] =
1707 I2O_EXEC_OUTBOUND_INIT << 24 | I2O_HOST_TID << 12 | I2O_IOP_TID;
1708 pMsg[2] = DEFAULT_RECV_INIT_CONTEXT;
1709 pMsg[3] = 0x106; /* transaction context */
1710 pMsg[4] = 4096; /* Host page frame size */
1711 pMsg[5] = MSG_FRAME_SIZE << 16 | 0x80; /* outbound msg frame size and Initcode */
1712 pMsg[6] = 0xD0000004; /* simple sgl element LE, EOB */
1713 /* phys address to return status - area right after PAB */
1714 pMsg[7] = pPab->outMsgBlockPhyAddr;
1715
1716 /* virtual pointer to return buffer - clear first two dwords */
1717 p32 = (PU32) pPab->pLinOutMsgBlock;
1718 p32[0] = 0;
1719
1720 /* post to Inbound Post Q */
1721 pPab->p_atu->InQueue = msgOffset;
1722
1723 /* wait for response */
1724 timeout = 100000;
1725 while (1) {
1726 udelay (10); /* please don't hog the bus!!! */
1727
1728 if (p32[0])
1729 break;
1730
1731 if (!timeout--) {
1732 dprintk
1733 ("Timeout wait for InitOutQ InPrgress status from IOP\n");
1734 return RC_RTN_NO_I2O_STATUS;
1735 }
1736 }
1737
1738 timeout = 100000;
1739 while (1) {
1740 udelay (10); /* please don't hog the bus!!! */
1741
1742 if (p32[0] == I2O_EXEC_OUTBOUND_INIT_COMPLETE)
1743 break;
1744
1745 if (!timeout--) {
1746 dprintk
1747 ("Timeout wait for InitOutQ Complete status from IOP\n");
1748 return RC_RTN_NO_I2O_STATUS;
1749 }
1750 }
1751
1752 /* load PCI outbound free Q with MF physical addresses */
1753 phyOutQFrames = pPab->outMsgBlockPhyAddr;
1754
1755 for (i = 0; i < NMBR_MSG_FRAMES; i++) {
1756 pPab->p_atu->OutQueue = phyOutQFrames;
1757 phyOutQFrames += MSG_FRAME_SIZE;
1758 }
1759 return RC_RTN_NO_ERROR;
1760 }
1761
1762 /*
1763 ** =========================================================================
1764 ** GetI2OStatus()
1765 **
1766 ** Send StatusGet Msg, wait for results return directly to buffer.
1767 **
1768 ** =========================================================================
1769 */
1770 static int
1771 GetI2OStatus (PPAB pPab)
1772 {
1773 U32 msgOffset, timeout;
1774 PU32 pMsg;
1775 volatile PU32 p32;
1776
1777 msgOffset = pPab->p_atu->InQueue;
1778 dprintk ("GetI2OStatus: msg offset = 0x%x\n", msgOffset);
1779 if (msgOffset == 0xFFFFFFFF) {
1780 dprintk ("GetI2OStatus(): Inbound Free Q empty!\n");
1781 return RC_RTN_FREE_Q_EMPTY;
1782 }
1783
1784 /* calc virtual address of msg - virtual already mapped to physical */
1785 pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
1786
1787 pMsg[0] = NINE_WORD_MSG_SIZE | SGL_OFFSET_0;
1788 pMsg[1] = I2O_EXEC_STATUS_GET << 24 | I2O_HOST_TID << 12 | I2O_IOP_TID;
1789 pMsg[2] = 0; /* universal context */
1790 pMsg[3] = 0; /* universal context */
1791 pMsg[4] = 0; /* universal context */
1792 pMsg[5] = 0; /* universal context */
1793 /* phys address to return status - area right after PAB */
1794 pMsg[6] = pPab->outMsgBlockPhyAddr;
1795 pMsg[7] = 0;
1796 pMsg[8] = 88; /* return 88 bytes */
1797
1798 /* virtual pointer to return buffer - clear first two dwords */
1799 p32 = (volatile PU32) pPab->pLinOutMsgBlock;
1800 p32[0] = 0;
1801 p32[1] = 0;
1802
1803 dprintk
1804 ("GetI2OStatus - pMsg:0x%08ulx, msgOffset:0x%08ulx, [1]:0x%08ulx, [6]:0x%08ulx\n",
1805 (u32) pMsg, msgOffset, pMsg[1], pMsg[6]);
1806
1807 /* post to Inbound Post Q */
1808 pPab->p_atu->InQueue = msgOffset;
1809
1810 dprintk ("Return status to p32 = 0x%08ulx\n", (u32) p32);
1811
1812 /* wait for response */
1813 timeout = 1000000;
1814 while (1) {
1815 udelay (10); /* please don't hog the bus!!! */
1816
1817 if (p32[0] && p32[1])
1818 break;
1819
1820 if (!timeout--) {
1821 dprintk ("Timeout waiting for status from IOP\n");
1822 dprintk ("0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n",
1823 p32[0], p32[1], p32[2], p32[3]);
1824 dprintk ("0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n",
1825 p32[4], p32[5], p32[6], p32[7]);
1826 dprintk ("0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n",
1827 p32[8], p32[9], p32[10], p32[11]);
1828 return RC_RTN_NO_I2O_STATUS;
1829 }
1830 }
1831
1832 dprintk ("0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n", p32[0], p32[1],
1833 p32[2], p32[3]);
1834 dprintk ("0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n", p32[4], p32[5],
1835 p32[6], p32[7]);
1836 dprintk ("0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n", p32[8], p32[9],
1837 p32[10], p32[11]);
1838 /* get IOP state */
1839 pPab->IOPState = ((volatile PU8) p32)[10];
1840 pPab->InboundMFrameSize = ((volatile PU16) p32)[6];
1841
1842 dprintk ("IOP state 0x%02x InFrameSize = 0x%04x\n",
1843 pPab->IOPState, pPab->InboundMFrameSize);
1844 return RC_RTN_NO_ERROR;
1845 }
1846
1847 /*
1848 ** =========================================================================
1849 ** SendEnableSysMsg()
1850 **
1851 **
1852 ** =========================================================================
1853 */
1854 static int
1855 SendEnableSysMsg (PPAB pPab)
1856 {
1857 U32 msgOffset;
1858 volatile PU32 pMsg;
1859
1860 msgOffset = pPab->p_atu->InQueue;
1861
1862 if (msgOffset == 0xFFFFFFFF) {
1863 dprintk ("SendEnableSysMsg(): Inbound Free Q empty!\n");
1864 return RC_RTN_FREE_Q_EMPTY;
1865 }
1866
1867 /* calc virtual address of msg - virtual already mapped to physical */
1868 pMsg = (PU32) (pPab->pPci45LinBaseAddr + msgOffset);
1869
1870 dprintk
1871 ("SendEnableSysMsg - pMsg = 0x%08ulx, InQ msgOffset = 0x%08ulx\n",
1872 (u32) pMsg, msgOffset);
1873
1874 pMsg[0] = FOUR_WORD_MSG_SIZE | SGL_OFFSET_0;
1875 pMsg[1] = I2O_EXEC_SYS_ENABLE << 24 | I2O_HOST_TID << 12 | I2O_IOP_TID;
1876 pMsg[2] = DEFAULT_RECV_INIT_CONTEXT;
1877 pMsg[3] = 0x110; /* transaction context */
1878 pMsg[4] = 0x50657465; /* RedCreek Private */
1879
1880 /* post to Inbound Post Q */
1881 pPab->p_atu->InQueue = msgOffset;
1882
1883 return RC_RTN_NO_ERROR;
1884 }
1885
1886 /*
1887 ** =========================================================================
1888 ** FillI2OMsgFromTCB()
1889 **
1890 ** inputs pMsgU32 - virtual pointer (mapped to physical) of message frame
1891 ** pXmitCntrlBlock - pointer to caller buffer control block.
1892 **
1893 ** fills in LAN SGL after Transaction Control Word or Bucket Count.
1894 ** =========================================================================
1895 */
1896 static int
1897 FillI2OMsgSGLFromTCB (PU32 pMsgFrame, PRCTCB pTransCtrlBlock)
1898 {
1899 unsigned int nmbrBuffers, nmbrSeg, nmbrDwords, context, flags;
1900 PU32 pTCB, pMsg;
1901
1902 /* SGL element flags */
1903 #define EOB 0x40000000
1904 #define LE 0x80000000
1905 #define SIMPLE_SGL 0x10000000
1906 #define BC_PRESENT 0x01000000
1907
1908 pTCB = (PU32) pTransCtrlBlock;
1909 pMsg = pMsgFrame;
1910 nmbrDwords = 0;
1911
1912 dprintk ("FillI2OMsgSGLFromTCBX\n");
1913 dprintk ("TCB 0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n",
1914 pTCB[0], pTCB[1], pTCB[2], pTCB[3], pTCB[4]);
1915 dprintk ("pTCB 0x%08ulx, pMsg 0x%08ulx\n", (u32) pTCB, (u32) pMsg);
1916
1917 nmbrBuffers = *pTCB++;
1918
1919 if (!nmbrBuffers) {
1920 return -1;
1921 }
1922
1923 do {
1924 context = *pTCB++; /* buffer tag (context) */
1925 nmbrSeg = *pTCB++; /* number of segments */
1926
1927 if (!nmbrSeg) {
1928 return -1;
1929 }
1930
1931 flags = SIMPLE_SGL | BC_PRESENT;
1932
1933 if (1 == nmbrSeg) {
1934 flags |= EOB;
1935
1936 if (1 == nmbrBuffers)
1937 flags |= LE;
1938 }
1939
1940 /* 1st SGL buffer element has context */
1941 pMsg[0] = pTCB[0] | flags; /* send over count (segment size) */
1942 pMsg[1] = context;
1943 pMsg[2] = pTCB[1]; /* send buffer segment physical address */
1944 nmbrDwords += 3;
1945 pMsg += 3;
1946 pTCB += 2;
1947
1948 if (--nmbrSeg) {
1949 do {
1950 flags = SIMPLE_SGL;
1951
1952 if (1 == nmbrSeg) {
1953 flags |= EOB;
1954
1955 if (1 == nmbrBuffers)
1956 flags |= LE;
1957 }
1958
1959 pMsg[0] = pTCB[0] | flags; /* send over count */
1960 pMsg[1] = pTCB[1]; /* send buffer segment physical address */
1961 nmbrDwords += 2;
1962 pTCB += 2;
1963 pMsg += 2;
1964
1965 } while (--nmbrSeg);
1966 }
1967
1968 } while (--nmbrBuffers);
1969
1970 return nmbrDwords;
1971 }
1972
1973 /*
1974 ** =========================================================================
1975 ** ProcessOutboundI2OMsg()
1976 **
1977 ** process I2O reply message
1978 ** * change to msg structure *
1979 ** =========================================================================
1980 */
1981 static void
1982 ProcessOutboundI2OMsg (PPAB pPab, U32 phyAddrMsg)
1983 {
1984 PU8 p8Msg;
1985 PU32 p32;
1986 /* U16 count; */
1987
1988 p8Msg = pPab->pLinOutMsgBlock + (phyAddrMsg - pPab->outMsgBlockPhyAddr);
1989 p32 = (PU32) p8Msg;
1990
1991 dprintk
1992 ("VXD: ProcessOutboundI2OMsg - pPab 0x%08ulx, phyAdr 0x%08ulx, linAdr 0x%08ulx\n",
1993 (u32) pPab, phyAddrMsg, (u32) p8Msg);
1994 dprintk ("msg :0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n", p32[0], p32[1],
1995 p32[2], p32[3]);
1996 dprintk ("msg :0x%08ulx:0x%08ulx:0x%08ulx:0x%08ulx\n", p32[4], p32[5],
1997 p32[6], p32[7]);
1998
1999 if (p32[4] >> 24 != I2O_REPLY_STATUS_SUCCESS) {
2000 dprintk ("Message reply status not success\n");
2001 return;
2002 }
2003
2004 switch (p8Msg[7]) { /* function code byte */
2005 case I2O_EXEC_SYS_TAB_SET:
2006 msgFlag = 1;
2007 dprintk ("Received I2O_EXEC_SYS_TAB_SET reply\n");
2008 break;
2009
2010 case I2O_EXEC_HRT_GET:
2011 msgFlag = 1;
2012 dprintk ("Received I2O_EXEC_HRT_GET reply\n");
2013 break;
2014
2015 case I2O_EXEC_LCT_NOTIFY:
2016 msgFlag = 1;
2017 dprintk ("Received I2O_EXEC_LCT_NOTIFY reply\n");
2018 break;
2019
2020 case I2O_EXEC_SYS_ENABLE:
2021 msgFlag = 1;
2022 dprintk ("Received I2O_EXEC_SYS_ENABLE reply\n");
2023 break;
2024
2025 default:
2026 dprintk ("Received UNKNOWN reply\n");
2027 break;
2028 }
2029 }
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