More meth updates.
[linux-2.6/linux-mips.git] / drivers / net / myri_sbus.c
blobfdcad85b7cc64e5ed46be04d2f27bf92b441c1c5
1 /* myri_sbus.h: MyriCOM MyriNET SBUS card driver.
3 * Copyright (C) 1996, 1999 David S. Miller (davem@redhat.com)
4 */
6 static char version[] =
7 "myri_sbus.c:v1.9 12/Sep/99 David S. Miller (davem@redhat.com)\n";
9 #include <linux/module.h>
10 #include <linux/config.h>
11 #include <linux/errno.h>
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/fcntl.h>
15 #include <linux/interrupt.h>
16 #include <linux/ioport.h>
17 #include <linux/in.h>
18 #include <linux/slab.h>
19 #include <linux/string.h>
20 #include <linux/delay.h>
21 #include <linux/init.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/skbuff.h>
26 #include <net/dst.h>
27 #include <net/arp.h>
28 #include <net/sock.h>
29 #include <net/ipv6.h>
31 #include <asm/system.h>
32 #include <asm/bitops.h>
33 #include <asm/io.h>
34 #include <asm/dma.h>
35 #include <asm/byteorder.h>
36 #include <asm/idprom.h>
37 #include <asm/sbus.h>
38 #include <asm/openprom.h>
39 #include <asm/oplib.h>
40 #include <asm/auxio.h>
41 #include <asm/pgtable.h>
42 #include <asm/irq.h>
43 #include <asm/checksum.h>
45 #include "myri_sbus.h"
46 #include "myri_code.h"
48 /* #define DEBUG_DETECT */
49 /* #define DEBUG_IRQ */
50 /* #define DEBUG_TRANSMIT */
51 /* #define DEBUG_RECEIVE */
52 /* #define DEBUG_HEADER */
54 #ifdef DEBUG_DETECT
55 #define DET(x) printk x
56 #else
57 #define DET(x)
58 #endif
60 #ifdef DEBUG_IRQ
61 #define DIRQ(x) printk x
62 #else
63 #define DIRQ(x)
64 #endif
66 #ifdef DEBUG_TRANSMIT
67 #define DTX(x) printk x
68 #else
69 #define DTX(x)
70 #endif
72 #ifdef DEBUG_RECEIVE
73 #define DRX(x) printk x
74 #else
75 #define DRX(x)
76 #endif
78 #ifdef DEBUG_HEADER
79 #define DHDR(x) printk x
80 #else
81 #define DHDR(x)
82 #endif
84 #ifdef MODULE
85 static struct myri_eth *root_myri_dev;
86 #endif
88 static void myri_reset_off(unsigned long lp, unsigned long cregs)
90 /* Clear IRQ mask. */
91 sbus_writel(0, lp + LANAI_EIMASK);
93 /* Turn RESET function off. */
94 sbus_writel(CONTROL_ROFF, cregs + MYRICTRL_CTRL);
97 static void myri_reset_on(unsigned long cregs)
99 /* Enable RESET function. */
100 sbus_writel(CONTROL_RON, cregs + MYRICTRL_CTRL);
102 /* Disable IRQ's. */
103 sbus_writel(CONTROL_DIRQ, cregs + MYRICTRL_CTRL);
106 static void myri_disable_irq(unsigned long lp, unsigned long cregs)
108 sbus_writel(CONTROL_DIRQ, cregs + MYRICTRL_CTRL);
109 sbus_writel(0, lp + LANAI_EIMASK);
110 sbus_writel(ISTAT_HOST, lp + LANAI_ISTAT);
113 static void myri_enable_irq(unsigned long lp, unsigned long cregs)
115 sbus_writel(CONTROL_EIRQ, cregs + MYRICTRL_CTRL);
116 sbus_writel(ISTAT_HOST, lp + LANAI_EIMASK);
119 static inline void bang_the_chip(struct myri_eth *mp)
121 struct myri_shmem *shmem = mp->shmem;
122 unsigned long cregs = mp->cregs;
124 sbus_writel(1, &shmem->send);
125 sbus_writel(CONTROL_WON, cregs + MYRICTRL_CTRL);
128 static int myri_do_handshake(struct myri_eth *mp)
130 struct myri_shmem *shmem = mp->shmem;
131 unsigned long cregs = mp->cregs;
132 struct myri_channel *chan = &shmem->channel;
133 int tick = 0;
135 DET(("myri_do_handshake: "));
136 if (sbus_readl(&chan->state) == STATE_READY) {
137 DET(("Already STATE_READY, failed.\n"));
138 return -1; /* We're hosed... */
141 myri_disable_irq(mp->lregs, cregs);
143 while (tick++ <= 25) {
144 u32 softstate;
146 /* Wake it up. */
147 DET(("shakedown, CONTROL_WON, "));
148 sbus_writel(1, &shmem->shakedown);
149 sbus_writel(CONTROL_WON, cregs + MYRICTRL_CTRL);
151 softstate = sbus_readl(&chan->state);
152 DET(("chanstate[%08x] ", softstate));
153 if (softstate == STATE_READY) {
154 DET(("wakeup successful, "));
155 break;
158 if (softstate != STATE_WFN) {
159 DET(("not WFN setting that, "));
160 sbus_writel(STATE_WFN, &chan->state);
163 udelay(20);
166 myri_enable_irq(mp->lregs, cregs);
168 if (tick > 25) {
169 DET(("25 ticks we lose, failure.\n"));
170 return -1;
172 DET(("success\n"));
173 return 0;
176 static int myri_load_lanai(struct myri_eth *mp)
178 struct net_device *dev = mp->dev;
179 struct myri_shmem *shmem = mp->shmem;
180 unsigned char *rptr;
181 int i;
183 myri_disable_irq(mp->lregs, mp->cregs);
184 myri_reset_on(mp->cregs);
186 rptr = (unsigned char *) mp->lanai;
187 for (i = 0; i < mp->eeprom.ramsz; i++)
188 sbus_writeb(0, &rptr[i]);
190 if (mp->eeprom.cpuvers >= CPUVERS_3_0)
191 sbus_writel(mp->eeprom.cval, mp->lregs + LANAI_CVAL);
193 /* Load executable code. */
194 for (i = 0; i < sizeof(lanai4_code); i++)
195 sbus_writeb(lanai4_code[i], &rptr[(lanai4_code_off * 2) + i]);
197 /* Load data segment. */
198 for (i = 0; i < sizeof(lanai4_data); i++)
199 sbus_writeb(lanai4_data[i], &rptr[(lanai4_data_off * 2) + i]);
201 /* Set device address. */
202 sbus_writeb(0, &shmem->addr[0]);
203 sbus_writeb(0, &shmem->addr[1]);
204 for (i = 0; i < 6; i++)
205 sbus_writeb(dev->dev_addr[i],
206 &shmem->addr[i + 2]);
208 /* Set SBUS bursts and interrupt mask. */
209 sbus_writel(((mp->myri_bursts & 0xf8) >> 3), &shmem->burst);
210 sbus_writel(SHMEM_IMASK_RX, &shmem->imask);
212 /* Release the LANAI. */
213 myri_disable_irq(mp->lregs, mp->cregs);
214 myri_reset_off(mp->lregs, mp->cregs);
215 myri_disable_irq(mp->lregs, mp->cregs);
217 /* Wait for the reset to complete. */
218 for (i = 0; i < 5000; i++) {
219 if (sbus_readl(&shmem->channel.state) != STATE_READY)
220 break;
221 else
222 udelay(10);
225 if (i == 5000)
226 printk(KERN_ERR "myricom: Chip would not reset after firmware load.\n");
228 i = myri_do_handshake(mp);
229 if (i)
230 printk(KERN_ERR "myricom: Handshake with LANAI failed.\n");
232 if (mp->eeprom.cpuvers == CPUVERS_4_0)
233 sbus_writel(0, mp->lregs + LANAI_VERS);
235 return i;
238 static void myri_clean_rings(struct myri_eth *mp)
240 struct sendq *sq = mp->sq;
241 struct recvq *rq = mp->rq;
242 int i;
244 sbus_writel(0, &rq->tail);
245 sbus_writel(0, &rq->head);
246 for (i = 0; i < (RX_RING_SIZE+1); i++) {
247 if (mp->rx_skbs[i] != NULL) {
248 struct myri_rxd *rxd = &rq->myri_rxd[i];
249 u32 dma_addr;
251 dma_addr = sbus_readl(&rxd->myri_scatters[0].addr);
252 sbus_unmap_single(mp->myri_sdev, dma_addr, RX_ALLOC_SIZE, SBUS_DMA_FROMDEVICE);
253 dev_kfree_skb(mp->rx_skbs[i]);
254 mp->rx_skbs[i] = NULL;
258 mp->tx_old = 0;
259 sbus_writel(0, &sq->tail);
260 sbus_writel(0, &sq->head);
261 for (i = 0; i < TX_RING_SIZE; i++) {
262 if (mp->tx_skbs[i] != NULL) {
263 struct sk_buff *skb = mp->tx_skbs[i];
264 struct myri_txd *txd = &sq->myri_txd[i];
265 u32 dma_addr;
267 dma_addr = sbus_readl(&txd->myri_gathers[0].addr);
268 sbus_unmap_single(mp->myri_sdev, dma_addr, (skb->len + 3) & ~3, SBUS_DMA_TODEVICE);
269 dev_kfree_skb(mp->tx_skbs[i]);
270 mp->tx_skbs[i] = NULL;
275 static void myri_init_rings(struct myri_eth *mp, int from_irq)
277 struct recvq *rq = mp->rq;
278 struct myri_rxd *rxd = &rq->myri_rxd[0];
279 struct net_device *dev = mp->dev;
280 int gfp_flags = GFP_KERNEL;
281 int i;
283 if (from_irq || in_interrupt())
284 gfp_flags = GFP_ATOMIC;
286 myri_clean_rings(mp);
287 for (i = 0; i < RX_RING_SIZE; i++) {
288 struct sk_buff *skb = myri_alloc_skb(RX_ALLOC_SIZE, gfp_flags);
289 u32 dma_addr;
291 if (!skb)
292 continue;
293 mp->rx_skbs[i] = skb;
294 skb->dev = dev;
295 skb_put(skb, RX_ALLOC_SIZE);
297 dma_addr = sbus_map_single(mp->myri_sdev, skb->data, RX_ALLOC_SIZE, SBUS_DMA_FROMDEVICE);
298 sbus_writel(dma_addr, &rxd[i].myri_scatters[0].addr);
299 sbus_writel(RX_ALLOC_SIZE, &rxd[i].myri_scatters[0].len);
300 sbus_writel(i, &rxd[i].ctx);
301 sbus_writel(1, &rxd[i].num_sg);
303 sbus_writel(0, &rq->head);
304 sbus_writel(RX_RING_SIZE, &rq->tail);
307 static int myri_init(struct myri_eth *mp, int from_irq)
309 myri_init_rings(mp, from_irq);
310 return 0;
313 static void myri_is_not_so_happy(struct myri_eth *mp)
317 #ifdef DEBUG_HEADER
318 static void dump_ehdr(struct ethhdr *ehdr)
320 printk("ehdr[h_dst(%02x:%02x:%02x:%02x:%02x:%02x)"
321 "h_source(%02x:%02x:%02x:%02x:%02x:%02x)h_proto(%04x)]\n",
322 ehdr->h_dest[0], ehdr->h_dest[1], ehdr->h_dest[2],
323 ehdr->h_dest[3], ehdr->h_dest[4], ehdr->h_dest[4],
324 ehdr->h_source[0], ehdr->h_source[1], ehdr->h_source[2],
325 ehdr->h_source[3], ehdr->h_source[4], ehdr->h_source[4],
326 ehdr->h_proto);
329 static void dump_ehdr_and_myripad(unsigned char *stuff)
331 struct ethhdr *ehdr = (struct ethhdr *) (stuff + 2);
333 printk("pad[%02x:%02x]", stuff[0], stuff[1]);
334 printk("ehdr[h_dst(%02x:%02x:%02x:%02x:%02x:%02x)"
335 "h_source(%02x:%02x:%02x:%02x:%02x:%02x)h_proto(%04x)]\n",
336 ehdr->h_dest[0], ehdr->h_dest[1], ehdr->h_dest[2],
337 ehdr->h_dest[3], ehdr->h_dest[4], ehdr->h_dest[4],
338 ehdr->h_source[0], ehdr->h_source[1], ehdr->h_source[2],
339 ehdr->h_source[3], ehdr->h_source[4], ehdr->h_source[4],
340 ehdr->h_proto);
342 #endif
344 static void myri_tx(struct myri_eth *mp, struct net_device *dev)
346 struct sendq *sq = mp->sq;
347 int entry = mp->tx_old;
348 int limit = sbus_readl(&sq->head);
350 DTX(("entry[%d] limit[%d] ", entry, limit));
351 if (entry == limit)
352 return;
353 while (entry != limit) {
354 struct sk_buff *skb = mp->tx_skbs[entry];
355 u32 dma_addr;
357 DTX(("SKB[%d] ", entry));
358 dma_addr = sbus_readl(&sq->myri_txd[entry].myri_gathers[0].addr);
359 sbus_unmap_single(mp->myri_sdev, dma_addr, skb->len, SBUS_DMA_TODEVICE);
360 dev_kfree_skb(skb);
361 mp->tx_skbs[entry] = NULL;
362 mp->enet_stats.tx_packets++;
363 entry = NEXT_TX(entry);
365 mp->tx_old = entry;
368 /* Determine the packet's protocol ID. The rule here is that we
369 * assume 802.3 if the type field is short enough to be a length.
370 * This is normal practice and works for any 'now in use' protocol.
372 static unsigned short myri_type_trans(struct sk_buff *skb, struct net_device *dev)
374 struct ethhdr *eth;
375 unsigned char *rawp;
377 skb->mac.raw = (((unsigned char *)skb->data) + MYRI_PAD_LEN);
378 skb_pull(skb, dev->hard_header_len);
379 eth = skb->mac.ethernet;
381 #ifdef DEBUG_HEADER
382 DHDR(("myri_type_trans: "));
383 dump_ehdr(eth);
384 #endif
385 if (*eth->h_dest & 1) {
386 if (memcmp(eth->h_dest, dev->broadcast, ETH_ALEN)==0)
387 skb->pkt_type = PACKET_BROADCAST;
388 else
389 skb->pkt_type = PACKET_MULTICAST;
390 } else if (dev->flags & (IFF_PROMISC|IFF_ALLMULTI)) {
391 if (memcmp(eth->h_dest, dev->dev_addr, ETH_ALEN))
392 skb->pkt_type = PACKET_OTHERHOST;
395 if (ntohs(eth->h_proto) >= 1536)
396 return eth->h_proto;
398 rawp = skb->data;
400 /* This is a magic hack to spot IPX packets. Older Novell breaks
401 * the protocol design and runs IPX over 802.3 without an 802.2 LLC
402 * layer. We look for FFFF which isn't a used 802.2 SSAP/DSAP. This
403 * won't work for fault tolerant netware but does for the rest.
405 if (*(unsigned short *)rawp == 0xFFFF)
406 return htons(ETH_P_802_3);
408 /* Real 802.2 LLC */
409 return htons(ETH_P_802_2);
412 static void myri_rx(struct myri_eth *mp, struct net_device *dev)
414 struct recvq *rq = mp->rq;
415 struct recvq *rqa = mp->rqack;
416 int entry = sbus_readl(&rqa->head);
417 int limit = sbus_readl(&rqa->tail);
418 int drops;
420 DRX(("entry[%d] limit[%d] ", entry, limit));
421 if (entry == limit)
422 return;
423 drops = 0;
424 DRX(("\n"));
425 while (entry != limit) {
426 struct myri_rxd *rxdack = &rqa->myri_rxd[entry];
427 u32 csum = sbus_readl(&rxdack->csum);
428 int len = sbus_readl(&rxdack->myri_scatters[0].len);
429 int index = sbus_readl(&rxdack->ctx);
430 struct myri_rxd *rxd = &rq->myri_rxd[rq->tail];
431 struct sk_buff *skb = mp->rx_skbs[index];
433 /* Ack it. */
434 sbus_writel(NEXT_RX(entry), &rqa->head);
436 /* Check for errors. */
437 DRX(("rxd[%d]: %p len[%d] csum[%08x] ", entry, rxd, len, csum));
438 sbus_dma_sync_single(mp->myri_sdev,
439 sbus_readl(&rxd->myri_scatters[0].addr),
440 RX_ALLOC_SIZE, SBUS_DMA_FROMDEVICE);
441 if (len < (ETH_HLEN + MYRI_PAD_LEN) || (skb->data[0] != MYRI_PAD_LEN)) {
442 DRX(("ERROR["));
443 mp->enet_stats.rx_errors++;
444 if (len < (ETH_HLEN + MYRI_PAD_LEN)) {
445 DRX(("BAD_LENGTH] "));
446 mp->enet_stats.rx_length_errors++;
447 } else {
448 DRX(("NO_PADDING] "));
449 mp->enet_stats.rx_frame_errors++;
452 /* Return it to the LANAI. */
453 drop_it:
454 drops++;
455 DRX(("DROP "));
456 mp->enet_stats.rx_dropped++;
457 sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len);
458 sbus_writel(index, &rxd->ctx);
459 sbus_writel(1, &rxd->num_sg);
460 sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail);
461 goto next;
464 DRX(("len[%d] ", len));
465 if (len > RX_COPY_THRESHOLD) {
466 struct sk_buff *new_skb;
467 u32 dma_addr;
469 DRX(("BIGBUFF "));
470 new_skb = myri_alloc_skb(RX_ALLOC_SIZE, GFP_ATOMIC);
471 if (new_skb == NULL) {
472 DRX(("skb_alloc(FAILED) "));
473 goto drop_it;
475 sbus_unmap_single(mp->myri_sdev,
476 sbus_readl(&rxd->myri_scatters[0].addr),
477 RX_ALLOC_SIZE,
478 SBUS_DMA_FROMDEVICE);
479 mp->rx_skbs[index] = new_skb;
480 new_skb->dev = dev;
481 skb_put(new_skb, RX_ALLOC_SIZE);
482 dma_addr = sbus_map_single(mp->myri_sdev,
483 new_skb->data,
484 RX_ALLOC_SIZE,
485 SBUS_DMA_FROMDEVICE);
486 sbus_writel(dma_addr, &rxd->myri_scatters[0].addr);
487 sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len);
488 sbus_writel(index, &rxd->ctx);
489 sbus_writel(1, &rxd->num_sg);
490 sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail);
492 /* Trim the original skb for the netif. */
493 DRX(("trim(%d) ", len));
494 skb_trim(skb, len);
495 } else {
496 struct sk_buff *copy_skb = dev_alloc_skb(len);
498 DRX(("SMALLBUFF "));
499 if (copy_skb == NULL) {
500 DRX(("dev_alloc_skb(FAILED) "));
501 goto drop_it;
503 /* DMA sync already done above. */
504 copy_skb->dev = dev;
505 DRX(("resv_and_put "));
506 skb_put(copy_skb, len);
507 memcpy(copy_skb->data, skb->data, len);
509 /* Reuse original ring buffer. */
510 DRX(("reuse "));
511 sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len);
512 sbus_writel(index, &rxd->ctx);
513 sbus_writel(1, &rxd->num_sg);
514 sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail);
516 skb = copy_skb;
519 /* Just like the happy meal we get checksums from this card. */
520 skb->csum = csum;
521 skb->ip_summed = CHECKSUM_UNNECESSARY; /* XXX */
523 skb->protocol = myri_type_trans(skb, dev);
524 DRX(("prot[%04x] netif_rx ", skb->protocol));
525 netif_rx(skb);
527 dev->last_rx = jiffies;
528 mp->enet_stats.rx_packets++;
529 mp->enet_stats.rx_bytes += len;
530 next:
531 DRX(("NEXT\n"));
532 entry = NEXT_RX(entry);
536 static irqreturn_t myri_interrupt(int irq, void *dev_id, struct pt_regs *regs)
538 struct net_device *dev = (struct net_device *) dev_id;
539 struct myri_eth *mp = (struct myri_eth *) dev->priv;
540 unsigned long lregs = mp->lregs;
541 struct myri_channel *chan = &mp->shmem->channel;
542 unsigned long flags;
543 u32 status;
544 int handled = 0;
546 spin_lock_irqsave(&mp->irq_lock, flags);
548 status = sbus_readl(lregs + LANAI_ISTAT);
549 DIRQ(("myri_interrupt: status[%08x] ", status));
550 if (status & ISTAT_HOST) {
551 u32 softstate;
553 handled = 1;
554 DIRQ(("IRQ_DISAB "));
555 myri_disable_irq(lregs, mp->cregs);
556 softstate = sbus_readl(&chan->state);
557 DIRQ(("state[%08x] ", softstate));
558 if (softstate != STATE_READY) {
559 DIRQ(("myri_not_so_happy "));
560 myri_is_not_so_happy(mp);
562 DIRQ(("\nmyri_rx: "));
563 myri_rx(mp, dev);
564 DIRQ(("\nistat=ISTAT_HOST "));
565 sbus_writel(ISTAT_HOST, lregs + LANAI_ISTAT);
566 DIRQ(("IRQ_ENAB "));
567 myri_enable_irq(lregs, mp->cregs);
569 DIRQ(("\n"));
571 spin_unlock_irqrestore(&mp->irq_lock, flags);
573 return IRQ_RETVAL(handled);
576 static int myri_open(struct net_device *dev)
578 struct myri_eth *mp = (struct myri_eth *) dev->priv;
580 return myri_init(mp, in_interrupt());
583 static int myri_close(struct net_device *dev)
585 struct myri_eth *mp = (struct myri_eth *) dev->priv;
587 myri_clean_rings(mp);
588 return 0;
591 static void myri_tx_timeout(struct net_device *dev)
593 struct myri_eth *mp = (struct myri_eth *) dev->priv;
595 printk(KERN_ERR "%s: transmit timed out, resetting\n", dev->name);
597 mp->enet_stats.tx_errors++;
598 myri_init(mp, 0);
599 netif_wake_queue(dev);
602 static int myri_start_xmit(struct sk_buff *skb, struct net_device *dev)
604 struct myri_eth *mp = (struct myri_eth *) dev->priv;
605 struct sendq *sq = mp->sq;
606 struct myri_txd *txd;
607 unsigned long flags;
608 unsigned int head, tail;
609 int len, entry;
610 u32 dma_addr;
612 DTX(("myri_start_xmit: "));
614 myri_tx(mp, dev);
616 netif_stop_queue(dev);
618 /* This is just to prevent multiple PIO reads for TX_BUFFS_AVAIL. */
619 head = sbus_readl(&sq->head);
620 tail = sbus_readl(&sq->tail);
622 if (!TX_BUFFS_AVAIL(head, tail)) {
623 DTX(("no buffs available, returning 1\n"));
624 return 1;
627 spin_lock_irqsave(&mp->irq_lock, flags);
629 DHDR(("xmit[skbdata(%p)]\n", skb->data));
630 #ifdef DEBUG_HEADER
631 dump_ehdr_and_myripad(((unsigned char *) skb->data));
632 #endif
634 /* XXX Maybe this can go as well. */
635 len = skb->len;
636 if (len & 3) {
637 DTX(("len&3 "));
638 len = (len + 4) & (~3);
641 entry = sbus_readl(&sq->tail);
643 txd = &sq->myri_txd[entry];
644 mp->tx_skbs[entry] = skb;
646 /* Must do this before we sbus map it. */
647 if (skb->data[MYRI_PAD_LEN] & 0x1) {
648 sbus_writew(0xffff, &txd->addr[0]);
649 sbus_writew(0xffff, &txd->addr[1]);
650 sbus_writew(0xffff, &txd->addr[2]);
651 sbus_writew(0xffff, &txd->addr[3]);
652 } else {
653 sbus_writew(0xffff, &txd->addr[0]);
654 sbus_writew((skb->data[0] << 8) | skb->data[1], &txd->addr[1]);
655 sbus_writew((skb->data[2] << 8) | skb->data[3], &txd->addr[2]);
656 sbus_writew((skb->data[4] << 8) | skb->data[5], &txd->addr[3]);
659 dma_addr = sbus_map_single(mp->myri_sdev, skb->data, len, SBUS_DMA_TODEVICE);
660 sbus_writel(dma_addr, &txd->myri_gathers[0].addr);
661 sbus_writel(len, &txd->myri_gathers[0].len);
662 sbus_writel(1, &txd->num_sg);
663 sbus_writel(KERNEL_CHANNEL, &txd->chan);
664 sbus_writel(len, &txd->len);
665 sbus_writel((u32)-1, &txd->csum_off);
666 sbus_writel(0, &txd->csum_field);
668 sbus_writel(NEXT_TX(entry), &sq->tail);
669 DTX(("BangTheChip "));
670 bang_the_chip(mp);
672 DTX(("tbusy=0, returning 0\n"));
673 netif_start_queue(dev);
674 spin_unlock_irqrestore(&mp->irq_lock, flags);
675 return 0;
678 /* Create the MyriNet MAC header for an arbitrary protocol layer
680 * saddr=NULL means use device source address
681 * daddr=NULL means leave destination address (eg unresolved arp)
683 static int myri_header(struct sk_buff *skb, struct net_device *dev, unsigned short type,
684 void *daddr, void *saddr, unsigned len)
686 struct ethhdr *eth = (struct ethhdr *) skb_push(skb, ETH_HLEN);
687 unsigned char *pad = (unsigned char *) skb_push(skb, MYRI_PAD_LEN);
689 #ifdef DEBUG_HEADER
690 DHDR(("myri_header: pad[%02x,%02x] ", pad[0], pad[1]));
691 dump_ehdr(eth);
692 #endif
694 /* Set the MyriNET padding identifier. */
695 pad[0] = MYRI_PAD_LEN;
696 pad[1] = 0xab;
698 /* Set the protocol type. For a packet of type ETH_P_802_3 we put the length
699 * in here instead. It is up to the 802.2 layer to carry protocol information.
701 if (type != ETH_P_802_3)
702 eth->h_proto = htons(type);
703 else
704 eth->h_proto = htons(len);
706 /* Set the source hardware address. */
707 if (saddr)
708 memcpy(eth->h_source, saddr, dev->addr_len);
709 else
710 memcpy(eth->h_source, dev->dev_addr, dev->addr_len);
712 /* Anyway, the loopback-device should never use this function... */
713 if (dev->flags & IFF_LOOPBACK) {
714 int i;
715 for (i = 0; i < dev->addr_len; i++)
716 eth->h_dest[i] = 0;
717 return(dev->hard_header_len);
720 if (daddr) {
721 memcpy(eth->h_dest, daddr, dev->addr_len);
722 return dev->hard_header_len;
724 return -dev->hard_header_len;
727 /* Rebuild the MyriNet MAC header. This is called after an ARP
728 * (or in future other address resolution) has completed on this
729 * sk_buff. We now let ARP fill in the other fields.
731 static int myri_rebuild_header(struct sk_buff *skb)
733 unsigned char *pad = (unsigned char *) skb->data;
734 struct ethhdr *eth = (struct ethhdr *) (pad + MYRI_PAD_LEN);
735 struct net_device *dev = skb->dev;
737 #ifdef DEBUG_HEADER
738 DHDR(("myri_rebuild_header: pad[%02x,%02x] ", pad[0], pad[1]));
739 dump_ehdr(eth);
740 #endif
742 /* Refill MyriNet padding identifiers, this is just being anal. */
743 pad[0] = MYRI_PAD_LEN;
744 pad[1] = 0xab;
746 switch (eth->h_proto)
748 #ifdef CONFIG_INET
749 case __constant_htons(ETH_P_IP):
750 return arp_find(eth->h_dest, skb);
751 #endif
753 default:
754 printk(KERN_DEBUG
755 "%s: unable to resolve type %X addresses.\n",
756 dev->name, (int)eth->h_proto);
758 memcpy(eth->h_source, dev->dev_addr, dev->addr_len);
759 return 0;
760 break;
763 return 0;
766 int myri_header_cache(struct neighbour *neigh, struct hh_cache *hh)
768 unsigned short type = hh->hh_type;
769 unsigned char *pad;
770 struct ethhdr *eth;
771 struct net_device *dev = neigh->dev;
773 pad = ((unsigned char *) hh->hh_data) +
774 HH_DATA_OFF(sizeof(*eth) + MYRI_PAD_LEN);
775 eth = (struct ethhdr *) (pad + MYRI_PAD_LEN);
777 if (type == __constant_htons(ETH_P_802_3))
778 return -1;
780 /* Refill MyriNet padding identifiers, this is just being anal. */
781 pad[0] = MYRI_PAD_LEN;
782 pad[1] = 0xab;
784 eth->h_proto = type;
785 memcpy(eth->h_source, dev->dev_addr, dev->addr_len);
786 memcpy(eth->h_dest, neigh->ha, dev->addr_len);
787 hh->hh_len = 16;
788 return 0;
792 /* Called by Address Resolution module to notify changes in address. */
793 void myri_header_cache_update(struct hh_cache *hh, struct net_device *dev, unsigned char * haddr)
795 memcpy(((u8*)hh->hh_data) + HH_DATA_OFF(sizeof(struct ethhdr)),
796 haddr, dev->addr_len);
799 static int myri_change_mtu(struct net_device *dev, int new_mtu)
801 if ((new_mtu < (ETH_HLEN + MYRI_PAD_LEN)) || (new_mtu > MYRINET_MTU))
802 return -EINVAL;
803 dev->mtu = new_mtu;
804 return 0;
807 static struct net_device_stats *myri_get_stats(struct net_device *dev)
808 { return &(((struct myri_eth *)dev->priv)->enet_stats); }
810 static void myri_set_multicast(struct net_device *dev)
812 /* Do nothing, all MyriCOM nodes transmit multicast frames
813 * as broadcast packets...
817 static inline void set_boardid_from_idprom(struct myri_eth *mp, int num)
819 mp->eeprom.id[0] = 0;
820 mp->eeprom.id[1] = idprom->id_machtype;
821 mp->eeprom.id[2] = (idprom->id_sernum >> 16) & 0xff;
822 mp->eeprom.id[3] = (idprom->id_sernum >> 8) & 0xff;
823 mp->eeprom.id[4] = (idprom->id_sernum >> 0) & 0xff;
824 mp->eeprom.id[5] = num;
827 static inline void determine_reg_space_size(struct myri_eth *mp)
829 switch(mp->eeprom.cpuvers) {
830 case CPUVERS_2_3:
831 case CPUVERS_3_0:
832 case CPUVERS_3_1:
833 case CPUVERS_3_2:
834 mp->reg_size = (3 * 128 * 1024) + 4096;
835 break;
837 case CPUVERS_4_0:
838 case CPUVERS_4_1:
839 mp->reg_size = ((4096<<1) + mp->eeprom.ramsz);
840 break;
842 case CPUVERS_4_2:
843 case CPUVERS_5_0:
844 default:
845 printk("myricom: AIEEE weird cpu version %04x assuming pre4.0\n",
846 mp->eeprom.cpuvers);
847 mp->reg_size = (3 * 128 * 1024) + 4096;
851 #ifdef DEBUG_DETECT
852 static void dump_eeprom(struct myri_eth *mp)
854 printk("EEPROM: clockval[%08x] cpuvers[%04x] "
855 "id[%02x,%02x,%02x,%02x,%02x,%02x]\n",
856 mp->eeprom.cval, mp->eeprom.cpuvers,
857 mp->eeprom.id[0], mp->eeprom.id[1], mp->eeprom.id[2],
858 mp->eeprom.id[3], mp->eeprom.id[4], mp->eeprom.id[5]);
859 printk("EEPROM: ramsz[%08x]\n", mp->eeprom.ramsz);
860 printk("EEPROM: fvers[%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
861 mp->eeprom.fvers[0], mp->eeprom.fvers[1], mp->eeprom.fvers[2],
862 mp->eeprom.fvers[3], mp->eeprom.fvers[4], mp->eeprom.fvers[5],
863 mp->eeprom.fvers[6], mp->eeprom.fvers[7]);
864 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
865 mp->eeprom.fvers[8], mp->eeprom.fvers[9], mp->eeprom.fvers[10],
866 mp->eeprom.fvers[11], mp->eeprom.fvers[12], mp->eeprom.fvers[13],
867 mp->eeprom.fvers[14], mp->eeprom.fvers[15]);
868 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
869 mp->eeprom.fvers[16], mp->eeprom.fvers[17], mp->eeprom.fvers[18],
870 mp->eeprom.fvers[19], mp->eeprom.fvers[20], mp->eeprom.fvers[21],
871 mp->eeprom.fvers[22], mp->eeprom.fvers[23]);
872 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x]\n",
873 mp->eeprom.fvers[24], mp->eeprom.fvers[25], mp->eeprom.fvers[26],
874 mp->eeprom.fvers[27], mp->eeprom.fvers[28], mp->eeprom.fvers[29],
875 mp->eeprom.fvers[30], mp->eeprom.fvers[31]);
876 printk("EEPROM: mvers[%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
877 mp->eeprom.mvers[0], mp->eeprom.mvers[1], mp->eeprom.mvers[2],
878 mp->eeprom.mvers[3], mp->eeprom.mvers[4], mp->eeprom.mvers[5],
879 mp->eeprom.mvers[6], mp->eeprom.mvers[7]);
880 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x]\n",
881 mp->eeprom.mvers[8], mp->eeprom.mvers[9], mp->eeprom.mvers[10],
882 mp->eeprom.mvers[11], mp->eeprom.mvers[12], mp->eeprom.mvers[13],
883 mp->eeprom.mvers[14], mp->eeprom.mvers[15]);
884 printk("EEPROM: dlval[%04x] brd_type[%04x] bus_type[%04x] prod_code[%04x]\n",
885 mp->eeprom.dlval, mp->eeprom.brd_type, mp->eeprom.bus_type,
886 mp->eeprom.prod_code);
887 printk("EEPROM: serial_num[%08x]\n", mp->eeprom.serial_num);
889 #endif
891 static int __init myri_ether_init(struct net_device *dev, struct sbus_dev *sdev, int num)
893 static unsigned version_printed;
894 struct myri_eth *mp;
895 unsigned char prop_buf[32];
896 int i;
898 DET(("myri_ether_init(%p,%p,%d):\n", dev, sdev, num));
899 dev = init_etherdev(0, sizeof(struct myri_eth));
901 if (!dev)
902 return -ENOMEM;
904 if (version_printed++ == 0)
905 printk(version);
907 printk("%s: MyriCOM MyriNET Ethernet ", dev->name);
909 mp = (struct myri_eth *) dev->priv;
910 spin_lock_init(&mp->irq_lock);
911 mp->myri_sdev = sdev;
913 /* Clean out skb arrays. */
914 for (i = 0; i < (RX_RING_SIZE + 1); i++)
915 mp->rx_skbs[i] = NULL;
917 for (i = 0; i < TX_RING_SIZE; i++)
918 mp->tx_skbs[i] = NULL;
920 /* First check for EEPROM information. */
921 i = prom_getproperty(sdev->prom_node, "myrinet-eeprom-info",
922 (char *)&mp->eeprom, sizeof(struct myri_eeprom));
923 DET(("prom_getprop(myrinet-eeprom-info) returns %d\n", i));
924 if (i == 0 || i == -1) {
925 /* No eeprom property, must cook up the values ourselves. */
926 DET(("No EEPROM: "));
927 mp->eeprom.bus_type = BUS_TYPE_SBUS;
928 mp->eeprom.cpuvers = prom_getintdefault(sdev->prom_node,"cpu_version",0);
929 mp->eeprom.cval = prom_getintdefault(sdev->prom_node,"clock_value",0);
930 mp->eeprom.ramsz = prom_getintdefault(sdev->prom_node,"sram_size",0);
931 DET(("cpuvers[%d] cval[%d] ramsz[%d]\n", mp->eeprom.cpuvers,
932 mp->eeprom.cval, mp->eeprom.ramsz));
933 if (mp->eeprom.cpuvers == 0) {
934 DET(("EEPROM: cpuvers was zero, setting to %04x\n",CPUVERS_2_3));
935 mp->eeprom.cpuvers = CPUVERS_2_3;
937 if (mp->eeprom.cpuvers < CPUVERS_3_0) {
938 DET(("EEPROM: cpuvers < CPUVERS_3_0, clockval set to zero.\n"));
939 mp->eeprom.cval = 0;
941 if (mp->eeprom.ramsz == 0) {
942 DET(("EEPROM: ramsz == 0, setting to 128k\n"));
943 mp->eeprom.ramsz = (128 * 1024);
945 i = prom_getproperty(sdev->prom_node, "myrinet-board-id",
946 &prop_buf[0], 10);
947 DET(("EEPROM: prom_getprop(myrinet-board-id) returns %d\n", i));
948 if ((i != 0) && (i != -1))
949 memcpy(&mp->eeprom.id[0], &prop_buf[0], 6);
950 else
951 set_boardid_from_idprom(mp, num);
952 i = prom_getproperty(sdev->prom_node, "fpga_version",
953 &mp->eeprom.fvers[0], 32);
954 DET(("EEPROM: prom_getprop(fpga_version) returns %d\n", i));
955 if (i == 0 || i == -1)
956 memset(&mp->eeprom.fvers[0], 0, 32);
958 if (mp->eeprom.cpuvers == CPUVERS_4_1) {
959 DET(("EEPROM: cpuvers CPUVERS_4_1, "));
960 if (mp->eeprom.ramsz == (128 * 1024)) {
961 DET(("ramsize 128k, setting to 256k, "));
962 mp->eeprom.ramsz = (256 * 1024);
964 if ((mp->eeprom.cval==0x40414041)||(mp->eeprom.cval==0x90449044)){
965 DET(("changing cval from %08x to %08x ",
966 mp->eeprom.cval, 0x50e450e4));
967 mp->eeprom.cval = 0x50e450e4;
969 DET(("\n"));
972 #ifdef DEBUG_DETECT
973 dump_eeprom(mp);
974 #endif
976 for (i = 0; i < 6; i++)
977 printk("%2.2x%c",
978 dev->dev_addr[i] = mp->eeprom.id[i],
979 i == 5 ? ' ' : ':');
980 printk("\n");
982 determine_reg_space_size(mp);
984 /* Map in the MyriCOM register/localram set. */
985 if (mp->eeprom.cpuvers < CPUVERS_4_0) {
986 /* XXX Makes no sense, if control reg is non-existant this
987 * XXX driver cannot function at all... maybe pre-4.0 is
988 * XXX only a valid version for PCI cards? Ask feldy...
990 DET(("Mapping regs for cpuvers < CPUVERS_4_0\n"));
991 mp->regs = sbus_ioremap(&sdev->resource[0], 0,
992 mp->reg_size, "MyriCOM Regs");
993 if (!mp->regs) {
994 printk("MyriCOM: Cannot map MyriCOM registers.\n");
995 goto err;
997 mp->lanai = (unsigned short *) (mp->regs + (256 * 1024));
998 mp->lanai3 = (unsigned int *) mp->lanai;
999 mp->lregs = (unsigned long) &mp->lanai[0x10000];
1000 } else {
1001 DET(("Mapping regs for cpuvers >= CPUVERS_4_0\n"));
1002 mp->cregs = sbus_ioremap(&sdev->resource[0], 0,
1003 PAGE_SIZE, "MyriCOM Control Regs");
1004 mp->lregs = sbus_ioremap(&sdev->resource[0], (256 * 1024),
1005 PAGE_SIZE, "MyriCOM LANAI Regs");
1006 mp->lanai = (unsigned short *)
1007 sbus_ioremap(&sdev->resource[0], (512 * 1024),
1008 mp->eeprom.ramsz, "MyriCOM SRAM");
1009 mp->lanai3 = (unsigned int *) mp->lanai;
1011 DET(("Registers mapped: cregs[%lx] lregs[%lx] lanai[%p] lanai3[%p]\n",
1012 mp->cregs, mp->lregs, mp->lanai, mp->lanai3));
1014 if (mp->eeprom.cpuvers >= CPUVERS_4_0)
1015 mp->shmem_base = 0xf000;
1016 else
1017 mp->shmem_base = 0x8000;
1019 DET(("Shared memory base is %04x, ", mp->shmem_base));
1021 mp->shmem = (struct myri_shmem *) &mp->lanai[mp->shmem_base];
1022 DET(("shmem mapped at %p\n", mp->shmem));
1024 mp->rqack = &mp->shmem->channel.recvqa;
1025 mp->rq = &mp->shmem->channel.recvq;
1026 mp->sq = &mp->shmem->channel.sendq;
1028 /* Reset the board. */
1029 DET(("Resetting LANAI\n"));
1030 myri_reset_off(mp->lregs, mp->cregs);
1031 myri_reset_on(mp->cregs);
1033 /* Turn IRQ's off. */
1034 myri_disable_irq(mp->lregs, mp->cregs);
1036 /* Reset once more. */
1037 myri_reset_on(mp->cregs);
1039 /* Get the supported DVMA burst sizes from our SBUS. */
1040 mp->myri_bursts = prom_getintdefault(mp->myri_sdev->bus->prom_node,
1041 "burst-sizes", 0x00);
1043 if (!sbus_can_burst64(sdev))
1044 mp->myri_bursts &= ~(DMA_BURST64);
1046 DET(("MYRI bursts %02x\n", mp->myri_bursts));
1048 /* Encode SBUS interrupt level in second control register. */
1049 i = prom_getint(sdev->prom_node, "interrupts");
1050 if (i == 0)
1051 i = 4;
1052 DET(("prom_getint(interrupts)==%d, irqlvl set to %04x\n",
1053 i, (1 << i)));
1055 sbus_writel((1 << i), mp->cregs + MYRICTRL_IRQLVL);
1057 mp->dev = dev;
1058 dev->open = &myri_open;
1059 dev->stop = &myri_close;
1060 dev->hard_start_xmit = &myri_start_xmit;
1061 dev->tx_timeout = &myri_tx_timeout;
1062 dev->watchdog_timeo = 5*HZ;
1063 dev->get_stats = &myri_get_stats;
1064 dev->set_multicast_list = &myri_set_multicast;
1065 dev->irq = sdev->irqs[0];
1067 /* Register interrupt handler now. */
1068 DET(("Requesting MYRIcom IRQ line.\n"));
1069 if (request_irq(dev->irq, &myri_interrupt,
1070 SA_SHIRQ, "MyriCOM Ethernet", (void *) dev)) {
1071 printk("MyriCOM: Cannot register interrupt handler.\n");
1072 goto err;
1075 DET(("ether_setup()\n"));
1076 ether_setup(dev);
1078 dev->mtu = MYRINET_MTU;
1079 dev->change_mtu = myri_change_mtu;
1080 dev->hard_header = myri_header;
1081 dev->rebuild_header = myri_rebuild_header;
1082 dev->hard_header_len = (ETH_HLEN + MYRI_PAD_LEN);
1083 dev->hard_header_cache = myri_header_cache;
1084 dev->header_cache_update= myri_header_cache_update;
1086 /* Load code onto the LANai. */
1087 DET(("Loading LANAI firmware\n"));
1088 myri_load_lanai(mp);
1090 #ifdef MODULE
1091 dev->ifindex = dev_new_index();
1092 mp->next_module = root_myri_dev;
1093 root_myri_dev = mp;
1094 #endif
1095 return 0;
1096 err: unregister_netdev(dev);
1097 /* This will also free the co-allocated 'dev->priv' */
1098 kfree(dev);
1099 return -ENODEV;
1102 static int __init myri_sbus_match(struct sbus_dev *sdev)
1104 char *name = sdev->prom_name;
1106 if (!strcmp(name, "MYRICOM,mlanai") ||
1107 !strcmp(name, "myri"))
1108 return 1;
1110 return 0;
1113 static int __init myri_sbus_probe(void)
1115 struct net_device *dev = NULL;
1116 struct sbus_bus *bus;
1117 struct sbus_dev *sdev = 0;
1118 static int called;
1119 int cards = 0, v;
1121 #ifdef MODULE
1122 root_myri_dev = NULL;
1123 #endif
1125 if (called)
1126 return -ENODEV;
1127 called++;
1129 for_each_sbus(bus) {
1130 for_each_sbusdev(sdev, bus) {
1131 if (cards)
1132 dev = NULL;
1133 if (myri_sbus_match(sdev)) {
1134 cards++;
1135 DET(("Found myricom myrinet as %s\n", sdev->prom_name));
1136 if ((v = myri_ether_init(dev, sdev, (cards - 1))))
1137 return v;
1141 if (!cards)
1142 return -ENODEV;
1143 return 0;
1146 static void __exit myri_sbus_cleanup(void)
1148 #ifdef MODULE
1149 while (root_myri_dev) {
1150 struct myri_eth *next = root_myri_dev->next_module;
1152 unregister_netdev(root_myri_dev->dev);
1153 /* this will also free the co-allocated 'root_myri_dev' */
1154 kfree(root_myri_dev->dev);
1155 root_myri_dev = next;
1157 #endif /* MODULE */
1160 module_init(myri_sbus_probe);
1161 module_exit(myri_sbus_cleanup);
1162 MODULE_LICENSE("GPL");