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[linux-2.6/linux-mips.git] / drivers / net / hamachi.c
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1 /* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */
2 /*
3 Written 1998-2000 by Donald Becker.
4 Updates 2000 by Keith Underwood.
6 This software may be used and distributed according to the terms of
7 the GNU General Public License (GPL), incorporated herein by reference.
8 Drivers based on or derived from this code fall under the GPL and must
9 retain the authorship, copyright and license notice. This file is not
10 a complete program and may only be used when the entire operating
11 system is licensed under the GPL.
13 The author may be reached as becker@scyld.com, or C/O
14 Scyld Computing Corporation
15 410 Severn Ave., Suite 210
16 Annapolis MD 21403
18 This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet
19 adapter.
21 Support and updates available at
22 http://www.scyld.com/network/hamachi.html
24 http://www.parl.clemson.edu/~keithu/hamachi.html
28 Linux kernel changelog:
30 LK1.0.1:
31 - fix lack of pci_dev<->dev association
32 - ethtool support (jgarzik)
36 #define DRV_NAME "hamachi"
37 #define DRV_VERSION "1.01+LK1.0.1"
38 #define DRV_RELDATE "5/18/2001"
41 /* A few user-configurable values. */
43 static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
44 #define final_version
45 #define hamachi_debug debug
46 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
47 static int max_interrupt_work = 40;
48 static int mtu;
49 /* Default values selected by testing on a dual processor PIII-450 */
50 /* These six interrupt control parameters may be set directly when loading the
51 * module, or through the rx_params and tx_params variables
53 static int max_rx_latency = 0x11;
54 static int max_rx_gap = 0x05;
55 static int min_rx_pkt = 0x18;
56 static int max_tx_latency = 0x00;
57 static int max_tx_gap = 0x00;
58 static int min_tx_pkt = 0x30;
60 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
61 -Setting to > 1518 causes all frames to be copied
62 -Setting to 0 disables copies
64 static int rx_copybreak;
66 /* An override for the hardware detection of bus width.
67 Set to 1 to force 32 bit PCI bus detection. Set to 4 to force 64 bit.
68 Add 2 to disable parity detection.
70 static int force32;
73 /* Used to pass the media type, etc.
74 These exist for driver interoperability.
75 No media types are currently defined.
76 - The lower 4 bits are reserved for the media type.
77 - The next three bits may be set to one of the following:
78 0x00000000 : Autodetect PCI bus
79 0x00000010 : Force 32 bit PCI bus
80 0x00000020 : Disable parity detection
81 0x00000040 : Force 64 bit PCI bus
82 Default is autodetect
83 - The next bit can be used to force half-duplex. This is a bad
84 idea since no known implementations implement half-duplex, and,
85 in general, half-duplex for gigabit ethernet is a bad idea.
86 0x00000080 : Force half-duplex
87 Default is full-duplex.
88 - In the original driver, the ninth bit could be used to force
89 full-duplex. Maintain that for compatibility
90 0x00000200 : Force full-duplex
92 #define MAX_UNITS 8 /* More are supported, limit only on options */
93 static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
94 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
95 /* The Hamachi chipset supports 3 parameters each for Rx and Tx
96 * interruput management. Parameters will be loaded as specified into
97 * the TxIntControl and RxIntControl registers.
99 * The registers are arranged as follows:
100 * 23 - 16 15 - 8 7 - 0
101 * _________________________________
102 * | min_pkt | max_gap | max_latency |
103 * ---------------------------------
104 * min_pkt : The minimum number of packets processed between
105 * interrupts.
106 * max_gap : The maximum inter-packet gap in units of 8.192 us
107 * max_latency : The absolute time between interrupts in units of 8.192 us
110 static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
111 static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
113 /* Operational parameters that are set at compile time. */
115 /* Keep the ring sizes a power of two for compile efficiency.
116 The compiler will convert <unsigned>'%'<2^N> into a bit mask.
117 Making the Tx ring too large decreases the effectiveness of channel
118 bonding and packet priority.
119 There are no ill effects from too-large receive rings, except for
120 excessive memory usage */
121 /* Empirically it appears that the Tx ring needs to be a little bigger
122 for these Gbit adapters or you get into an overrun condition really
123 easily. Also, things appear to work a bit better in back-to-back
124 configurations if the Rx ring is 8 times the size of the Tx ring
126 #define TX_RING_SIZE 64
127 #define RX_RING_SIZE 512
128 #define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct hamachi_desc)
129 #define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct hamachi_desc)
132 * Enable netdev_ioctl. Added interrupt coalescing parameter adjustment.
133 * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov>
136 /* play with 64-bit addrlen; seems to be a teensy bit slower --pw */
137 /* #define ADDRLEN 64 */
140 * RX_CHECKSUM turns on card-generated receive checksum generation for
141 * TCP and UDP packets. Otherwise the upper layers do the calculation.
142 * TX_CHECKSUM won't do anything too useful, even if it works. There's no
143 * easy mechanism by which to tell the TCP/UDP stack that it need not
144 * generate checksums for this device. But if somebody can find a way
145 * to get that to work, most of the card work is in here already.
146 * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov>
148 #undef TX_CHECKSUM
149 #define RX_CHECKSUM
151 /* Operational parameters that usually are not changed. */
152 /* Time in jiffies before concluding the transmitter is hung. */
153 #define TX_TIMEOUT (5*HZ)
155 #include <linux/module.h>
156 #include <linux/kernel.h>
157 #include <linux/string.h>
158 #include <linux/timer.h>
159 #include <linux/time.h>
160 #include <linux/errno.h>
161 #include <linux/ioport.h>
162 #include <linux/slab.h>
163 #include <linux/interrupt.h>
164 #include <linux/pci.h>
165 #include <linux/init.h>
166 #include <linux/ethtool.h>
167 #include <linux/mii.h>
168 #include <linux/netdevice.h>
169 #include <linux/etherdevice.h>
170 #include <linux/skbuff.h>
171 #include <linux/ip.h>
172 #include <linux/delay.h>
174 #include <asm/uaccess.h>
175 #include <asm/processor.h> /* Processor type for cache alignment. */
176 #include <asm/bitops.h>
177 #include <asm/io.h>
178 #include <asm/unaligned.h>
179 #include <asm/cache.h>
181 static char version[] __initdata =
182 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n"
183 KERN_INFO " Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"
184 KERN_INFO " Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n";
187 /* IP_MF appears to be only defined in <netinet/ip.h>, however,
188 we need it for hardware checksumming support. FYI... some of
189 the definitions in <netinet/ip.h> conflict/duplicate those in
190 other linux headers causing many compiler warnings.
192 #ifndef IP_MF
193 #define IP_MF 0x2000 /* IP more frags from <netinet/ip.h> */
194 #endif
196 /* Define IP_OFFSET to be IPOPT_OFFSET */
197 #ifndef IP_OFFSET
198 #ifdef IPOPT_OFFSET
199 #define IP_OFFSET IPOPT_OFFSET
200 #else
201 #define IP_OFFSET 2
202 #endif
203 #endif
205 #define RUN_AT(x) (jiffies + (x))
207 /* Condensed bus+endian portability operations. */
208 #if ADDRLEN == 64
209 #define cpu_to_leXX(addr) cpu_to_le64(addr)
210 #define desc_to_virt(addr) bus_to_virt(le64_to_cpu(addr))
211 #else
212 #define cpu_to_leXX(addr) cpu_to_le32(addr)
213 #define desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr))
214 #endif
218 Theory of Operation
220 I. Board Compatibility
222 This device driver is designed for the Packet Engines "Hamachi"
223 Gigabit Ethernet chip. The only PCA currently supported is the GNIC-II 64-bit
224 66Mhz PCI card.
226 II. Board-specific settings
228 No jumpers exist on the board. The chip supports software correction of
229 various motherboard wiring errors, however this driver does not support
230 that feature.
232 III. Driver operation
234 IIIa. Ring buffers
236 The Hamachi uses a typical descriptor based bus-master architecture.
237 The descriptor list is similar to that used by the Digital Tulip.
238 This driver uses two statically allocated fixed-size descriptor lists
239 formed into rings by a branch from the final descriptor to the beginning of
240 the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
242 This driver uses a zero-copy receive and transmit scheme similar my other
243 network drivers.
244 The driver allocates full frame size skbuffs for the Rx ring buffers at
245 open() time and passes the skb->data field to the Hamachi as receive data
246 buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
247 a fresh skbuff is allocated and the frame is copied to the new skbuff.
248 When the incoming frame is larger, the skbuff is passed directly up the
249 protocol stack and replaced by a newly allocated skbuff.
251 The RX_COPYBREAK value is chosen to trade-off the memory wasted by
252 using a full-sized skbuff for small frames vs. the copying costs of larger
253 frames. Gigabit cards are typically used on generously configured machines
254 and the underfilled buffers have negligible impact compared to the benefit of
255 a single allocation size, so the default value of zero results in never
256 copying packets.
258 IIIb/c. Transmit/Receive Structure
260 The Rx and Tx descriptor structure are straight-forward, with no historical
261 baggage that must be explained. Unlike the awkward DBDMA structure, there
262 are no unused fields or option bits that had only one allowable setting.
264 Two details should be noted about the descriptors: The chip supports both 32
265 bit and 64 bit address structures, and the length field is overwritten on
266 the receive descriptors. The descriptor length is set in the control word
267 for each channel. The development driver uses 32 bit addresses only, however
268 64 bit addresses may be enabled for 64 bit architectures e.g. the Alpha.
270 IIId. Synchronization
272 This driver is very similar to my other network drivers.
273 The driver runs as two independent, single-threaded flows of control. One
274 is the send-packet routine, which enforces single-threaded use by the
275 dev->tbusy flag. The other thread is the interrupt handler, which is single
276 threaded by the hardware and other software.
278 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
279 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
280 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
281 the 'hmp->tx_full' flag.
283 The interrupt handler has exclusive control over the Rx ring and records stats
284 from the Tx ring. After reaping the stats, it marks the Tx queue entry as
285 empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it
286 clears both the tx_full and tbusy flags.
288 IV. Notes
290 Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards.
292 IVb. References
294 Hamachi Engineering Design Specification, 5/15/97
295 (Note: This version was marked "Confidential".)
297 IVc. Errata
299 None noted.
301 V. Recent Changes
303 01/15/1999 EPK Enlargement of the TX and RX ring sizes. This appears
304 to help avoid some stall conditions -- this needs further research.
306 01/15/1999 EPK Creation of the hamachi_tx function. This function cleans
307 the Tx ring and is called from hamachi_start_xmit (this used to be
308 called from hamachi_interrupt but it tends to delay execution of the
309 interrupt handler and thus reduce bandwidth by reducing the latency
310 between hamachi_rx()'s). Notably, some modification has been made so
311 that the cleaning loop checks only to make sure that the DescOwn bit
312 isn't set in the status flag since the card is not required
313 to set the entire flag to zero after processing.
315 01/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is
316 checked before attempting to add a buffer to the ring. If the ring is full
317 an attempt is made to free any dirty buffers and thus find space for
318 the new buffer or the function returns non-zero which should case the
319 scheduler to reschedule the buffer later.
321 01/15/1999 EPK Some adjustments were made to the chip initialization.
322 End-to-end flow control should now be fully active and the interrupt
323 algorithm vars have been changed. These could probably use further tuning.
325 01/15/1999 EPK Added the max_{rx,tx}_latency options. These are used to
326 set the rx and tx latencies for the Hamachi interrupts. If you're having
327 problems with network stalls, try setting these to higher values.
328 Valid values are 0x00 through 0xff.
330 01/15/1999 EPK In general, the overall bandwidth has increased and
331 latencies are better (sometimes by a factor of 2). Stalls are rare at
332 this point, however there still appears to be a bug somewhere between the
333 hardware and driver. TCP checksum errors under load also appear to be
334 eliminated at this point.
336 01/18/1999 EPK Ensured that the DescEndRing bit was being set on both the
337 Rx and Tx rings. This appears to have been affecting whether a particular
338 peer-to-peer connection would hang under high load. I believe the Rx
339 rings was typically getting set correctly, but the Tx ring wasn't getting
340 the DescEndRing bit set during initialization. ??? Does this mean the
341 hamachi card is using the DescEndRing in processing even if a particular
342 slot isn't in use -- hypothetically, the card might be searching the
343 entire Tx ring for slots with the DescOwn bit set and then processing
344 them. If the DescEndRing bit isn't set, then it might just wander off
345 through memory until it hits a chunk of data with that bit set
346 and then looping back.
348 02/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout
349 problem (TxCmd and RxCmd need only to be set when idle or stopped.
351 02/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt.
352 (Michel Mueller pointed out the ``permanently busy'' potential
353 problem here).
355 02/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies.
357 02/23/1999 EPK Verified that the interrupt status field bits for Tx were
358 incorrectly defined and corrected (as per Michel Mueller).
360 02/23/1999 EPK Corrected the Tx full check to check that at least 4 slots
361 were available before reseting the tbusy and tx_full flags
362 (as per Michel Mueller).
364 03/11/1999 EPK Added Pete Wyckoff's hardware checksumming support.
366 12/31/1999 KDU Cleaned up assorted things and added Don's code to force
367 32 bit.
369 02/20/2000 KDU Some of the control was just plain odd. Cleaned up the
370 hamachi_start_xmit() and hamachi_interrupt() code. There is still some
371 re-structuring I would like to do.
373 03/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation
374 parameters on a dual P3-450 setup yielded the new default interrupt
375 mitigation parameters. Tx should interrupt VERY infrequently due to
376 Eric's scheme. Rx should be more often...
378 03/13/2000 KDU Added a patch to make the Rx Checksum code interact
379 nicely with non-linux machines.
381 03/13/2000 KDU Experimented with some of the configuration values:
383 -It seems that enabling PCI performance commands for descriptors
384 (changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal
385 performance impact for any of my tests. (ttcp, netpipe, netperf) I will
386 leave them that way until I hear further feedback.
388 -Increasing the PCI_LATENCY_TIMER to 130
389 (2 + (burst size of 128 * (0 wait states + 1))) seems to slightly
390 degrade performance. Leaving default at 64 pending further information.
392 03/14/2000 KDU Further tuning:
394 -adjusted boguscnt in hamachi_rx() to depend on interrupt
395 mitigation parameters chosen.
397 -Selected a set of interrupt parameters based on some extensive testing.
398 These may change with more testing.
400 TO DO:
402 -Consider borrowing from the acenic driver code to check PCI_COMMAND for
403 PCI_COMMAND_INVALIDATE. Set maximum burst size to cache line size in
404 that case.
406 -fix the reset procedure. It doesn't quite work.
409 /* A few values that may be tweaked. */
410 /* Size of each temporary Rx buffer, calculated as:
411 * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for
412 * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum +
413 * 2 more because we use skb_reserve.
415 #define PKT_BUF_SZ 1538
417 /* For now, this is going to be set to the maximum size of an ethernet
418 * packet. Eventually, we may want to make it a variable that is
419 * related to the MTU
421 #define MAX_FRAME_SIZE 1518
423 /* The rest of these values should never change. */
425 static void hamachi_timer(unsigned long data);
427 enum capability_flags {CanHaveMII=1, };
428 static struct chip_info {
429 u16 vendor_id, device_id, device_id_mask, pad;
430 const char *name;
431 void (*media_timer)(unsigned long data);
432 int flags;
433 } chip_tbl[] = {
434 {0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0},
435 {0,},
438 /* Offsets to the Hamachi registers. Various sizes. */
439 enum hamachi_offsets {
440 TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10,
441 RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30,
442 PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B,
443 LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E,
444 TxChecksum=0x074, RxChecksum=0x076,
445 TxIntrCtrl=0x078, RxIntrCtrl=0x07C,
446 InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088,
447 EventStatus=0x08C,
448 MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4,
449 /* See enum MII_offsets below. */
450 MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE,
451 AddrMode=0x0D0, StationAddr=0x0D2,
452 /* Gigabit AutoNegotiation. */
453 ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8,
454 ANLinkPartnerAbility=0x0EA,
455 EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2,
456 FIFOcfg=0x0F8,
459 /* Offsets to the MII-mode registers. */
460 enum MII_offsets {
461 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
462 MII_Status=0xAE,
465 /* Bits in the interrupt status/mask registers. */
466 enum intr_status_bits {
467 IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04,
468 IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400,
469 LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, };
471 /* The Hamachi Rx and Tx buffer descriptors. */
472 struct hamachi_desc {
473 u32 status_n_length;
474 #if ADDRLEN == 64
475 u32 pad;
476 u64 addr;
477 #else
478 u32 addr;
479 #endif
482 /* Bits in hamachi_desc.status_n_length */
483 enum desc_status_bits {
484 DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000,
485 DescIntr=0x10000000,
488 #define PRIV_ALIGN 15 /* Required alignment mask */
489 #define MII_CNT 4
490 struct hamachi_private {
491 /* Descriptor rings first for alignment. Tx requires a second descriptor
492 for status. */
493 struct hamachi_desc *rx_ring;
494 struct hamachi_desc *tx_ring;
495 struct sk_buff* rx_skbuff[RX_RING_SIZE];
496 struct sk_buff* tx_skbuff[TX_RING_SIZE];
497 dma_addr_t tx_ring_dma;
498 dma_addr_t rx_ring_dma;
499 struct net_device_stats stats;
500 struct timer_list timer; /* Media selection timer. */
501 /* Frequently used and paired value: keep adjacent for cache effect. */
502 spinlock_t lock;
503 int chip_id;
504 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
505 unsigned int cur_tx, dirty_tx;
506 unsigned int rx_buf_sz; /* Based on MTU+slack. */
507 unsigned int tx_full:1; /* The Tx queue is full. */
508 unsigned int duplex_lock:1;
509 unsigned int default_port:4; /* Last dev->if_port value. */
510 /* MII transceiver section. */
511 int mii_cnt; /* MII device addresses. */
512 struct mii_if_info mii_if; /* MII lib hooks/info */
513 unsigned char phys[MII_CNT]; /* MII device addresses, only first one used. */
514 u32 rx_int_var, tx_int_var; /* interrupt control variables */
515 u32 option; /* Hold on to a copy of the options */
516 struct pci_dev *pci_dev;
519 MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>");
520 MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver");
521 MODULE_LICENSE("GPL");
523 MODULE_PARM(max_interrupt_work, "i");
524 MODULE_PARM(mtu, "i");
525 MODULE_PARM(debug, "i");
526 MODULE_PARM(min_rx_pkt, "i");
527 MODULE_PARM(max_rx_gap, "i");
528 MODULE_PARM(max_rx_latency, "i");
529 MODULE_PARM(min_tx_pkt, "i");
530 MODULE_PARM(max_tx_gap, "i");
531 MODULE_PARM(max_tx_latency, "i");
532 MODULE_PARM(rx_copybreak, "i");
533 MODULE_PARM(rx_params, "1-" __MODULE_STRING(MAX_UNITS) "i");
534 MODULE_PARM(tx_params, "1-" __MODULE_STRING(MAX_UNITS) "i");
535 MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
536 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
537 MODULE_PARM(force32, "i");
538 MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt");
539 MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)");
540 MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)");
541 MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts");
542 MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units");
543 MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units");
544 MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts");
545 MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units");
546 MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units");
547 MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames");
548 MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency");
549 MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency");
550 MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex");
551 MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)");
552 MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)");
554 static int read_eeprom(long ioaddr, int location);
555 static int mdio_read(struct net_device *dev, int phy_id, int location);
556 static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
557 static int hamachi_open(struct net_device *dev);
558 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
559 static void hamachi_timer(unsigned long data);
560 static void hamachi_tx_timeout(struct net_device *dev);
561 static void hamachi_init_ring(struct net_device *dev);
562 static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev);
563 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
564 static inline int hamachi_rx(struct net_device *dev);
565 static inline int hamachi_tx(struct net_device *dev);
566 static void hamachi_error(struct net_device *dev, int intr_status);
567 static int hamachi_close(struct net_device *dev);
568 static struct net_device_stats *hamachi_get_stats(struct net_device *dev);
569 static void set_rx_mode(struct net_device *dev);
572 static int __init hamachi_init_one (struct pci_dev *pdev,
573 const struct pci_device_id *ent)
575 struct hamachi_private *hmp;
576 int option, i, rx_int_var, tx_int_var, boguscnt;
577 int chip_id = ent->driver_data;
578 int irq;
579 long ioaddr;
580 static int card_idx;
581 struct net_device *dev;
582 void *ring_space;
583 dma_addr_t ring_dma;
584 int ret = -ENOMEM;
586 /* when built into the kernel, we only print version if device is found */
587 #ifndef MODULE
588 static int printed_version;
589 if (!printed_version++)
590 printk(version);
591 #endif
593 if (pci_enable_device(pdev)) {
594 ret = -EIO;
595 goto err_out;
598 ioaddr = pci_resource_start(pdev, 0);
599 #ifdef __alpha__ /* Really "64 bit addrs" */
600 ioaddr |= (pci_resource_start(pdev, 1) << 32);
601 #endif
603 pci_set_master(pdev);
605 i = pci_request_regions(pdev, DRV_NAME);
606 if (i) return i;
608 irq = pdev->irq;
609 ioaddr = (long) ioremap(ioaddr, 0x400);
610 if (!ioaddr)
611 goto err_out_release;
613 dev = alloc_etherdev(sizeof(struct hamachi_private));
614 if (!dev)
615 goto err_out_iounmap;
617 SET_MODULE_OWNER(dev);
618 SET_NETDEV_DEV(dev, &pdev->dev);
620 #ifdef TX_CHECKSUM
621 printk("check that skbcopy in ip_queue_xmit isn't happening\n");
622 dev->hard_header_len += 8; /* for cksum tag */
623 #endif
625 for (i = 0; i < 6; i++)
626 dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i)
627 : readb(ioaddr + StationAddr + i);
629 #if ! defined(final_version)
630 if (hamachi_debug > 4)
631 for (i = 0; i < 0x10; i++)
632 printk("%2.2x%s",
633 read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n");
634 #endif
636 hmp = dev->priv;
637 spin_lock_init(&hmp->lock);
639 hmp->mii_if.dev = dev;
640 hmp->mii_if.mdio_read = mdio_read;
641 hmp->mii_if.mdio_write = mdio_write;
642 hmp->mii_if.phy_id_mask = 0x1f;
643 hmp->mii_if.reg_num_mask = 0x1f;
645 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
646 if (!ring_space)
647 goto err_out_cleardev;
648 hmp->tx_ring = (struct hamachi_desc *)ring_space;
649 hmp->tx_ring_dma = ring_dma;
651 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
652 if (!ring_space)
653 goto err_out_unmap_tx;
654 hmp->rx_ring = (struct hamachi_desc *)ring_space;
655 hmp->rx_ring_dma = ring_dma;
657 /* Check for options being passed in */
658 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
659 if (dev->mem_start)
660 option = dev->mem_start;
662 /* If the bus size is misidentified, do the following. */
663 force32 = force32 ? force32 :
664 ((option >= 0) ? ((option & 0x00000070) >> 4) : 0 );
665 if (force32)
666 writeb(force32, ioaddr + VirtualJumpers);
668 /* Hmmm, do we really need to reset the chip???. */
669 writeb(0x01, ioaddr + ChipReset);
671 /* After a reset, the clock speed measurement of the PCI bus will not
672 * be valid for a moment. Wait for a little while until it is. If
673 * it takes more than 10ms, forget it.
675 udelay(10);
676 i = readb(ioaddr + PCIClkMeas);
677 for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){
678 udelay(10);
679 i = readb(ioaddr + PCIClkMeas);
682 dev->base_addr = ioaddr;
683 dev->irq = irq;
684 pci_set_drvdata(pdev, dev);
686 hmp->chip_id = chip_id;
687 hmp->pci_dev = pdev;
689 /* The lower four bits are the media type. */
690 if (option > 0) {
691 hmp->option = option;
692 if (option & 0x200)
693 hmp->mii_if.full_duplex = 1;
694 else if (option & 0x080)
695 hmp->mii_if.full_duplex = 0;
696 hmp->default_port = option & 15;
697 if (hmp->default_port)
698 hmp->mii_if.force_media = 1;
700 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
701 hmp->mii_if.full_duplex = 1;
703 /* lock the duplex mode if someone specified a value */
704 if (hmp->mii_if.full_duplex || (option & 0x080))
705 hmp->duplex_lock = 1;
707 /* Set interrupt tuning parameters */
708 max_rx_latency = max_rx_latency & 0x00ff;
709 max_rx_gap = max_rx_gap & 0x00ff;
710 min_rx_pkt = min_rx_pkt & 0x00ff;
711 max_tx_latency = max_tx_latency & 0x00ff;
712 max_tx_gap = max_tx_gap & 0x00ff;
713 min_tx_pkt = min_tx_pkt & 0x00ff;
715 rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1;
716 tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1;
717 hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var :
718 (min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency);
719 hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var :
720 (min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency);
723 /* The Hamachi-specific entries in the device structure. */
724 dev->open = &hamachi_open;
725 dev->hard_start_xmit = &hamachi_start_xmit;
726 dev->stop = &hamachi_close;
727 dev->get_stats = &hamachi_get_stats;
728 dev->set_multicast_list = &set_rx_mode;
729 dev->do_ioctl = &netdev_ioctl;
730 dev->tx_timeout = &hamachi_tx_timeout;
731 dev->watchdog_timeo = TX_TIMEOUT;
732 if (mtu)
733 dev->mtu = mtu;
735 i = register_netdev(dev);
736 if (i) {
737 ret = i;
738 goto err_out_unmap_rx;
741 printk(KERN_INFO "%s: %s type %x at 0x%lx, ",
742 dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
743 ioaddr);
744 for (i = 0; i < 5; i++)
745 printk("%2.2x:", dev->dev_addr[i]);
746 printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], irq);
747 i = readb(ioaddr + PCIClkMeas);
748 printk(KERN_INFO "%s: %d-bit %d Mhz PCI bus (%d), Virtual Jumpers "
749 "%2.2x, LPA %4.4x.\n",
750 dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
751 i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers),
752 readw(ioaddr + ANLinkPartnerAbility));
754 if (chip_tbl[hmp->chip_id].flags & CanHaveMII) {
755 int phy, phy_idx = 0;
756 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
757 int mii_status = mdio_read(dev, phy, MII_BMSR);
758 if (mii_status != 0xffff &&
759 mii_status != 0x0000) {
760 hmp->phys[phy_idx++] = phy;
761 hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
762 printk(KERN_INFO "%s: MII PHY found at address %d, status "
763 "0x%4.4x advertising %4.4x.\n",
764 dev->name, phy, mii_status, hmp->mii_if.advertising);
767 hmp->mii_cnt = phy_idx;
768 if (hmp->mii_cnt > 0)
769 hmp->mii_if.phy_id = hmp->phys[0];
770 else
771 memset(&hmp->mii_if, 0, sizeof(hmp->mii_if));
773 /* Configure gigabit autonegotiation. */
774 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
775 writew(0x08e0, ioaddr + ANAdvertise); /* Set our advertise word. */
776 writew(0x1000, ioaddr + ANCtrl); /* Enable negotiation */
778 card_idx++;
779 return 0;
781 err_out_unmap_rx:
782 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
783 hmp->rx_ring_dma);
784 err_out_unmap_tx:
785 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
786 hmp->tx_ring_dma);
787 err_out_cleardev:
788 kfree (dev);
789 err_out_iounmap:
790 iounmap((char *)ioaddr);
791 err_out_release:
792 pci_release_regions(pdev);
793 err_out:
794 return ret;
797 static int __init read_eeprom(long ioaddr, int location)
799 int bogus_cnt = 1000;
801 /* We should check busy first - per docs -KDU */
802 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
803 writew(location, ioaddr + EEAddr);
804 writeb(0x02, ioaddr + EECmdStatus);
805 bogus_cnt = 1000;
806 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
807 if (hamachi_debug > 5)
808 printk(" EEPROM status is %2.2x after %d ticks.\n",
809 (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt);
810 return readb(ioaddr + EEData);
813 /* MII Managemen Data I/O accesses.
814 These routines assume the MDIO controller is idle, and do not exit until
815 the command is finished. */
817 static int mdio_read(struct net_device *dev, int phy_id, int location)
819 long ioaddr = dev->base_addr;
820 int i;
822 /* We should check busy first - per docs -KDU */
823 for (i = 10000; i >= 0; i--)
824 if ((readw(ioaddr + MII_Status) & 1) == 0)
825 break;
826 writew((phy_id<<8) + location, ioaddr + MII_Addr);
827 writew(0x0001, ioaddr + MII_Cmd);
828 for (i = 10000; i >= 0; i--)
829 if ((readw(ioaddr + MII_Status) & 1) == 0)
830 break;
831 return readw(ioaddr + MII_Rd_Data);
834 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
836 long ioaddr = dev->base_addr;
837 int i;
839 /* We should check busy first - per docs -KDU */
840 for (i = 10000; i >= 0; i--)
841 if ((readw(ioaddr + MII_Status) & 1) == 0)
842 break;
843 writew((phy_id<<8) + location, ioaddr + MII_Addr);
844 writew(value, ioaddr + MII_Wr_Data);
846 /* Wait for the command to finish. */
847 for (i = 10000; i >= 0; i--)
848 if ((readw(ioaddr + MII_Status) & 1) == 0)
849 break;
850 return;
854 static int hamachi_open(struct net_device *dev)
856 struct hamachi_private *hmp = dev->priv;
857 long ioaddr = dev->base_addr;
858 int i;
859 u32 rx_int_var, tx_int_var;
860 u16 fifo_info;
862 i = request_irq(dev->irq, &hamachi_interrupt, SA_SHIRQ, dev->name, dev);
863 if (i)
864 return i;
866 if (hamachi_debug > 1)
867 printk(KERN_DEBUG "%s: hamachi_open() irq %d.\n",
868 dev->name, dev->irq);
870 hamachi_init_ring(dev);
872 #if ADDRLEN == 64
873 /* writellll anyone ? */
874 writel(cpu_to_le64(hmp->rx_ring_dma), ioaddr + RxPtr);
875 writel(cpu_to_le64(hmp->rx_ring_dma) >> 32, ioaddr + RxPtr + 4);
876 writel(cpu_to_le64(hmp->tx_ring_dma), ioaddr + TxPtr);
877 writel(cpu_to_le64(hmp->tx_ring_dma) >> 32, ioaddr + TxPtr + 4);
878 #else
879 writel(cpu_to_le32(hmp->rx_ring_dma), ioaddr + RxPtr);
880 writel(cpu_to_le32(hmp->tx_ring_dma), ioaddr + TxPtr);
881 #endif
883 /* TODO: It would make sense to organize this as words since the card
884 * documentation does. -KDU
886 for (i = 0; i < 6; i++)
887 writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
889 /* Initialize other registers: with so many this eventually this will
890 converted to an offset/value list. */
892 /* Configure the FIFO */
893 fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
894 switch (fifo_info){
895 case 0 :
896 /* No FIFO */
897 writew(0x0000, ioaddr + FIFOcfg);
898 break;
899 case 1 :
900 /* Configure the FIFO for 512K external, 16K used for Tx. */
901 writew(0x0028, ioaddr + FIFOcfg);
902 break;
903 case 2 :
904 /* Configure the FIFO for 1024 external, 32K used for Tx. */
905 writew(0x004C, ioaddr + FIFOcfg);
906 break;
907 case 3 :
908 /* Configure the FIFO for 2048 external, 32K used for Tx. */
909 writew(0x006C, ioaddr + FIFOcfg);
910 break;
911 default :
912 printk(KERN_WARNING "%s: Unsupported external memory config!\n",
913 dev->name);
914 /* Default to no FIFO */
915 writew(0x0000, ioaddr + FIFOcfg);
916 break;
919 if (dev->if_port == 0)
920 dev->if_port = hmp->default_port;
923 /* Setting the Rx mode will start the Rx process. */
924 /* If someone didn't choose a duplex, default to full-duplex */
925 if (hmp->duplex_lock != 1)
926 hmp->mii_if.full_duplex = 1;
928 /* always 1, takes no more time to do it */
929 writew(0x0001, ioaddr + RxChecksum);
930 #ifdef TX_CHECKSUM
931 writew(0x0001, ioaddr + TxChecksum);
932 #else
933 writew(0x0000, ioaddr + TxChecksum);
934 #endif
935 writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */
936 writew(0x215F, ioaddr + MACCnfg);
937 writew(0x000C, ioaddr + FrameGap0);
938 /* WHAT?!?!? Why isn't this documented somewhere? -KDU */
939 writew(0x1018, ioaddr + FrameGap1);
940 /* Why do we enable receives/transmits here? -KDU */
941 writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */
942 /* Enable automatic generation of flow control frames, period 0xffff. */
943 writel(0x0030FFFF, ioaddr + FlowCtrl);
944 writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize); /* dev->mtu+14 ??? */
946 /* Enable legacy links. */
947 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
948 /* Initial Link LED to blinking red. */
949 writeb(0x03, ioaddr + LEDCtrl);
951 /* Configure interrupt mitigation. This has a great effect on
952 performance, so systems tuning should start here!. */
954 rx_int_var = hmp->rx_int_var;
955 tx_int_var = hmp->tx_int_var;
957 if (hamachi_debug > 1) {
958 printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n",
959 tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8,
960 (tx_int_var & 0x00ff0000) >> 16);
961 printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n",
962 rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8,
963 (rx_int_var & 0x00ff0000) >> 16);
964 printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var);
967 writel(tx_int_var, ioaddr + TxIntrCtrl);
968 writel(rx_int_var, ioaddr + RxIntrCtrl);
970 set_rx_mode(dev);
972 netif_start_queue(dev);
974 /* Enable interrupts by setting the interrupt mask. */
975 writel(0x80878787, ioaddr + InterruptEnable);
976 writew(0x0000, ioaddr + EventStatus); /* Clear non-interrupting events */
978 /* Configure and start the DMA channels. */
979 /* Burst sizes are in the low three bits: size = 4<<(val&7) */
980 #if ADDRLEN == 64
981 writew(0x005D, ioaddr + RxDMACtrl); /* 128 dword bursts */
982 writew(0x005D, ioaddr + TxDMACtrl);
983 #else
984 writew(0x001D, ioaddr + RxDMACtrl);
985 writew(0x001D, ioaddr + TxDMACtrl);
986 #endif
987 writew(0x0001, dev->base_addr + RxCmd);
989 if (hamachi_debug > 2) {
990 printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n",
991 dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus));
993 /* Set the timer to check for link beat. */
994 init_timer(&hmp->timer);
995 hmp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */
996 hmp->timer.data = (unsigned long)dev;
997 hmp->timer.function = &hamachi_timer; /* timer handler */
998 add_timer(&hmp->timer);
1000 return 0;
1003 static inline int hamachi_tx(struct net_device *dev)
1005 struct hamachi_private *hmp = dev->priv;
1007 /* Update the dirty pointer until we find an entry that is
1008 still owned by the card */
1009 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) {
1010 int entry = hmp->dirty_tx % TX_RING_SIZE;
1011 struct sk_buff *skb;
1013 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1014 break;
1015 /* Free the original skb. */
1016 skb = hmp->tx_skbuff[entry];
1017 if (skb != 0) {
1018 pci_unmap_single(hmp->pci_dev,
1019 hmp->tx_ring[entry].addr, skb->len,
1020 PCI_DMA_TODEVICE);
1021 dev_kfree_skb(skb);
1022 hmp->tx_skbuff[entry] = 0;
1024 hmp->tx_ring[entry].status_n_length = 0;
1025 if (entry >= TX_RING_SIZE-1)
1026 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1027 cpu_to_le32(DescEndRing);
1028 hmp->stats.tx_packets++;
1031 return 0;
1034 static void hamachi_timer(unsigned long data)
1036 struct net_device *dev = (struct net_device *)data;
1037 struct hamachi_private *hmp = dev->priv;
1038 long ioaddr = dev->base_addr;
1039 int next_tick = 10*HZ;
1041 if (hamachi_debug > 2) {
1042 printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA "
1043 "%4.4x.\n", dev->name, readw(ioaddr + ANStatus),
1044 readw(ioaddr + ANLinkPartnerAbility));
1045 printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x "
1046 "%4.4x %4.4x %4.4x.\n", dev->name,
1047 readw(ioaddr + 0x0e0),
1048 readw(ioaddr + 0x0e2),
1049 readw(ioaddr + 0x0e4),
1050 readw(ioaddr + 0x0e6),
1051 readw(ioaddr + 0x0e8),
1052 readw(ioaddr + 0x0eA));
1054 /* We could do something here... nah. */
1055 hmp->timer.expires = RUN_AT(next_tick);
1056 add_timer(&hmp->timer);
1059 static void hamachi_tx_timeout(struct net_device *dev)
1061 int i;
1062 struct hamachi_private *hmp = dev->priv;
1063 long ioaddr = dev->base_addr;
1065 printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x,"
1066 " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus));
1069 int i;
1070 printk(KERN_DEBUG " Rx ring %p: ", hmp->rx_ring);
1071 for (i = 0; i < RX_RING_SIZE; i++)
1072 printk(" %8.8x", (unsigned int)hmp->rx_ring[i].status_n_length);
1073 printk("\n"KERN_DEBUG" Tx ring %p: ", hmp->tx_ring);
1074 for (i = 0; i < TX_RING_SIZE; i++)
1075 printk(" %4.4x", hmp->tx_ring[i].status_n_length);
1076 printk("\n");
1079 /* Reinit the hardware and make sure the Rx and Tx processes
1080 are up and running.
1082 dev->if_port = 0;
1083 /* The right way to do Reset. -KDU
1084 * -Clear OWN bit in all Rx/Tx descriptors
1085 * -Wait 50 uS for channels to go idle
1086 * -Turn off MAC receiver
1087 * -Issue Reset
1090 for (i = 0; i < RX_RING_SIZE; i++)
1091 hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn);
1093 /* Presume that all packets in the Tx queue are gone if we have to
1094 * re-init the hardware.
1096 for (i = 0; i < TX_RING_SIZE; i++){
1097 struct sk_buff *skb;
1099 if (i >= TX_RING_SIZE - 1)
1100 hmp->tx_ring[i].status_n_length = cpu_to_le32(
1101 DescEndRing |
1102 (hmp->tx_ring[i].status_n_length & 0x0000FFFF));
1103 else
1104 hmp->tx_ring[i].status_n_length &= 0x0000ffff;
1105 skb = hmp->tx_skbuff[i];
1106 if (skb){
1107 pci_unmap_single(hmp->pci_dev, hmp->tx_ring[i].addr,
1108 skb->len, PCI_DMA_TODEVICE);
1109 dev_kfree_skb(skb);
1110 hmp->tx_skbuff[i] = 0;
1114 udelay(60); /* Sleep 60 us just for safety sake */
1115 writew(0x0002, dev->base_addr + RxCmd); /* STOP Rx */
1117 writeb(0x01, ioaddr + ChipReset); /* Reinit the hardware */
1119 hmp->tx_full = 0;
1120 hmp->cur_rx = hmp->cur_tx = 0;
1121 hmp->dirty_rx = hmp->dirty_tx = 0;
1122 /* Rx packets are also presumed lost; however, we need to make sure a
1123 * ring of buffers is in tact. -KDU
1125 for (i = 0; i < RX_RING_SIZE; i++){
1126 struct sk_buff *skb = hmp->rx_skbuff[i];
1128 if (skb){
1129 pci_unmap_single(hmp->pci_dev, hmp->rx_ring[i].addr,
1130 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1131 dev_kfree_skb(skb);
1132 hmp->rx_skbuff[i] = 0;
1135 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1136 for (i = 0; i < RX_RING_SIZE; i++) {
1137 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1138 hmp->rx_skbuff[i] = skb;
1139 if (skb == NULL)
1140 break;
1141 skb->dev = dev; /* Mark as being used by this device. */
1142 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1143 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1144 skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1145 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1146 DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2));
1148 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1149 /* Mark the last entry as wrapping the ring. */
1150 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1152 /* Trigger an immediate transmit demand. */
1153 dev->trans_start = jiffies;
1154 hmp->stats.tx_errors++;
1156 /* Restart the chip's Tx/Rx processes . */
1157 writew(0x0002, dev->base_addr + TxCmd); /* STOP Tx */
1158 writew(0x0001, dev->base_addr + TxCmd); /* START Tx */
1159 writew(0x0001, dev->base_addr + RxCmd); /* START Rx */
1161 netif_wake_queue(dev);
1165 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1166 static void hamachi_init_ring(struct net_device *dev)
1168 struct hamachi_private *hmp = dev->priv;
1169 int i;
1171 hmp->tx_full = 0;
1172 hmp->cur_rx = hmp->cur_tx = 0;
1173 hmp->dirty_rx = hmp->dirty_tx = 0;
1175 #if 0
1176 /* This is wrong. I'm not sure what the original plan was, but this
1177 * is wrong. An MTU of 1 gets you a buffer of 1536, while an MTU
1178 * of 1501 gets a buffer of 1533? -KDU
1180 hmp->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
1181 #endif
1182 /* My attempt at a reasonable correction */
1183 /* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the
1184 * card needs room to do 8 byte alignment, +2 so we can reserve
1185 * the first 2 bytes, and +16 gets room for the status word from the
1186 * card. -KDU
1188 hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ :
1189 (((dev->mtu+26+7) & ~7) + 2 + 16));
1191 /* Initialize all Rx descriptors. */
1192 for (i = 0; i < RX_RING_SIZE; i++) {
1193 hmp->rx_ring[i].status_n_length = 0;
1194 hmp->rx_skbuff[i] = 0;
1196 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1197 for (i = 0; i < RX_RING_SIZE; i++) {
1198 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1199 hmp->rx_skbuff[i] = skb;
1200 if (skb == NULL)
1201 break;
1202 skb->dev = dev; /* Mark as being used by this device. */
1203 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1204 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1205 skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1206 /* -2 because it doesn't REALLY have that first 2 bytes -KDU */
1207 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1208 DescEndPacket | DescIntr | (hmp->rx_buf_sz -2));
1210 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1211 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1213 for (i = 0; i < TX_RING_SIZE; i++) {
1214 hmp->tx_skbuff[i] = 0;
1215 hmp->tx_ring[i].status_n_length = 0;
1217 /* Mark the last entry of the ring */
1218 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1220 return;
1224 #ifdef TX_CHECKSUM
1225 #define csum_add(it, val) \
1226 do { \
1227 it += (u16) (val); \
1228 if (it & 0xffff0000) { \
1229 it &= 0xffff; \
1230 ++it; \
1232 } while (0)
1233 /* printk("add %04x --> %04x\n", val, it); \ */
1235 /* uh->len already network format, do not swap */
1236 #define pseudo_csum_udp(sum,ih,uh) do { \
1237 sum = 0; \
1238 csum_add(sum, (ih)->saddr >> 16); \
1239 csum_add(sum, (ih)->saddr & 0xffff); \
1240 csum_add(sum, (ih)->daddr >> 16); \
1241 csum_add(sum, (ih)->daddr & 0xffff); \
1242 csum_add(sum, __constant_htons(IPPROTO_UDP)); \
1243 csum_add(sum, (uh)->len); \
1244 } while (0)
1246 /* swap len */
1247 #define pseudo_csum_tcp(sum,ih,len) do { \
1248 sum = 0; \
1249 csum_add(sum, (ih)->saddr >> 16); \
1250 csum_add(sum, (ih)->saddr & 0xffff); \
1251 csum_add(sum, (ih)->daddr >> 16); \
1252 csum_add(sum, (ih)->daddr & 0xffff); \
1253 csum_add(sum, __constant_htons(IPPROTO_TCP)); \
1254 csum_add(sum, htons(len)); \
1255 } while (0)
1256 #endif
1258 static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev)
1260 struct hamachi_private *hmp = dev->priv;
1261 unsigned entry;
1262 u16 status;
1264 /* Ok, now make sure that the queue has space before trying to
1265 add another skbuff. if we return non-zero the scheduler
1266 should interpret this as a queue full and requeue the buffer
1267 for later.
1269 if (hmp->tx_full) {
1270 /* We should NEVER reach this point -KDU */
1271 printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx);
1273 /* Wake the potentially-idle transmit channel. */
1274 /* If we don't need to read status, DON'T -KDU */
1275 status=readw(dev->base_addr + TxStatus);
1276 if( !(status & 0x0001) || (status & 0x0002))
1277 writew(0x0001, dev->base_addr + TxCmd);
1278 return 1;
1281 /* Caution: the write order is important here, set the field
1282 with the "ownership" bits last. */
1284 /* Calculate the next Tx descriptor entry. */
1285 entry = hmp->cur_tx % TX_RING_SIZE;
1287 hmp->tx_skbuff[entry] = skb;
1289 #ifdef TX_CHECKSUM
1291 /* tack on checksum tag */
1292 u32 tagval = 0;
1293 struct ethhdr *eh = (struct ethhdr *)skb->data;
1294 if (eh->h_proto == __constant_htons(ETH_P_IP)) {
1295 struct iphdr *ih = (struct iphdr *)((char *)eh + ETH_HLEN);
1296 if (ih->protocol == IPPROTO_UDP) {
1297 struct udphdr *uh
1298 = (struct udphdr *)((char *)ih + ih->ihl*4);
1299 u32 offset = ((unsigned char *)uh + 6) - skb->data;
1300 u32 pseudo;
1301 pseudo_csum_udp(pseudo, ih, uh);
1302 pseudo = htons(pseudo);
1303 printk("udp cksum was %04x, sending pseudo %04x\n",
1304 uh->check, pseudo);
1305 uh->check = 0; /* zero out uh->check before card calc */
1307 * start at 14 (skip ethhdr), store at offset (uh->check),
1308 * use pseudo value given.
1310 tagval = (14 << 24) | (offset << 16) | pseudo;
1311 } else if (ih->protocol == IPPROTO_TCP) {
1312 printk("tcp, no auto cksum\n");
1315 *(u32 *)skb_push(skb, 8) = tagval;
1317 #endif
1319 hmp->tx_ring[entry].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1320 skb->data, skb->len, PCI_DMA_TODEVICE));
1322 /* Hmmmm, could probably put a DescIntr on these, but the way
1323 the driver is currently coded makes Tx interrupts unnecessary
1324 since the clearing of the Tx ring is handled by the start_xmit
1325 routine. This organization helps mitigate the interrupts a
1326 bit and probably renders the max_tx_latency param useless.
1328 Update: Putting a DescIntr bit on all of the descriptors and
1329 mitigating interrupt frequency with the tx_min_pkt parameter. -KDU
1331 if (entry >= TX_RING_SIZE-1) /* Wrap ring */
1332 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1333 DescEndPacket | DescEndRing | DescIntr | skb->len);
1334 else
1335 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1336 DescEndPacket | DescIntr | skb->len);
1337 hmp->cur_tx++;
1339 /* Non-x86 Todo: explicitly flush cache lines here. */
1341 /* Wake the potentially-idle transmit channel. */
1342 /* If we don't need to read status, DON'T -KDU */
1343 status=readw(dev->base_addr + TxStatus);
1344 if( !(status & 0x0001) || (status & 0x0002))
1345 writew(0x0001, dev->base_addr + TxCmd);
1347 /* Immediately before returning, let's clear as many entries as we can. */
1348 hamachi_tx(dev);
1350 /* We should kick the bottom half here, since we are not accepting
1351 * interrupts with every packet. i.e. realize that Gigabit ethernet
1352 * can transmit faster than ordinary machines can load packets;
1353 * hence, any packet that got put off because we were in the transmit
1354 * routine should IMMEDIATELY get a chance to be re-queued. -KDU
1356 if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4))
1357 netif_wake_queue(dev); /* Typical path */
1358 else {
1359 hmp->tx_full = 1;
1360 netif_stop_queue(dev);
1362 dev->trans_start = jiffies;
1364 if (hamachi_debug > 4) {
1365 printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
1366 dev->name, hmp->cur_tx, entry);
1368 return 0;
1371 /* The interrupt handler does all of the Rx thread work and cleans up
1372 after the Tx thread. */
1373 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance, struct pt_regs *rgs)
1375 struct net_device *dev = dev_instance;
1376 struct hamachi_private *hmp;
1377 long ioaddr, boguscnt = max_interrupt_work;
1378 int handled = 0;
1380 #ifndef final_version /* Can never occur. */
1381 if (dev == NULL) {
1382 printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq);
1383 return IRQ_NONE;
1385 #endif
1387 ioaddr = dev->base_addr;
1388 hmp = dev->priv;
1389 spin_lock(&hmp->lock);
1391 do {
1392 u32 intr_status = readl(ioaddr + InterruptClear);
1394 if (hamachi_debug > 4)
1395 printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n",
1396 dev->name, intr_status);
1398 if (intr_status == 0)
1399 break;
1401 handled = 1;
1403 if (intr_status & IntrRxDone)
1404 hamachi_rx(dev);
1406 if (intr_status & IntrTxDone){
1407 /* This code should RARELY need to execute. After all, this is
1408 * a gigabit link, it should consume packets as fast as we put
1409 * them in AND we clear the Tx ring in hamachi_start_xmit().
1411 if (hmp->tx_full){
1412 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){
1413 int entry = hmp->dirty_tx % TX_RING_SIZE;
1414 struct sk_buff *skb;
1416 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1417 break;
1418 skb = hmp->tx_skbuff[entry];
1419 /* Free the original skb. */
1420 if (skb){
1421 pci_unmap_single(hmp->pci_dev,
1422 hmp->tx_ring[entry].addr,
1423 skb->len,
1424 PCI_DMA_TODEVICE);
1425 dev_kfree_skb_irq(skb);
1426 hmp->tx_skbuff[entry] = 0;
1428 hmp->tx_ring[entry].status_n_length = 0;
1429 if (entry >= TX_RING_SIZE-1)
1430 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1431 cpu_to_le32(DescEndRing);
1432 hmp->stats.tx_packets++;
1434 if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){
1435 /* The ring is no longer full */
1436 hmp->tx_full = 0;
1437 netif_wake_queue(dev);
1439 } else {
1440 netif_wake_queue(dev);
1445 /* Abnormal error summary/uncommon events handlers. */
1446 if (intr_status &
1447 (IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr |
1448 LinkChange | NegotiationChange | StatsMax))
1449 hamachi_error(dev, intr_status);
1451 if (--boguscnt < 0) {
1452 printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n",
1453 dev->name, intr_status);
1454 break;
1456 } while (1);
1458 if (hamachi_debug > 3)
1459 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1460 dev->name, readl(ioaddr + IntrStatus));
1462 #ifndef final_version
1463 /* Code that should never be run! Perhaps remove after testing.. */
1465 static int stopit = 10;
1466 if (dev->start == 0 && --stopit < 0) {
1467 printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n",
1468 dev->name);
1469 free_irq(irq, dev);
1472 #endif
1474 spin_unlock(&hmp->lock);
1475 return IRQ_RETVAL(handled);
1478 /* This routine is logically part of the interrupt handler, but separated
1479 for clarity and better register allocation. */
1480 static int hamachi_rx(struct net_device *dev)
1482 struct hamachi_private *hmp = dev->priv;
1483 int entry = hmp->cur_rx % RX_RING_SIZE;
1484 int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx;
1486 if (hamachi_debug > 4) {
1487 printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n",
1488 entry, hmp->rx_ring[entry].status_n_length);
1491 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1492 while (1) {
1493 struct hamachi_desc *desc = &(hmp->rx_ring[entry]);
1494 u32 desc_status = le32_to_cpu(desc->status_n_length);
1495 u16 data_size = desc_status; /* Implicit truncate */
1496 u8 *buf_addr;
1497 s32 frame_status;
1499 if (desc_status & DescOwn)
1500 break;
1501 pci_dma_sync_single(hmp->pci_dev, desc->addr, hmp->rx_buf_sz,
1502 PCI_DMA_FROMDEVICE);
1503 buf_addr = desc_to_virt(desc->addr);
1504 frame_status = le32_to_cpu(get_unaligned((s32*)&(buf_addr[data_size - 12])));
1505 if (hamachi_debug > 4)
1506 printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n",
1507 frame_status);
1508 if (--boguscnt < 0)
1509 break;
1510 if ( ! (desc_status & DescEndPacket)) {
1511 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1512 "multiple buffers, entry %#x length %d status %4.4x!\n",
1513 dev->name, hmp->cur_rx, data_size, desc_status);
1514 printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1515 dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]);
1516 printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n",
1517 dev->name,
1518 hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0xffff0000,
1519 hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0x0000ffff,
1520 hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length);
1521 hmp->stats.rx_length_errors++;
1522 } /* else Omit for prototype errata??? */
1523 if (frame_status & 0x00380000) {
1524 /* There was an error. */
1525 if (hamachi_debug > 2)
1526 printk(KERN_DEBUG " hamachi_rx() Rx error was %8.8x.\n",
1527 frame_status);
1528 hmp->stats.rx_errors++;
1529 if (frame_status & 0x00600000) hmp->stats.rx_length_errors++;
1530 if (frame_status & 0x00080000) hmp->stats.rx_frame_errors++;
1531 if (frame_status & 0x00100000) hmp->stats.rx_crc_errors++;
1532 if (frame_status < 0) hmp->stats.rx_dropped++;
1533 } else {
1534 struct sk_buff *skb;
1535 /* Omit CRC */
1536 u16 pkt_len = (frame_status & 0x07ff) - 4;
1537 #ifdef RX_CHECKSUM
1538 u32 pfck = *(u32 *) &buf_addr[data_size - 8];
1539 #endif
1542 #ifndef final_version
1543 if (hamachi_debug > 4)
1544 printk(KERN_DEBUG " hamachi_rx() normal Rx pkt length %d"
1545 " of %d, bogus_cnt %d.\n",
1546 pkt_len, data_size, boguscnt);
1547 if (hamachi_debug > 5)
1548 printk(KERN_DEBUG"%s: rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n",
1549 dev->name,
1550 *(s32*)&(buf_addr[data_size - 20]),
1551 *(s32*)&(buf_addr[data_size - 16]),
1552 *(s32*)&(buf_addr[data_size - 12]),
1553 *(s32*)&(buf_addr[data_size - 8]),
1554 *(s32*)&(buf_addr[data_size - 4]));
1555 #endif
1556 /* Check if the packet is long enough to accept without copying
1557 to a minimally-sized skbuff. */
1558 if (pkt_len < rx_copybreak
1559 && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1560 #ifdef RX_CHECKSUM
1561 printk(KERN_ERR "%s: rx_copybreak non-zero "
1562 "not good with RX_CHECKSUM\n", dev->name);
1563 #endif
1564 skb->dev = dev;
1565 skb_reserve(skb, 2); /* 16 byte align the IP header */
1566 /* Call copy + cksum if available. */
1567 #if 1 || USE_IP_COPYSUM
1568 eth_copy_and_sum(skb,
1569 hmp->rx_skbuff[entry]->data, pkt_len, 0);
1570 skb_put(skb, pkt_len);
1571 #else
1572 memcpy(skb_put(skb, pkt_len), hmp->rx_ring_dma
1573 + entry*sizeof(*desc), pkt_len);
1574 #endif
1575 } else {
1576 pci_unmap_single(hmp->pci_dev,
1577 hmp->rx_ring[entry].addr,
1578 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1579 skb_put(skb = hmp->rx_skbuff[entry], pkt_len);
1580 hmp->rx_skbuff[entry] = NULL;
1582 skb->protocol = eth_type_trans(skb, dev);
1585 #ifdef RX_CHECKSUM
1586 /* TCP or UDP on ipv4, DIX encoding */
1587 if (pfck>>24 == 0x91 || pfck>>24 == 0x51) {
1588 struct iphdr *ih = (struct iphdr *) skb->data;
1589 /* Check that IP packet is at least 46 bytes, otherwise,
1590 * there may be pad bytes included in the hardware checksum.
1591 * This wouldn't happen if everyone padded with 0.
1593 if (ntohs(ih->tot_len) >= 46){
1594 /* don't worry about frags */
1595 if (!(ih->frag_off & __constant_htons(IP_MF|IP_OFFSET))) {
1596 u32 inv = *(u32 *) &buf_addr[data_size - 16];
1597 u32 *p = (u32 *) &buf_addr[data_size - 20];
1598 register u32 crc, p_r, p_r1;
1600 if (inv & 4) {
1601 inv &= ~4;
1602 --p;
1604 p_r = *p;
1605 p_r1 = *(p-1);
1606 switch (inv) {
1607 case 0:
1608 crc = (p_r & 0xffff) + (p_r >> 16);
1609 break;
1610 case 1:
1611 crc = (p_r >> 16) + (p_r & 0xffff)
1612 + (p_r1 >> 16 & 0xff00);
1613 break;
1614 case 2:
1615 crc = p_r + (p_r1 >> 16);
1616 break;
1617 case 3:
1618 crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16);
1619 break;
1620 default: /*NOTREACHED*/ crc = 0;
1622 if (crc & 0xffff0000) {
1623 crc &= 0xffff;
1624 ++crc;
1626 /* tcp/udp will add in pseudo */
1627 skb->csum = ntohs(pfck & 0xffff);
1628 if (skb->csum > crc)
1629 skb->csum -= crc;
1630 else
1631 skb->csum += (~crc & 0xffff);
1633 * could do the pseudo myself and return
1634 * CHECKSUM_UNNECESSARY
1636 skb->ip_summed = CHECKSUM_HW;
1640 #endif /* RX_CHECKSUM */
1642 netif_rx(skb);
1643 dev->last_rx = jiffies;
1644 hmp->stats.rx_packets++;
1646 entry = (++hmp->cur_rx) % RX_RING_SIZE;
1649 /* Refill the Rx ring buffers. */
1650 for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) {
1651 struct hamachi_desc *desc;
1653 entry = hmp->dirty_rx % RX_RING_SIZE;
1654 desc = &(hmp->rx_ring[entry]);
1655 if (hmp->rx_skbuff[entry] == NULL) {
1656 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1658 hmp->rx_skbuff[entry] = skb;
1659 if (skb == NULL)
1660 break; /* Better luck next round. */
1661 skb->dev = dev; /* Mark as being used by this device. */
1662 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1663 desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1664 skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1666 desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz);
1667 if (entry >= RX_RING_SIZE-1)
1668 desc->status_n_length |= cpu_to_le32(DescOwn |
1669 DescEndPacket | DescEndRing | DescIntr);
1670 else
1671 desc->status_n_length |= cpu_to_le32(DescOwn |
1672 DescEndPacket | DescIntr);
1675 /* Restart Rx engine if stopped. */
1676 /* If we don't need to check status, don't. -KDU */
1677 if (readw(dev->base_addr + RxStatus) & 0x0002)
1678 writew(0x0001, dev->base_addr + RxCmd);
1680 return 0;
1683 /* This is more properly named "uncommon interrupt events", as it covers more
1684 than just errors. */
1685 static void hamachi_error(struct net_device *dev, int intr_status)
1687 long ioaddr = dev->base_addr;
1688 struct hamachi_private *hmp = dev->priv;
1690 if (intr_status & (LinkChange|NegotiationChange)) {
1691 if (hamachi_debug > 1)
1692 printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl"
1693 " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n",
1694 dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2),
1695 readw(ioaddr + ANLinkPartnerAbility),
1696 readl(ioaddr + IntrStatus));
1697 if (readw(ioaddr + ANStatus) & 0x20)
1698 writeb(0x01, ioaddr + LEDCtrl);
1699 else
1700 writeb(0x03, ioaddr + LEDCtrl);
1702 if (intr_status & StatsMax) {
1703 hamachi_get_stats(dev);
1704 /* Read the overflow bits to clear. */
1705 readl(ioaddr + 0x370);
1706 readl(ioaddr + 0x3F0);
1708 if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone))
1709 && hamachi_debug)
1710 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1711 dev->name, intr_status);
1712 /* Hmmmmm, it's not clear how to recover from PCI faults. */
1713 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1714 hmp->stats.tx_fifo_errors++;
1715 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1716 hmp->stats.rx_fifo_errors++;
1719 static int hamachi_close(struct net_device *dev)
1721 long ioaddr = dev->base_addr;
1722 struct hamachi_private *hmp = dev->priv;
1723 struct sk_buff *skb;
1724 int i;
1726 netif_stop_queue(dev);
1728 if (hamachi_debug > 1) {
1729 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n",
1730 dev->name, readw(ioaddr + TxStatus),
1731 readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
1732 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1733 dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx);
1736 /* Disable interrupts by clearing the interrupt mask. */
1737 writel(0x0000, ioaddr + InterruptEnable);
1739 /* Stop the chip's Tx and Rx processes. */
1740 writel(2, ioaddr + RxCmd);
1741 writew(2, ioaddr + TxCmd);
1743 #ifdef __i386__
1744 if (hamachi_debug > 2) {
1745 printk("\n"KERN_DEBUG" Tx ring at %8.8x:\n",
1746 (int)hmp->tx_ring_dma);
1747 for (i = 0; i < TX_RING_SIZE; i++)
1748 printk(" %c #%d desc. %8.8x %8.8x.\n",
1749 readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
1750 i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr);
1751 printk("\n"KERN_DEBUG " Rx ring %8.8x:\n",
1752 (int)hmp->rx_ring_dma);
1753 for (i = 0; i < RX_RING_SIZE; i++) {
1754 printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n",
1755 readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
1756 i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr);
1757 if (hamachi_debug > 6) {
1758 if (*(u8*)hmp->rx_skbuff[i]->tail != 0x69) {
1759 u16 *addr = (u16 *)
1760 hmp->rx_skbuff[i]->tail;
1761 int j;
1763 for (j = 0; j < 0x50; j++)
1764 printk(" %4.4x", addr[j]);
1765 printk("\n");
1770 #endif /* __i386__ debugging only */
1772 free_irq(dev->irq, dev);
1774 del_timer_sync(&hmp->timer);
1776 /* Free all the skbuffs in the Rx queue. */
1777 for (i = 0; i < RX_RING_SIZE; i++) {
1778 skb = hmp->rx_skbuff[i];
1779 hmp->rx_ring[i].status_n_length = 0;
1780 hmp->rx_ring[i].addr = 0xBADF00D0; /* An invalid address. */
1781 if (skb) {
1782 pci_unmap_single(hmp->pci_dev,
1783 hmp->rx_ring[i].addr, hmp->rx_buf_sz,
1784 PCI_DMA_FROMDEVICE);
1785 dev_kfree_skb(skb);
1786 hmp->rx_skbuff[i] = 0;
1789 for (i = 0; i < TX_RING_SIZE; i++) {
1790 skb = hmp->tx_skbuff[i];
1791 if (skb) {
1792 pci_unmap_single(hmp->pci_dev,
1793 hmp->tx_ring[i].addr, skb->len,
1794 PCI_DMA_TODEVICE);
1795 dev_kfree_skb(skb);
1796 hmp->tx_skbuff[i] = 0;
1800 writeb(0x00, ioaddr + LEDCtrl);
1802 return 0;
1805 static struct net_device_stats *hamachi_get_stats(struct net_device *dev)
1807 long ioaddr = dev->base_addr;
1808 struct hamachi_private *hmp = dev->priv;
1810 /* We should lock this segment of code for SMP eventually, although
1811 the vulnerability window is very small and statistics are
1812 non-critical. */
1813 /* Ok, what goes here? This appears to be stuck at 21 packets
1814 according to ifconfig. It does get incremented in hamachi_tx(),
1815 so I think I'll comment it out here and see if better things
1816 happen.
1818 /* hmp->stats.tx_packets = readl(ioaddr + 0x000); */
1820 hmp->stats.rx_bytes = readl(ioaddr + 0x330); /* Total Uni+Brd+Multi */
1821 hmp->stats.tx_bytes = readl(ioaddr + 0x3B0); /* Total Uni+Brd+Multi */
1822 hmp->stats.multicast = readl(ioaddr + 0x320); /* Multicast Rx */
1824 hmp->stats.rx_length_errors = readl(ioaddr + 0x368); /* Over+Undersized */
1825 hmp->stats.rx_over_errors = readl(ioaddr + 0x35C); /* Jabber */
1826 hmp->stats.rx_crc_errors = readl(ioaddr + 0x360); /* Jabber */
1827 hmp->stats.rx_frame_errors = readl(ioaddr + 0x364); /* Symbol Errs */
1828 hmp->stats.rx_missed_errors = readl(ioaddr + 0x36C); /* Dropped */
1830 return &hmp->stats;
1833 static void set_rx_mode(struct net_device *dev)
1835 long ioaddr = dev->base_addr;
1837 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1838 /* Unconditionally log net taps. */
1839 printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", dev->name);
1840 writew(0x000F, ioaddr + AddrMode);
1841 } else if ((dev->mc_count > 63) || (dev->flags & IFF_ALLMULTI)) {
1842 /* Too many to match, or accept all multicasts. */
1843 writew(0x000B, ioaddr + AddrMode);
1844 } else if (dev->mc_count > 0) { /* Must use the CAM filter. */
1845 struct dev_mc_list *mclist;
1846 int i;
1847 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1848 i++, mclist = mclist->next) {
1849 writel(*(u32*)(mclist->dmi_addr), ioaddr + 0x100 + i*8);
1850 writel(0x20000 | (*(u16*)&mclist->dmi_addr[4]),
1851 ioaddr + 0x104 + i*8);
1853 /* Clear remaining entries. */
1854 for (; i < 64; i++)
1855 writel(0, ioaddr + 0x104 + i*8);
1856 writew(0x0003, ioaddr + AddrMode);
1857 } else { /* Normal, unicast/broadcast-only mode. */
1858 writew(0x0001, ioaddr + AddrMode);
1862 static int netdev_ethtool_ioctl(struct net_device *dev, void *useraddr)
1864 struct hamachi_private *np = dev->priv;
1865 u32 ethcmd;
1867 if (copy_from_user(&ethcmd, useraddr, sizeof(ethcmd)))
1868 return -EFAULT;
1870 switch (ethcmd) {
1871 case ETHTOOL_GDRVINFO: {
1872 struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
1873 strcpy(info.driver, DRV_NAME);
1874 strcpy(info.version, DRV_VERSION);
1875 strcpy(info.bus_info, np->pci_dev->slot_name);
1876 if (copy_to_user(useraddr, &info, sizeof(info)))
1877 return -EFAULT;
1878 return 0;
1881 /* get settings */
1882 case ETHTOOL_GSET: {
1883 struct ethtool_cmd ecmd = { ETHTOOL_GSET };
1884 if (!(chip_tbl[np->chip_id].flags & CanHaveMII))
1885 return -EINVAL;
1886 spin_lock_irq(&np->lock);
1887 mii_ethtool_gset(&np->mii_if, &ecmd);
1888 spin_unlock_irq(&np->lock);
1889 if (copy_to_user(useraddr, &ecmd, sizeof(ecmd)))
1890 return -EFAULT;
1891 return 0;
1893 /* set settings */
1894 case ETHTOOL_SSET: {
1895 int r;
1896 struct ethtool_cmd ecmd;
1897 if (!(chip_tbl[np->chip_id].flags & CanHaveMII))
1898 return -EINVAL;
1899 if (copy_from_user(&ecmd, useraddr, sizeof(ecmd)))
1900 return -EFAULT;
1901 spin_lock_irq(&np->lock);
1902 r = mii_ethtool_sset(&np->mii_if, &ecmd);
1903 spin_unlock_irq(&np->lock);
1904 return r;
1906 /* restart autonegotiation */
1907 case ETHTOOL_NWAY_RST: {
1908 if (!(chip_tbl[np->chip_id].flags & CanHaveMII))
1909 return -EINVAL;
1910 return mii_nway_restart(&np->mii_if);
1912 /* get link status */
1913 case ETHTOOL_GLINK: {
1914 struct ethtool_value edata = {ETHTOOL_GLINK};
1915 if (!(chip_tbl[np->chip_id].flags & CanHaveMII))
1916 return -EINVAL;
1917 edata.data = mii_link_ok(&np->mii_if);
1918 if (copy_to_user(useraddr, &edata, sizeof(edata)))
1919 return -EFAULT;
1920 return 0;
1924 return -EOPNOTSUPP;
1927 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1929 struct hamachi_private *np = dev->priv;
1930 struct mii_ioctl_data *data = (struct mii_ioctl_data *) & rq->ifr_data;
1931 int rc;
1933 if (!netif_running(dev))
1934 return -EINVAL;
1936 if (cmd == SIOCETHTOOL)
1937 rc = netdev_ethtool_ioctl(dev, (void *) rq->ifr_data);
1939 else if (cmd == (SIOCDEVPRIVATE+3)) { /* set rx,tx intr params */
1940 u32 *d = (u32 *)&rq->ifr_data;
1941 /* Should add this check here or an ordinary user can do nasty
1942 * things. -KDU
1944 * TODO: Shut down the Rx and Tx engines while doing this.
1946 if (!capable(CAP_NET_ADMIN))
1947 return -EPERM;
1948 writel(d[0], dev->base_addr + TxIntrCtrl);
1949 writel(d[1], dev->base_addr + RxIntrCtrl);
1950 printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name,
1951 (u32) readl(dev->base_addr + TxIntrCtrl),
1952 (u32) readl(dev->base_addr + RxIntrCtrl));
1953 rc = 0;
1956 else {
1957 spin_lock_irq(&np->lock);
1958 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1959 spin_unlock_irq(&np->lock);
1962 return rc;
1966 static void __devexit hamachi_remove_one (struct pci_dev *pdev)
1968 struct net_device *dev = pci_get_drvdata(pdev);
1970 if (dev) {
1971 struct hamachi_private *hmp = dev->priv;
1973 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
1974 hmp->rx_ring_dma);
1975 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
1976 hmp->tx_ring_dma);
1977 unregister_netdev(dev);
1978 iounmap((char *)dev->base_addr);
1979 kfree(dev);
1980 pci_release_regions(pdev);
1981 pci_set_drvdata(pdev, NULL);
1985 static struct pci_device_id hamachi_pci_tbl[] __initdata = {
1986 { 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
1987 { 0, }
1989 MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl);
1991 static struct pci_driver hamachi_driver = {
1992 .name = DRV_NAME,
1993 .id_table = hamachi_pci_tbl,
1994 .probe = hamachi_init_one,
1995 .remove = __devexit_p(hamachi_remove_one),
1998 static int __init hamachi_init (void)
2000 /* when a module, this is printed whether or not devices are found in probe */
2001 #ifdef MODULE
2002 printk(version);
2003 #endif
2004 if (pci_register_driver(&hamachi_driver) > 0)
2005 return 0;
2006 pci_unregister_driver(&hamachi_driver);
2007 return -ENODEV;
2010 static void __exit hamachi_exit (void)
2012 pci_unregister_driver(&hamachi_driver);
2016 module_init(hamachi_init);
2017 module_exit(hamachi_exit);