1 /* D-Link DL2000-based Gigabit Ethernet Adapter Linux driver */
3 Copyright (c) 2001, 2002 by D-Link Corporation
4 Written by Edward Peng.<edward_peng@dlink.com.tw>
5 Created 03-May-2001, base on Linux' sundance.c.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
14 ==========================================================================
15 0.01 2001/05/03 Created DL2000-based linux driver
16 0.02 2001/05/21 Added VLAN and hardware checksum support.
17 1.00 2001/06/26 Added jumbo frame support.
18 1.01 2001/08/21 Added two parameters, rx_coalesce and rx_timeout.
19 1.02 2001/10/08 Supported fiber media.
20 Added flow control parameters.
21 1.03 2001/10/12 Changed the default media to 1000mbps_fd for
23 1.04 2001/11/08 Fixed Tx stopped when tx very busy.
24 1.05 2001/11/22 Fixed Tx stopped when unidirectional tx busy.
25 1.06 2001/12/13 Fixed disconnect bug at 10Mbps mode.
26 Fixed tx_full flag incorrect.
27 Added tx_coalesce paramter.
28 1.07 2002/01/03 Fixed miscount of RX frame error.
29 1.08 2002/01/17 Fixed the multicast bug.
30 1.09 2002/03/07 Move rx-poll-now to re-fill loop.
31 Added rio_timer() to watch rx buffers.
32 1.10 2002/04/16 Fixed miscount of carrier error.
33 1.11 2002/05/23 Added ISR schedule scheme
34 Fixed miscount of rx frame error for DGE-550SX.
36 1.12 2002/06/13 Lock tx_coalesce=1 on 10/100Mbps mode.
37 1.13 2002/08/13 1. Fix disconnection (many tx:carrier/rx:frame
38 errs) with some mainboards.
39 2. Use definition "DRV_NAME" "DRV_VERSION"
40 "DRV_RELDATE" for flexibility.
41 1.14 2002/08/14 Support ethtool.
42 1.15 2002/08/27 Changed the default media to Auto-Negotiation
43 for the fiber devices.
44 1.16 2002/09/04 More power down time for fiber devices auto-
46 Fix disconnect bug after ifup and ifdown.
47 1.17 2002/10/03 Fix RMON statistics overflow.
48 Always use I/O mapping to access eeprom,
49 avoid system freezing with some chipsets.
52 #define DRV_NAME "D-Link DL2000-based linux driver"
53 #define DRV_VERSION "v1.17a"
54 #define DRV_RELDATE "2002/10/04"
57 static char version
[] __devinitdata
=
58 KERN_INFO DRV_NAME
" " DRV_VERSION
" " DRV_RELDATE
"\n";
60 static int mtu
[MAX_UNITS
];
61 static int vlan
[MAX_UNITS
];
62 static int jumbo
[MAX_UNITS
];
63 static char *media
[MAX_UNITS
];
64 static int tx_flow
=-1;
65 static int rx_flow
=-1;
66 static int copy_thresh
;
67 static int rx_coalesce
=10; /* Rx frame count each interrupt */
68 static int rx_timeout
=200; /* Rx DMA wait time in 640ns increments */
69 static int tx_coalesce
=16; /* HW xmit count each TxDMAComplete */
72 MODULE_AUTHOR ("Edward Peng");
73 MODULE_DESCRIPTION ("D-Link DL2000-based Gigabit Ethernet Adapter");
74 MODULE_LICENSE("GPL");
75 MODULE_PARM (mtu
, "1-" __MODULE_STRING (MAX_UNITS
) "i");
76 MODULE_PARM (media
, "1-" __MODULE_STRING (MAX_UNITS
) "s");
77 MODULE_PARM (vlan
, "1-" __MODULE_STRING (MAX_UNITS
) "i");
78 MODULE_PARM (jumbo
, "1-" __MODULE_STRING (MAX_UNITS
) "i");
79 MODULE_PARM (tx_flow
, "i");
80 MODULE_PARM (rx_flow
, "i");
81 MODULE_PARM (copy_thresh
, "i");
82 MODULE_PARM (rx_coalesce
, "i"); /* Rx frame count each interrupt */
83 MODULE_PARM (rx_timeout
, "i"); /* Rx DMA wait time in 64ns increments */
84 MODULE_PARM (tx_coalesce
, "i"); /* HW xmit count each TxDMAComplete */
87 /* Enable the default interrupts */
88 #define DEFAULT_INTR (RxDMAComplete | HostError | IntRequested | TxDMAComplete| \
89 UpdateStats | LinkEvent)
91 writew(DEFAULT_INTR, ioaddr + IntEnable)
93 static int max_intrloop
= 50;
94 static int multicast_filter_limit
= 0x40;
96 static int rio_open (struct net_device
*dev
);
97 static void rio_timer (unsigned long data
);
98 static void rio_tx_timeout (struct net_device
*dev
);
99 static void alloc_list (struct net_device
*dev
);
100 static int start_xmit (struct sk_buff
*skb
, struct net_device
*dev
);
101 static irqreturn_t
rio_interrupt (int irq
, void *dev_instance
, struct pt_regs
*regs
);
102 static void rio_free_tx (struct net_device
*dev
, int irq
);
103 static void tx_error (struct net_device
*dev
, int tx_status
);
104 static int receive_packet (struct net_device
*dev
);
105 static void rio_error (struct net_device
*dev
, int int_status
);
106 static int change_mtu (struct net_device
*dev
, int new_mtu
);
107 static void set_multicast (struct net_device
*dev
);
108 static struct net_device_stats
*get_stats (struct net_device
*dev
);
109 static int clear_stats (struct net_device
*dev
);
110 static int rio_ethtool_ioctl (struct net_device
*dev
, void *useraddr
);
111 static int rio_ioctl (struct net_device
*dev
, struct ifreq
*rq
, int cmd
);
112 static int rio_close (struct net_device
*dev
);
113 static int find_miiphy (struct net_device
*dev
);
114 static int parse_eeprom (struct net_device
*dev
);
115 static int read_eeprom (long ioaddr
, int eep_addr
);
116 static int mii_wait_link (struct net_device
*dev
, int wait
);
117 static int mii_set_media (struct net_device
*dev
);
118 static int mii_get_media (struct net_device
*dev
);
119 static int mii_set_media_pcs (struct net_device
*dev
);
120 static int mii_get_media_pcs (struct net_device
*dev
);
121 static int mii_read (struct net_device
*dev
, int phy_addr
, int reg_num
);
122 static int mii_write (struct net_device
*dev
, int phy_addr
, int reg_num
,
126 rio_probe1 (struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
128 struct net_device
*dev
;
129 struct netdev_private
*np
;
131 int chip_idx
= ent
->driver_data
;
134 static int version_printed
;
138 if (!version_printed
++)
139 printk ("%s", version
);
141 err
= pci_enable_device (pdev
);
146 err
= pci_request_regions (pdev
, "dl2k");
148 goto err_out_disable
;
150 pci_set_master (pdev
);
151 dev
= alloc_etherdev (sizeof (*np
));
156 SET_MODULE_OWNER (dev
);
157 SET_NETDEV_DEV(dev
, &pdev
->dev
);
160 ioaddr
= pci_resource_start (pdev
, 1);
161 ioaddr
= (long) ioremap (ioaddr
, RIO_IO_SIZE
);
167 ioaddr
= pci_resource_start (pdev
, 0);
169 dev
->base_addr
= ioaddr
;
172 np
->chip_id
= chip_idx
;
174 spin_lock_init (&np
->tx_lock
);
175 spin_lock_init (&np
->rx_lock
);
177 /* Parse manual configuration */
180 if (card_idx
< MAX_UNITS
) {
181 if (media
[card_idx
] != NULL
) {
183 if (strcmp (media
[card_idx
], "auto") == 0 ||
184 strcmp (media
[card_idx
], "autosense") == 0 ||
185 strcmp (media
[card_idx
], "0") == 0 ) {
187 } else if (strcmp (media
[card_idx
], "100mbps_fd") == 0 ||
188 strcmp (media
[card_idx
], "4") == 0) {
191 } else if (strcmp (media
[card_idx
], "100mbps_hd") == 0
192 || strcmp (media
[card_idx
], "3") == 0) {
195 } else if (strcmp (media
[card_idx
], "10mbps_fd") == 0 ||
196 strcmp (media
[card_idx
], "2") == 0) {
199 } else if (strcmp (media
[card_idx
], "10mbps_hd") == 0 ||
200 strcmp (media
[card_idx
], "1") == 0) {
203 } else if (strcmp (media
[card_idx
], "1000mbps_fd") == 0 ||
204 strcmp (media
[card_idx
], "6") == 0) {
207 } else if (strcmp (media
[card_idx
], "1000mbps_hd") == 0 ||
208 strcmp (media
[card_idx
], "5") == 0) {
215 if (jumbo
[card_idx
] != 0) {
217 dev
->mtu
= MAX_JUMBO
;
220 if (mtu
[card_idx
] > 0 && mtu
[card_idx
] < PACKET_SIZE
)
221 dev
->mtu
= mtu
[card_idx
];
223 np
->vlan
= (vlan
[card_idx
] > 0 && vlan
[card_idx
] < 4096) ?
225 if (rx_coalesce
> 0 && rx_timeout
> 0) {
226 np
->rx_coalesce
= rx_coalesce
;
227 np
->rx_timeout
= rx_timeout
;
230 np
->tx_flow
= (tx_flow
== 0) ? 0 : 1;
231 np
->rx_flow
= (rx_flow
== 0) ? 0 : 1;
235 else if (tx_coalesce
> TX_RING_SIZE
-1)
236 tx_coalesce
= TX_RING_SIZE
- 1;
238 dev
->open
= &rio_open
;
239 dev
->hard_start_xmit
= &start_xmit
;
240 dev
->stop
= &rio_close
;
241 dev
->get_stats
= &get_stats
;
242 dev
->set_multicast_list
= &set_multicast
;
243 dev
->do_ioctl
= &rio_ioctl
;
244 dev
->tx_timeout
= &rio_tx_timeout
;
245 dev
->watchdog_timeo
= TX_TIMEOUT
;
246 dev
->change_mtu
= &change_mtu
;
248 dev
->features
= NETIF_F_IP_CSUM
;
250 pci_set_drvdata (pdev
, dev
);
252 ring_space
= pci_alloc_consistent (pdev
, TX_TOTAL_SIZE
, &ring_dma
);
254 goto err_out_iounmap
;
255 np
->tx_ring
= (struct netdev_desc
*) ring_space
;
256 np
->tx_ring_dma
= ring_dma
;
258 ring_space
= pci_alloc_consistent (pdev
, RX_TOTAL_SIZE
, &ring_dma
);
260 goto err_out_unmap_tx
;
261 np
->rx_ring
= (struct netdev_desc
*) ring_space
;
262 np
->rx_ring_dma
= ring_dma
;
264 /* Parse eeprom data */
267 /* Find PHY address */
268 err
= find_miiphy (dev
);
270 goto err_out_unmap_rx
;
273 np
->phy_media
= (readw(ioaddr
+ ASICCtrl
) & PhyMedia
) ? 1 : 0;
275 /* Set media and reset PHY */
277 /* default Auto-Negotiation for fiber deivices */
278 if (np
->an_enable
== 2) {
281 mii_set_media_pcs (dev
);
283 /* Auto-Negotiation is mandatory for 1000BASE-T,
284 IEEE 802.3ab Annex 28D page 14 */
285 if (np
->speed
== 1000)
289 pci_read_config_byte(pdev
, PCI_REVISION_ID
, &np
->pci_rev_id
);
291 err
= register_netdev (dev
);
293 goto err_out_unmap_rx
;
297 printk (KERN_INFO
"%s: %s, %02x:%02x:%02x:%02x:%02x:%02x, IRQ %d\n",
299 dev
->dev_addr
[0], dev
->dev_addr
[1], dev
->dev_addr
[2],
300 dev
->dev_addr
[3], dev
->dev_addr
[4], dev
->dev_addr
[5], irq
);
302 printk(KERN_INFO
"tx_coalesce:\t%d packets\n",
305 printk(KERN_INFO
"rx_coalesce:\t%d packets\n"
306 KERN_INFO
"rx_timeout: \t%d ns\n",
307 np
->rx_coalesce
, np
->rx_timeout
*640);
309 printk(KERN_INFO
"vlan(id):\t%d\n", np
->vlan
);
313 pci_free_consistent (pdev
, RX_TOTAL_SIZE
, np
->rx_ring
, np
->rx_ring_dma
);
315 pci_free_consistent (pdev
, TX_TOTAL_SIZE
, np
->tx_ring
, np
->tx_ring_dma
);
318 iounmap ((void *) ioaddr
);
325 pci_release_regions (pdev
);
328 pci_disable_device (pdev
);
333 find_miiphy (struct net_device
*dev
)
335 int i
, phy_found
= 0;
336 struct netdev_private
*np
;
339 ioaddr
= dev
->base_addr
;
342 for (i
= 31; i
>= 0; i
--) {
343 int mii_status
= mii_read (dev
, i
, 1);
344 if (mii_status
!= 0xffff && mii_status
!= 0x0000) {
350 printk (KERN_ERR
"%s: No MII PHY found!\n", dev
->name
);
357 parse_eeprom (struct net_device
*dev
)
360 long ioaddr
= dev
->base_addr
;
364 PSROM_t psrom
= (PSROM_t
) sromdata
;
365 struct netdev_private
*np
= dev
->priv
;
370 ioaddr
= pci_resource_start (np
->pdev
, 0);
373 for (i
= 0; i
< 128; i
++) {
374 ((u16
*) sromdata
)[i
] = le16_to_cpu (read_eeprom (ioaddr
, i
));
377 ioaddr
= dev
->base_addr
;
380 crc
= ~ether_crc_le (256 - 4, sromdata
);
381 if (psrom
->crc
!= crc
) {
382 printk (KERN_ERR
"%s: EEPROM data CRC error.\n", dev
->name
);
386 /* Set MAC address */
387 for (i
= 0; i
< 6; i
++)
388 dev
->dev_addr
[i
] = psrom
->mac_addr
[i
];
390 /* Parse Software Infomation Block */
392 psib
= (u8
*) sromdata
;
396 if ((cid
== 0 && next
== 0) || (cid
== 0xff && next
== 0xff)) {
397 printk (KERN_ERR
"Cell data error\n");
401 case 0: /* Format version */
403 case 1: /* End of cell */
405 case 2: /* Duplex Polarity */
406 np
->duplex_polarity
= psib
[i
];
407 writeb (readb (ioaddr
+ PhyCtrl
) | psib
[i
],
410 case 3: /* Wake Polarity */
411 np
->wake_polarity
= psib
[i
];
413 case 9: /* Adapter description */
414 j
= (next
- i
> 255) ? 255 : next
- i
;
415 memcpy (np
->name
, &(psib
[i
]), j
);
421 case 8: /* Reversed */
423 default: /* Unknown cell */
433 rio_open (struct net_device
*dev
)
435 struct netdev_private
*np
= dev
->priv
;
436 long ioaddr
= dev
->base_addr
;
440 i
= request_irq (dev
->irq
, &rio_interrupt
, SA_SHIRQ
, dev
->name
, dev
);
444 /* Reset all logic functions */
445 writew (GlobalReset
| DMAReset
| FIFOReset
| NetworkReset
| HostReset
,
446 ioaddr
+ ASICCtrl
+ 2);
449 /* DebugCtrl bit 4, 5, 9 must set */
450 writel (readl (ioaddr
+ DebugCtrl
) | 0x0230, ioaddr
+ DebugCtrl
);
454 writew (MAX_JUMBO
+14, ioaddr
+ MaxFrameSize
);
458 /* Get station address */
459 for (i
= 0; i
< 6; i
++)
460 writeb (dev
->dev_addr
[i
], ioaddr
+ StationAddr0
+ i
);
464 writel (np
->rx_coalesce
| np
->rx_timeout
<< 16,
465 ioaddr
+ RxDMAIntCtrl
);
467 /* Set RIO to poll every N*320nsec. */
468 writeb (0x20, ioaddr
+ RxDMAPollPeriod
);
469 writeb (0xff, ioaddr
+ TxDMAPollPeriod
);
470 writeb (0x30, ioaddr
+ RxDMABurstThresh
);
471 writeb (0x30, ioaddr
+ RxDMAUrgentThresh
);
472 writel (0x0007ffff, ioaddr
+ RmonStatMask
);
473 /* clear statistics */
478 /* priority field in RxDMAIntCtrl */
479 writel (readl(ioaddr
+ RxDMAIntCtrl
) | 0x7 << 10,
480 ioaddr
+ RxDMAIntCtrl
);
482 writew (np
->vlan
, ioaddr
+ VLANId
);
483 /* Length/Type should be 0x8100 */
484 writel (0x8100 << 16 | np
->vlan
, ioaddr
+ VLANTag
);
485 /* Enable AutoVLANuntagging, but disable AutoVLANtagging.
486 VLAN information tagged by TFC' VID, CFI fields. */
487 writel (readl (ioaddr
+ MACCtrl
) | AutoVLANuntagging
,
491 init_timer (&np
->timer
);
492 np
->timer
.expires
= jiffies
+ 1*HZ
;
493 np
->timer
.data
= (unsigned long) dev
;
494 np
->timer
.function
= &rio_timer
;
495 add_timer (&np
->timer
);
498 writel (readl (ioaddr
+ MACCtrl
) | StatsEnable
| RxEnable
| TxEnable
,
502 macctrl
|= (np
->vlan
) ? AutoVLANuntagging
: 0;
503 macctrl
|= (np
->full_duplex
) ? DuplexSelect
: 0;
504 macctrl
|= (np
->tx_flow
) ? TxFlowControlEnable
: 0;
505 macctrl
|= (np
->rx_flow
) ? RxFlowControlEnable
: 0;
506 writew(macctrl
, ioaddr
+ MACCtrl
);
508 netif_start_queue (dev
);
510 /* Enable default interrupts */
516 rio_timer (unsigned long data
)
518 struct net_device
*dev
= (struct net_device
*)data
;
519 struct netdev_private
*np
= dev
->priv
;
521 int next_tick
= 1*HZ
;
524 spin_lock_irqsave(&np
->rx_lock
, flags
);
525 /* Recover rx ring exhausted error */
526 if (np
->cur_rx
- np
->old_rx
>= RX_RING_SIZE
) {
527 printk(KERN_INFO
"Try to recover rx ring exhausted...\n");
528 /* Re-allocate skbuffs to fill the descriptor ring */
529 for (; np
->cur_rx
- np
->old_rx
> 0; np
->old_rx
++) {
531 entry
= np
->old_rx
% RX_RING_SIZE
;
532 /* Dropped packets don't need to re-allocate */
533 if (np
->rx_skbuff
[entry
] == NULL
) {
534 skb
= dev_alloc_skb (np
->rx_buf_sz
);
536 np
->rx_ring
[entry
].fraginfo
= 0;
538 "%s: Still unable to re-allocate Rx skbuff.#%d\n",
542 np
->rx_skbuff
[entry
] = skb
;
544 /* 16 byte align the IP header */
545 skb_reserve (skb
, 2);
546 np
->rx_ring
[entry
].fraginfo
=
547 cpu_to_le64 (pci_map_single
548 (np
->pdev
, skb
->tail
, np
->rx_buf_sz
,
549 PCI_DMA_FROMDEVICE
));
551 np
->rx_ring
[entry
].fraginfo
|=
552 cpu_to_le64 (np
->rx_buf_sz
) << 48;
553 np
->rx_ring
[entry
].status
= 0;
556 spin_unlock_irqrestore (&np
->rx_lock
, flags
);
557 np
->timer
.expires
= jiffies
+ next_tick
;
558 add_timer(&np
->timer
);
562 rio_tx_timeout (struct net_device
*dev
)
564 long ioaddr
= dev
->base_addr
;
566 printk (KERN_INFO
"%s: Tx timed out (%4.4x), is buffer full?\n",
567 dev
->name
, readl (ioaddr
+ TxStatus
));
570 dev
->trans_start
= jiffies
;
573 /* allocate and initialize Tx and Rx descriptors */
575 alloc_list (struct net_device
*dev
)
577 struct netdev_private
*np
= dev
->priv
;
580 np
->cur_rx
= np
->cur_tx
= 0;
581 np
->old_rx
= np
->old_tx
= 0;
582 np
->rx_buf_sz
= (dev
->mtu
<= 1500 ? PACKET_SIZE
: dev
->mtu
+ 32);
584 /* Initialize Tx descriptors, TFDListPtr leaves in start_xmit(). */
585 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
586 np
->tx_skbuff
[i
] = 0;
587 np
->tx_ring
[i
].status
= cpu_to_le64 (TFDDone
);
588 np
->tx_ring
[i
].next_desc
= cpu_to_le64 (np
->tx_ring_dma
+
589 ((i
+1)%TX_RING_SIZE
) *
590 sizeof (struct netdev_desc
));
593 /* Initialize Rx descriptors */
594 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
595 np
->rx_ring
[i
].next_desc
= cpu_to_le64 (np
->rx_ring_dma
+
596 ((i
+ 1) % RX_RING_SIZE
) *
597 sizeof (struct netdev_desc
));
598 np
->rx_ring
[i
].status
= 0;
599 np
->rx_ring
[i
].fraginfo
= 0;
600 np
->rx_skbuff
[i
] = 0;
603 /* Allocate the rx buffers */
604 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
605 /* Allocated fixed size of skbuff */
606 struct sk_buff
*skb
= dev_alloc_skb (np
->rx_buf_sz
);
607 np
->rx_skbuff
[i
] = skb
;
610 "%s: alloc_list: allocate Rx buffer error! ",
614 skb
->dev
= dev
; /* Mark as being used by this device. */
615 skb_reserve (skb
, 2); /* 16 byte align the IP header. */
616 /* Rubicon now supports 40 bits of addressing space. */
617 np
->rx_ring
[i
].fraginfo
=
618 cpu_to_le64 ( pci_map_single (
619 np
->pdev
, skb
->tail
, np
->rx_buf_sz
,
620 PCI_DMA_FROMDEVICE
));
621 np
->rx_ring
[i
].fraginfo
|= cpu_to_le64 (np
->rx_buf_sz
) << 48;
625 writel (cpu_to_le32 (np
->rx_ring_dma
), dev
->base_addr
+ RFDListPtr0
);
626 writel (0, dev
->base_addr
+ RFDListPtr1
);
632 start_xmit (struct sk_buff
*skb
, struct net_device
*dev
)
634 struct netdev_private
*np
= dev
->priv
;
635 struct netdev_desc
*txdesc
;
638 u64 tfc_vlan_tag
= 0;
640 if (np
->link_status
== 0) { /* Link Down */
644 ioaddr
= dev
->base_addr
;
645 entry
= np
->cur_tx
% TX_RING_SIZE
;
646 np
->tx_skbuff
[entry
] = skb
;
647 txdesc
= &np
->tx_ring
[entry
];
650 if (skb
->ip_summed
== CHECKSUM_HW
) {
652 cpu_to_le64 (TCPChecksumEnable
| UDPChecksumEnable
|
658 cpu_to_le64 (VLANTagInsert
) |
659 (cpu_to_le64 (np
->vlan
) << 32) |
660 (cpu_to_le64 (skb
->priority
) << 45);
662 txdesc
->fraginfo
= cpu_to_le64 (pci_map_single (np
->pdev
, skb
->data
,
665 txdesc
->fraginfo
|= cpu_to_le64 (skb
->len
) << 48;
667 /* DL2K bug: DMA fails to get next descriptor ptr in 10Mbps mode
668 * Work around: Always use 1 descriptor in 10Mbps mode */
669 if (entry
% np
->tx_coalesce
== 0 || np
->speed
== 10)
670 txdesc
->status
= cpu_to_le64 (entry
| tfc_vlan_tag
|
673 (1 << FragCountShift
));
675 txdesc
->status
= cpu_to_le64 (entry
| tfc_vlan_tag
|
677 (1 << FragCountShift
));
680 writel (readl (ioaddr
+ DMACtrl
) | 0x00001000, ioaddr
+ DMACtrl
);
682 writel(10000, ioaddr
+ CountDown
);
683 np
->cur_tx
= (np
->cur_tx
+ 1) % TX_RING_SIZE
;
684 if ((np
->cur_tx
- np
->old_tx
+ TX_RING_SIZE
) % TX_RING_SIZE
685 < TX_QUEUE_LEN
- 1 && np
->speed
!= 10) {
687 } else if (!netif_queue_stopped(dev
)) {
688 netif_stop_queue (dev
);
691 /* The first TFDListPtr */
692 if (readl (dev
->base_addr
+ TFDListPtr0
) == 0) {
693 writel (np
->tx_ring_dma
+ entry
* sizeof (struct netdev_desc
),
694 dev
->base_addr
+ TFDListPtr0
);
695 writel (0, dev
->base_addr
+ TFDListPtr1
);
698 /* NETDEV WATCHDOG timer */
699 dev
->trans_start
= jiffies
;
704 rio_interrupt (int irq
, void *dev_instance
, struct pt_regs
*rgs
)
706 struct net_device
*dev
= dev_instance
;
707 struct netdev_private
*np
;
710 int cnt
= max_intrloop
;
713 ioaddr
= dev
->base_addr
;
716 int_status
= readw (ioaddr
+ IntStatus
);
717 writew (int_status
, ioaddr
+ IntStatus
);
718 int_status
&= DEFAULT_INTR
;
719 if (int_status
== 0 || --cnt
< 0)
722 /* Processing received packets */
723 if (int_status
& RxDMAComplete
)
724 receive_packet (dev
);
725 /* TxDMAComplete interrupt */
726 if ((int_status
& (TxDMAComplete
|IntRequested
))) {
728 tx_status
= readl (ioaddr
+ TxStatus
);
729 if (tx_status
& 0x01)
730 tx_error (dev
, tx_status
);
731 /* Free used tx skbuffs */
732 rio_free_tx (dev
, 1);
735 /* Handle uncommon events */
737 (HostError
| LinkEvent
| UpdateStats
))
738 rio_error (dev
, int_status
);
740 if (np
->cur_tx
!= np
->old_tx
)
741 writel (100, ioaddr
+ CountDown
);
742 return IRQ_RETVAL(handled
);
746 rio_free_tx (struct net_device
*dev
, int irq
)
748 struct netdev_private
*np
= (struct netdev_private
*) dev
->priv
;
749 int entry
= np
->old_tx
% TX_RING_SIZE
;
751 unsigned long flag
= 0;
754 spin_lock(&np
->tx_lock
);
756 spin_lock_irqsave(&np
->tx_lock
, flag
);
758 /* Free used tx skbuffs */
759 while (entry
!= np
->cur_tx
) {
762 if (!(np
->tx_ring
[entry
].status
& TFDDone
))
764 skb
= np
->tx_skbuff
[entry
];
765 pci_unmap_single (np
->pdev
,
766 np
->tx_ring
[entry
].fraginfo
,
767 skb
->len
, PCI_DMA_TODEVICE
);
769 dev_kfree_skb_irq (skb
);
773 np
->tx_skbuff
[entry
] = 0;
774 entry
= (entry
+ 1) % TX_RING_SIZE
;
778 spin_unlock(&np
->tx_lock
);
780 spin_unlock_irqrestore(&np
->tx_lock
, flag
);
783 /* If the ring is no longer full, clear tx_full and
784 call netif_wake_queue() */
786 if (netif_queue_stopped(dev
) &&
787 ((np
->cur_tx
- np
->old_tx
+ TX_RING_SIZE
) % TX_RING_SIZE
788 < TX_QUEUE_LEN
- 1 || np
->speed
== 10)) {
789 netif_wake_queue (dev
);
794 tx_error (struct net_device
*dev
, int tx_status
)
796 struct netdev_private
*np
;
797 long ioaddr
= dev
->base_addr
;
803 frame_id
= (tx_status
& 0xffff0000);
804 printk (KERN_ERR
"%s: Transmit error, TxStatus %4.4x, FrameId %d.\n",
805 dev
->name
, tx_status
, frame_id
);
806 np
->stats
.tx_errors
++;
807 /* Ttransmit Underrun */
808 if (tx_status
& 0x10) {
809 np
->stats
.tx_fifo_errors
++;
810 writew (readw (ioaddr
+ TxStartThresh
) + 0x10,
811 ioaddr
+ TxStartThresh
);
812 /* Transmit Underrun need to set TxReset, DMARest, FIFOReset */
813 writew (TxReset
| DMAReset
| FIFOReset
| NetworkReset
,
814 ioaddr
+ ASICCtrl
+ 2);
815 /* Wait for ResetBusy bit clear */
816 for (i
= 50; i
> 0; i
--) {
817 if ((readw (ioaddr
+ ASICCtrl
+ 2) & ResetBusy
) == 0)
821 rio_free_tx (dev
, 1);
822 /* Reset TFDListPtr */
823 writel (np
->tx_ring_dma
+
824 np
->old_tx
* sizeof (struct netdev_desc
),
825 dev
->base_addr
+ TFDListPtr0
);
826 writel (0, dev
->base_addr
+ TFDListPtr1
);
828 /* Let TxStartThresh stay default value */
831 if (tx_status
& 0x04) {
832 np
->stats
.tx_fifo_errors
++;
833 /* TxReset and clear FIFO */
834 writew (TxReset
| FIFOReset
, ioaddr
+ ASICCtrl
+ 2);
835 /* Wait reset done */
836 for (i
= 50; i
> 0; i
--) {
837 if ((readw (ioaddr
+ ASICCtrl
+ 2) & ResetBusy
) == 0)
841 /* Let TxStartThresh stay default value */
843 /* Maximum Collisions */
845 if (tx_status
& 0x08)
846 np
->stats
.collisions16
++;
848 if (tx_status
& 0x08)
849 np
->stats
.collisions
++;
852 writel (readw (dev
->base_addr
+ MACCtrl
) | TxEnable
, ioaddr
+ MACCtrl
);
856 receive_packet (struct net_device
*dev
)
858 struct netdev_private
*np
= (struct netdev_private
*) dev
->priv
;
859 int entry
= np
->cur_rx
% RX_RING_SIZE
;
862 /* If RFDDone, FrameStart and FrameEnd set, there is a new packet in. */
864 struct netdev_desc
*desc
= &np
->rx_ring
[entry
];
868 if (!(desc
->status
& RFDDone
) ||
869 !(desc
->status
& FrameStart
) || !(desc
->status
& FrameEnd
))
872 /* Chip omits the CRC. */
873 pkt_len
= le64_to_cpu (desc
->status
& 0xffff);
874 frame_status
= le64_to_cpu (desc
->status
);
877 pci_dma_sync_single (np
->pdev
, desc
->fraginfo
, np
->rx_buf_sz
,
879 /* Update rx error statistics, drop packet. */
880 if (frame_status
& RFS_Errors
) {
881 np
->stats
.rx_errors
++;
882 if (frame_status
& (RxRuntFrame
| RxLengthError
))
883 np
->stats
.rx_length_errors
++;
884 if (frame_status
& RxFCSError
)
885 np
->stats
.rx_crc_errors
++;
886 if (frame_status
& RxAlignmentError
&& np
->speed
!= 1000)
887 np
->stats
.rx_frame_errors
++;
888 if (frame_status
& RxFIFOOverrun
)
889 np
->stats
.rx_fifo_errors
++;
893 /* Small skbuffs for short packets */
894 if (pkt_len
> copy_thresh
) {
895 pci_unmap_single (np
->pdev
, desc
->fraginfo
,
898 skb_put (skb
= np
->rx_skbuff
[entry
], pkt_len
);
899 np
->rx_skbuff
[entry
] = NULL
;
900 } else if ((skb
= dev_alloc_skb (pkt_len
+ 2)) != NULL
) {
902 /* 16 byte align the IP header */
903 skb_reserve (skb
, 2);
904 eth_copy_and_sum (skb
,
905 np
->rx_skbuff
[entry
]->tail
,
907 skb_put (skb
, pkt_len
);
909 skb
->protocol
= eth_type_trans (skb
, dev
);
911 /* Checksum done by hw, but csum value unavailable. */
912 if (np
->pci_rev_id
>= 0x0c &&
913 !(frame_status
& (TCPError
| UDPError
| IPError
))) {
914 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
918 dev
->last_rx
= jiffies
;
920 entry
= (entry
+ 1) % RX_RING_SIZE
;
922 spin_lock(&np
->rx_lock
);
924 /* Re-allocate skbuffs to fill the descriptor ring */
926 while (entry
!= np
->cur_rx
) {
928 /* Dropped packets don't need to re-allocate */
929 if (np
->rx_skbuff
[entry
] == NULL
) {
930 skb
= dev_alloc_skb (np
->rx_buf_sz
);
932 np
->rx_ring
[entry
].fraginfo
= 0;
934 "%s: receive_packet: "
935 "Unable to re-allocate Rx skbuff.#%d\n",
939 np
->rx_skbuff
[entry
] = skb
;
941 /* 16 byte align the IP header */
942 skb_reserve (skb
, 2);
943 np
->rx_ring
[entry
].fraginfo
=
944 cpu_to_le64 (pci_map_single
945 (np
->pdev
, skb
->tail
, np
->rx_buf_sz
,
946 PCI_DMA_FROMDEVICE
));
948 np
->rx_ring
[entry
].fraginfo
|=
949 cpu_to_le64 (np
->rx_buf_sz
) << 48;
950 np
->rx_ring
[entry
].status
= 0;
951 entry
= (entry
+ 1) % RX_RING_SIZE
;
954 spin_unlock(&np
->rx_lock
);
959 rio_error (struct net_device
*dev
, int int_status
)
961 long ioaddr
= dev
->base_addr
;
962 struct netdev_private
*np
= dev
->priv
;
965 /* Link change event */
966 if (int_status
& LinkEvent
) {
967 if (mii_wait_link (dev
, 10) == 0) {
968 printk (KERN_INFO
"%s: Link up\n", dev
->name
);
970 mii_get_media_pcs (dev
);
973 if (np
->speed
== 1000)
974 np
->tx_coalesce
= tx_coalesce
;
978 macctrl
|= (np
->vlan
) ? AutoVLANuntagging
: 0;
979 macctrl
|= (np
->full_duplex
) ? DuplexSelect
: 0;
980 macctrl
|= (np
->tx_flow
) ?
981 TxFlowControlEnable
: 0;
982 macctrl
|= (np
->rx_flow
) ?
983 RxFlowControlEnable
: 0;
984 writew(macctrl
, ioaddr
+ MACCtrl
);
986 netif_carrier_on(dev
);
988 printk (KERN_INFO
"%s: Link off\n", dev
->name
);
990 netif_carrier_off(dev
);
994 /* UpdateStats statistics registers */
995 if (int_status
& UpdateStats
) {
999 /* PCI Error, a catastronphic error related to the bus interface
1000 occurs, set GlobalReset and HostReset to reset. */
1001 if (int_status
& HostError
) {
1002 printk (KERN_ERR
"%s: HostError! IntStatus %4.4x.\n",
1003 dev
->name
, int_status
);
1004 writew (GlobalReset
| HostReset
, ioaddr
+ ASICCtrl
+ 2);
1009 static struct net_device_stats
*
1010 get_stats (struct net_device
*dev
)
1012 long ioaddr
= dev
->base_addr
;
1013 struct netdev_private
*np
= dev
->priv
;
1017 unsigned int stat_reg
;
1019 /* All statistics registers need to be acknowledged,
1020 else statistic overflow could cause problems */
1022 np
->stats
.rx_packets
+= readl (ioaddr
+ FramesRcvOk
);
1023 np
->stats
.tx_packets
+= readl (ioaddr
+ FramesXmtOk
);
1024 np
->stats
.rx_bytes
+= readl (ioaddr
+ OctetRcvOk
);
1025 np
->stats
.tx_bytes
+= readl (ioaddr
+ OctetXmtOk
);
1027 np
->stats
.multicast
= readl (ioaddr
+ McstFramesRcvdOk
);
1028 np
->stats
.collisions
+= readl (ioaddr
+ SingleColFrames
)
1029 + readl (ioaddr
+ MultiColFrames
);
1031 /* detailed tx errors */
1032 stat_reg
= readw (ioaddr
+ FramesAbortXSColls
);
1033 np
->stats
.tx_aborted_errors
+= stat_reg
;
1034 np
->stats
.tx_errors
+= stat_reg
;
1036 stat_reg
= readw (ioaddr
+ CarrierSenseErrors
);
1037 np
->stats
.tx_carrier_errors
+= stat_reg
;
1038 np
->stats
.tx_errors
+= stat_reg
;
1040 /* Clear all other statistic register. */
1041 readl (ioaddr
+ McstOctetXmtOk
);
1042 readw (ioaddr
+ BcstFramesXmtdOk
);
1043 readl (ioaddr
+ McstFramesXmtdOk
);
1044 readw (ioaddr
+ BcstFramesRcvdOk
);
1045 readw (ioaddr
+ MacControlFramesRcvd
);
1046 readw (ioaddr
+ FrameTooLongErrors
);
1047 readw (ioaddr
+ InRangeLengthErrors
);
1048 readw (ioaddr
+ FramesCheckSeqErrors
);
1049 readw (ioaddr
+ FramesLostRxErrors
);
1050 readl (ioaddr
+ McstOctetXmtOk
);
1051 readl (ioaddr
+ BcstOctetXmtOk
);
1052 readl (ioaddr
+ McstFramesXmtdOk
);
1053 readl (ioaddr
+ FramesWDeferredXmt
);
1054 readl (ioaddr
+ LateCollisions
);
1055 readw (ioaddr
+ BcstFramesXmtdOk
);
1056 readw (ioaddr
+ MacControlFramesXmtd
);
1057 readw (ioaddr
+ FramesWEXDeferal
);
1060 for (i
= 0x100; i
<= 0x150; i
+= 4)
1063 readw (ioaddr
+ TxJumboFrames
);
1064 readw (ioaddr
+ RxJumboFrames
);
1065 readw (ioaddr
+ TCPCheckSumErrors
);
1066 readw (ioaddr
+ UDPCheckSumErrors
);
1067 readw (ioaddr
+ IPCheckSumErrors
);
1072 clear_stats (struct net_device
*dev
)
1074 long ioaddr
= dev
->base_addr
;
1079 /* All statistics registers need to be acknowledged,
1080 else statistic overflow could cause problems */
1081 readl (ioaddr
+ FramesRcvOk
);
1082 readl (ioaddr
+ FramesXmtOk
);
1083 readl (ioaddr
+ OctetRcvOk
);
1084 readl (ioaddr
+ OctetXmtOk
);
1086 readl (ioaddr
+ McstFramesRcvdOk
);
1087 readl (ioaddr
+ SingleColFrames
);
1088 readl (ioaddr
+ MultiColFrames
);
1089 readl (ioaddr
+ LateCollisions
);
1090 /* detailed rx errors */
1091 readw (ioaddr
+ FrameTooLongErrors
);
1092 readw (ioaddr
+ InRangeLengthErrors
);
1093 readw (ioaddr
+ FramesCheckSeqErrors
);
1094 readw (ioaddr
+ FramesLostRxErrors
);
1096 /* detailed tx errors */
1097 readw (ioaddr
+ FramesAbortXSColls
);
1098 readw (ioaddr
+ CarrierSenseErrors
);
1100 /* Clear all other statistic register. */
1101 readl (ioaddr
+ McstOctetXmtOk
);
1102 readw (ioaddr
+ BcstFramesXmtdOk
);
1103 readl (ioaddr
+ McstFramesXmtdOk
);
1104 readw (ioaddr
+ BcstFramesRcvdOk
);
1105 readw (ioaddr
+ MacControlFramesRcvd
);
1106 readl (ioaddr
+ McstOctetXmtOk
);
1107 readl (ioaddr
+ BcstOctetXmtOk
);
1108 readl (ioaddr
+ McstFramesXmtdOk
);
1109 readl (ioaddr
+ FramesWDeferredXmt
);
1110 readw (ioaddr
+ BcstFramesXmtdOk
);
1111 readw (ioaddr
+ MacControlFramesXmtd
);
1112 readw (ioaddr
+ FramesWEXDeferal
);
1114 for (i
= 0x100; i
<= 0x150; i
+= 4)
1117 readw (ioaddr
+ TxJumboFrames
);
1118 readw (ioaddr
+ RxJumboFrames
);
1119 readw (ioaddr
+ TCPCheckSumErrors
);
1120 readw (ioaddr
+ UDPCheckSumErrors
);
1121 readw (ioaddr
+ IPCheckSumErrors
);
1127 change_mtu (struct net_device
*dev
, int new_mtu
)
1129 struct netdev_private
*np
= dev
->priv
;
1130 int max
= (np
->jumbo
) ? MAX_JUMBO
: 1536;
1132 if ((new_mtu
< 68) || (new_mtu
> max
)) {
1142 set_multicast (struct net_device
*dev
)
1144 long ioaddr
= dev
->base_addr
;
1147 struct netdev_private
*np
= dev
->priv
;
1149 hash_table
[0] = hash_table
[1] = 0;
1150 /* RxFlowcontrol DA: 01-80-C2-00-00-01. Hash index=0x39 */
1151 hash_table
[1] |= cpu_to_le32(0x02000000);
1152 if (dev
->flags
& IFF_PROMISC
) {
1153 /* Receive all frames promiscuously. */
1154 rx_mode
= ReceiveAllFrames
;
1155 } else if ((dev
->flags
& IFF_ALLMULTI
) ||
1156 (dev
->mc_count
> multicast_filter_limit
)) {
1157 /* Receive broadcast and multicast frames */
1158 rx_mode
= ReceiveBroadcast
| ReceiveMulticast
| ReceiveUnicast
;
1159 } else if (dev
->mc_count
> 0) {
1161 struct dev_mc_list
*mclist
;
1162 /* Receive broadcast frames and multicast frames filtering
1165 ReceiveBroadcast
| ReceiveMulticastHash
| ReceiveUnicast
;
1166 for (i
=0, mclist
= dev
->mc_list
; mclist
&& i
< dev
->mc_count
;
1167 i
++, mclist
=mclist
->next
)
1170 int crc
= ether_crc_le (ETH_ALEN
, mclist
->dmi_addr
);
1171 /* The inverted high significant 6 bits of CRC are
1172 used as an index to hashtable */
1173 for (bit
= 0; bit
< 6; bit
++)
1174 if (crc
& (1 << (31 - bit
)))
1175 index
|= (1 << bit
);
1176 hash_table
[index
/ 32] |= (1 << (index
% 32));
1179 rx_mode
= ReceiveBroadcast
| ReceiveUnicast
;
1182 /* ReceiveVLANMatch field in ReceiveMode */
1183 rx_mode
|= ReceiveVLANMatch
;
1186 writel (hash_table
[0], ioaddr
+ HashTable0
);
1187 writel (hash_table
[1], ioaddr
+ HashTable1
);
1188 writew (rx_mode
, ioaddr
+ ReceiveMode
);
1192 rio_ethtool_ioctl (struct net_device
*dev
, void *useraddr
)
1194 struct netdev_private
*np
= dev
->priv
;
1197 if (copy_from_user (ðcmd
, useraddr
, sizeof (ethcmd
)))
1200 case ETHTOOL_GDRVINFO
: {
1201 struct ethtool_drvinfo info
= { ETHTOOL_GDRVINFO
};
1202 strcpy(info
.driver
, "DL2K");
1203 strcpy(info
.version
, DRV_VERSION
);
1204 strcpy(info
.bus_info
, np
->pdev
->slot_name
);
1205 memset(&info
.fw_version
, 0, sizeof(info
.fw_version
));
1206 if (copy_to_user(useraddr
, &info
, sizeof(info
)))
1211 case ETHTOOL_GSET
: {
1212 struct ethtool_cmd cmd
= { ETHTOOL_GSET
};
1213 if (np
->phy_media
) {
1215 cmd
.supported
= SUPPORTED_Autoneg
|
1217 cmd
.advertising
= ADVERTISED_Autoneg
|
1219 cmd
.port
= PORT_FIBRE
;
1220 cmd
.transceiver
= XCVR_INTERNAL
;
1223 cmd
.supported
= SUPPORTED_10baseT_Half
|
1224 SUPPORTED_10baseT_Full
| SUPPORTED_100baseT_Half
1225 | SUPPORTED_100baseT_Full
| SUPPORTED_1000baseT_Full
|
1226 SUPPORTED_Autoneg
| SUPPORTED_MII
;
1227 cmd
.advertising
= ADVERTISED_10baseT_Half
|
1228 ADVERTISED_10baseT_Full
| ADVERTISED_100baseT_Half
|
1229 ADVERTISED_100baseT_Full
| ADVERTISED_1000baseT_Full
|
1230 ADVERTISED_Autoneg
| ADVERTISED_MII
;
1231 cmd
.port
= PORT_MII
;
1232 cmd
.transceiver
= XCVR_INTERNAL
;
1234 if ( np
->link_status
) {
1235 cmd
.speed
= np
->speed
;
1236 cmd
.duplex
= np
->full_duplex
?
1237 DUPLEX_FULL
: DUPLEX_HALF
;
1243 cmd
.autoneg
= AUTONEG_ENABLE
;
1245 cmd
.autoneg
= AUTONEG_DISABLE
;
1247 cmd
.phy_address
= np
->phy_addr
;
1249 if (copy_to_user(useraddr
, &cmd
,
1254 case ETHTOOL_SSET
: {
1255 struct ethtool_cmd cmd
;
1256 if (copy_from_user(&cmd
, useraddr
, sizeof(cmd
)))
1258 netif_carrier_off(dev
);
1259 if (cmd
.autoneg
== AUTONEG_ENABLE
) {
1269 if (np
->speed
== 1000){
1270 cmd
.speed
= SPEED_100
;
1271 cmd
.duplex
= DUPLEX_FULL
;
1272 printk("Warning!! Can't disable Auto negotiation in 1000Mbps, change to Manul 100Mbps, Full duplex.\n");
1274 switch(cmd
.speed
+ cmd
.duplex
){
1276 case SPEED_10
+ DUPLEX_HALF
:
1278 np
->full_duplex
= 0;
1281 case SPEED_10
+ DUPLEX_FULL
:
1283 np
->full_duplex
= 1;
1285 case SPEED_100
+ DUPLEX_HALF
:
1287 np
->full_duplex
= 0;
1289 case SPEED_100
+ DUPLEX_FULL
:
1291 np
->full_duplex
= 1;
1293 case SPEED_1000
+ DUPLEX_HALF
:/* not supported */
1294 case SPEED_1000
+ DUPLEX_FULL
:/* not supported */
1302 #ifdef ETHTOOL_GLINK
1303 case ETHTOOL_GLINK
:{
1304 struct ethtool_value link
= { ETHTOOL_GLINK
};
1305 link
.data
= np
->link_status
;
1306 if (copy_to_user(useraddr
, &link
, sizeof(link
)))
1318 rio_ioctl (struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
1321 struct netdev_private
*np
= dev
->priv
;
1322 struct mii_data
*miidata
= (struct mii_data
*) &rq
->ifr_data
;
1324 struct netdev_desc
*desc
;
1327 phy_addr
= np
->phy_addr
;
1330 return rio_ethtool_ioctl (dev
, (void *) rq
->ifr_data
);
1331 case SIOCDEVPRIVATE
:
1334 case SIOCDEVPRIVATE
+ 1:
1335 miidata
->out_value
= mii_read (dev
, phy_addr
, miidata
->reg_num
);
1337 case SIOCDEVPRIVATE
+ 2:
1338 mii_write (dev
, phy_addr
, miidata
->reg_num
, miidata
->in_value
);
1340 case SIOCDEVPRIVATE
+ 3:
1342 case SIOCDEVPRIVATE
+ 4:
1344 case SIOCDEVPRIVATE
+ 5:
1345 netif_stop_queue (dev
);
1347 case SIOCDEVPRIVATE
+ 6:
1348 netif_wake_queue (dev
);
1350 case SIOCDEVPRIVATE
+ 7:
1352 ("tx_full=%x cur_tx=%lx old_tx=%lx cur_rx=%lx old_rx=%lx\n",
1353 netif_queue_stopped(dev
), np
->cur_tx
, np
->old_tx
, np
->cur_rx
,
1356 case SIOCDEVPRIVATE
+ 8:
1357 printk("TX ring:\n");
1358 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
1359 desc
= &np
->tx_ring
[i
];
1361 ("%02x:cur:%08x next:%08x status:%08x frag1:%08x frag0:%08x",
1363 (u32
) (np
->tx_ring_dma
+ i
* sizeof (*desc
)),
1364 (u32
) desc
->next_desc
,
1365 (u32
) desc
->status
, (u32
) (desc
->fraginfo
>> 32),
1366 (u32
) desc
->fraginfo
);
1378 #define EEP_READ 0x0200
1379 #define EEP_BUSY 0x8000
1380 /* Read the EEPROM word */
1381 /* We use I/O instruction to read/write eeprom to avoid fail on some machines */
1383 read_eeprom (long ioaddr
, int eep_addr
)
1386 outw (EEP_READ
| (eep_addr
& 0xff), ioaddr
+ EepromCtrl
);
1388 if (!(inw (ioaddr
+ EepromCtrl
) & EEP_BUSY
)) {
1389 return inw (ioaddr
+ EepromData
);
1395 enum phy_ctrl_bits
{
1396 MII_READ
= 0x00, MII_CLK
= 0x01, MII_DATA1
= 0x02, MII_WRITE
= 0x04,
1400 #define mii_delay() readb(ioaddr)
1402 mii_sendbit (struct net_device
*dev
, u32 data
)
1404 long ioaddr
= dev
->base_addr
+ PhyCtrl
;
1405 data
= (data
) ? MII_DATA1
: 0;
1407 data
|= (readb (ioaddr
) & 0xf8) | MII_WRITE
;
1408 writeb (data
, ioaddr
);
1410 writeb (data
| MII_CLK
, ioaddr
);
1415 mii_getbit (struct net_device
*dev
)
1417 long ioaddr
= dev
->base_addr
+ PhyCtrl
;
1420 data
= (readb (ioaddr
) & 0xf8) | MII_READ
;
1421 writeb (data
, ioaddr
);
1423 writeb (data
| MII_CLK
, ioaddr
);
1425 return ((readb (ioaddr
) >> 1) & 1);
1429 mii_send_bits (struct net_device
*dev
, u32 data
, int len
)
1432 for (i
= len
- 1; i
>= 0; i
--) {
1433 mii_sendbit (dev
, data
& (1 << i
));
1438 mii_read (struct net_device
*dev
, int phy_addr
, int reg_num
)
1445 mii_send_bits (dev
, 0xffffffff, 32);
1446 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */
1447 /* ST,OP = 0110'b for read operation */
1448 cmd
= (0x06 << 10 | phy_addr
<< 5 | reg_num
);
1449 mii_send_bits (dev
, cmd
, 14);
1451 if (mii_getbit (dev
))
1454 for (i
= 0; i
< 16; i
++) {
1455 retval
|= mii_getbit (dev
);
1460 return (retval
>> 1) & 0xffff;
1466 mii_write (struct net_device
*dev
, int phy_addr
, int reg_num
, u16 data
)
1471 mii_send_bits (dev
, 0xffffffff, 32);
1472 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */
1473 /* ST,OP,AAAAA,RRRRR,TA = 0101xxxxxxxxxx10'b = 0x5002 for write */
1474 cmd
= (0x5002 << 16) | (phy_addr
<< 23) | (reg_num
<< 18) | data
;
1475 mii_send_bits (dev
, cmd
, 32);
1481 mii_wait_link (struct net_device
*dev
, int wait
)
1485 struct netdev_private
*np
;
1488 phy_addr
= np
->phy_addr
;
1491 bmsr
.image
= mii_read (dev
, phy_addr
, MII_BMSR
);
1492 if (bmsr
.bits
.link_status
)
1495 } while (--wait
> 0);
1499 mii_get_media (struct net_device
*dev
)
1507 struct netdev_private
*np
;
1510 phy_addr
= np
->phy_addr
;
1512 bmsr
.image
= mii_read (dev
, phy_addr
, MII_BMSR
);
1513 if (np
->an_enable
) {
1514 if (!bmsr
.bits
.an_complete
) {
1515 /* Auto-Negotiation not completed */
1518 negotiate
.image
= mii_read (dev
, phy_addr
, MII_ANAR
) &
1519 mii_read (dev
, phy_addr
, MII_ANLPAR
);
1520 mscr
.image
= mii_read (dev
, phy_addr
, MII_MSCR
);
1521 mssr
.image
= mii_read (dev
, phy_addr
, MII_MSSR
);
1522 if (mscr
.bits
.media_1000BT_FD
& mssr
.bits
.lp_1000BT_FD
) {
1524 np
->full_duplex
= 1;
1525 printk (KERN_INFO
"Auto 1000 Mbps, Full duplex\n");
1526 } else if (mscr
.bits
.media_1000BT_HD
& mssr
.bits
.lp_1000BT_HD
) {
1528 np
->full_duplex
= 0;
1529 printk (KERN_INFO
"Auto 1000 Mbps, Half duplex\n");
1530 } else if (negotiate
.bits
.media_100BX_FD
) {
1532 np
->full_duplex
= 1;
1533 printk (KERN_INFO
"Auto 100 Mbps, Full duplex\n");
1534 } else if (negotiate
.bits
.media_100BX_HD
) {
1536 np
->full_duplex
= 0;
1537 printk (KERN_INFO
"Auto 100 Mbps, Half duplex\n");
1538 } else if (negotiate
.bits
.media_10BT_FD
) {
1540 np
->full_duplex
= 1;
1541 printk (KERN_INFO
"Auto 10 Mbps, Full duplex\n");
1542 } else if (negotiate
.bits
.media_10BT_HD
) {
1544 np
->full_duplex
= 0;
1545 printk (KERN_INFO
"Auto 10 Mbps, Half duplex\n");
1547 if (negotiate
.bits
.pause
) {
1550 } else if (negotiate
.bits
.asymmetric
) {
1554 /* else tx_flow, rx_flow = user select */
1556 bmcr
.image
= mii_read (dev
, phy_addr
, MII_BMCR
);
1557 if (bmcr
.bits
.speed100
== 1 && bmcr
.bits
.speed1000
== 0) {
1558 printk (KERN_INFO
"Operating at 100 Mbps, ");
1559 } else if (bmcr
.bits
.speed100
== 0 && bmcr
.bits
.speed1000
== 0) {
1560 printk (KERN_INFO
"Operating at 10 Mbps, ");
1561 } else if (bmcr
.bits
.speed100
== 0 && bmcr
.bits
.speed1000
== 1) {
1562 printk (KERN_INFO
"Operating at 1000 Mbps, ");
1564 if (bmcr
.bits
.duplex_mode
) {
1565 printk ("Full duplex\n");
1567 printk ("Half duplex\n");
1571 printk(KERN_INFO
"Enable Tx Flow Control\n");
1573 printk(KERN_INFO
"Disable Tx Flow Control\n");
1575 printk(KERN_INFO
"Enable Rx Flow Control\n");
1577 printk(KERN_INFO
"Disable Rx Flow Control\n");
1583 mii_set_media (struct net_device
*dev
)
1590 struct netdev_private
*np
;
1592 phy_addr
= np
->phy_addr
;
1594 /* Does user set speed? */
1595 if (np
->an_enable
) {
1596 /* Advertise capabilities */
1597 bmsr
.image
= mii_read (dev
, phy_addr
, MII_BMSR
);
1598 anar
.image
= mii_read (dev
, phy_addr
, MII_ANAR
);
1599 anar
.bits
.media_100BX_FD
= bmsr
.bits
.media_100BX_FD
;
1600 anar
.bits
.media_100BX_HD
= bmsr
.bits
.media_100BX_HD
;
1601 anar
.bits
.media_100BT4
= bmsr
.bits
.media_100BT4
;
1602 anar
.bits
.media_10BT_FD
= bmsr
.bits
.media_10BT_FD
;
1603 anar
.bits
.media_10BT_HD
= bmsr
.bits
.media_10BT_HD
;
1604 anar
.bits
.pause
= 1;
1605 anar
.bits
.asymmetric
= 1;
1606 mii_write (dev
, phy_addr
, MII_ANAR
, anar
.image
);
1608 /* Enable Auto crossover */
1609 pscr
.image
= mii_read (dev
, phy_addr
, MII_PHY_SCR
);
1610 pscr
.bits
.mdi_crossover_mode
= 3; /* 11'b */
1611 mii_write (dev
, phy_addr
, MII_PHY_SCR
, pscr
.image
);
1613 /* Soft reset PHY */
1614 mii_write (dev
, phy_addr
, MII_BMCR
, MII_BMCR_RESET
);
1616 bmcr
.bits
.an_enable
= 1;
1617 bmcr
.bits
.restart_an
= 1;
1618 bmcr
.bits
.reset
= 1;
1619 mii_write (dev
, phy_addr
, MII_BMCR
, bmcr
.image
);
1622 /* Force speed setting */
1623 /* 1) Disable Auto crossover */
1624 pscr
.image
= mii_read (dev
, phy_addr
, MII_PHY_SCR
);
1625 pscr
.bits
.mdi_crossover_mode
= 0;
1626 mii_write (dev
, phy_addr
, MII_PHY_SCR
, pscr
.image
);
1629 bmcr
.image
= mii_read (dev
, phy_addr
, MII_BMCR
);
1630 bmcr
.bits
.reset
= 1;
1631 mii_write (dev
, phy_addr
, MII_BMCR
, bmcr
.image
);
1634 bmcr
.image
= 0x1940; /* must be 0x1940 */
1635 mii_write (dev
, phy_addr
, MII_BMCR
, bmcr
.image
);
1636 mdelay (100); /* wait a certain time */
1638 /* 4) Advertise nothing */
1639 mii_write (dev
, phy_addr
, MII_ANAR
, 0);
1641 /* 5) Set media and Power Up */
1643 bmcr
.bits
.power_down
= 1;
1644 if (np
->speed
== 100) {
1645 bmcr
.bits
.speed100
= 1;
1646 bmcr
.bits
.speed1000
= 0;
1647 printk (KERN_INFO
"Manual 100 Mbps, ");
1648 } else if (np
->speed
== 10) {
1649 bmcr
.bits
.speed100
= 0;
1650 bmcr
.bits
.speed1000
= 0;
1651 printk (KERN_INFO
"Manual 10 Mbps, ");
1653 if (np
->full_duplex
) {
1654 bmcr
.bits
.duplex_mode
= 1;
1655 printk ("Full duplex\n");
1657 bmcr
.bits
.duplex_mode
= 0;
1658 printk ("Half duplex\n");
1661 /* Set 1000BaseT Master/Slave setting */
1662 mscr
.image
= mii_read (dev
, phy_addr
, MII_MSCR
);
1663 mscr
.bits
.cfg_enable
= 1;
1664 mscr
.bits
.cfg_value
= 0;
1666 mii_write (dev
, phy_addr
, MII_BMCR
, bmcr
.image
);
1673 mii_get_media_pcs (struct net_device
*dev
)
1675 ANAR_PCS_t negotiate
;
1679 struct netdev_private
*np
;
1682 phy_addr
= np
->phy_addr
;
1684 bmsr
.image
= mii_read (dev
, phy_addr
, PCS_BMSR
);
1685 if (np
->an_enable
) {
1686 if (!bmsr
.bits
.an_complete
) {
1687 /* Auto-Negotiation not completed */
1690 negotiate
.image
= mii_read (dev
, phy_addr
, PCS_ANAR
) &
1691 mii_read (dev
, phy_addr
, PCS_ANLPAR
);
1693 if (negotiate
.bits
.full_duplex
) {
1694 printk (KERN_INFO
"Auto 1000 Mbps, Full duplex\n");
1695 np
->full_duplex
= 1;
1697 printk (KERN_INFO
"Auto 1000 Mbps, half duplex\n");
1698 np
->full_duplex
= 0;
1700 if (negotiate
.bits
.pause
) {
1703 } else if (negotiate
.bits
.asymmetric
) {
1707 /* else tx_flow, rx_flow = user select */
1709 bmcr
.image
= mii_read (dev
, phy_addr
, PCS_BMCR
);
1710 printk (KERN_INFO
"Operating at 1000 Mbps, ");
1711 if (bmcr
.bits
.duplex_mode
) {
1712 printk ("Full duplex\n");
1714 printk ("Half duplex\n");
1718 printk(KERN_INFO
"Enable Tx Flow Control\n");
1720 printk(KERN_INFO
"Disable Tx Flow Control\n");
1722 printk(KERN_INFO
"Enable Rx Flow Control\n");
1724 printk(KERN_INFO
"Disable Rx Flow Control\n");
1730 mii_set_media_pcs (struct net_device
*dev
)
1736 struct netdev_private
*np
;
1738 phy_addr
= np
->phy_addr
;
1740 /* Auto-Negotiation? */
1741 if (np
->an_enable
) {
1742 /* Advertise capabilities */
1743 esr
.image
= mii_read (dev
, phy_addr
, PCS_ESR
);
1744 anar
.image
= mii_read (dev
, phy_addr
, MII_ANAR
);
1745 anar
.bits
.half_duplex
=
1746 esr
.bits
.media_1000BT_HD
| esr
.bits
.media_1000BX_HD
;
1747 anar
.bits
.full_duplex
=
1748 esr
.bits
.media_1000BT_FD
| esr
.bits
.media_1000BX_FD
;
1749 anar
.bits
.pause
= 1;
1750 anar
.bits
.asymmetric
= 1;
1751 mii_write (dev
, phy_addr
, MII_ANAR
, anar
.image
);
1753 /* Soft reset PHY */
1754 mii_write (dev
, phy_addr
, MII_BMCR
, MII_BMCR_RESET
);
1756 bmcr
.bits
.an_enable
= 1;
1757 bmcr
.bits
.restart_an
= 1;
1758 bmcr
.bits
.reset
= 1;
1759 mii_write (dev
, phy_addr
, MII_BMCR
, bmcr
.image
);
1762 /* Force speed setting */
1765 bmcr
.bits
.reset
= 1;
1766 mii_write (dev
, phy_addr
, MII_BMCR
, bmcr
.image
);
1769 bmcr
.bits
.an_enable
= 0;
1770 if (np
->full_duplex
) {
1771 bmcr
.bits
.duplex_mode
= 1;
1772 printk (KERN_INFO
"Manual full duplex\n");
1774 bmcr
.bits
.duplex_mode
= 0;
1775 printk (KERN_INFO
"Manual half duplex\n");
1777 mii_write (dev
, phy_addr
, MII_BMCR
, bmcr
.image
);
1780 /* Advertise nothing */
1781 mii_write (dev
, phy_addr
, MII_ANAR
, 0);
1788 rio_close (struct net_device
*dev
)
1790 long ioaddr
= dev
->base_addr
;
1791 struct netdev_private
*np
= dev
->priv
;
1792 struct sk_buff
*skb
;
1795 netif_stop_queue (dev
);
1797 /* Disable interrupts */
1798 writew (0, ioaddr
+ IntEnable
);
1800 /* Stop Tx and Rx logics */
1801 writel (TxDisable
| RxDisable
| StatsDisable
, ioaddr
+ MACCtrl
);
1802 synchronize_irq (dev
->irq
);
1803 free_irq (dev
->irq
, dev
);
1804 del_timer_sync (&np
->timer
);
1806 /* Free all the skbuffs in the queue. */
1807 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
1808 np
->rx_ring
[i
].status
= 0;
1809 np
->rx_ring
[i
].fraginfo
= 0;
1810 skb
= np
->rx_skbuff
[i
];
1812 pci_unmap_single (np
->pdev
, np
->rx_ring
[i
].fraginfo
,
1813 skb
->len
, PCI_DMA_FROMDEVICE
);
1814 dev_kfree_skb (skb
);
1815 np
->rx_skbuff
[i
] = 0;
1818 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
1819 skb
= np
->tx_skbuff
[i
];
1821 pci_unmap_single (np
->pdev
, np
->tx_ring
[i
].fraginfo
,
1822 skb
->len
, PCI_DMA_TODEVICE
);
1823 dev_kfree_skb (skb
);
1824 np
->tx_skbuff
[i
] = 0;
1831 static void __devexit
1832 rio_remove1 (struct pci_dev
*pdev
)
1834 struct net_device
*dev
= pci_get_drvdata (pdev
);
1837 struct netdev_private
*np
= dev
->priv
;
1839 unregister_netdev (dev
);
1840 pci_free_consistent (pdev
, RX_TOTAL_SIZE
, np
->rx_ring
,
1842 pci_free_consistent (pdev
, TX_TOTAL_SIZE
, np
->tx_ring
,
1845 iounmap ((char *) (dev
->base_addr
));
1848 pci_release_regions (pdev
);
1849 pci_disable_device (pdev
);
1851 pci_set_drvdata (pdev
, NULL
);
1854 static struct pci_driver rio_driver
= {
1856 .id_table
= rio_pci_tbl
,
1857 .probe
= rio_probe1
,
1858 .remove
= __devexit_p(rio_remove1
),
1864 return pci_module_init (&rio_driver
);
1870 pci_unregister_driver (&rio_driver
);
1873 module_init (rio_init
);
1874 module_exit (rio_exit
);
1880 gcc -D__KERNEL__ -DMODULE -I/usr/src/linux/include -Wall -Wstrict-prototypes -O2 -c dl2k.c
1882 Read Documentation/networking/dl2k.txt for details.