More meth updates.
[linux-2.6/linux-mips.git] / drivers / net / 3c59x.c
blob6ac7c7c6418c97c00ed597c0159410cd768e66cb
1 /* EtherLinkXL.c: A 3Com EtherLink PCI III/XL ethernet driver for linux. */
2 /*
3 Written 1996-1999 by Donald Becker.
5 This software may be used and distributed according to the terms
6 of the GNU General Public License, incorporated herein by reference.
8 This driver is for the 3Com "Vortex" and "Boomerang" series ethercards.
9 Members of the series include Fast EtherLink 3c590/3c592/3c595/3c597
10 and the EtherLink XL 3c900 and 3c905 cards.
12 Problem reports and questions should be directed to
13 vortex@scyld.com
15 The author may be reached as becker@scyld.com, or C/O
16 Scyld Computing Corporation
17 410 Severn Ave., Suite 210
18 Annapolis MD 21403
20 Linux Kernel Additions:
22 0.99H+lk0.9 - David S. Miller - softnet, PCI DMA updates
23 0.99H+lk1.0 - Jeff Garzik <jgarzik@pobox.com>
24 Remove compatibility defines for kernel versions < 2.2.x.
25 Update for new 2.3.x module interface
26 LK1.1.2 (March 19, 2000)
27 * New PCI interface (jgarzik)
29 LK1.1.3 25 April 2000, Andrew Morton <andrewm@uow.edu.au>
30 - Merged with 3c575_cb.c
31 - Don't set RxComplete in boomerang interrupt enable reg
32 - spinlock in vortex_timer to protect mdio functions
33 - disable local interrupts around call to vortex_interrupt in
34 vortex_tx_timeout() (So vortex_interrupt can use spin_lock())
35 - Select window 3 in vortex_timer()'s write to Wn3_MAC_Ctrl
36 - In vortex_start_xmit(), move the lock to _after_ we've altered
37 vp->cur_tx and vp->tx_full. This defeats the race between
38 vortex_start_xmit() and vortex_interrupt which was identified
39 by Bogdan Costescu.
40 - Merged back support for six new cards from various sources
41 - Set vortex_have_pci if pci_module_init returns zero (fixes cardbus
42 insertion oops)
43 - Tell it that 3c905C has NWAY for 100bT autoneg
44 - Fix handling of SetStatusEnd in 'Too much work..' code, as
45 per 2.3.99's 3c575_cb (Dave Hinds).
46 - Split ISR into two for vortex & boomerang
47 - Fix MOD_INC/DEC races
48 - Handle resource allocation failures.
49 - Fix 3CCFE575CT LED polarity
50 - Make tx_interrupt_mitigation the default
52 LK1.1.4 25 April 2000, Andrew Morton <andrewm@uow.edu.au>
53 - Add extra TxReset to vortex_up() to fix 575_cb hotplug initialisation probs.
54 - Put vortex_info_tbl into __devinitdata
55 - In the vortex_error StatsFull HACK, disable stats in vp->intr_enable as well
56 as in the hardware.
57 - Increased the loop counter in issue_and_wait from 2,000 to 4,000.
59 LK1.1.5 28 April 2000, andrewm
60 - Added powerpc defines (John Daniel <jdaniel@etresoft.com> said these work...)
61 - Some extra diagnostics
62 - In vortex_error(), reset the Tx on maxCollisions. Otherwise most
63 chips usually get a Tx timeout.
64 - Added extra_reset module parm
65 - Replaced some inline timer manip with mod_timer
66 (Franois romieu <Francois.Romieu@nic.fr>)
67 - In vortex_up(), don't make Wn3_config initialisation dependent upon has_nway
68 (this came across from 3c575_cb).
70 LK1.1.6 06 Jun 2000, andrewm
71 - Backed out the PPC defines.
72 - Use del_timer_sync(), mod_timer().
73 - Fix wrapped ulong comparison in boomerang_rx()
74 - Add IS_TORNADO, use it to suppress 3c905C checksum error msg
75 (Donald Becker, I Lee Hetherington <ilh@sls.lcs.mit.edu>)
76 - Replace union wn3_config with BFINS/BFEXT manipulation for
77 sparc64 (Pete Zaitcev, Peter Jones)
78 - In vortex_error, do_tx_reset and vortex_tx_timeout(Vortex):
79 do a netif_wake_queue() to better recover from errors. (Anders Pedersen,
80 Donald Becker)
81 - Print a warning on out-of-memory (rate limited to 1 per 10 secs)
82 - Added two more Cardbus 575 NICs: 5b57 and 6564 (Paul Wagland)
84 LK1.1.7 2 Jul 2000 andrewm
85 - Better handling of shared IRQs
86 - Reset the transmitter on a Tx reclaim error
87 - Fixed crash under OOM during vortex_open() (Mark Hemment)
88 - Fix Rx cessation problem during OOM (help from Mark Hemment)
89 - The spinlocks around the mdio access were blocking interrupts for 300uS.
90 Fix all this to use spin_lock_bh() within mdio_read/write
91 - Only write to TxFreeThreshold if it's a boomerang - other NICs don't
92 have one.
93 - Added 802.3x MAC-layer flow control support
95 LK1.1.8 13 Aug 2000 andrewm
96 - Ignore request_region() return value - already reserved if Cardbus.
97 - Merged some additional Cardbus flags from Don's 0.99Qk
98 - Some fixes for 3c556 (Fred Maciel)
99 - Fix for EISA initialisation (Jan Rekorajski)
100 - Renamed MII_XCVR_PWR and EEPROM_230 to align with 3c575_cb and D. Becker's drivers
101 - Fixed MII_XCVR_PWR for 3CCFE575CT
102 - Added INVERT_LED_PWR, used it.
103 - Backed out the extra_reset stuff
105 LK1.1.9 12 Sep 2000 andrewm
106 - Backed out the tx_reset_resume flags. It was a no-op.
107 - In vortex_error, don't reset the Tx on txReclaim errors
108 - In vortex_error, don't reset the Tx on maxCollisions errors.
109 Hence backed out all the DownListPtr logic here.
110 - In vortex_error, give Tornado cards a partial TxReset on
111 maxCollisions (David Hinds). Defined MAX_COLLISION_RESET for this.
112 - Redid some driver flags and device names based on pcmcia_cs-3.1.20.
113 - Fixed a bug where, if vp->tx_full is set when the interface
114 is downed, it remains set when the interface is upped. Bad
115 things happen.
117 LK1.1.10 17 Sep 2000 andrewm
118 - Added EEPROM_8BIT for 3c555 (Fred Maciel)
119 - Added experimental support for the 3c556B Laptop Hurricane (Louis Gerbarg)
120 - Add HAS_NWAY to "3c900 Cyclone 10Mbps TPO"
122 LK1.1.11 13 Nov 2000 andrewm
123 - Dump MOD_INC/DEC_USE_COUNT, use SET_MODULE_OWNER
125 LK1.1.12 1 Jan 2001 andrewm (2.4.0-pre1)
126 - Call pci_enable_device before we request our IRQ (Tobias Ringstrom)
127 - Add 3c590 PCI latency timer hack to vortex_probe1 (from 0.99Ra)
128 - Added extended issue_and_wait for the 3c905CX.
129 - Look for an MII on PHY index 24 first (3c905CX oddity).
130 - Add HAS_NWAY to 3cSOHO100-TX (Brett Frankenberger)
131 - Don't free skbs we don't own on oom path in vortex_open().
133 LK1.1.13 27 Jan 2001
134 - Added explicit `medialock' flag so we can truly
135 lock the media type down with `options'.
136 - "check ioremap return and some tidbits" (Arnaldo Carvalho de Melo <acme@conectiva.com.br>)
137 - Added and used EEPROM_NORESET for 3c556B PM resumes.
138 - Fixed leakage of vp->rx_ring.
139 - Break out separate HAS_HWCKSM device capability flag.
140 - Kill vp->tx_full (ANK)
141 - Merge zerocopy fragment handling (ANK?)
143 LK1.1.14 15 Feb 2001
144 - Enable WOL. Can be turned on with `enable_wol' module option.
145 - EISA and PCI initialisation fixes (jgarzik, Manfred Spraul)
146 - If a device's internalconfig register reports it has NWAY,
147 use it, even if autoselect is enabled.
149 LK1.1.15 6 June 2001 akpm
150 - Prevent double counting of received bytes (Lars Christensen)
151 - Add ethtool support (jgarzik)
152 - Add module parm descriptions (Andrzej M. Krzysztofowicz)
153 - Implemented alloc_etherdev() API
154 - Special-case the 'Tx error 82' message.
156 LK1.1.16 18 July 2001 akpm
157 - Make NETIF_F_SG dependent upon nr_free_highpages(), not on CONFIG_HIGHMEM
158 - Lessen verbosity of bootup messages
159 - Fix WOL - use new PM API functions.
160 - Use netif_running() instead of vp->open in suspend/resume.
161 - Don't reset the interface logic on open/close/rmmod. It upsets
162 autonegotiation, and hence DHCP (from 0.99T).
163 - Back out EEPROM_NORESET flag because of the above (we do it for all
164 NICs).
165 - Correct 3c982 identification string
166 - Rename wait_for_completion() to issue_and_wait() to avoid completion.h
167 clash.
169 LK1.1.17 18Dec01 akpm
170 - PCI ID 9805 is a Python-T, not a dual-port Cyclone. Apparently.
171 And it has NWAY.
172 - Mask our advertised modes (vp->advertising) with our capabilities
173 (MII reg5) when deciding which duplex mode to use.
174 - Add `global_options' as default for options[]. Ditto global_enable_wol,
175 global_full_duplex.
177 LK1.1.18 01Jul02 akpm
178 - Fix for undocumented transceiver power-up bit on some 3c566B's
179 (Donald Becker, Rahul Karnik)
181 - See http://www.zip.com.au/~akpm/linux/#3c59x-2.3 for more details.
182 - Also see Documentation/networking/vortex.txt
184 LK1.1.19 10Nov02 Marc Zyngier <maz@wild-wind.fr.eu.org>
185 - EISA sysfs integration.
189 * FIXME: This driver _could_ support MTU changing, but doesn't. See Don's hamachi.c implementation
190 * as well as other drivers
192 * NOTE: If you make 'vortex_debug' a constant (#define vortex_debug 0) the driver shrinks by 2k
193 * due to dead code elimination. There will be some performance benefits from this due to
194 * elimination of all the tests and reduced cache footprint.
198 #define DRV_NAME "3c59x"
199 #define DRV_VERSION "LK1.1.19"
200 #define DRV_RELDATE "10 Nov 2002"
204 /* A few values that may be tweaked. */
205 /* Keep the ring sizes a power of two for efficiency. */
206 #define TX_RING_SIZE 16
207 #define RX_RING_SIZE 32
208 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
210 /* "Knobs" that adjust features and parameters. */
211 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
212 Setting to > 1512 effectively disables this feature. */
213 #ifndef __arm__
214 static const int rx_copybreak = 200;
215 #else
216 /* ARM systems perform better by disregarding the bus-master
217 transfer capability of these cards. -- rmk */
218 static const int rx_copybreak = 1513;
219 #endif
220 /* Allow setting MTU to a larger size, bypassing the normal ethernet setup. */
221 static const int mtu = 1500;
222 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
223 static int max_interrupt_work = 32;
224 /* Tx timeout interval (millisecs) */
225 static int watchdog = 5000;
227 /* Allow aggregation of Tx interrupts. Saves CPU load at the cost
228 * of possible Tx stalls if the system is blocking interrupts
229 * somewhere else. Undefine this to disable.
231 #define tx_interrupt_mitigation 1
233 /* Put out somewhat more debugging messages. (0: no msg, 1 minimal .. 6). */
234 #define vortex_debug debug
235 #ifdef VORTEX_DEBUG
236 static int vortex_debug = VORTEX_DEBUG;
237 #else
238 static int vortex_debug = 1;
239 #endif
241 #ifndef __OPTIMIZE__
242 #error You must compile this file with the correct options!
243 #error See the last lines of the source file.
244 #error You must compile this driver with "-O".
245 #endif
247 #include <linux/config.h>
248 #include <linux/module.h>
249 #include <linux/kernel.h>
250 #include <linux/string.h>
251 #include <linux/timer.h>
252 #include <linux/errno.h>
253 #include <linux/in.h>
254 #include <linux/ioport.h>
255 #include <linux/slab.h>
256 #include <linux/interrupt.h>
257 #include <linux/pci.h>
258 #include <linux/mii.h>
259 #include <linux/init.h>
260 #include <linux/netdevice.h>
261 #include <linux/etherdevice.h>
262 #include <linux/skbuff.h>
263 #include <linux/ethtool.h>
264 #include <linux/highmem.h>
265 #include <linux/eisa.h>
266 #include <asm/irq.h> /* For NR_IRQS only. */
267 #include <asm/bitops.h>
268 #include <asm/io.h>
269 #include <asm/uaccess.h>
271 /* Kernel compatibility defines, some common to David Hinds' PCMCIA package.
272 This is only in the support-all-kernels source code. */
274 #define RUN_AT(x) (jiffies + (x))
276 #include <linux/delay.h>
279 static char version[] __devinitdata =
280 DRV_NAME ": Donald Becker and others. www.scyld.com/network/vortex.html\n";
282 MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
283 MODULE_DESCRIPTION("3Com 3c59x/3c9xx ethernet driver "
284 DRV_VERSION " " DRV_RELDATE);
285 MODULE_LICENSE("GPL");
287 MODULE_PARM(debug, "i");
288 MODULE_PARM(global_options, "i");
289 MODULE_PARM(options, "1-" __MODULE_STRING(8) "i");
290 MODULE_PARM(global_full_duplex, "i");
291 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(8) "i");
292 MODULE_PARM(hw_checksums, "1-" __MODULE_STRING(8) "i");
293 MODULE_PARM(flow_ctrl, "1-" __MODULE_STRING(8) "i");
294 MODULE_PARM(global_enable_wol, "i");
295 MODULE_PARM(enable_wol, "1-" __MODULE_STRING(8) "i");
296 MODULE_PARM(rx_copybreak, "i");
297 MODULE_PARM(max_interrupt_work, "i");
298 MODULE_PARM(compaq_ioaddr, "i");
299 MODULE_PARM(compaq_irq, "i");
300 MODULE_PARM(compaq_device_id, "i");
301 MODULE_PARM(watchdog, "i");
302 MODULE_PARM_DESC(debug, "3c59x debug level (0-6)");
303 MODULE_PARM_DESC(options, "3c59x: Bits 0-3: media type, bit 4: bus mastering, bit 9: full duplex");
304 MODULE_PARM_DESC(global_options, "3c59x: same as options, but applies to all NICs if options is unset");
305 MODULE_PARM_DESC(full_duplex, "3c59x full duplex setting(s) (1)");
306 MODULE_PARM_DESC(global_full_duplex, "3c59x: same as full_duplex, but applies to all NICs if options is unset");
307 MODULE_PARM_DESC(hw_checksums, "3c59x Hardware checksum checking by adapter(s) (0-1)");
308 MODULE_PARM_DESC(flow_ctrl, "3c59x 802.3x flow control usage (PAUSE only) (0-1)");
309 MODULE_PARM_DESC(enable_wol, "3c59x: Turn on Wake-on-LAN for adapter(s) (0-1)");
310 MODULE_PARM_DESC(global_enable_wol, "3c59x: same as enable_wol, but applies to all NICs if options is unset");
311 MODULE_PARM_DESC(rx_copybreak, "3c59x copy breakpoint for copy-only-tiny-frames");
312 MODULE_PARM_DESC(max_interrupt_work, "3c59x maximum events handled per interrupt");
313 MODULE_PARM_DESC(compaq_ioaddr, "3c59x PCI I/O base address (Compaq BIOS problem workaround)");
314 MODULE_PARM_DESC(compaq_irq, "3c59x PCI IRQ number (Compaq BIOS problem workaround)");
315 MODULE_PARM_DESC(compaq_device_id, "3c59x PCI device ID (Compaq BIOS problem workaround)");
316 MODULE_PARM_DESC(watchdog, "3c59x transmit timeout in milliseconds");
318 /* Operational parameter that usually are not changed. */
320 /* The Vortex size is twice that of the original EtherLinkIII series: the
321 runtime register window, window 1, is now always mapped in.
322 The Boomerang size is twice as large as the Vortex -- it has additional
323 bus master control registers. */
324 #define VORTEX_TOTAL_SIZE 0x20
325 #define BOOMERANG_TOTAL_SIZE 0x40
327 /* Set iff a MII transceiver on any interface requires mdio preamble.
328 This only set with the original DP83840 on older 3c905 boards, so the extra
329 code size of a per-interface flag is not worthwhile. */
330 static char mii_preamble_required;
332 #define PFX DRV_NAME ": "
337 Theory of Operation
339 I. Board Compatibility
341 This device driver is designed for the 3Com FastEtherLink and FastEtherLink
342 XL, 3Com's PCI to 10/100baseT adapters. It also works with the 10Mbs
343 versions of the FastEtherLink cards. The supported product IDs are
344 3c590, 3c592, 3c595, 3c597, 3c900, 3c905
346 The related ISA 3c515 is supported with a separate driver, 3c515.c, included
347 with the kernel source or available from
348 cesdis.gsfc.nasa.gov:/pub/linux/drivers/3c515.html
350 II. Board-specific settings
352 PCI bus devices are configured by the system at boot time, so no jumpers
353 need to be set on the board. The system BIOS should be set to assign the
354 PCI INTA signal to an otherwise unused system IRQ line.
356 The EEPROM settings for media type and forced-full-duplex are observed.
357 The EEPROM media type should be left at the default "autoselect" unless using
358 10base2 or AUI connections which cannot be reliably detected.
360 III. Driver operation
362 The 3c59x series use an interface that's very similar to the previous 3c5x9
363 series. The primary interface is two programmed-I/O FIFOs, with an
364 alternate single-contiguous-region bus-master transfer (see next).
366 The 3c900 "Boomerang" series uses a full-bus-master interface with separate
367 lists of transmit and receive descriptors, similar to the AMD LANCE/PCnet,
368 DEC Tulip and Intel Speedo3. The first chip version retains a compatible
369 programmed-I/O interface that has been removed in 'B' and subsequent board
370 revisions.
372 One extension that is advertised in a very large font is that the adapters
373 are capable of being bus masters. On the Vortex chip this capability was
374 only for a single contiguous region making it far less useful than the full
375 bus master capability. There is a significant performance impact of taking
376 an extra interrupt or polling for the completion of each transfer, as well
377 as difficulty sharing the single transfer engine between the transmit and
378 receive threads. Using DMA transfers is a win only with large blocks or
379 with the flawed versions of the Intel Orion motherboard PCI controller.
381 The Boomerang chip's full-bus-master interface is useful, and has the
382 currently-unused advantages over other similar chips that queued transmit
383 packets may be reordered and receive buffer groups are associated with a
384 single frame.
386 With full-bus-master support, this driver uses a "RX_COPYBREAK" scheme.
387 Rather than a fixed intermediate receive buffer, this scheme allocates
388 full-sized skbuffs as receive buffers. The value RX_COPYBREAK is used as
389 the copying breakpoint: it is chosen to trade-off the memory wasted by
390 passing the full-sized skbuff to the queue layer for all frames vs. the
391 copying cost of copying a frame to a correctly-sized skbuff.
393 IIIC. Synchronization
394 The driver runs as two independent, single-threaded flows of control. One
395 is the send-packet routine, which enforces single-threaded use by the
396 dev->tbusy flag. The other thread is the interrupt handler, which is single
397 threaded by the hardware and other software.
399 IV. Notes
401 Thanks to Cameron Spitzer and Terry Murphy of 3Com for providing development
402 3c590, 3c595, and 3c900 boards.
403 The name "Vortex" is the internal 3Com project name for the PCI ASIC, and
404 the EISA version is called "Demon". According to Terry these names come
405 from rides at the local amusement park.
407 The new chips support both ethernet (1.5K) and FDDI (4.5K) packet sizes!
408 This driver only supports ethernet packets because of the skbuff allocation
409 limit of 4K.
412 /* This table drives the PCI probe routines. It's mostly boilerplate in all
413 of the drivers, and will likely be provided by some future kernel.
415 enum pci_flags_bit {
416 PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
417 PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3,
420 enum { IS_VORTEX=1, IS_BOOMERANG=2, IS_CYCLONE=4, IS_TORNADO=8,
421 EEPROM_8BIT=0x10, /* AKPM: Uses 0x230 as the base bitmaps for EEPROM reads */
422 HAS_PWR_CTRL=0x20, HAS_MII=0x40, HAS_NWAY=0x80, HAS_CB_FNS=0x100,
423 INVERT_MII_PWR=0x200, INVERT_LED_PWR=0x400, MAX_COLLISION_RESET=0x800,
424 EEPROM_OFFSET=0x1000, HAS_HWCKSM=0x2000, WNO_XCVR_PWR=0x4000,
425 EXTRA_PREAMBLE=0x8000, };
427 enum vortex_chips {
428 CH_3C590 = 0,
429 CH_3C592,
430 CH_3C597,
431 CH_3C595_1,
432 CH_3C595_2,
434 CH_3C595_3,
435 CH_3C900_1,
436 CH_3C900_2,
437 CH_3C900_3,
438 CH_3C900_4,
440 CH_3C900_5,
441 CH_3C900B_FL,
442 CH_3C905_1,
443 CH_3C905_2,
444 CH_3C905B_1,
446 CH_3C905B_2,
447 CH_3C905B_FX,
448 CH_3C905C,
449 CH_3C980,
450 CH_3C9805,
452 CH_3CSOHO100_TX,
453 CH_3C555,
454 CH_3C556,
455 CH_3C556B,
456 CH_3C575,
458 CH_3C575_1,
459 CH_3CCFE575,
460 CH_3CCFE575CT,
461 CH_3CCFE656,
462 CH_3CCFEM656,
464 CH_3CCFEM656_1,
465 CH_3C450,
466 CH_3C920,
467 CH_3C982A,
468 CH_3C982B,
470 CH_905BT4,
471 CH_920B_EMB_WNM,
475 /* note: this array directly indexed by above enums, and MUST
476 * be kept in sync with both the enums above, and the PCI device
477 * table below
479 static struct vortex_chip_info {
480 const char *name;
481 int flags;
482 int drv_flags;
483 int io_size;
484 } vortex_info_tbl[] __devinitdata = {
485 {"3c590 Vortex 10Mbps",
486 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
487 #define EISA_3C592_OFFSET 1 /* Offset of this entry for vortex_eisa_init */
488 {"3c592 EISA 10Mbps Demon/Vortex", /* AKPM: from Don's 3c59x_cb.c 0.49H */
489 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
490 #define EISA_3C597_OFFSET 2 /* Offset of this entry for vortex_eisa_init */
491 {"3c597 EISA Fast Demon/Vortex", /* AKPM: from Don's 3c59x_cb.c 0.49H */
492 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
493 {"3c595 Vortex 100baseTx",
494 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
495 {"3c595 Vortex 100baseT4",
496 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
498 {"3c595 Vortex 100base-MII",
499 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
500 {"3c900 Boomerang 10baseT",
501 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG, 64, },
502 {"3c900 Boomerang 10Mbps Combo",
503 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG, 64, },
504 {"3c900 Cyclone 10Mbps TPO", /* AKPM: from Don's 0.99M */
505 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
506 {"3c900 Cyclone 10Mbps Combo",
507 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
509 {"3c900 Cyclone 10Mbps TPC", /* AKPM: from Don's 0.99M */
510 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
511 {"3c900B-FL Cyclone 10base-FL",
512 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
513 {"3c905 Boomerang 100baseTx",
514 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII, 64, },
515 {"3c905 Boomerang 100baseT4",
516 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII, 64, },
517 {"3c905B Cyclone 100baseTx",
518 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
520 {"3c905B Cyclone 10/100/BNC",
521 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
522 {"3c905B-FX Cyclone 100baseFx",
523 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
524 {"3c905C Tornado",
525 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
526 {"3c980 Cyclone",
527 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
528 {"3c980C Python-T",
529 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
531 {"3cSOHO100-TX Hurricane",
532 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
533 {"3c555 Laptop Hurricane",
534 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|EEPROM_8BIT|HAS_HWCKSM, 128, },
535 {"3c556 Laptop Tornado",
536 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|EEPROM_8BIT|HAS_CB_FNS|INVERT_MII_PWR|
537 HAS_HWCKSM, 128, },
538 {"3c556B Laptop Hurricane",
539 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|EEPROM_OFFSET|HAS_CB_FNS|INVERT_MII_PWR|
540 WNO_XCVR_PWR|HAS_HWCKSM, 128, },
541 {"3c575 [Megahertz] 10/100 LAN CardBus",
542 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_8BIT, 128, },
544 {"3c575 Boomerang CardBus",
545 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_8BIT, 128, },
546 {"3CCFE575BT Cyclone CardBus",
547 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|
548 INVERT_LED_PWR|HAS_HWCKSM, 128, },
549 {"3CCFE575CT Tornado CardBus",
550 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
551 MAX_COLLISION_RESET|HAS_HWCKSM, 128, },
552 {"3CCFE656 Cyclone CardBus",
553 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
554 INVERT_LED_PWR|HAS_HWCKSM, 128, },
555 {"3CCFEM656B Cyclone+Winmodem CardBus",
556 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
557 INVERT_LED_PWR|HAS_HWCKSM, 128, },
559 {"3CXFEM656C Tornado+Winmodem CardBus", /* From pcmcia-cs-3.1.5 */
560 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
561 MAX_COLLISION_RESET|HAS_HWCKSM, 128, },
562 {"3c450 HomePNA Tornado", /* AKPM: from Don's 0.99Q */
563 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
564 {"3c920 Tornado",
565 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
566 {"3c982 Hydra Dual Port A",
567 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_HWCKSM|HAS_NWAY, 128, },
568 {"3c982 Hydra Dual Port B",
569 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_HWCKSM|HAS_NWAY, 128, },
571 {"3c905B-T4",
572 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
573 {"3c920B-EMB-WNM Tornado",
574 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
576 {0,}, /* 0 terminated list. */
580 static struct pci_device_id vortex_pci_tbl[] __devinitdata = {
581 { 0x10B7, 0x5900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C590 },
582 { 0x10B7, 0x5920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C592 },
583 { 0x10B7, 0x5970, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C597 },
584 { 0x10B7, 0x5950, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_1 },
585 { 0x10B7, 0x5951, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_2 },
587 { 0x10B7, 0x5952, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_3 },
588 { 0x10B7, 0x9000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_1 },
589 { 0x10B7, 0x9001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_2 },
590 { 0x10B7, 0x9004, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_3 },
591 { 0x10B7, 0x9005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_4 },
593 { 0x10B7, 0x9006, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_5 },
594 { 0x10B7, 0x900A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900B_FL },
595 { 0x10B7, 0x9050, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905_1 },
596 { 0x10B7, 0x9051, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905_2 },
597 { 0x10B7, 0x9055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_1 },
599 { 0x10B7, 0x9058, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_2 },
600 { 0x10B7, 0x905A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_FX },
601 { 0x10B7, 0x9200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905C },
602 { 0x10B7, 0x9800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C980 },
603 { 0x10B7, 0x9805, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C9805 },
605 { 0x10B7, 0x7646, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CSOHO100_TX },
606 { 0x10B7, 0x5055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C555 },
607 { 0x10B7, 0x6055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C556 },
608 { 0x10B7, 0x6056, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C556B },
609 { 0x10B7, 0x5b57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C575 },
611 { 0x10B7, 0x5057, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C575_1 },
612 { 0x10B7, 0x5157, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE575 },
613 { 0x10B7, 0x5257, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE575CT },
614 { 0x10B7, 0x6560, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE656 },
615 { 0x10B7, 0x6562, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFEM656 },
617 { 0x10B7, 0x6564, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFEM656_1 },
618 { 0x10B7, 0x4500, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C450 },
619 { 0x10B7, 0x9201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C920 },
620 { 0x10B7, 0x1201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C982A },
621 { 0x10B7, 0x1202, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C982B },
623 { 0x10B7, 0x9056, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_905BT4 },
624 { 0x10B7, 0x9210, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_920B_EMB_WNM },
626 {0,} /* 0 terminated list. */
628 MODULE_DEVICE_TABLE(pci, vortex_pci_tbl);
631 /* Operational definitions.
632 These are not used by other compilation units and thus are not
633 exported in a ".h" file.
635 First the windows. There are eight register windows, with the command
636 and status registers available in each.
638 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
639 #define EL3_CMD 0x0e
640 #define EL3_STATUS 0x0e
642 /* The top five bits written to EL3_CMD are a command, the lower
643 11 bits are the parameter, if applicable.
644 Note that 11 parameters bits was fine for ethernet, but the new chip
645 can handle FDDI length frames (~4500 octets) and now parameters count
646 32-bit 'Dwords' rather than octets. */
648 enum vortex_cmd {
649 TotalReset = 0<<11, SelectWindow = 1<<11, StartCoax = 2<<11,
650 RxDisable = 3<<11, RxEnable = 4<<11, RxReset = 5<<11,
651 UpStall = 6<<11, UpUnstall = (6<<11)+1,
652 DownStall = (6<<11)+2, DownUnstall = (6<<11)+3,
653 RxDiscard = 8<<11, TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11,
654 FakeIntr = 12<<11, AckIntr = 13<<11, SetIntrEnb = 14<<11,
655 SetStatusEnb = 15<<11, SetRxFilter = 16<<11, SetRxThreshold = 17<<11,
656 SetTxThreshold = 18<<11, SetTxStart = 19<<11,
657 StartDMAUp = 20<<11, StartDMADown = (20<<11)+1, StatsEnable = 21<<11,
658 StatsDisable = 22<<11, StopCoax = 23<<11, SetFilterBit = 25<<11,};
660 /* The SetRxFilter command accepts the following classes: */
661 enum RxFilter {
662 RxStation = 1, RxMulticast = 2, RxBroadcast = 4, RxProm = 8 };
664 /* Bits in the general status register. */
665 enum vortex_status {
666 IntLatch = 0x0001, HostError = 0x0002, TxComplete = 0x0004,
667 TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020,
668 IntReq = 0x0040, StatsFull = 0x0080,
669 DMADone = 1<<8, DownComplete = 1<<9, UpComplete = 1<<10,
670 DMAInProgress = 1<<11, /* DMA controller is still busy.*/
671 CmdInProgress = 1<<12, /* EL3_CMD is still busy.*/
674 /* Register window 1 offsets, the window used in normal operation.
675 On the Vortex this window is always mapped at offsets 0x10-0x1f. */
676 enum Window1 {
677 TX_FIFO = 0x10, RX_FIFO = 0x10, RxErrors = 0x14,
678 RxStatus = 0x18, Timer=0x1A, TxStatus = 0x1B,
679 TxFree = 0x1C, /* Remaining free bytes in Tx buffer. */
681 enum Window0 {
682 Wn0EepromCmd = 10, /* Window 0: EEPROM command register. */
683 Wn0EepromData = 12, /* Window 0: EEPROM results register. */
684 IntrStatus=0x0E, /* Valid in all windows. */
686 enum Win0_EEPROM_bits {
687 EEPROM_Read = 0x80, EEPROM_WRITE = 0x40, EEPROM_ERASE = 0xC0,
688 EEPROM_EWENB = 0x30, /* Enable erasing/writing for 10 msec. */
689 EEPROM_EWDIS = 0x00, /* Disable EWENB before 10 msec timeout. */
691 /* EEPROM locations. */
692 enum eeprom_offset {
693 PhysAddr01=0, PhysAddr23=1, PhysAddr45=2, ModelID=3,
694 EtherLink3ID=7, IFXcvrIO=8, IRQLine=9,
695 NodeAddr01=10, NodeAddr23=11, NodeAddr45=12,
696 DriverTune=13, Checksum=15};
698 enum Window2 { /* Window 2. */
699 Wn2_ResetOptions=12,
701 enum Window3 { /* Window 3: MAC/config bits. */
702 Wn3_Config=0, Wn3_MAC_Ctrl=6, Wn3_Options=8,
705 #define BFEXT(value, offset, bitcount) \
706 ((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
708 #define BFINS(lhs, rhs, offset, bitcount) \
709 (((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
710 (((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
712 #define RAM_SIZE(v) BFEXT(v, 0, 3)
713 #define RAM_WIDTH(v) BFEXT(v, 3, 1)
714 #define RAM_SPEED(v) BFEXT(v, 4, 2)
715 #define ROM_SIZE(v) BFEXT(v, 6, 2)
716 #define RAM_SPLIT(v) BFEXT(v, 16, 2)
717 #define XCVR(v) BFEXT(v, 20, 4)
718 #define AUTOSELECT(v) BFEXT(v, 24, 1)
720 enum Window4 { /* Window 4: Xcvr/media bits. */
721 Wn4_FIFODiag = 4, Wn4_NetDiag = 6, Wn4_PhysicalMgmt=8, Wn4_Media = 10,
723 enum Win4_Media_bits {
724 Media_SQE = 0x0008, /* Enable SQE error counting for AUI. */
725 Media_10TP = 0x00C0, /* Enable link beat and jabber for 10baseT. */
726 Media_Lnk = 0x0080, /* Enable just link beat for 100TX/100FX. */
727 Media_LnkBeat = 0x0800,
729 enum Window7 { /* Window 7: Bus Master control. */
730 Wn7_MasterAddr = 0, Wn7_MasterLen = 6, Wn7_MasterStatus = 12,
732 /* Boomerang bus master control registers. */
733 enum MasterCtrl {
734 PktStatus = 0x20, DownListPtr = 0x24, FragAddr = 0x28, FragLen = 0x2c,
735 TxFreeThreshold = 0x2f, UpPktStatus = 0x30, UpListPtr = 0x38,
738 /* The Rx and Tx descriptor lists.
739 Caution Alpha hackers: these types are 32 bits! Note also the 8 byte
740 alignment contraint on tx_ring[] and rx_ring[]. */
741 #define LAST_FRAG 0x80000000 /* Last Addr/Len pair in descriptor. */
742 #define DN_COMPLETE 0x00010000 /* This packet has been downloaded */
743 struct boom_rx_desc {
744 u32 next; /* Last entry points to 0. */
745 s32 status;
746 u32 addr; /* Up to 63 addr/len pairs possible. */
747 s32 length; /* Set LAST_FRAG to indicate last pair. */
749 /* Values for the Rx status entry. */
750 enum rx_desc_status {
751 RxDComplete=0x00008000, RxDError=0x4000,
752 /* See boomerang_rx() for actual error bits */
753 IPChksumErr=1<<25, TCPChksumErr=1<<26, UDPChksumErr=1<<27,
754 IPChksumValid=1<<29, TCPChksumValid=1<<30, UDPChksumValid=1<<31,
757 #ifdef MAX_SKB_FRAGS
758 #define DO_ZEROCOPY 1
759 #else
760 #define DO_ZEROCOPY 0
761 #endif
763 struct boom_tx_desc {
764 u32 next; /* Last entry points to 0. */
765 s32 status; /* bits 0:12 length, others see below. */
766 #if DO_ZEROCOPY
767 struct {
768 u32 addr;
769 s32 length;
770 } frag[1+MAX_SKB_FRAGS];
771 #else
772 u32 addr;
773 s32 length;
774 #endif
777 /* Values for the Tx status entry. */
778 enum tx_desc_status {
779 CRCDisable=0x2000, TxDComplete=0x8000,
780 AddIPChksum=0x02000000, AddTCPChksum=0x04000000, AddUDPChksum=0x08000000,
781 TxIntrUploaded=0x80000000, /* IRQ when in FIFO, but maybe not sent. */
784 /* Chip features we care about in vp->capabilities, read from the EEPROM. */
785 enum ChipCaps { CapBusMaster=0x20, CapPwrMgmt=0x2000 };
787 struct vortex_private {
788 /* The Rx and Tx rings should be quad-word-aligned. */
789 struct boom_rx_desc* rx_ring;
790 struct boom_tx_desc* tx_ring;
791 dma_addr_t rx_ring_dma;
792 dma_addr_t tx_ring_dma;
793 /* The addresses of transmit- and receive-in-place skbuffs. */
794 struct sk_buff* rx_skbuff[RX_RING_SIZE];
795 struct sk_buff* tx_skbuff[TX_RING_SIZE];
796 unsigned int cur_rx, cur_tx; /* The next free ring entry */
797 unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
798 struct net_device_stats stats;
799 struct sk_buff *tx_skb; /* Packet being eaten by bus master ctrl. */
800 dma_addr_t tx_skb_dma; /* Allocated DMA address for bus master ctrl DMA. */
802 /* PCI configuration space information. */
803 struct device *gendev;
804 char *cb_fn_base; /* CardBus function status addr space. */
806 /* Some values here only for performance evaluation and path-coverage */
807 int rx_nocopy, rx_copy, queued_packet, rx_csumhits;
808 int card_idx;
810 /* The remainder are related to chip state, mostly media selection. */
811 struct timer_list timer; /* Media selection timer. */
812 struct timer_list rx_oom_timer; /* Rx skb allocation retry timer */
813 int options; /* User-settable misc. driver options. */
814 unsigned int media_override:4, /* Passed-in media type. */
815 default_media:4, /* Read from the EEPROM/Wn3_Config. */
816 full_duplex:1, force_fd:1, autoselect:1,
817 bus_master:1, /* Vortex can only do a fragment bus-m. */
818 full_bus_master_tx:1, full_bus_master_rx:2, /* Boomerang */
819 flow_ctrl:1, /* Use 802.3x flow control (PAUSE only) */
820 partner_flow_ctrl:1, /* Partner supports flow control */
821 has_nway:1,
822 enable_wol:1, /* Wake-on-LAN is enabled */
823 pm_state_valid:1, /* power_state[] has sane contents */
824 open:1,
825 medialock:1,
826 must_free_region:1; /* Flag: if zero, Cardbus owns the I/O region */
827 int drv_flags;
828 u16 status_enable;
829 u16 intr_enable;
830 u16 available_media; /* From Wn3_Options. */
831 u16 capabilities, info1, info2; /* Various, from EEPROM. */
832 u16 advertising; /* NWay media advertisement */
833 unsigned char phys[2]; /* MII device addresses. */
834 u16 deferred; /* Resend these interrupts when we
835 * bale from the ISR */
836 u16 io_size; /* Size of PCI region (for release_region) */
837 spinlock_t lock; /* Serialise access to device & its vortex_private */
838 spinlock_t mdio_lock; /* Serialise access to mdio hardware */
839 u32 power_state[16];
842 #ifdef CONFIG_PCI
843 #define DEVICE_PCI(dev) (((dev)->bus == &pci_bus_type) ? to_pci_dev((dev)) : NULL)
844 #else
845 #define DEVICE_PCI(dev) NULL
846 #endif
848 #define VORTEX_PCI(vp) (((vp)->gendev) ? DEVICE_PCI((vp)->gendev) : NULL)
850 #ifdef CONFIG_EISA
851 #define DEVICE_EISA(dev) (((dev)->bus == &eisa_bus_type) ? to_eisa_device((dev)) : NULL)
852 #else
853 #define DEVICE_EISA(dev) NULL
854 #endif
856 #define VORTEX_EISA(vp) (((vp)->gendev) ? DEVICE_EISA((vp)->gendev) : NULL)
858 /* The action to take with a media selection timer tick.
859 Note that we deviate from the 3Com order by checking 10base2 before AUI.
861 enum xcvr_types {
862 XCVR_10baseT=0, XCVR_AUI, XCVR_10baseTOnly, XCVR_10base2, XCVR_100baseTx,
863 XCVR_100baseFx, XCVR_MII=6, XCVR_NWAY=8, XCVR_ExtMII=9, XCVR_Default=10,
866 static struct media_table {
867 char *name;
868 unsigned int media_bits:16, /* Bits to set in Wn4_Media register. */
869 mask:8, /* The transceiver-present bit in Wn3_Config.*/
870 next:8; /* The media type to try next. */
871 int wait; /* Time before we check media status. */
872 } media_tbl[] = {
873 { "10baseT", Media_10TP,0x08, XCVR_10base2, (14*HZ)/10},
874 { "10Mbs AUI", Media_SQE, 0x20, XCVR_Default, (1*HZ)/10},
875 { "undefined", 0, 0x80, XCVR_10baseT, 10000},
876 { "10base2", 0, 0x10, XCVR_AUI, (1*HZ)/10},
877 { "100baseTX", Media_Lnk, 0x02, XCVR_100baseFx, (14*HZ)/10},
878 { "100baseFX", Media_Lnk, 0x04, XCVR_MII, (14*HZ)/10},
879 { "MII", 0, 0x41, XCVR_10baseT, 3*HZ },
880 { "undefined", 0, 0x01, XCVR_10baseT, 10000},
881 { "Autonegotiate", 0, 0x41, XCVR_10baseT, 3*HZ},
882 { "MII-External", 0, 0x41, XCVR_10baseT, 3*HZ },
883 { "Default", 0, 0xFF, XCVR_10baseT, 10000},
886 static int vortex_probe1(struct device *gendev, long ioaddr, int irq,
887 int chip_idx, int card_idx);
888 static void vortex_up(struct net_device *dev);
889 static void vortex_down(struct net_device *dev);
890 static int vortex_open(struct net_device *dev);
891 static void mdio_sync(long ioaddr, int bits);
892 static int mdio_read(struct net_device *dev, int phy_id, int location);
893 static void mdio_write(struct net_device *vp, int phy_id, int location, int value);
894 static void vortex_timer(unsigned long arg);
895 static void rx_oom_timer(unsigned long arg);
896 static int vortex_start_xmit(struct sk_buff *skb, struct net_device *dev);
897 static int boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev);
898 static int vortex_rx(struct net_device *dev);
899 static int boomerang_rx(struct net_device *dev);
900 static irqreturn_t vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs);
901 static irqreturn_t boomerang_interrupt(int irq, void *dev_id, struct pt_regs *regs);
902 static int vortex_close(struct net_device *dev);
903 static void dump_tx_ring(struct net_device *dev);
904 static void update_stats(long ioaddr, struct net_device *dev);
905 static struct net_device_stats *vortex_get_stats(struct net_device *dev);
906 static void set_rx_mode(struct net_device *dev);
907 static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
908 static void vortex_tx_timeout(struct net_device *dev);
909 static void acpi_set_WOL(struct net_device *dev);
911 /* This driver uses 'options' to pass the media type, full-duplex flag, etc. */
912 /* Option count limit only -- unlimited interfaces are supported. */
913 #define MAX_UNITS 8
914 static int options[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1,};
915 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
916 static int hw_checksums[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
917 static int flow_ctrl[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
918 static int enable_wol[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
919 static int global_options = -1;
920 static int global_full_duplex = -1;
921 static int global_enable_wol = -1;
923 /* #define dev_alloc_skb dev_alloc_skb_debug */
925 /* Variables to work-around the Compaq PCI BIOS32 problem. */
926 static int compaq_ioaddr, compaq_irq, compaq_device_id = 0x5900;
927 static struct net_device *compaq_net_device;
929 static int vortex_cards_found;
931 #ifdef CONFIG_PM
933 static int vortex_suspend (struct pci_dev *pdev, u32 state)
935 struct net_device *dev = pci_get_drvdata(pdev);
937 if (dev && dev->priv) {
938 if (netif_running(dev)) {
939 netif_device_detach(dev);
940 vortex_down(dev);
943 return 0;
946 static int vortex_resume (struct pci_dev *pdev)
948 struct net_device *dev = pci_get_drvdata(pdev);
950 if (dev && dev->priv) {
951 if (netif_running(dev)) {
952 vortex_up(dev);
953 netif_device_attach(dev);
956 return 0;
959 #endif /* CONFIG_PM */
961 #ifdef CONFIG_EISA
962 static struct eisa_device_id vortex_eisa_ids[] = {
963 { "TCM5920", EISA_3C592_OFFSET },
964 { "TCM5970", EISA_3C597_OFFSET },
965 { "" }
968 static int vortex_eisa_probe (struct device *device);
969 static int vortex_eisa_remove (struct device *device);
971 static struct eisa_driver vortex_eisa_driver = {
972 .id_table = vortex_eisa_ids,
973 .driver = {
974 .name = "3c59x",
975 .probe = vortex_eisa_probe,
976 .remove = vortex_eisa_remove
980 static int vortex_eisa_probe (struct device *device)
982 long ioaddr;
983 struct eisa_device *edev;
985 edev = to_eisa_device (device);
986 ioaddr = edev->base_addr;
988 if (!request_region(ioaddr, VORTEX_TOTAL_SIZE, DRV_NAME))
989 return -EBUSY;
991 if (vortex_probe1(device, ioaddr, inw(ioaddr + 0xC88) >> 12,
992 edev->id.driver_data, vortex_cards_found)) {
993 release_region (ioaddr, VORTEX_TOTAL_SIZE);
994 return -ENODEV;
997 vortex_cards_found++;
999 return 0;
1002 static int vortex_eisa_remove (struct device *device)
1004 struct eisa_device *edev;
1005 struct net_device *dev;
1006 struct vortex_private *vp;
1007 long ioaddr;
1009 edev = to_eisa_device (device);
1010 dev = eisa_get_drvdata (edev);
1012 if (!dev) {
1013 printk("vortex_eisa_remove called for Compaq device!\n");
1014 BUG();
1017 vp = dev->priv;
1018 ioaddr = dev->base_addr;
1020 unregister_netdev (dev);
1021 outw (TotalReset|0x14, ioaddr + EL3_CMD);
1022 release_region (ioaddr, VORTEX_TOTAL_SIZE);
1024 kfree (dev);
1025 return 0;
1027 #endif
1029 /* returns count found (>= 0), or negative on error */
1030 static int __init vortex_eisa_init (void)
1032 int eisa_found = 0;
1033 int orig_cards_found = vortex_cards_found;
1035 #ifdef CONFIG_EISA
1036 if (eisa_driver_register (&vortex_eisa_driver) >= 0) {
1037 /* Because of the way EISA bus is probed, we cannot assume
1038 * any device have been found when we exit from
1039 * eisa_driver_register (the bus root driver may not be
1040 * initialized yet). So we blindly assume something was
1041 * found, and let the sysfs magic happend... */
1043 eisa_found = 1;
1045 #endif
1047 /* Special code to work-around the Compaq PCI BIOS32 problem. */
1048 if (compaq_ioaddr) {
1049 vortex_probe1(NULL, compaq_ioaddr, compaq_irq,
1050 compaq_device_id, vortex_cards_found++);
1053 return vortex_cards_found - orig_cards_found + eisa_found;
1056 /* returns count (>= 0), or negative on error */
1057 static int __devinit vortex_init_one (struct pci_dev *pdev,
1058 const struct pci_device_id *ent)
1060 int rc;
1062 /* wake up and enable device */
1063 if (pci_enable_device (pdev)) {
1064 rc = -EIO;
1065 } else {
1066 rc = vortex_probe1 (&pdev->dev, pci_resource_start (pdev, 0),
1067 pdev->irq, ent->driver_data, vortex_cards_found);
1068 if (rc == 0)
1069 vortex_cards_found++;
1071 return rc;
1075 * Start up the PCI/EISA device which is described by *gendev.
1076 * Return 0 on success.
1078 * NOTE: pdev can be NULL, for the case of a Compaq device
1080 static int __devinit vortex_probe1(struct device *gendev,
1081 long ioaddr, int irq,
1082 int chip_idx, int card_idx)
1084 struct vortex_private *vp;
1085 int option;
1086 unsigned int eeprom[0x40], checksum = 0; /* EEPROM contents */
1087 int i, step;
1088 struct net_device *dev;
1089 static int printed_version;
1090 int retval, print_info;
1091 struct vortex_chip_info * const vci = &vortex_info_tbl[chip_idx];
1092 char *print_name = "3c59x";
1093 struct pci_dev *pdev = NULL;
1094 struct eisa_device *edev = NULL;
1096 if (!printed_version) {
1097 printk (version);
1098 printed_version = 1;
1101 if (gendev) {
1102 if ((pdev = DEVICE_PCI(gendev))) {
1103 print_name = pdev->slot_name;
1106 if ((edev = DEVICE_EISA(gendev))) {
1107 print_name = edev->dev.bus_id;
1111 dev = alloc_etherdev(sizeof(*vp));
1112 retval = -ENOMEM;
1113 if (!dev) {
1114 printk (KERN_ERR PFX "unable to allocate etherdev, aborting\n");
1115 goto out;
1117 SET_MODULE_OWNER(dev);
1118 SET_NETDEV_DEV(dev, gendev);
1119 vp = dev->priv;
1121 option = global_options;
1123 /* The lower four bits are the media type. */
1124 if (dev->mem_start) {
1126 * The 'options' param is passed in as the third arg to the
1127 * LILO 'ether=' argument for non-modular use
1129 option = dev->mem_start;
1131 else if (card_idx < MAX_UNITS) {
1132 if (options[card_idx] >= 0)
1133 option = options[card_idx];
1136 if (option > 0) {
1137 if (option & 0x8000)
1138 vortex_debug = 7;
1139 if (option & 0x4000)
1140 vortex_debug = 2;
1141 if (option & 0x0400)
1142 vp->enable_wol = 1;
1145 print_info = (vortex_debug > 1);
1146 if (print_info)
1147 printk (KERN_INFO "See Documentation/networking/vortex.txt\n");
1149 printk(KERN_INFO "%s: 3Com %s %s at 0x%lx. Vers " DRV_VERSION "\n",
1150 print_name,
1151 pdev ? "PCI" : "EISA",
1152 vci->name,
1153 ioaddr);
1155 dev->base_addr = ioaddr;
1156 dev->irq = irq;
1157 dev->mtu = mtu;
1158 vp->drv_flags = vci->drv_flags;
1159 vp->has_nway = (vci->drv_flags & HAS_NWAY) ? 1 : 0;
1160 vp->io_size = vci->io_size;
1161 vp->card_idx = card_idx;
1163 /* module list only for Compaq device */
1164 if (gendev == NULL) {
1165 compaq_net_device = dev;
1168 /* PCI-only startup logic */
1169 if (pdev) {
1170 /* EISA resources already marked, so only PCI needs to do this here */
1171 /* Ignore return value, because Cardbus drivers already allocate for us */
1172 if (request_region(ioaddr, vci->io_size, print_name) != NULL)
1173 vp->must_free_region = 1;
1175 /* enable bus-mastering if necessary */
1176 if (vci->flags & PCI_USES_MASTER)
1177 pci_set_master (pdev);
1179 if (vci->drv_flags & IS_VORTEX) {
1180 u8 pci_latency;
1181 u8 new_latency = 248;
1183 /* Check the PCI latency value. On the 3c590 series the latency timer
1184 must be set to the maximum value to avoid data corruption that occurs
1185 when the timer expires during a transfer. This bug exists the Vortex
1186 chip only. */
1187 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency);
1188 if (pci_latency < new_latency) {
1189 printk(KERN_INFO "%s: Overriding PCI latency"
1190 " timer (CFLT) setting of %d, new value is %d.\n",
1191 print_name, pci_latency, new_latency);
1192 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, new_latency);
1197 spin_lock_init(&vp->lock);
1198 spin_lock_init(&vp->mdio_lock);
1199 vp->gendev = gendev;
1201 /* Makes sure rings are at least 16 byte aligned. */
1202 vp->rx_ring = pci_alloc_consistent(pdev, sizeof(struct boom_rx_desc) * RX_RING_SIZE
1203 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
1204 &vp->rx_ring_dma);
1205 retval = -ENOMEM;
1206 if (vp->rx_ring == 0)
1207 goto free_region;
1209 vp->tx_ring = (struct boom_tx_desc *)(vp->rx_ring + RX_RING_SIZE);
1210 vp->tx_ring_dma = vp->rx_ring_dma + sizeof(struct boom_rx_desc) * RX_RING_SIZE;
1212 /* if we are a PCI driver, we store info in pdev->driver_data
1213 * instead of a module list */
1214 if (pdev)
1215 pci_set_drvdata(pdev, dev);
1216 if (edev)
1217 eisa_set_drvdata (edev, dev);
1219 vp->media_override = 7;
1220 if (option >= 0) {
1221 vp->media_override = ((option & 7) == 2) ? 0 : option & 15;
1222 if (vp->media_override != 7)
1223 vp->medialock = 1;
1224 vp->full_duplex = (option & 0x200) ? 1 : 0;
1225 vp->bus_master = (option & 16) ? 1 : 0;
1228 if (global_full_duplex > 0)
1229 vp->full_duplex = 1;
1230 if (global_enable_wol > 0)
1231 vp->enable_wol = 1;
1233 if (card_idx < MAX_UNITS) {
1234 if (full_duplex[card_idx] > 0)
1235 vp->full_duplex = 1;
1236 if (flow_ctrl[card_idx] > 0)
1237 vp->flow_ctrl = 1;
1238 if (enable_wol[card_idx] > 0)
1239 vp->enable_wol = 1;
1242 vp->force_fd = vp->full_duplex;
1243 vp->options = option;
1244 /* Read the station address from the EEPROM. */
1245 EL3WINDOW(0);
1247 int base;
1249 if (vci->drv_flags & EEPROM_8BIT)
1250 base = 0x230;
1251 else if (vci->drv_flags & EEPROM_OFFSET)
1252 base = EEPROM_Read + 0x30;
1253 else
1254 base = EEPROM_Read;
1256 for (i = 0; i < 0x40; i++) {
1257 int timer;
1258 outw(base + i, ioaddr + Wn0EepromCmd);
1259 /* Pause for at least 162 us. for the read to take place. */
1260 for (timer = 10; timer >= 0; timer--) {
1261 udelay(162);
1262 if ((inw(ioaddr + Wn0EepromCmd) & 0x8000) == 0)
1263 break;
1265 eeprom[i] = inw(ioaddr + Wn0EepromData);
1268 for (i = 0; i < 0x18; i++)
1269 checksum ^= eeprom[i];
1270 checksum = (checksum ^ (checksum >> 8)) & 0xff;
1271 if (checksum != 0x00) { /* Grrr, needless incompatible change 3Com. */
1272 while (i < 0x21)
1273 checksum ^= eeprom[i++];
1274 checksum = (checksum ^ (checksum >> 8)) & 0xff;
1276 if ((checksum != 0x00) && !(vci->drv_flags & IS_TORNADO))
1277 printk(" ***INVALID CHECKSUM %4.4x*** ", checksum);
1278 for (i = 0; i < 3; i++)
1279 ((u16 *)dev->dev_addr)[i] = htons(eeprom[i + 10]);
1280 if (print_info) {
1281 for (i = 0; i < 6; i++)
1282 printk("%c%2.2x", i ? ':' : ' ', dev->dev_addr[i]);
1284 EL3WINDOW(2);
1285 for (i = 0; i < 6; i++)
1286 outb(dev->dev_addr[i], ioaddr + i);
1288 #ifdef __sparc__
1289 if (print_info)
1290 printk(", IRQ %s\n", __irq_itoa(dev->irq));
1291 #else
1292 if (print_info)
1293 printk(", IRQ %d\n", dev->irq);
1294 /* Tell them about an invalid IRQ. */
1295 if (dev->irq <= 0 || dev->irq >= NR_IRQS)
1296 printk(KERN_WARNING " *** Warning: IRQ %d is unlikely to work! ***\n",
1297 dev->irq);
1298 #endif
1300 EL3WINDOW(4);
1301 step = (inb(ioaddr + Wn4_NetDiag) & 0x1e) >> 1;
1302 if (print_info) {
1303 printk(KERN_INFO " product code %02x%02x rev %02x.%d date %02d-"
1304 "%02d-%02d\n", eeprom[6]&0xff, eeprom[6]>>8, eeprom[0x14],
1305 step, (eeprom[4]>>5) & 15, eeprom[4] & 31, eeprom[4]>>9);
1309 if (pdev && vci->drv_flags & HAS_CB_FNS) {
1310 unsigned long fn_st_addr; /* Cardbus function status space */
1311 unsigned short n;
1313 fn_st_addr = pci_resource_start (pdev, 2);
1314 if (fn_st_addr) {
1315 vp->cb_fn_base = ioremap(fn_st_addr, 128);
1316 retval = -ENOMEM;
1317 if (!vp->cb_fn_base)
1318 goto free_ring;
1320 if (print_info) {
1321 printk(KERN_INFO "%s: CardBus functions mapped %8.8lx->%p\n",
1322 print_name, fn_st_addr, vp->cb_fn_base);
1324 EL3WINDOW(2);
1326 n = inw(ioaddr + Wn2_ResetOptions) & ~0x4010;
1327 if (vp->drv_flags & INVERT_LED_PWR)
1328 n |= 0x10;
1329 if (vp->drv_flags & INVERT_MII_PWR)
1330 n |= 0x4000;
1331 outw(n, ioaddr + Wn2_ResetOptions);
1332 if (vp->drv_flags & WNO_XCVR_PWR) {
1333 EL3WINDOW(0);
1334 outw(0x0800, ioaddr);
1338 /* Extract our information from the EEPROM data. */
1339 vp->info1 = eeprom[13];
1340 vp->info2 = eeprom[15];
1341 vp->capabilities = eeprom[16];
1343 if (vp->info1 & 0x8000) {
1344 vp->full_duplex = 1;
1345 if (print_info)
1346 printk(KERN_INFO "Full duplex capable\n");
1350 static const char * ram_split[] = {"5:3", "3:1", "1:1", "3:5"};
1351 unsigned int config;
1352 EL3WINDOW(3);
1353 vp->available_media = inw(ioaddr + Wn3_Options);
1354 if ((vp->available_media & 0xff) == 0) /* Broken 3c916 */
1355 vp->available_media = 0x40;
1356 config = inl(ioaddr + Wn3_Config);
1357 if (print_info) {
1358 printk(KERN_DEBUG " Internal config register is %4.4x, "
1359 "transceivers %#x.\n", config, inw(ioaddr + Wn3_Options));
1360 printk(KERN_INFO " %dK %s-wide RAM %s Rx:Tx split, %s%s interface.\n",
1361 8 << RAM_SIZE(config),
1362 RAM_WIDTH(config) ? "word" : "byte",
1363 ram_split[RAM_SPLIT(config)],
1364 AUTOSELECT(config) ? "autoselect/" : "",
1365 XCVR(config) > XCVR_ExtMII ? "<invalid transceiver>" :
1366 media_tbl[XCVR(config)].name);
1368 vp->default_media = XCVR(config);
1369 if (vp->default_media == XCVR_NWAY)
1370 vp->has_nway = 1;
1371 vp->autoselect = AUTOSELECT(config);
1374 if (vp->media_override != 7) {
1375 printk(KERN_INFO "%s: Media override to transceiver type %d (%s).\n",
1376 print_name, vp->media_override,
1377 media_tbl[vp->media_override].name);
1378 dev->if_port = vp->media_override;
1379 } else
1380 dev->if_port = vp->default_media;
1382 if ((vp->available_media & 0x4b) || (vci->drv_flags & HAS_NWAY) ||
1383 dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
1384 int phy, phy_idx = 0;
1385 EL3WINDOW(4);
1386 mii_preamble_required++;
1387 if (vp->drv_flags & EXTRA_PREAMBLE)
1388 mii_preamble_required++;
1389 mdio_sync(ioaddr, 32);
1390 mdio_read(dev, 24, 1);
1391 for (phy = 0; phy < 32 && phy_idx < 1; phy++) {
1392 int mii_status, phyx;
1395 * For the 3c905CX we look at index 24 first, because it bogusly
1396 * reports an external PHY at all indices
1398 if (phy == 0)
1399 phyx = 24;
1400 else if (phy <= 24)
1401 phyx = phy - 1;
1402 else
1403 phyx = phy;
1404 mii_status = mdio_read(dev, phyx, 1);
1405 if (mii_status && mii_status != 0xffff) {
1406 vp->phys[phy_idx++] = phyx;
1407 if (print_info) {
1408 printk(KERN_INFO " MII transceiver found at address %d,"
1409 " status %4x.\n", phyx, mii_status);
1411 if ((mii_status & 0x0040) == 0)
1412 mii_preamble_required++;
1415 mii_preamble_required--;
1416 if (phy_idx == 0) {
1417 printk(KERN_WARNING" ***WARNING*** No MII transceivers found!\n");
1418 vp->phys[0] = 24;
1419 } else {
1420 vp->advertising = mdio_read(dev, vp->phys[0], 4);
1421 if (vp->full_duplex) {
1422 /* Only advertise the FD media types. */
1423 vp->advertising &= ~0x02A0;
1424 mdio_write(dev, vp->phys[0], 4, vp->advertising);
1429 if (vp->capabilities & CapBusMaster) {
1430 vp->full_bus_master_tx = 1;
1431 if (print_info) {
1432 printk(KERN_INFO " Enabling bus-master transmits and %s receives.\n",
1433 (vp->info2 & 1) ? "early" : "whole-frame" );
1435 vp->full_bus_master_rx = (vp->info2 & 1) ? 1 : 2;
1436 vp->bus_master = 0; /* AKPM: vortex only */
1439 /* The 3c59x-specific entries in the device structure. */
1440 dev->open = vortex_open;
1441 if (vp->full_bus_master_tx) {
1442 dev->hard_start_xmit = boomerang_start_xmit;
1443 /* Actually, it still should work with iommu. */
1444 dev->features |= NETIF_F_SG;
1445 if (((hw_checksums[card_idx] == -1) && (vp->drv_flags & HAS_HWCKSM)) ||
1446 (hw_checksums[card_idx] == 1)) {
1447 dev->features |= NETIF_F_IP_CSUM;
1449 } else {
1450 dev->hard_start_xmit = vortex_start_xmit;
1453 if (print_info) {
1454 printk(KERN_INFO "%s: scatter/gather %sabled. h/w checksums %sabled\n",
1455 print_name,
1456 (dev->features & NETIF_F_SG) ? "en":"dis",
1457 (dev->features & NETIF_F_IP_CSUM) ? "en":"dis");
1460 dev->stop = vortex_close;
1461 dev->get_stats = vortex_get_stats;
1462 dev->do_ioctl = vortex_ioctl;
1463 dev->set_multicast_list = set_rx_mode;
1464 dev->tx_timeout = vortex_tx_timeout;
1465 dev->watchdog_timeo = (watchdog * HZ) / 1000;
1466 if (pdev && vp->enable_wol) {
1467 vp->pm_state_valid = 1;
1468 pci_save_state(VORTEX_PCI(vp), vp->power_state);
1469 acpi_set_WOL(dev);
1471 retval = register_netdev(dev);
1472 if (retval == 0)
1473 return 0;
1475 free_ring:
1476 pci_free_consistent(pdev,
1477 sizeof(struct boom_rx_desc) * RX_RING_SIZE
1478 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
1479 vp->rx_ring,
1480 vp->rx_ring_dma);
1481 free_region:
1482 if (vp->must_free_region)
1483 release_region(ioaddr, vci->io_size);
1484 kfree (dev);
1485 printk(KERN_ERR PFX "vortex_probe1 fails. Returns %d\n", retval);
1486 out:
1487 return retval;
1490 static void
1491 issue_and_wait(struct net_device *dev, int cmd)
1493 int i;
1495 outw(cmd, dev->base_addr + EL3_CMD);
1496 for (i = 0; i < 2000; i++) {
1497 if (!(inw(dev->base_addr + EL3_STATUS) & CmdInProgress))
1498 return;
1501 /* OK, that didn't work. Do it the slow way. One second */
1502 for (i = 0; i < 100000; i++) {
1503 if (!(inw(dev->base_addr + EL3_STATUS) & CmdInProgress)) {
1504 if (vortex_debug > 1)
1505 printk(KERN_INFO "%s: command 0x%04x took %d usecs\n",
1506 dev->name, cmd, i * 10);
1507 return;
1509 udelay(10);
1511 printk(KERN_ERR "%s: command 0x%04x did not complete! Status=0x%x\n",
1512 dev->name, cmd, inw(dev->base_addr + EL3_STATUS));
1515 static void
1516 vortex_up(struct net_device *dev)
1518 long ioaddr = dev->base_addr;
1519 struct vortex_private *vp = (struct vortex_private *)dev->priv;
1520 unsigned int config;
1521 int i;
1523 if (VORTEX_PCI(vp) && vp->enable_wol) {
1524 pci_set_power_state(VORTEX_PCI(vp), 0); /* Go active */
1525 pci_restore_state(VORTEX_PCI(vp), vp->power_state);
1528 /* Before initializing select the active media port. */
1529 EL3WINDOW(3);
1530 config = inl(ioaddr + Wn3_Config);
1532 if (vp->media_override != 7) {
1533 printk(KERN_INFO "%s: Media override to transceiver %d (%s).\n",
1534 dev->name, vp->media_override,
1535 media_tbl[vp->media_override].name);
1536 dev->if_port = vp->media_override;
1537 } else if (vp->autoselect) {
1538 if (vp->has_nway) {
1539 if (vortex_debug > 1)
1540 printk(KERN_INFO "%s: using NWAY device table, not %d\n",
1541 dev->name, dev->if_port);
1542 dev->if_port = XCVR_NWAY;
1543 } else {
1544 /* Find first available media type, starting with 100baseTx. */
1545 dev->if_port = XCVR_100baseTx;
1546 while (! (vp->available_media & media_tbl[dev->if_port].mask))
1547 dev->if_port = media_tbl[dev->if_port].next;
1548 if (vortex_debug > 1)
1549 printk(KERN_INFO "%s: first available media type: %s\n",
1550 dev->name, media_tbl[dev->if_port].name);
1552 } else {
1553 dev->if_port = vp->default_media;
1554 if (vortex_debug > 1)
1555 printk(KERN_INFO "%s: using default media %s\n",
1556 dev->name, media_tbl[dev->if_port].name);
1559 init_timer(&vp->timer);
1560 vp->timer.expires = RUN_AT(media_tbl[dev->if_port].wait);
1561 vp->timer.data = (unsigned long)dev;
1562 vp->timer.function = vortex_timer; /* timer handler */
1563 add_timer(&vp->timer);
1565 init_timer(&vp->rx_oom_timer);
1566 vp->rx_oom_timer.data = (unsigned long)dev;
1567 vp->rx_oom_timer.function = rx_oom_timer;
1569 if (vortex_debug > 1)
1570 printk(KERN_DEBUG "%s: Initial media type %s.\n",
1571 dev->name, media_tbl[dev->if_port].name);
1573 vp->full_duplex = vp->force_fd;
1574 config = BFINS(config, dev->if_port, 20, 4);
1575 if (vortex_debug > 6)
1576 printk(KERN_DEBUG "vortex_up(): writing 0x%x to InternalConfig\n", config);
1577 outl(config, ioaddr + Wn3_Config);
1579 if (dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
1580 int mii_reg1, mii_reg5;
1581 EL3WINDOW(4);
1582 /* Read BMSR (reg1) only to clear old status. */
1583 mii_reg1 = mdio_read(dev, vp->phys[0], 1);
1584 mii_reg5 = mdio_read(dev, vp->phys[0], 5);
1585 if (mii_reg5 == 0xffff || mii_reg5 == 0x0000) {
1586 netif_carrier_off(dev); /* No MII device or no link partner report */
1587 } else {
1588 mii_reg5 &= vp->advertising;
1589 if ((mii_reg5 & 0x0100) != 0 /* 100baseTx-FD */
1590 || (mii_reg5 & 0x00C0) == 0x0040) /* 10T-FD, but not 100-HD */
1591 vp->full_duplex = 1;
1592 netif_carrier_on(dev);
1594 vp->partner_flow_ctrl = ((mii_reg5 & 0x0400) != 0);
1595 if (vortex_debug > 1)
1596 printk(KERN_INFO "%s: MII #%d status %4.4x, link partner capability %4.4x,"
1597 " info1 %04x, setting %s-duplex.\n",
1598 dev->name, vp->phys[0],
1599 mii_reg1, mii_reg5,
1600 vp->info1, ((vp->info1 & 0x8000) || vp->full_duplex) ? "full" : "half");
1601 EL3WINDOW(3);
1604 /* Set the full-duplex bit. */
1605 outw( ((vp->info1 & 0x8000) || vp->full_duplex ? 0x20 : 0) |
1606 (dev->mtu > 1500 ? 0x40 : 0) |
1607 ((vp->full_duplex && vp->flow_ctrl && vp->partner_flow_ctrl) ? 0x100 : 0),
1608 ioaddr + Wn3_MAC_Ctrl);
1610 if (vortex_debug > 1) {
1611 printk(KERN_DEBUG "%s: vortex_up() InternalConfig %8.8x.\n",
1612 dev->name, config);
1615 issue_and_wait(dev, TxReset);
1617 * Don't reset the PHY - that upsets autonegotiation during DHCP operations.
1619 issue_and_wait(dev, RxReset|0x04);
1621 outw(SetStatusEnb | 0x00, ioaddr + EL3_CMD);
1623 if (vortex_debug > 1) {
1624 EL3WINDOW(4);
1625 printk(KERN_DEBUG "%s: vortex_up() irq %d media status %4.4x.\n",
1626 dev->name, dev->irq, inw(ioaddr + Wn4_Media));
1629 /* Set the station address and mask in window 2 each time opened. */
1630 EL3WINDOW(2);
1631 for (i = 0; i < 6; i++)
1632 outb(dev->dev_addr[i], ioaddr + i);
1633 for (; i < 12; i+=2)
1634 outw(0, ioaddr + i);
1636 if (vp->cb_fn_base) {
1637 unsigned short n = inw(ioaddr + Wn2_ResetOptions) & ~0x4010;
1638 if (vp->drv_flags & INVERT_LED_PWR)
1639 n |= 0x10;
1640 if (vp->drv_flags & INVERT_MII_PWR)
1641 n |= 0x4000;
1642 outw(n, ioaddr + Wn2_ResetOptions);
1645 if (dev->if_port == XCVR_10base2)
1646 /* Start the thinnet transceiver. We should really wait 50ms...*/
1647 outw(StartCoax, ioaddr + EL3_CMD);
1648 if (dev->if_port != XCVR_NWAY) {
1649 EL3WINDOW(4);
1650 outw((inw(ioaddr + Wn4_Media) & ~(Media_10TP|Media_SQE)) |
1651 media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
1654 /* Switch to the stats window, and clear all stats by reading. */
1655 outw(StatsDisable, ioaddr + EL3_CMD);
1656 EL3WINDOW(6);
1657 for (i = 0; i < 10; i++)
1658 inb(ioaddr + i);
1659 inw(ioaddr + 10);
1660 inw(ioaddr + 12);
1661 /* New: On the Vortex we must also clear the BadSSD counter. */
1662 EL3WINDOW(4);
1663 inb(ioaddr + 12);
1664 /* ..and on the Boomerang we enable the extra statistics bits. */
1665 outw(0x0040, ioaddr + Wn4_NetDiag);
1667 /* Switch to register set 7 for normal use. */
1668 EL3WINDOW(7);
1670 if (vp->full_bus_master_rx) { /* Boomerang bus master. */
1671 vp->cur_rx = vp->dirty_rx = 0;
1672 /* Initialize the RxEarly register as recommended. */
1673 outw(SetRxThreshold + (1536>>2), ioaddr + EL3_CMD);
1674 outl(0x0020, ioaddr + PktStatus);
1675 outl(vp->rx_ring_dma, ioaddr + UpListPtr);
1677 if (vp->full_bus_master_tx) { /* Boomerang bus master Tx. */
1678 vp->cur_tx = vp->dirty_tx = 0;
1679 if (vp->drv_flags & IS_BOOMERANG)
1680 outb(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold); /* Room for a packet. */
1681 /* Clear the Rx, Tx rings. */
1682 for (i = 0; i < RX_RING_SIZE; i++) /* AKPM: this is done in vortex_open, too */
1683 vp->rx_ring[i].status = 0;
1684 for (i = 0; i < TX_RING_SIZE; i++)
1685 vp->tx_skbuff[i] = 0;
1686 outl(0, ioaddr + DownListPtr);
1688 /* Set receiver mode: presumably accept b-case and phys addr only. */
1689 set_rx_mode(dev);
1690 outw(StatsEnable, ioaddr + EL3_CMD); /* Turn on statistics. */
1692 // issue_and_wait(dev, SetTxStart|0x07ff);
1693 outw(RxEnable, ioaddr + EL3_CMD); /* Enable the receiver. */
1694 outw(TxEnable, ioaddr + EL3_CMD); /* Enable transmitter. */
1695 /* Allow status bits to be seen. */
1696 vp->status_enable = SetStatusEnb | HostError|IntReq|StatsFull|TxComplete|
1697 (vp->full_bus_master_tx ? DownComplete : TxAvailable) |
1698 (vp->full_bus_master_rx ? UpComplete : RxComplete) |
1699 (vp->bus_master ? DMADone : 0);
1700 vp->intr_enable = SetIntrEnb | IntLatch | TxAvailable |
1701 (vp->full_bus_master_rx ? 0 : RxComplete) |
1702 StatsFull | HostError | TxComplete | IntReq
1703 | (vp->bus_master ? DMADone : 0) | UpComplete | DownComplete;
1704 outw(vp->status_enable, ioaddr + EL3_CMD);
1705 /* Ack all pending events, and set active indicator mask. */
1706 outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
1707 ioaddr + EL3_CMD);
1708 outw(vp->intr_enable, ioaddr + EL3_CMD);
1709 if (vp->cb_fn_base) /* The PCMCIA people are idiots. */
1710 writel(0x8000, vp->cb_fn_base + 4);
1711 netif_start_queue (dev);
1714 static int
1715 vortex_open(struct net_device *dev)
1717 struct vortex_private *vp = (struct vortex_private *)dev->priv;
1718 int i;
1719 int retval;
1721 /* Use the now-standard shared IRQ implementation. */
1722 if ((retval = request_irq(dev->irq, vp->full_bus_master_rx ?
1723 &boomerang_interrupt : &vortex_interrupt, SA_SHIRQ, dev->name, dev))) {
1724 printk(KERN_ERR "%s: Could not reserve IRQ %d\n", dev->name, dev->irq);
1725 goto out;
1728 if (vp->full_bus_master_rx) { /* Boomerang bus master. */
1729 if (vortex_debug > 2)
1730 printk(KERN_DEBUG "%s: Filling in the Rx ring.\n", dev->name);
1731 for (i = 0; i < RX_RING_SIZE; i++) {
1732 struct sk_buff *skb;
1733 vp->rx_ring[i].next = cpu_to_le32(vp->rx_ring_dma + sizeof(struct boom_rx_desc) * (i+1));
1734 vp->rx_ring[i].status = 0; /* Clear complete bit. */
1735 vp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ | LAST_FRAG);
1736 skb = dev_alloc_skb(PKT_BUF_SZ);
1737 vp->rx_skbuff[i] = skb;
1738 if (skb == NULL)
1739 break; /* Bad news! */
1740 skb->dev = dev; /* Mark as being used by this device. */
1741 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1742 vp->rx_ring[i].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->tail, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
1744 if (i != RX_RING_SIZE) {
1745 int j;
1746 printk(KERN_EMERG "%s: no memory for rx ring\n", dev->name);
1747 for (j = 0; j < i; j++) {
1748 if (vp->rx_skbuff[j]) {
1749 dev_kfree_skb(vp->rx_skbuff[j]);
1750 vp->rx_skbuff[j] = 0;
1753 retval = -ENOMEM;
1754 goto out_free_irq;
1756 /* Wrap the ring. */
1757 vp->rx_ring[i-1].next = cpu_to_le32(vp->rx_ring_dma);
1760 vortex_up(dev);
1761 return 0;
1763 out_free_irq:
1764 free_irq(dev->irq, dev);
1765 out:
1766 if (vortex_debug > 1)
1767 printk(KERN_ERR "%s: vortex_open() fails: returning %d\n", dev->name, retval);
1768 return retval;
1771 static void
1772 vortex_timer(unsigned long data)
1774 struct net_device *dev = (struct net_device *)data;
1775 struct vortex_private *vp = (struct vortex_private *)dev->priv;
1776 long ioaddr = dev->base_addr;
1777 int next_tick = 60*HZ;
1778 int ok = 0;
1779 int media_status, mii_status, old_window;
1781 if (vortex_debug > 2) {
1782 printk(KERN_DEBUG "%s: Media selection timer tick happened, %s.\n",
1783 dev->name, media_tbl[dev->if_port].name);
1784 printk(KERN_DEBUG "dev->watchdog_timeo=%d\n", dev->watchdog_timeo);
1787 if (vp->medialock)
1788 goto leave_media_alone;
1789 disable_irq(dev->irq);
1790 old_window = inw(ioaddr + EL3_CMD) >> 13;
1791 EL3WINDOW(4);
1792 media_status = inw(ioaddr + Wn4_Media);
1793 switch (dev->if_port) {
1794 case XCVR_10baseT: case XCVR_100baseTx: case XCVR_100baseFx:
1795 if (media_status & Media_LnkBeat) {
1796 netif_carrier_on(dev);
1797 ok = 1;
1798 if (vortex_debug > 1)
1799 printk(KERN_DEBUG "%s: Media %s has link beat, %x.\n",
1800 dev->name, media_tbl[dev->if_port].name, media_status);
1801 } else {
1802 netif_carrier_off(dev);
1803 if (vortex_debug > 1) {
1804 printk(KERN_DEBUG "%s: Media %s has no link beat, %x.\n",
1805 dev->name, media_tbl[dev->if_port].name, media_status);
1808 break;
1809 case XCVR_MII: case XCVR_NWAY:
1811 mii_status = mdio_read(dev, vp->phys[0], 1);
1812 ok = 1;
1813 if (vortex_debug > 2)
1814 printk(KERN_DEBUG "%s: MII transceiver has status %4.4x.\n",
1815 dev->name, mii_status);
1816 if (mii_status & BMSR_LSTATUS) {
1817 int mii_reg5 = mdio_read(dev, vp->phys[0], 5);
1818 if (! vp->force_fd && mii_reg5 != 0xffff) {
1819 int duplex;
1821 mii_reg5 &= vp->advertising;
1822 duplex = (mii_reg5&0x0100) || (mii_reg5 & 0x01C0) == 0x0040;
1823 if (vp->full_duplex != duplex) {
1824 vp->full_duplex = duplex;
1825 printk(KERN_INFO "%s: Setting %s-duplex based on MII "
1826 "#%d link partner capability of %4.4x.\n",
1827 dev->name, vp->full_duplex ? "full" : "half",
1828 vp->phys[0], mii_reg5);
1829 /* Set the full-duplex bit. */
1830 EL3WINDOW(3);
1831 outw( (vp->full_duplex ? 0x20 : 0) |
1832 (dev->mtu > 1500 ? 0x40 : 0) |
1833 ((vp->full_duplex && vp->flow_ctrl && vp->partner_flow_ctrl) ? 0x100 : 0),
1834 ioaddr + Wn3_MAC_Ctrl);
1835 if (vortex_debug > 1)
1836 printk(KERN_DEBUG "Setting duplex in Wn3_MAC_Ctrl\n");
1837 /* AKPM: bug: should reset Tx and Rx after setting Duplex. Page 180 */
1840 netif_carrier_on(dev);
1841 } else {
1842 netif_carrier_off(dev);
1845 break;
1846 default: /* Other media types handled by Tx timeouts. */
1847 if (vortex_debug > 1)
1848 printk(KERN_DEBUG "%s: Media %s has no indication, %x.\n",
1849 dev->name, media_tbl[dev->if_port].name, media_status);
1850 ok = 1;
1852 if ( ! ok) {
1853 unsigned int config;
1855 do {
1856 dev->if_port = media_tbl[dev->if_port].next;
1857 } while ( ! (vp->available_media & media_tbl[dev->if_port].mask));
1858 if (dev->if_port == XCVR_Default) { /* Go back to default. */
1859 dev->if_port = vp->default_media;
1860 if (vortex_debug > 1)
1861 printk(KERN_DEBUG "%s: Media selection failing, using default "
1862 "%s port.\n",
1863 dev->name, media_tbl[dev->if_port].name);
1864 } else {
1865 if (vortex_debug > 1)
1866 printk(KERN_DEBUG "%s: Media selection failed, now trying "
1867 "%s port.\n",
1868 dev->name, media_tbl[dev->if_port].name);
1869 next_tick = media_tbl[dev->if_port].wait;
1871 outw((media_status & ~(Media_10TP|Media_SQE)) |
1872 media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
1874 EL3WINDOW(3);
1875 config = inl(ioaddr + Wn3_Config);
1876 config = BFINS(config, dev->if_port, 20, 4);
1877 outl(config, ioaddr + Wn3_Config);
1879 outw(dev->if_port == XCVR_10base2 ? StartCoax : StopCoax,
1880 ioaddr + EL3_CMD);
1881 if (vortex_debug > 1)
1882 printk(KERN_DEBUG "wrote 0x%08x to Wn3_Config\n", config);
1883 /* AKPM: FIXME: Should reset Rx & Tx here. P60 of 3c90xc.pdf */
1885 EL3WINDOW(old_window);
1886 enable_irq(dev->irq);
1888 leave_media_alone:
1889 if (vortex_debug > 2)
1890 printk(KERN_DEBUG "%s: Media selection timer finished, %s.\n",
1891 dev->name, media_tbl[dev->if_port].name);
1893 mod_timer(&vp->timer, RUN_AT(next_tick));
1894 if (vp->deferred)
1895 outw(FakeIntr, ioaddr + EL3_CMD);
1896 return;
1899 static void vortex_tx_timeout(struct net_device *dev)
1901 struct vortex_private *vp = (struct vortex_private *)dev->priv;
1902 long ioaddr = dev->base_addr;
1904 printk(KERN_ERR "%s: transmit timed out, tx_status %2.2x status %4.4x.\n",
1905 dev->name, inb(ioaddr + TxStatus),
1906 inw(ioaddr + EL3_STATUS));
1907 EL3WINDOW(4);
1908 printk(KERN_ERR " diagnostics: net %04x media %04x dma %08x fifo %04x\n",
1909 inw(ioaddr + Wn4_NetDiag),
1910 inw(ioaddr + Wn4_Media),
1911 inl(ioaddr + PktStatus),
1912 inw(ioaddr + Wn4_FIFODiag));
1913 /* Slight code bloat to be user friendly. */
1914 if ((inb(ioaddr + TxStatus) & 0x88) == 0x88)
1915 printk(KERN_ERR "%s: Transmitter encountered 16 collisions --"
1916 " network cable problem?\n", dev->name);
1917 if (inw(ioaddr + EL3_STATUS) & IntLatch) {
1918 printk(KERN_ERR "%s: Interrupt posted but not delivered --"
1919 " IRQ blocked by another device?\n", dev->name);
1920 /* Bad idea here.. but we might as well handle a few events. */
1923 * Block interrupts because vortex_interrupt does a bare spin_lock()
1925 unsigned long flags;
1926 local_irq_save(flags);
1927 if (vp->full_bus_master_tx)
1928 boomerang_interrupt(dev->irq, dev, 0);
1929 else
1930 vortex_interrupt(dev->irq, dev, 0);
1931 local_irq_restore(flags);
1935 if (vortex_debug > 0)
1936 dump_tx_ring(dev);
1938 issue_and_wait(dev, TxReset);
1940 vp->stats.tx_errors++;
1941 if (vp->full_bus_master_tx) {
1942 printk(KERN_DEBUG "%s: Resetting the Tx ring pointer.\n", dev->name);
1943 if (vp->cur_tx - vp->dirty_tx > 0 && inl(ioaddr + DownListPtr) == 0)
1944 outl(vp->tx_ring_dma + (vp->dirty_tx % TX_RING_SIZE) * sizeof(struct boom_tx_desc),
1945 ioaddr + DownListPtr);
1946 if (vp->cur_tx - vp->dirty_tx < TX_RING_SIZE)
1947 netif_wake_queue (dev);
1948 if (vp->drv_flags & IS_BOOMERANG)
1949 outb(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold);
1950 outw(DownUnstall, ioaddr + EL3_CMD);
1951 } else {
1952 vp->stats.tx_dropped++;
1953 netif_wake_queue(dev);
1956 /* Issue Tx Enable */
1957 outw(TxEnable, ioaddr + EL3_CMD);
1958 dev->trans_start = jiffies;
1960 /* Switch to register set 7 for normal use. */
1961 EL3WINDOW(7);
1965 * Handle uncommon interrupt sources. This is a separate routine to minimize
1966 * the cache impact.
1968 static void
1969 vortex_error(struct net_device *dev, int status)
1971 struct vortex_private *vp = (struct vortex_private *)dev->priv;
1972 long ioaddr = dev->base_addr;
1973 int do_tx_reset = 0, reset_mask = 0;
1974 unsigned char tx_status = 0;
1976 if (vortex_debug > 2) {
1977 printk(KERN_ERR "%s: vortex_error(), status=0x%x\n", dev->name, status);
1980 if (status & TxComplete) { /* Really "TxError" for us. */
1981 tx_status = inb(ioaddr + TxStatus);
1982 /* Presumably a tx-timeout. We must merely re-enable. */
1983 if (vortex_debug > 2
1984 || (tx_status != 0x88 && vortex_debug > 0)) {
1985 printk(KERN_ERR "%s: Transmit error, Tx status register %2.2x.\n",
1986 dev->name, tx_status);
1987 if (tx_status == 0x82) {
1988 printk(KERN_ERR "Probably a duplex mismatch. See "
1989 "Documentation/networking/vortex.txt\n");
1991 dump_tx_ring(dev);
1993 if (tx_status & 0x14) vp->stats.tx_fifo_errors++;
1994 if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
1995 outb(0, ioaddr + TxStatus);
1996 if (tx_status & 0x30) { /* txJabber or txUnderrun */
1997 do_tx_reset = 1;
1998 } else if ((tx_status & 0x08) && (vp->drv_flags & MAX_COLLISION_RESET)) { /* maxCollisions */
1999 do_tx_reset = 1;
2000 reset_mask = 0x0108; /* Reset interface logic, but not download logic */
2001 } else { /* Merely re-enable the transmitter. */
2002 outw(TxEnable, ioaddr + EL3_CMD);
2006 if (status & RxEarly) { /* Rx early is unused. */
2007 vortex_rx(dev);
2008 outw(AckIntr | RxEarly, ioaddr + EL3_CMD);
2010 if (status & StatsFull) { /* Empty statistics. */
2011 static int DoneDidThat;
2012 if (vortex_debug > 4)
2013 printk(KERN_DEBUG "%s: Updating stats.\n", dev->name);
2014 update_stats(ioaddr, dev);
2015 /* HACK: Disable statistics as an interrupt source. */
2016 /* This occurs when we have the wrong media type! */
2017 if (DoneDidThat == 0 &&
2018 inw(ioaddr + EL3_STATUS) & StatsFull) {
2019 printk(KERN_WARNING "%s: Updating statistics failed, disabling "
2020 "stats as an interrupt source.\n", dev->name);
2021 EL3WINDOW(5);
2022 outw(SetIntrEnb | (inw(ioaddr + 10) & ~StatsFull), ioaddr + EL3_CMD);
2023 vp->intr_enable &= ~StatsFull;
2024 EL3WINDOW(7);
2025 DoneDidThat++;
2028 if (status & IntReq) { /* Restore all interrupt sources. */
2029 outw(vp->status_enable, ioaddr + EL3_CMD);
2030 outw(vp->intr_enable, ioaddr + EL3_CMD);
2032 if (status & HostError) {
2033 u16 fifo_diag;
2034 EL3WINDOW(4);
2035 fifo_diag = inw(ioaddr + Wn4_FIFODiag);
2036 printk(KERN_ERR "%s: Host error, FIFO diagnostic register %4.4x.\n",
2037 dev->name, fifo_diag);
2038 /* Adapter failure requires Tx/Rx reset and reinit. */
2039 if (vp->full_bus_master_tx) {
2040 int bus_status = inl(ioaddr + PktStatus);
2041 /* 0x80000000 PCI master abort. */
2042 /* 0x40000000 PCI target abort. */
2043 if (vortex_debug)
2044 printk(KERN_ERR "%s: PCI bus error, bus status %8.8x\n", dev->name, bus_status);
2046 /* In this case, blow the card away */
2047 vortex_down(dev);
2048 issue_and_wait(dev, TotalReset | 0xff);
2049 vortex_up(dev); /* AKPM: bug. vortex_up() assumes that the rx ring is full. It may not be. */
2050 } else if (fifo_diag & 0x0400)
2051 do_tx_reset = 1;
2052 if (fifo_diag & 0x3000) {
2053 /* Reset Rx fifo and upload logic */
2054 issue_and_wait(dev, RxReset|0x07);
2055 /* Set the Rx filter to the current state. */
2056 set_rx_mode(dev);
2057 outw(RxEnable, ioaddr + EL3_CMD); /* Re-enable the receiver. */
2058 outw(AckIntr | HostError, ioaddr + EL3_CMD);
2062 if (do_tx_reset) {
2063 issue_and_wait(dev, TxReset|reset_mask);
2064 outw(TxEnable, ioaddr + EL3_CMD);
2065 if (!vp->full_bus_master_tx)
2066 netif_wake_queue(dev);
2070 static int
2071 vortex_start_xmit(struct sk_buff *skb, struct net_device *dev)
2073 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2074 long ioaddr = dev->base_addr;
2076 /* Put out the doubleword header... */
2077 outl(skb->len, ioaddr + TX_FIFO);
2078 if (vp->bus_master) {
2079 /* Set the bus-master controller to transfer the packet. */
2080 int len = (skb->len + 3) & ~3;
2081 outl( vp->tx_skb_dma = pci_map_single(VORTEX_PCI(vp), skb->data, len, PCI_DMA_TODEVICE),
2082 ioaddr + Wn7_MasterAddr);
2083 outw(len, ioaddr + Wn7_MasterLen);
2084 vp->tx_skb = skb;
2085 outw(StartDMADown, ioaddr + EL3_CMD);
2086 /* netif_wake_queue() will be called at the DMADone interrupt. */
2087 } else {
2088 /* ... and the packet rounded to a doubleword. */
2089 outsl(ioaddr + TX_FIFO, skb->data, (skb->len + 3) >> 2);
2090 dev_kfree_skb (skb);
2091 if (inw(ioaddr + TxFree) > 1536) {
2092 netif_start_queue (dev); /* AKPM: redundant? */
2093 } else {
2094 /* Interrupt us when the FIFO has room for max-sized packet. */
2095 netif_stop_queue(dev);
2096 outw(SetTxThreshold + (1536>>2), ioaddr + EL3_CMD);
2100 dev->trans_start = jiffies;
2102 /* Clear the Tx status stack. */
2104 int tx_status;
2105 int i = 32;
2107 while (--i > 0 && (tx_status = inb(ioaddr + TxStatus)) > 0) {
2108 if (tx_status & 0x3C) { /* A Tx-disabling error occurred. */
2109 if (vortex_debug > 2)
2110 printk(KERN_DEBUG "%s: Tx error, status %2.2x.\n",
2111 dev->name, tx_status);
2112 if (tx_status & 0x04) vp->stats.tx_fifo_errors++;
2113 if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
2114 if (tx_status & 0x30) {
2115 issue_and_wait(dev, TxReset);
2117 outw(TxEnable, ioaddr + EL3_CMD);
2119 outb(0x00, ioaddr + TxStatus); /* Pop the status stack. */
2122 return 0;
2125 static int
2126 boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev)
2128 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2129 long ioaddr = dev->base_addr;
2130 /* Calculate the next Tx descriptor entry. */
2131 int entry = vp->cur_tx % TX_RING_SIZE;
2132 struct boom_tx_desc *prev_entry = &vp->tx_ring[(vp->cur_tx-1) % TX_RING_SIZE];
2133 unsigned long flags;
2135 if (vortex_debug > 6) {
2136 printk(KERN_DEBUG "boomerang_start_xmit()\n");
2137 if (vortex_debug > 3)
2138 printk(KERN_DEBUG "%s: Trying to send a packet, Tx index %d.\n",
2139 dev->name, vp->cur_tx);
2142 if (vp->cur_tx - vp->dirty_tx >= TX_RING_SIZE) {
2143 if (vortex_debug > 0)
2144 printk(KERN_WARNING "%s: BUG! Tx Ring full, refusing to send buffer.\n",
2145 dev->name);
2146 netif_stop_queue(dev);
2147 return 1;
2150 vp->tx_skbuff[entry] = skb;
2152 vp->tx_ring[entry].next = 0;
2153 #if DO_ZEROCOPY
2154 if (skb->ip_summed != CHECKSUM_HW)
2155 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2156 else
2157 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded | AddTCPChksum | AddUDPChksum);
2159 if (!skb_shinfo(skb)->nr_frags) {
2160 vp->tx_ring[entry].frag[0].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data,
2161 skb->len, PCI_DMA_TODEVICE));
2162 vp->tx_ring[entry].frag[0].length = cpu_to_le32(skb->len | LAST_FRAG);
2163 } else {
2164 int i;
2166 vp->tx_ring[entry].frag[0].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data,
2167 skb->len-skb->data_len, PCI_DMA_TODEVICE));
2168 vp->tx_ring[entry].frag[0].length = cpu_to_le32(skb->len-skb->data_len);
2170 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2171 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2173 vp->tx_ring[entry].frag[i+1].addr =
2174 cpu_to_le32(pci_map_single(VORTEX_PCI(vp),
2175 (void*)page_address(frag->page) + frag->page_offset,
2176 frag->size, PCI_DMA_TODEVICE));
2178 if (i == skb_shinfo(skb)->nr_frags-1)
2179 vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(frag->size|LAST_FRAG);
2180 else
2181 vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(frag->size);
2184 #else
2185 vp->tx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, skb->len, PCI_DMA_TODEVICE));
2186 vp->tx_ring[entry].length = cpu_to_le32(skb->len | LAST_FRAG);
2187 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2188 #endif
2190 spin_lock_irqsave(&vp->lock, flags);
2191 /* Wait for the stall to complete. */
2192 issue_and_wait(dev, DownStall);
2193 prev_entry->next = cpu_to_le32(vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc));
2194 if (inl(ioaddr + DownListPtr) == 0) {
2195 outl(vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc), ioaddr + DownListPtr);
2196 vp->queued_packet++;
2199 vp->cur_tx++;
2200 if (vp->cur_tx - vp->dirty_tx > TX_RING_SIZE - 1) {
2201 netif_stop_queue (dev);
2202 } else { /* Clear previous interrupt enable. */
2203 #if defined(tx_interrupt_mitigation)
2204 /* Dubious. If in boomeang_interrupt "faster" cyclone ifdef
2205 * were selected, this would corrupt DN_COMPLETE. No?
2207 prev_entry->status &= cpu_to_le32(~TxIntrUploaded);
2208 #endif
2210 outw(DownUnstall, ioaddr + EL3_CMD);
2211 spin_unlock_irqrestore(&vp->lock, flags);
2212 dev->trans_start = jiffies;
2213 return 0;
2216 /* The interrupt handler does all of the Rx thread work and cleans up
2217 after the Tx thread. */
2220 * This is the ISR for the vortex series chips.
2221 * full_bus_master_tx == 0 && full_bus_master_rx == 0
2224 static irqreturn_t
2225 vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2227 struct net_device *dev = dev_id;
2228 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2229 long ioaddr;
2230 int status;
2231 int work_done = max_interrupt_work;
2232 int handled = 0;
2234 ioaddr = dev->base_addr;
2235 spin_lock(&vp->lock);
2237 status = inw(ioaddr + EL3_STATUS);
2239 if (vortex_debug > 6)
2240 printk("vortex_interrupt(). status=0x%4x\n", status);
2242 if ((status & IntLatch) == 0)
2243 goto handler_exit; /* No interrupt: shared IRQs cause this */
2244 handled = 1;
2246 if (status & IntReq) {
2247 status |= vp->deferred;
2248 vp->deferred = 0;
2251 if (status == 0xffff) /* h/w no longer present (hotplug)? */
2252 goto handler_exit;
2254 if (vortex_debug > 4)
2255 printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n",
2256 dev->name, status, inb(ioaddr + Timer));
2258 do {
2259 if (vortex_debug > 5)
2260 printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n",
2261 dev->name, status);
2262 if (status & RxComplete)
2263 vortex_rx(dev);
2265 if (status & TxAvailable) {
2266 if (vortex_debug > 5)
2267 printk(KERN_DEBUG " TX room bit was handled.\n");
2268 /* There's room in the FIFO for a full-sized packet. */
2269 outw(AckIntr | TxAvailable, ioaddr + EL3_CMD);
2270 netif_wake_queue (dev);
2273 if (status & DMADone) {
2274 if (inw(ioaddr + Wn7_MasterStatus) & 0x1000) {
2275 outw(0x1000, ioaddr + Wn7_MasterStatus); /* Ack the event. */
2276 pci_unmap_single(VORTEX_PCI(vp), vp->tx_skb_dma, (vp->tx_skb->len + 3) & ~3, PCI_DMA_TODEVICE);
2277 dev_kfree_skb_irq(vp->tx_skb); /* Release the transferred buffer */
2278 if (inw(ioaddr + TxFree) > 1536) {
2280 * AKPM: FIXME: I don't think we need this. If the queue was stopped due to
2281 * insufficient FIFO room, the TxAvailable test will succeed and call
2282 * netif_wake_queue()
2284 netif_wake_queue(dev);
2285 } else { /* Interrupt when FIFO has room for max-sized packet. */
2286 outw(SetTxThreshold + (1536>>2), ioaddr + EL3_CMD);
2287 netif_stop_queue(dev);
2291 /* Check for all uncommon interrupts at once. */
2292 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq)) {
2293 if (status == 0xffff)
2294 break;
2295 vortex_error(dev, status);
2298 if (--work_done < 0) {
2299 printk(KERN_WARNING "%s: Too much work in interrupt, status "
2300 "%4.4x.\n", dev->name, status);
2301 /* Disable all pending interrupts. */
2302 do {
2303 vp->deferred |= status;
2304 outw(SetStatusEnb | (~vp->deferred & vp->status_enable),
2305 ioaddr + EL3_CMD);
2306 outw(AckIntr | (vp->deferred & 0x7ff), ioaddr + EL3_CMD);
2307 } while ((status = inw(ioaddr + EL3_CMD)) & IntLatch);
2308 /* The timer will reenable interrupts. */
2309 mod_timer(&vp->timer, jiffies + 1*HZ);
2310 break;
2312 /* Acknowledge the IRQ. */
2313 outw(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
2314 } while ((status = inw(ioaddr + EL3_STATUS)) & (IntLatch | RxComplete));
2316 if (vortex_debug > 4)
2317 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n",
2318 dev->name, status);
2319 handler_exit:
2320 spin_unlock(&vp->lock);
2321 return IRQ_RETVAL(handled);
2325 * This is the ISR for the boomerang series chips.
2326 * full_bus_master_tx == 1 && full_bus_master_rx == 1
2329 static irqreturn_t
2330 boomerang_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2332 struct net_device *dev = dev_id;
2333 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2334 long ioaddr;
2335 int status;
2336 int work_done = max_interrupt_work;
2338 ioaddr = dev->base_addr;
2341 * It seems dopey to put the spinlock this early, but we could race against vortex_tx_timeout
2342 * and boomerang_start_xmit
2344 spin_lock(&vp->lock);
2346 status = inw(ioaddr + EL3_STATUS);
2348 if (vortex_debug > 6)
2349 printk(KERN_DEBUG "boomerang_interrupt. status=0x%4x\n", status);
2351 if ((status & IntLatch) == 0)
2352 goto handler_exit; /* No interrupt: shared IRQs can cause this */
2354 if (status == 0xffff) { /* h/w no longer present (hotplug)? */
2355 if (vortex_debug > 1)
2356 printk(KERN_DEBUG "boomerang_interrupt(1): status = 0xffff\n");
2357 goto handler_exit;
2360 if (status & IntReq) {
2361 status |= vp->deferred;
2362 vp->deferred = 0;
2365 if (vortex_debug > 4)
2366 printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n",
2367 dev->name, status, inb(ioaddr + Timer));
2368 do {
2369 if (vortex_debug > 5)
2370 printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n",
2371 dev->name, status);
2372 if (status & UpComplete) {
2373 outw(AckIntr | UpComplete, ioaddr + EL3_CMD);
2374 if (vortex_debug > 5)
2375 printk(KERN_DEBUG "boomerang_interrupt->boomerang_rx\n");
2376 boomerang_rx(dev);
2379 if (status & DownComplete) {
2380 unsigned int dirty_tx = vp->dirty_tx;
2382 outw(AckIntr | DownComplete, ioaddr + EL3_CMD);
2383 while (vp->cur_tx - dirty_tx > 0) {
2384 int entry = dirty_tx % TX_RING_SIZE;
2385 #if 1 /* AKPM: the latter is faster, but cyclone-only */
2386 if (inl(ioaddr + DownListPtr) ==
2387 vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc))
2388 break; /* It still hasn't been processed. */
2389 #else
2390 if ((vp->tx_ring[entry].status & DN_COMPLETE) == 0)
2391 break; /* It still hasn't been processed. */
2392 #endif
2394 if (vp->tx_skbuff[entry]) {
2395 struct sk_buff *skb = vp->tx_skbuff[entry];
2396 #if DO_ZEROCOPY
2397 int i;
2398 for (i=0; i<=skb_shinfo(skb)->nr_frags; i++)
2399 pci_unmap_single(VORTEX_PCI(vp),
2400 le32_to_cpu(vp->tx_ring[entry].frag[i].addr),
2401 le32_to_cpu(vp->tx_ring[entry].frag[i].length)&0xFFF,
2402 PCI_DMA_TODEVICE);
2403 #else
2404 pci_unmap_single(VORTEX_PCI(vp),
2405 le32_to_cpu(vp->tx_ring[entry].addr), skb->len, PCI_DMA_TODEVICE);
2406 #endif
2407 dev_kfree_skb_irq(skb);
2408 vp->tx_skbuff[entry] = 0;
2409 } else {
2410 printk(KERN_DEBUG "boomerang_interrupt: no skb!\n");
2412 /* vp->stats.tx_packets++; Counted below. */
2413 dirty_tx++;
2415 vp->dirty_tx = dirty_tx;
2416 if (vp->cur_tx - dirty_tx <= TX_RING_SIZE - 1) {
2417 if (vortex_debug > 6)
2418 printk(KERN_DEBUG "boomerang_interrupt: wake queue\n");
2419 netif_wake_queue (dev);
2423 /* Check for all uncommon interrupts at once. */
2424 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq))
2425 vortex_error(dev, status);
2427 if (--work_done < 0) {
2428 printk(KERN_WARNING "%s: Too much work in interrupt, status "
2429 "%4.4x.\n", dev->name, status);
2430 /* Disable all pending interrupts. */
2431 do {
2432 vp->deferred |= status;
2433 outw(SetStatusEnb | (~vp->deferred & vp->status_enable),
2434 ioaddr + EL3_CMD);
2435 outw(AckIntr | (vp->deferred & 0x7ff), ioaddr + EL3_CMD);
2436 } while ((status = inw(ioaddr + EL3_CMD)) & IntLatch);
2437 /* The timer will reenable interrupts. */
2438 mod_timer(&vp->timer, jiffies + 1*HZ);
2439 break;
2441 /* Acknowledge the IRQ. */
2442 outw(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
2443 if (vp->cb_fn_base) /* The PCMCIA people are idiots. */
2444 writel(0x8000, vp->cb_fn_base + 4);
2446 } while ((status = inw(ioaddr + EL3_STATUS)) & IntLatch);
2448 if (vortex_debug > 4)
2449 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n",
2450 dev->name, status);
2451 handler_exit:
2452 spin_unlock(&vp->lock);
2453 return IRQ_HANDLED;
2456 static int vortex_rx(struct net_device *dev)
2458 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2459 long ioaddr = dev->base_addr;
2460 int i;
2461 short rx_status;
2463 if (vortex_debug > 5)
2464 printk(KERN_DEBUG "vortex_rx(): status %4.4x, rx_status %4.4x.\n",
2465 inw(ioaddr+EL3_STATUS), inw(ioaddr+RxStatus));
2466 while ((rx_status = inw(ioaddr + RxStatus)) > 0) {
2467 if (rx_status & 0x4000) { /* Error, update stats. */
2468 unsigned char rx_error = inb(ioaddr + RxErrors);
2469 if (vortex_debug > 2)
2470 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2471 vp->stats.rx_errors++;
2472 if (rx_error & 0x01) vp->stats.rx_over_errors++;
2473 if (rx_error & 0x02) vp->stats.rx_length_errors++;
2474 if (rx_error & 0x04) vp->stats.rx_frame_errors++;
2475 if (rx_error & 0x08) vp->stats.rx_crc_errors++;
2476 if (rx_error & 0x10) vp->stats.rx_length_errors++;
2477 } else {
2478 /* The packet length: up to 4.5K!. */
2479 int pkt_len = rx_status & 0x1fff;
2480 struct sk_buff *skb;
2482 skb = dev_alloc_skb(pkt_len + 5);
2483 if (vortex_debug > 4)
2484 printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n",
2485 pkt_len, rx_status);
2486 if (skb != NULL) {
2487 skb->dev = dev;
2488 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2489 /* 'skb_put()' points to the start of sk_buff data area. */
2490 if (vp->bus_master &&
2491 ! (inw(ioaddr + Wn7_MasterStatus) & 0x8000)) {
2492 dma_addr_t dma = pci_map_single(VORTEX_PCI(vp), skb_put(skb, pkt_len),
2493 pkt_len, PCI_DMA_FROMDEVICE);
2494 outl(dma, ioaddr + Wn7_MasterAddr);
2495 outw((skb->len + 3) & ~3, ioaddr + Wn7_MasterLen);
2496 outw(StartDMAUp, ioaddr + EL3_CMD);
2497 while (inw(ioaddr + Wn7_MasterStatus) & 0x8000)
2499 pci_unmap_single(VORTEX_PCI(vp), dma, pkt_len, PCI_DMA_FROMDEVICE);
2500 } else {
2501 insl(ioaddr + RX_FIFO, skb_put(skb, pkt_len),
2502 (pkt_len + 3) >> 2);
2504 outw(RxDiscard, ioaddr + EL3_CMD); /* Pop top Rx packet. */
2505 skb->protocol = eth_type_trans(skb, dev);
2506 netif_rx(skb);
2507 dev->last_rx = jiffies;
2508 vp->stats.rx_packets++;
2509 /* Wait a limited time to go to next packet. */
2510 for (i = 200; i >= 0; i--)
2511 if ( ! (inw(ioaddr + EL3_STATUS) & CmdInProgress))
2512 break;
2513 continue;
2514 } else if (vortex_debug > 0)
2515 printk(KERN_NOTICE "%s: No memory to allocate a sk_buff of "
2516 "size %d.\n", dev->name, pkt_len);
2518 vp->stats.rx_dropped++;
2519 issue_and_wait(dev, RxDiscard);
2522 return 0;
2525 static int
2526 boomerang_rx(struct net_device *dev)
2528 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2529 int entry = vp->cur_rx % RX_RING_SIZE;
2530 long ioaddr = dev->base_addr;
2531 int rx_status;
2532 int rx_work_limit = vp->dirty_rx + RX_RING_SIZE - vp->cur_rx;
2534 if (vortex_debug > 5)
2535 printk(KERN_DEBUG "boomerang_rx(): status %4.4x\n", inw(ioaddr+EL3_STATUS));
2537 while ((rx_status = le32_to_cpu(vp->rx_ring[entry].status)) & RxDComplete){
2538 if (--rx_work_limit < 0)
2539 break;
2540 if (rx_status & RxDError) { /* Error, update stats. */
2541 unsigned char rx_error = rx_status >> 16;
2542 if (vortex_debug > 2)
2543 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2544 vp->stats.rx_errors++;
2545 if (rx_error & 0x01) vp->stats.rx_over_errors++;
2546 if (rx_error & 0x02) vp->stats.rx_length_errors++;
2547 if (rx_error & 0x04) vp->stats.rx_frame_errors++;
2548 if (rx_error & 0x08) vp->stats.rx_crc_errors++;
2549 if (rx_error & 0x10) vp->stats.rx_length_errors++;
2550 } else {
2551 /* The packet length: up to 4.5K!. */
2552 int pkt_len = rx_status & 0x1fff;
2553 struct sk_buff *skb;
2554 dma_addr_t dma = le32_to_cpu(vp->rx_ring[entry].addr);
2556 if (vortex_debug > 4)
2557 printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n",
2558 pkt_len, rx_status);
2560 /* Check if the packet is long enough to just accept without
2561 copying to a properly sized skbuff. */
2562 if (pkt_len < rx_copybreak && (skb = dev_alloc_skb(pkt_len + 2)) != 0) {
2563 skb->dev = dev;
2564 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2565 pci_dma_sync_single(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2566 /* 'skb_put()' points to the start of sk_buff data area. */
2567 memcpy(skb_put(skb, pkt_len),
2568 vp->rx_skbuff[entry]->tail,
2569 pkt_len);
2570 vp->rx_copy++;
2571 } else {
2572 /* Pass up the skbuff already on the Rx ring. */
2573 skb = vp->rx_skbuff[entry];
2574 vp->rx_skbuff[entry] = NULL;
2575 skb_put(skb, pkt_len);
2576 pci_unmap_single(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2577 vp->rx_nocopy++;
2579 skb->protocol = eth_type_trans(skb, dev);
2580 { /* Use hardware checksum info. */
2581 int csum_bits = rx_status & 0xee000000;
2582 if (csum_bits &&
2583 (csum_bits == (IPChksumValid | TCPChksumValid) ||
2584 csum_bits == (IPChksumValid | UDPChksumValid))) {
2585 skb->ip_summed = CHECKSUM_UNNECESSARY;
2586 vp->rx_csumhits++;
2589 netif_rx(skb);
2590 dev->last_rx = jiffies;
2591 vp->stats.rx_packets++;
2593 entry = (++vp->cur_rx) % RX_RING_SIZE;
2595 /* Refill the Rx ring buffers. */
2596 for (; vp->cur_rx - vp->dirty_rx > 0; vp->dirty_rx++) {
2597 struct sk_buff *skb;
2598 entry = vp->dirty_rx % RX_RING_SIZE;
2599 if (vp->rx_skbuff[entry] == NULL) {
2600 skb = dev_alloc_skb(PKT_BUF_SZ);
2601 if (skb == NULL) {
2602 static unsigned long last_jif;
2603 if ((jiffies - last_jif) > 10 * HZ) {
2604 printk(KERN_WARNING "%s: memory shortage\n", dev->name);
2605 last_jif = jiffies;
2607 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE)
2608 mod_timer(&vp->rx_oom_timer, RUN_AT(HZ * 1));
2609 break; /* Bad news! */
2611 skb->dev = dev; /* Mark as being used by this device. */
2612 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2613 vp->rx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->tail, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
2614 vp->rx_skbuff[entry] = skb;
2616 vp->rx_ring[entry].status = 0; /* Clear complete bit. */
2617 outw(UpUnstall, ioaddr + EL3_CMD);
2619 return 0;
2623 * If we've hit a total OOM refilling the Rx ring we poll once a second
2624 * for some memory. Otherwise there is no way to restart the rx process.
2626 static void
2627 rx_oom_timer(unsigned long arg)
2629 struct net_device *dev = (struct net_device *)arg;
2630 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2632 spin_lock_irq(&vp->lock);
2633 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE) /* This test is redundant, but makes me feel good */
2634 boomerang_rx(dev);
2635 if (vortex_debug > 1) {
2636 printk(KERN_DEBUG "%s: rx_oom_timer %s\n", dev->name,
2637 ((vp->cur_rx - vp->dirty_rx) != RX_RING_SIZE) ? "succeeded" : "retrying");
2639 spin_unlock_irq(&vp->lock);
2642 static void
2643 vortex_down(struct net_device *dev)
2645 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2646 long ioaddr = dev->base_addr;
2648 netif_stop_queue (dev);
2650 del_timer_sync(&vp->rx_oom_timer);
2651 del_timer_sync(&vp->timer);
2653 /* Turn off statistics ASAP. We update vp->stats below. */
2654 outw(StatsDisable, ioaddr + EL3_CMD);
2656 /* Disable the receiver and transmitter. */
2657 outw(RxDisable, ioaddr + EL3_CMD);
2658 outw(TxDisable, ioaddr + EL3_CMD);
2660 if (dev->if_port == XCVR_10base2)
2661 /* Turn off thinnet power. Green! */
2662 outw(StopCoax, ioaddr + EL3_CMD);
2664 outw(SetIntrEnb | 0x0000, ioaddr + EL3_CMD);
2666 update_stats(ioaddr, dev);
2667 if (vp->full_bus_master_rx)
2668 outl(0, ioaddr + UpListPtr);
2669 if (vp->full_bus_master_tx)
2670 outl(0, ioaddr + DownListPtr);
2672 if (VORTEX_PCI(vp) && vp->enable_wol) {
2673 pci_save_state(VORTEX_PCI(vp), vp->power_state);
2674 acpi_set_WOL(dev);
2678 static int
2679 vortex_close(struct net_device *dev)
2681 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2682 long ioaddr = dev->base_addr;
2683 int i;
2685 if (netif_device_present(dev))
2686 vortex_down(dev);
2688 if (vortex_debug > 1) {
2689 printk(KERN_DEBUG"%s: vortex_close() status %4.4x, Tx status %2.2x.\n",
2690 dev->name, inw(ioaddr + EL3_STATUS), inb(ioaddr + TxStatus));
2691 printk(KERN_DEBUG "%s: vortex close stats: rx_nocopy %d rx_copy %d"
2692 " tx_queued %d Rx pre-checksummed %d.\n",
2693 dev->name, vp->rx_nocopy, vp->rx_copy, vp->queued_packet, vp->rx_csumhits);
2696 #if DO_ZEROCOPY
2697 if ( vp->rx_csumhits &&
2698 ((vp->drv_flags & HAS_HWCKSM) == 0) &&
2699 (hw_checksums[vp->card_idx] == -1)) {
2700 printk(KERN_WARNING "%s supports hardware checksums, and we're not using them!\n", dev->name);
2702 #endif
2704 free_irq(dev->irq, dev);
2706 if (vp->full_bus_master_rx) { /* Free Boomerang bus master Rx buffers. */
2707 for (i = 0; i < RX_RING_SIZE; i++)
2708 if (vp->rx_skbuff[i]) {
2709 pci_unmap_single( VORTEX_PCI(vp), le32_to_cpu(vp->rx_ring[i].addr),
2710 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2711 dev_kfree_skb(vp->rx_skbuff[i]);
2712 vp->rx_skbuff[i] = 0;
2715 if (vp->full_bus_master_tx) { /* Free Boomerang bus master Tx buffers. */
2716 for (i = 0; i < TX_RING_SIZE; i++) {
2717 if (vp->tx_skbuff[i]) {
2718 struct sk_buff *skb = vp->tx_skbuff[i];
2719 #if DO_ZEROCOPY
2720 int k;
2722 for (k=0; k<=skb_shinfo(skb)->nr_frags; k++)
2723 pci_unmap_single(VORTEX_PCI(vp),
2724 le32_to_cpu(vp->tx_ring[i].frag[k].addr),
2725 le32_to_cpu(vp->tx_ring[i].frag[k].length)&0xFFF,
2726 PCI_DMA_TODEVICE);
2727 #else
2728 pci_unmap_single(VORTEX_PCI(vp), le32_to_cpu(vp->tx_ring[i].addr), skb->len, PCI_DMA_TODEVICE);
2729 #endif
2730 dev_kfree_skb(skb);
2731 vp->tx_skbuff[i] = 0;
2736 return 0;
2739 static void
2740 dump_tx_ring(struct net_device *dev)
2742 if (vortex_debug > 0) {
2743 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2744 long ioaddr = dev->base_addr;
2746 if (vp->full_bus_master_tx) {
2747 int i;
2748 int stalled = inl(ioaddr + PktStatus) & 0x04; /* Possible racy. But it's only debug stuff */
2750 printk(KERN_ERR " Flags; bus-master %d, dirty %d(%d) current %d(%d)\n",
2751 vp->full_bus_master_tx,
2752 vp->dirty_tx, vp->dirty_tx % TX_RING_SIZE,
2753 vp->cur_tx, vp->cur_tx % TX_RING_SIZE);
2754 printk(KERN_ERR " Transmit list %8.8x vs. %p.\n",
2755 inl(ioaddr + DownListPtr),
2756 &vp->tx_ring[vp->dirty_tx % TX_RING_SIZE]);
2757 issue_and_wait(dev, DownStall);
2758 for (i = 0; i < TX_RING_SIZE; i++) {
2759 printk(KERN_ERR " %d: @%p length %8.8x status %8.8x\n", i,
2760 &vp->tx_ring[i],
2761 #if DO_ZEROCOPY
2762 le32_to_cpu(vp->tx_ring[i].frag[0].length),
2763 #else
2764 le32_to_cpu(vp->tx_ring[i].length),
2765 #endif
2766 le32_to_cpu(vp->tx_ring[i].status));
2768 if (!stalled)
2769 outw(DownUnstall, ioaddr + EL3_CMD);
2774 static struct net_device_stats *vortex_get_stats(struct net_device *dev)
2776 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2777 unsigned long flags;
2779 if (netif_device_present(dev)) { /* AKPM: Used to be netif_running */
2780 spin_lock_irqsave (&vp->lock, flags);
2781 update_stats(dev->base_addr, dev);
2782 spin_unlock_irqrestore (&vp->lock, flags);
2784 return &vp->stats;
2787 /* Update statistics.
2788 Unlike with the EL3 we need not worry about interrupts changing
2789 the window setting from underneath us, but we must still guard
2790 against a race condition with a StatsUpdate interrupt updating the
2791 table. This is done by checking that the ASM (!) code generated uses
2792 atomic updates with '+='.
2794 static void update_stats(long ioaddr, struct net_device *dev)
2796 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2797 int old_window = inw(ioaddr + EL3_CMD);
2799 if (old_window == 0xffff) /* Chip suspended or ejected. */
2800 return;
2801 /* Unlike the 3c5x9 we need not turn off stats updates while reading. */
2802 /* Switch to the stats window, and read everything. */
2803 EL3WINDOW(6);
2804 vp->stats.tx_carrier_errors += inb(ioaddr + 0);
2805 vp->stats.tx_heartbeat_errors += inb(ioaddr + 1);
2806 /* Multiple collisions. */ inb(ioaddr + 2);
2807 vp->stats.collisions += inb(ioaddr + 3);
2808 vp->stats.tx_window_errors += inb(ioaddr + 4);
2809 vp->stats.rx_fifo_errors += inb(ioaddr + 5);
2810 vp->stats.tx_packets += inb(ioaddr + 6);
2811 vp->stats.tx_packets += (inb(ioaddr + 9)&0x30) << 4;
2812 /* Rx packets */ inb(ioaddr + 7); /* Must read to clear */
2813 /* Tx deferrals */ inb(ioaddr + 8);
2814 /* Don't bother with register 9, an extension of registers 6&7.
2815 If we do use the 6&7 values the atomic update assumption above
2816 is invalid. */
2817 vp->stats.rx_bytes += inw(ioaddr + 10);
2818 vp->stats.tx_bytes += inw(ioaddr + 12);
2819 /* New: On the Vortex we must also clear the BadSSD counter. */
2820 EL3WINDOW(4);
2821 inb(ioaddr + 12);
2824 u8 up = inb(ioaddr + 13);
2825 vp->stats.rx_bytes += (up & 0x0f) << 16;
2826 vp->stats.tx_bytes += (up & 0xf0) << 12;
2829 EL3WINDOW(old_window >> 13);
2830 return;
2834 static int netdev_ethtool_ioctl(struct net_device *dev, void *useraddr)
2836 struct vortex_private *vp = dev->priv;
2837 u32 ethcmd;
2839 if (copy_from_user(&ethcmd, useraddr, sizeof(ethcmd)))
2840 return -EFAULT;
2842 switch (ethcmd) {
2843 case ETHTOOL_GDRVINFO: {
2844 struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
2845 strcpy(info.driver, DRV_NAME);
2846 strcpy(info.version, DRV_VERSION);
2847 if (VORTEX_PCI(vp))
2848 strcpy(info.bus_info, VORTEX_PCI(vp)->slot_name);
2849 else {
2850 if (VORTEX_EISA(vp))
2851 sprintf (info.bus_info, vp->gendev->bus_id);
2852 else
2853 sprintf(info.bus_info, "EISA 0x%lx %d",
2854 dev->base_addr, dev->irq);
2856 if (copy_to_user(useraddr, &info, sizeof(info)))
2857 return -EFAULT;
2858 return 0;
2863 return -EOPNOTSUPP;
2866 static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2868 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2869 long ioaddr = dev->base_addr;
2870 struct mii_ioctl_data *data = (struct mii_ioctl_data *)&rq->ifr_data;
2871 int phy = vp->phys[0] & 0x1f;
2872 int retval;
2874 switch(cmd) {
2875 case SIOCETHTOOL:
2876 return netdev_ethtool_ioctl(dev, (void *) rq->ifr_data);
2878 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2879 data->phy_id = phy;
2881 case SIOCGMIIREG: /* Read MII PHY register. */
2882 EL3WINDOW(4);
2883 data->val_out = mdio_read(dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2884 retval = 0;
2885 break;
2887 case SIOCSMIIREG: /* Write MII PHY register. */
2888 if (!capable(CAP_NET_ADMIN)) {
2889 retval = -EPERM;
2890 } else {
2891 EL3WINDOW(4);
2892 mdio_write(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2893 retval = 0;
2895 break;
2896 default:
2897 retval = -EOPNOTSUPP;
2898 break;
2901 return retval;
2904 /* Pre-Cyclone chips have no documented multicast filter, so the only
2905 multicast setting is to receive all multicast frames. At least
2906 the chip has a very clean way to set the mode, unlike many others. */
2907 static void set_rx_mode(struct net_device *dev)
2909 long ioaddr = dev->base_addr;
2910 int new_mode;
2912 if (dev->flags & IFF_PROMISC) {
2913 if (vortex_debug > 0)
2914 printk(KERN_NOTICE "%s: Setting promiscuous mode.\n", dev->name);
2915 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast|RxProm;
2916 } else if ((dev->mc_list) || (dev->flags & IFF_ALLMULTI)) {
2917 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast;
2918 } else
2919 new_mode = SetRxFilter | RxStation | RxBroadcast;
2921 outw(new_mode, ioaddr + EL3_CMD);
2924 /* MII transceiver control section.
2925 Read and write the MII registers using software-generated serial
2926 MDIO protocol. See the MII specifications or DP83840A data sheet
2927 for details. */
2929 /* The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
2930 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
2931 "overclocking" issues. */
2932 #define mdio_delay() inl(mdio_addr)
2934 #define MDIO_SHIFT_CLK 0x01
2935 #define MDIO_DIR_WRITE 0x04
2936 #define MDIO_DATA_WRITE0 (0x00 | MDIO_DIR_WRITE)
2937 #define MDIO_DATA_WRITE1 (0x02 | MDIO_DIR_WRITE)
2938 #define MDIO_DATA_READ 0x02
2939 #define MDIO_ENB_IN 0x00
2941 /* Generate the preamble required for initial synchronization and
2942 a few older transceivers. */
2943 static void mdio_sync(long ioaddr, int bits)
2945 long mdio_addr = ioaddr + Wn4_PhysicalMgmt;
2947 /* Establish sync by sending at least 32 logic ones. */
2948 while (-- bits >= 0) {
2949 outw(MDIO_DATA_WRITE1, mdio_addr);
2950 mdio_delay();
2951 outw(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
2952 mdio_delay();
2956 static int mdio_read(struct net_device *dev, int phy_id, int location)
2958 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2959 int i;
2960 long ioaddr = dev->base_addr;
2961 int read_cmd = (0xf6 << 10) | (phy_id << 5) | location;
2962 unsigned int retval = 0;
2963 long mdio_addr = ioaddr + Wn4_PhysicalMgmt;
2965 spin_lock_bh(&vp->mdio_lock);
2967 if (mii_preamble_required)
2968 mdio_sync(ioaddr, 32);
2970 /* Shift the read command bits out. */
2971 for (i = 14; i >= 0; i--) {
2972 int dataval = (read_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
2973 outw(dataval, mdio_addr);
2974 mdio_delay();
2975 outw(dataval | MDIO_SHIFT_CLK, mdio_addr);
2976 mdio_delay();
2978 /* Read the two transition, 16 data, and wire-idle bits. */
2979 for (i = 19; i > 0; i--) {
2980 outw(MDIO_ENB_IN, mdio_addr);
2981 mdio_delay();
2982 retval = (retval << 1) | ((inw(mdio_addr) & MDIO_DATA_READ) ? 1 : 0);
2983 outw(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
2984 mdio_delay();
2986 spin_unlock_bh(&vp->mdio_lock);
2987 return retval & 0x20000 ? 0xffff : retval>>1 & 0xffff;
2990 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
2992 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2993 long ioaddr = dev->base_addr;
2994 int write_cmd = 0x50020000 | (phy_id << 23) | (location << 18) | value;
2995 long mdio_addr = ioaddr + Wn4_PhysicalMgmt;
2996 int i;
2998 spin_lock_bh(&vp->mdio_lock);
3000 if (mii_preamble_required)
3001 mdio_sync(ioaddr, 32);
3003 /* Shift the command bits out. */
3004 for (i = 31; i >= 0; i--) {
3005 int dataval = (write_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
3006 outw(dataval, mdio_addr);
3007 mdio_delay();
3008 outw(dataval | MDIO_SHIFT_CLK, mdio_addr);
3009 mdio_delay();
3011 /* Leave the interface idle. */
3012 for (i = 1; i >= 0; i--) {
3013 outw(MDIO_ENB_IN, mdio_addr);
3014 mdio_delay();
3015 outw(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
3016 mdio_delay();
3018 spin_unlock_bh(&vp->mdio_lock);
3019 return;
3022 /* ACPI: Advanced Configuration and Power Interface. */
3023 /* Set Wake-On-LAN mode and put the board into D3 (power-down) state. */
3024 static void acpi_set_WOL(struct net_device *dev)
3026 struct vortex_private *vp = (struct vortex_private *)dev->priv;
3027 long ioaddr = dev->base_addr;
3029 /* Power up on: 1==Downloaded Filter, 2==Magic Packets, 4==Link Status. */
3030 EL3WINDOW(7);
3031 outw(2, ioaddr + 0x0c);
3032 /* The RxFilter must accept the WOL frames. */
3033 outw(SetRxFilter|RxStation|RxMulticast|RxBroadcast, ioaddr + EL3_CMD);
3034 outw(RxEnable, ioaddr + EL3_CMD);
3036 /* Change the power state to D3; RxEnable doesn't take effect. */
3037 pci_enable_wake(VORTEX_PCI(vp), 0, 1);
3038 pci_set_power_state(VORTEX_PCI(vp), 3);
3042 static void __devexit vortex_remove_one (struct pci_dev *pdev)
3044 struct net_device *dev = pci_get_drvdata(pdev);
3045 struct vortex_private *vp;
3047 if (!dev) {
3048 printk("vortex_remove_one called for Compaq device!\n");
3049 BUG();
3052 vp = dev->priv;
3054 /* AKPM: FIXME: we should have
3055 * if (vp->cb_fn_base) iounmap(vp->cb_fn_base);
3056 * here
3058 unregister_netdev(dev);
3059 /* Should really use issue_and_wait() here */
3060 outw(TotalReset|0x14, dev->base_addr + EL3_CMD);
3062 if (VORTEX_PCI(vp) && vp->enable_wol) {
3063 pci_set_power_state(VORTEX_PCI(vp), 0); /* Go active */
3064 if (vp->pm_state_valid)
3065 pci_restore_state(VORTEX_PCI(vp), vp->power_state);
3068 pci_free_consistent(pdev,
3069 sizeof(struct boom_rx_desc) * RX_RING_SIZE
3070 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
3071 vp->rx_ring,
3072 vp->rx_ring_dma);
3073 if (vp->must_free_region)
3074 release_region(dev->base_addr, vp->io_size);
3075 kfree(dev);
3079 static struct pci_driver vortex_driver = {
3080 .name = "3c59x",
3081 .probe = vortex_init_one,
3082 .remove = __devexit_p(vortex_remove_one),
3083 .id_table = vortex_pci_tbl,
3084 #ifdef CONFIG_PM
3085 .suspend = vortex_suspend,
3086 .resume = vortex_resume,
3087 #endif
3091 static int vortex_have_pci;
3092 static int vortex_have_eisa;
3095 static int __init vortex_init (void)
3097 int pci_rc, eisa_rc;
3099 pci_rc = pci_module_init(&vortex_driver);
3100 eisa_rc = vortex_eisa_init();
3102 if (pci_rc == 0)
3103 vortex_have_pci = 1;
3104 if (eisa_rc > 0)
3105 vortex_have_eisa = 1;
3107 return (vortex_have_pci + vortex_have_eisa) ? 0 : -ENODEV;
3111 static void __exit vortex_eisa_cleanup (void)
3113 struct vortex_private *vp;
3114 long ioaddr;
3116 #ifdef CONFIG_EISA
3117 /* Take care of the EISA devices */
3118 eisa_driver_unregister (&vortex_eisa_driver);
3119 #endif
3121 if (compaq_net_device) {
3122 vp = compaq_net_device->priv;
3123 ioaddr = compaq_net_device->base_addr;
3125 unregister_netdev (compaq_net_device);
3126 outw (TotalReset, ioaddr + EL3_CMD);
3127 release_region (ioaddr, VORTEX_TOTAL_SIZE);
3129 kfree (compaq_net_device);
3134 static void __exit vortex_cleanup (void)
3136 if (vortex_have_pci)
3137 pci_unregister_driver (&vortex_driver);
3138 if (vortex_have_eisa)
3139 vortex_eisa_cleanup ();
3143 module_init(vortex_init);
3144 module_exit(vortex_cleanup);
3148 * Local variables:
3149 * c-indent-level: 4
3150 * c-basic-offset: 4
3151 * tab-width: 4
3152 * End: