drivers/ieee1394/ieee1394.h

   1 /*
   2  * Generic IEEE 1394 definitions
   3  */
   4
   5 #ifndef _IEEE1394_IEEE1394_H
   6 #define _IEEE1394_IEEE1394_H
   7
   8 #define TCODE_WRITEQ             0x0
   9 #define TCODE_WRITEB             0x1
  10 #define TCODE_WRITE_RESPONSE     0x2
  11 #define TCODE_READQ              0x4
  12 #define TCODE_READB              0x5
  13 #define TCODE_READQ_RESPONSE     0x6
  14 #define TCODE_READB_RESPONSE     0x7
  15 #define TCODE_CYCLE_START        0x8
  16 #define TCODE_LOCK_REQUEST       0x9
  17 #define TCODE_ISO_DATA           0xa
  18 #define TCODE_LOCK_RESPONSE      0xb
  19
  20 #define RCODE_COMPLETE           0x0
  21 #define RCODE_CONFLICT_ERROR     0x4
  22 #define RCODE_DATA_ERROR         0x5
  23 #define RCODE_TYPE_ERROR         0x6
  24 #define RCODE_ADDRESS_ERROR      0x7
  25
  26 #define EXTCODE_MASK_SWAP        0x1
  27 #define EXTCODE_COMPARE_SWAP     0x2
  28 #define EXTCODE_FETCH_ADD        0x3
  29 #define EXTCODE_LITTLE_ADD       0x4
  30 #define EXTCODE_BOUNDED_ADD      0x5
  31 #define EXTCODE_WRAP_ADD         0x6
  32
  33 #define ACK_COMPLETE             0x1
  34 #define ACK_PENDING              0x2
  35 #define ACK_BUSY_X               0x4
  36 #define ACK_BUSY_A               0x5
  37 #define ACK_BUSY_B               0x6
  38 #define ACK_DATA_ERROR           0xd
  39 #define ACK_TYPE_ERROR           0xe
  40
  41 /* Non-standard "ACK codes" for internal use */
  42 #define ACKX_NONE                -1
  43 #define ACKX_SEND_ERROR          -2
  44 #define ACKX_ABORTED             -3
  45 #define ACKX_TIMEOUT             -4
  46
  47
  48 #define SPEED_100                0x0
  49 #define SPEED_200                0x1
  50 #define SPEED_400                0x2
  51
  52 #define SELFID_PWRCL_NO_POWER    0x0
  53 #define SELFID_PWRCL_PROVIDE_15W 0x1
  54 #define SELFID_PWRCL_PROVIDE_30W 0x2
  55 #define SELFID_PWRCL_PROVIDE_45W 0x3
  56 #define SELFID_PWRCL_USE_1W      0x4
  57 #define SELFID_PWRCL_USE_3W      0x5
  58 #define SELFID_PWRCL_USE_6W      0x6
  59 #define SELFID_PWRCL_USE_10W     0x7
  60
  61 #define SELFID_PORT_CHILD        0x3
  62 #define SELFID_PORT_PARENT       0x2
  63 #define SELFID_PORT_NCONN        0x1
  64 #define SELFID_PORT_NONE         0x0
  65
  66
  67 #include <asm/byteorder.h>
  68
  69 #ifdef __BIG_ENDIAN_BITFIELD
  70
  71 struct selfid {
  72         u32 packet_identifier:2; /* always binary 10 */
  73         u32 phy_id:6;
  74         /* byte */
  75         u32 extended:1; /* if true is struct ext_selfid */
  76         u32 link_active:1;
  77         u32 gap_count:6;
  78         /* byte */
  79         u32 speed:2;
  80         u32 phy_delay:2;
  81         u32 contender:1;
  82         u32 power_class:3;
  83         /* byte */
  84         u32 port0:2;
  85         u32 port1:2;
  86         u32 port2:2;
  87         u32 initiated_reset:1;
  88         u32 more_packets:1;
  89 } __attribute__((packed));
  90
  91 struct ext_selfid {
  92         u32 packet_identifier:2; /* always binary 10 */
  93         u32 phy_id:6;
  94         /* byte */
  95         u32 extended:1; /* if false is struct selfid */
  96         u32 seq_nr:3;
  97         u32 reserved:2;
  98         u32 porta:2;
  99         /* byte */
 100         u32 portb:2;
 101         u32 portc:2;
 102         u32 portd:2;
 103         u32 porte:2;
 104         /* byte */
 105         u32 portf:2;
 106         u32 portg:2;
 107         u32 porth:2;
 108         u32 reserved2:1;
 109         u32 more_packets:1;
 110 } __attribute__((packed));
 111
 112 #elif defined __LITTLE_ENDIAN_BITFIELD /* __BIG_ENDIAN_BITFIELD */
 113
 114 /*
 115  * Note: these mean to be bit fields of a big endian SelfID as seen on a little
 116  * endian machine.
 117  */
 118
 119 struct selfid {
 120         u32 phy_id:6;
 121         u32 packet_identifier:2; /* always binary 10 */
 122         /* byte */
 123         u32 gap_count:6;
 124         u32 link_active:1;
 125         u32 extended:1; /* if true is struct ext_selfid */
 126         /* byte */
 127         u32 power_class:3;
 128         u32 contender:1;
 129         u32 phy_delay:2;
 130         u32 speed:2;
 131         /* byte */
 132         u32 more_packets:1;
 133         u32 initiated_reset:1;
 134         u32 port2:2;
 135         u32 port1:2;
 136         u32 port0:2;
 137 } __attribute__((packed));
 138
 139 struct ext_selfid {
 140         u32 phy_id:6;
 141         u32 packet_identifier:2; /* always binary 10 */
 142         /* byte */
 143         u32 porta:2;
 144         u32 reserved:2;
 145         u32 seq_nr:3;
 146         u32 extended:1; /* if false is struct selfid */
 147         /* byte */
 148         u32 porte:2;
 149         u32 portd:2;
 150         u32 portc:2;
 151         u32 portb:2;
 152         /* byte */
 153         u32 more_packets:1;
 154         u32 reserved2:1;
 155         u32 porth:2;
 156         u32 portg:2;
 157         u32 portf:2;
 158 } __attribute__((packed));
 159
 160 #else
 161 #error What? PDP endian?
 162 #endif /* __BIG_ENDIAN_BITFIELD */
 163
 164
 165 #endif /* _IEEE1394_IEEE1394_H */