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[linux-2.6/linux-mips.git] / drivers / ieee1394 / aic5800.c
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1 /*
2 * aic5800.c - Adaptec AIC-5800 PCI-IEEE1394 chip driver
3 * Copyright (C)1999 Emanuel Pirker <epirker@edu.uni-klu.ac.at>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 #include <linux/kernel.h>
21 #include <linux/slab.h>
22 #include <linux/interrupt.h>
23 #include <linux/wait.h>
24 #include <linux/errno.h>
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/fs.h>
28 #include <linux/poll.h>
29 #include <linux/delay.h>
30 #include <asm/byteorder.h>
31 #include <asm/atomic.h>
32 #include <asm/io.h>
33 #include <asm/uaccess.h>
35 #include "ieee1394_types.h"
36 #include "hosts.h"
37 #include "ieee1394_core.h"
38 #include "ieee1394.h"
39 #include "aic5800.h"
43 /// print general (card independent) information
44 #define PRINT_G(level, fmt, args...) printk(level "aic5800: " fmt "\n" , ## args)
45 /// print card specific information
46 #define PRINT(level, card, fmt, args...) printk(level "aic5800-%d: " fmt "\n" , card , ## args)
48 /// card array
49 static struct aic5800 cards[MAX_AIC5800_CARDS];
50 /// holds the number of installed aic5800 cards
51 static int num_of_cards = 0;
53 static int add_card(struct pci_dev *dev);
54 static void remove_card(struct aic5800 *aic);
55 static int init_driver(void);
58 /*****************************************************************
59 * Auxiliary functions needed to read the EEPROM
60 * Daniel Minitti
61 *****************************************************************/
62 #define SEEPDOUT 0x1
63 #define SEEPDIN 0x02
64 #define SEEPSK 0x04
65 #define SEEPCS 0x08
66 #define SEEPCYC 0x10
67 #define SEEPBUSY 0x20
69 #define CLOCK_PULSE() {\
70 int cnt=200;\
71 while(cnt-->0 && reg_read(aic, misc_SEEPCTL) & SEEPBUSY);\
72 if (reg_read(aic, misc_SEEPCTL) & SEEPBUSY) printk("BUSY ");\
75 static inline unsigned short read_seeprom_word(struct aic5800 *aic,
76 int offset)
78 int i;
79 unsigned char temp;
80 unsigned char read_cmd[3] = {1,1,0};
81 unsigned short rd;
83 // send chip select for one clock cycle.
84 reg_write(aic, misc_SEEPCTL, SEEPSK|SEEPCS);
85 CLOCK_PULSE();
87 // write start bit (1) & READ op-code (10b)
88 for (i=0; i<sizeof(read_cmd); i++) {
89 temp = SEEPCS | SEEPCYC | read_cmd[i];
90 reg_write(aic, misc_SEEPCTL, temp);
91 CLOCK_PULSE();
92 temp = temp ^ SEEPSK;
93 reg_write(aic, misc_SEEPCTL, temp);
94 CLOCK_PULSE();
96 // write 8 bit address (MSB --> LSB)
97 for (i=7; i>=0; i--) {
98 temp = offset;
99 temp = (temp >> i) & 1;
100 temp = SEEPCS | SEEPCYC | temp;
101 reg_write(aic, misc_SEEPCTL, temp);
102 CLOCK_PULSE();
103 temp = temp ^ SEEPSK;
104 reg_write(aic, misc_SEEPCTL, temp);
105 CLOCK_PULSE();
107 // read 16 bit (MSB --> LSB)
108 rd = 0;
109 for (i=0; i<=16; i++) {
110 temp = SEEPCS | SEEPCYC;
111 reg_write(aic, misc_SEEPCTL, temp);
112 CLOCK_PULSE();
113 temp = temp ^ SEEPSK;
114 rd = (rd << 1) | (unsigned short)((reg_read(aic, misc_SEEPCTL)
115 & SEEPDIN)>>1);
116 reg_write(aic, misc_SEEPCTL, temp);
117 CLOCK_PULSE();
120 // reset chip select for the next command cycle
121 reg_write(aic, misc_SEEPCTL, SEEPCYC);
122 CLOCK_PULSE();
123 reg_write(aic, misc_SEEPCTL, SEEPCYC | SEEPSK);
124 CLOCK_PULSE();
125 reg_write(aic, misc_SEEPCTL, SEEPCYC);
126 CLOCK_PULSE();
128 reg_write(aic, misc_SEEPCTL, 0);
129 CLOCK_PULSE();
131 return rd;
134 #undef DEBUG_SEEPROM
136 /** Read 64-bit GUID (Global Unique ID) from SEEPROM
138 * It works well on AHA-8945.
139 * On AHA-8920 it works well only on first time, It returns ffff... on
140 * the other times.
141 *****************************************************************/
142 static unsigned long long read_guid(struct aic5800 *aic)
144 int i;
145 unsigned long long guid;
147 #ifdef DEBUG_SEEPROM
148 printk("\n");
149 printk("SEEPCTL value = 0x%x\n", reg_read(aic, misc_SEEPCTL));
150 #endif
152 /* read GUID */
153 guid = 0;
154 for (i=0x10; i<0x14; i++)
155 guid = (guid << 16) | read_seeprom_word(aic,i);
157 #ifdef DEBUG_SEEPROM
158 for (i=0; i<3; i++)
159 printk("%x ", (unsigned int) read_seeprom_word(aic,i));
160 printk("\nGUID = ");
161 for (i=3; i>=0; i--)
162 printk("%x ", (unsigned int)(guid>>(16*i))&0xffff);
164 printk("\nSEEPCTL value = 0x%x\n", reg_read(aic, misc_SEEPCTL));
165 #endif
166 return guid;
169 #undef CLOCK_PULSE()
171 static int aic_detect(struct hpsb_host_template *tmpl)
173 struct hpsb_host *host;
174 int i;
176 init_driver();
178 for (i = 0; i < num_of_cards; i++) {
179 host = hpsb_get_host(tmpl, 0);
180 if (host == NULL) {
181 /* simply don't init more after out of mem */
182 return i;
184 host->hostdata = &cards[i];
185 cards[i].host = host;
188 return num_of_cards;
191 static int aic_devctl(struct hpsb_host *host, enum devctl_cmd cmd, int arg)
193 struct aic5800 *aic = host->hostdata;
194 int retval = 0;
195 unsigned long flags;
196 struct hpsb_packet *packet, *lastpacket;
198 switch (cmd) {
199 case RESET_BUS:
200 reg_write(aic, misc_PhyControl, 0x00004140 );
201 break;
203 case GET_CYCLE_COUNTER:
204 arg = reg_read(aic, misc_CycleTimer);
205 break;
207 case SET_CYCLE_COUNTER:
208 reg_write(aic, misc_CycleTimer, arg);
209 break;
211 case SET_BUS_ID:
212 reg_clear_bits(aic, misc_NodeID, 0xFFC0);
213 reg_set_bits(aic, misc_NodeID, (arg<<6));
214 break;
216 case ACT_CYCLE_MASTER:
217 if (arg) {
218 /* enable cycleMaster */
219 reg_set_bits(aic, misc_Control, 0x20000);
220 } else {
221 /* disable cycleMaster */
222 reg_clear_bits(aic, misc_Control, 0x20000);
224 break;
226 case CANCEL_REQUESTS:
227 spin_lock_irqsave(&aic->async_queue_lock, flags);
228 /* stop any chip activity */
229 reg_write( aic, AT_ChannelControl, 0x80000000);
230 packet = aic->async_queue;
231 aic->async_queue = NULL;
232 spin_unlock_irqrestore(&aic->async_queue_lock, flags);
234 while (packet != NULL) {
235 lastpacket = packet;
236 packet = packet->xnext;
237 hpsb_packet_sent(host, lastpacket, ACKX_ABORTED);
240 break;
242 case MODIFY_USAGE:
243 if (arg) {
244 MOD_INC_USE_COUNT;
245 } else {
246 MOD_DEC_USE_COUNT;
248 break;
250 #if 0
251 case DEBUG_DUMPINFO:
252 PRINT(KERN_INFO, aic->id, AIC5800_DRIVER_NAME);
253 PRINT(KERN_INFO, aic->id, " Register MMIO base: 0x%p\n",
254 aic->registers);
255 PRINT(KERN_INFO, aic->id, " NodeID: 0x%x\n",
256 reg_read(aic, misc_NodeID) );
257 PRINT(KERN_INFO,aic->id, " #Intr: %lu BusResets: %lu\n",
258 aic->NumInterrupts, aic->NumBusResets);
259 PRINT(KERN_INFO, aic->id, " TxPackets: %lu RxPackets: %lu\n",
260 aic->TxPackets, aic->RxPackets);
261 PRINT(KERN_INFO,aic->id, " TxRdy: %lu ATErr: %lu HdrErr: %lu TcodeErr: %lu SendRej: %lu\n",
262 aic->TxRdy, aic->ATError, aic->HdrErr,
263 aic->TCodeErr, aic->SendRej);
264 break;
265 #endif
267 default:
268 PRINT(KERN_ERR, aic->id, "unknown devctl command %d", cmd);
269 retval = -1;
272 return retval;
276 /** Initialize the host adapter chip and corresponding data
277 structures. We reset the chip, enable transmitter, receiver,
278 the physical DMA units, cycle timer, cycle source, reception
279 of selfid packets and initialize several other registers. */
280 static int aic_initialize(struct hpsb_host *host)
282 int i;
283 struct aic5800 *aic = host->hostdata;
285 /* Reset data structures */
286 aic->async_queue = NULL;
287 spin_lock_init(&aic->async_queue_lock);
289 /* Reset the chip */
290 reg_write( aic, misc_Reset, 0x37);
291 udelay(10); // FIXME
292 reg_write( aic, misc_Reset, 0);
294 /* Enable Transmitter/Receiver, enable physDMA,
295 * enable CycleTimer, cycleSource */
296 reg_write( aic, misc_Control, 0x82050003);
298 /* Enable reception of SelfID packets */
299 reg_set_bits(aic, misc_PacketControl, 0x20);
301 reg_write(aic, AT_InterruptSelect, 0x00F0001);
302 reg_write(aic, AT_BranchSelect, 0x0100010);
303 reg_write(aic, AT_WaitSelect, 0x00F0001);
304 reg_write(aic, misc_ATRetries, reg_read(aic, misc_ATRetries) | 0x7);
306 /* initialize AR DMA */
308 /* unset run bit */
309 reg_write( aic, AR_ChannelControl, 0x80000000);
311 /* here we should have 0 iterations because of the code
312 in the DmaAR handler. However, to be sure we do it */
313 i = 0;
314 while (reg_read(aic, AR_ChannelStatus) & 0x400) {
315 i++;
316 if (i>100000) {
317 PRINT(KERN_ERR, aic->id,
318 "Huh! Can't set AR_ChannelControl... card can not receive!");
319 break;
323 (aic->AR_program)->control = ( DMA_CMD_INPUTLAST | DMA_KEY_STREAM0
324 | DMA_INTR_ALWAYS | DMA_BRANCH_ALWAYS)
325 + AIC5800_ARFIFO_SIZE;
326 (aic->AR_program)->address = virt_to_bus(aic->rcv_page);
327 (aic->AR_program)->branchAddress = virt_to_bus(aic->AR_program);
328 (aic->AR_program)->status = AIC5800_ARFIFO_SIZE;
330 (aic->AR_program+1)->control = DMA_CMD_STOP;
331 (aic->AR_program+1)->address = 0;
332 (aic->AR_program+1)->branchAddress = 0;
333 (aic->AR_program+1)->status = 0;
335 reg_write( aic, AR_CommandPtr, (u32) virt_to_bus(aic->AR_program));
336 reg_write( aic, AR_ChannelControl, 0x80008000);
338 /* Enable Interrupts */
339 reg_write(aic, misc_InterruptClear, 0xFFFFFFFF);
340 reg_write(aic, misc_InterruptMask, 0xFFFFFFFF);
341 /*reg_write(aic, misc_InterruptMask, 0x00F1F03F);*/
343 return 1;
346 static void aic_release(struct hpsb_host *host)
348 struct aic5800 *aic;
350 if (host != NULL) {
351 aic = host->hostdata;
352 remove_card(aic);
356 /* This must be called with the async_queue_lock held. */
357 static void send_next_async(struct aic5800 *aic)
359 int i;
360 struct hpsb_packet *packet = aic->async_queue;
362 /* stop the channel program if it's still running */
363 reg_write( aic, AT_ChannelControl, 0x80000000);
365 /* re-format packet header for AIC-5800 chip */
366 packet->header[1] = (packet->header[1] & 0xFFFF) |
367 (packet->header[0] & 0xFFFF0000);
368 packet->header[0] = (packet->header[0] & 0xFFFF);
370 #ifndef __BIG_ENDIAN
371 /* Packet must be byte-swapped in non-big-endian environments,
372 * see AIC-5800 specification...
374 { u32 i;
375 for ( i = 0 ; i < packet->header_size/sizeof(u32) ; i++ )
376 packet->header[i] = cpu_to_be32( packet->header[i] );
377 for ( i = 0 ; i < packet->data_size/sizeof(u32) ; i++ )
378 packet->data[i] = cpu_to_be32( packet->data[i] );
381 #endif
383 /* typically we use only a few iterations here */
384 i = 0;
385 while (reg_read(aic, AT_ChannelStatus) & 0x400) {
386 i++;
387 if (i>5000) {
388 PRINT(KERN_ERR, aic->id,
389 "runaway loop 1 in send_next_async() - bailing out...");
390 break;
394 /* set data buffer address and packet length */
395 memset(aic->AT_program, 0, MAX_AT_PROGRAM_SIZE * sizeof(struct dma_cmd));
397 if (packet->data_size) {
398 aic->AT_program[0].control = ( DMA_CMD_OUTPUTMORE | DMA_KEY_STREAM0 ) +
399 packet -> header_size;
400 aic->AT_program[0].address = virt_to_bus( packet->header );
401 aic->AT_program[1].control = ( DMA_CMD_OUTPUTLAST | DMA_KEY_STREAM0
402 | DMA_INTR_ALWAYS )
403 + packet -> data_size;
404 aic->AT_program[1].address = virt_to_bus( packet->data );
406 aic->AT_program[2].control = DMA_CMD_STOP;
408 } else {
409 aic->AT_program[0].control = ( DMA_CMD_OUTPUTLAST | DMA_INTR_ALWAYS |
410 DMA_KEY_STREAM0 ) +
411 packet -> header_size;
412 aic->AT_program[0].address = virt_to_bus( packet->header );
414 aic->AT_program[1].control = DMA_CMD_STOP;
417 /* set program start address */
418 reg_write(aic, AT_CommandPtr, (unsigned int) virt_to_bus(aic->AT_program));
420 /* typically we use only a few iterations here */
421 i = 0;
422 while (reg_read(aic, AT_CommandPtr) != (unsigned int)
423 virt_to_bus(aic->AT_program)) {
424 i++;
425 if (i>5000) {
426 PRINT(KERN_ERR, aic->id,
427 "runaway loop 2 in send_next_async() - bailing out...");
428 break;
432 /* run program */
433 reg_write( aic, AT_ChannelControl, 0x80008000);
437 static int aic_transmit(struct hpsb_host *host, struct hpsb_packet *packet)
439 struct aic5800 *aic = host->hostdata;
440 struct hpsb_packet *p;
441 unsigned long flags;
443 if (packet->data_size >= 4096) {
444 PRINT(KERN_ERR, aic->id, "transmit packet data too big (%d)",
445 packet->data_size);
446 return 0;
449 packet->xnext = NULL;
451 spin_lock_irqsave(&aic->async_queue_lock, flags);
453 if (aic->async_queue == NULL) {
454 aic->async_queue = packet;
455 send_next_async(aic);
456 } else {
457 p = aic->async_queue;
458 while (p->xnext != NULL) {
459 p = p->xnext;
462 p->xnext = packet;
465 spin_unlock_irqrestore(&aic->async_queue_lock, flags);
467 return 1;
470 static int get_phy_reg(struct aic5800 *aic, int addr)
472 int retval;
473 int i = 0;
475 /* sanity check */
476 if (addr > 15) {
477 PRINT(KERN_ERR, aic->id, __FUNCTION__
478 ": PHY register address %d out of range", addr);
479 return -1;
482 /* request data from PHY */
483 reg_write(aic, misc_PhyControl, LINK_PHY_READ | LINK_PHY_ADDR(addr));
485 /* read data from PhyControl register */
486 /* note that we have to wait until the register is updated */
487 do {
488 retval = reg_read(aic, misc_PhyControl);
490 if (i > 10000) {
491 PRINT(KERN_ERR, aic->id, __FUNCTION__
492 ": runaway loop, aborting");
493 retval = -1;
494 break;
496 i++;
497 } while ((retval & 0xf000000) != LINK_PHY_RADDR(addr));
499 /* we don't want a PhyInt interrupt */
500 reg_write(aic, misc_InterruptClear, INT_PhyInt);
502 if (retval != -1) {
503 return ((retval & 0xff0000)>>16);
504 } else {
505 return -1;
509 static quadlet_t generate_own_selfid(struct aic5800 *aic, int phyid)
511 quadlet_t lsid;
512 char phyreg[7];
513 int i;
515 for (i = 1; i < 7; i++) {
516 phyreg[i] = get_phy_reg(aic, i);
519 /* Standard PHY register map */
520 lsid = 0x80400000 | (phyid << 24);
521 lsid |= (phyreg[1] & 0x3f) << 16; /* gap count */
522 lsid |= (phyreg[2] & 0xc0) << 8; /* max speed */
523 lsid |= (phyreg[6] & 0x01) << 11; /* contender (phy dep) */
524 lsid |= (phyreg[6] & 0x10) >> 3; /* initiated reset */
526 for (i = 0; i < (phyreg[2] & 0x1f); i++) { /* ports */
527 if (phyreg[3 + i] & 0x4) {
528 lsid |= (((phyreg[3 + i] & 0x8) | 0x10) >> 3)
529 << (6 - i*2);
530 } else {
531 lsid |= 1 << (6 - i*2);
535 return lsid;
538 /* moved out to make interrupt routine more readable */
539 inline static void handle_selfid(struct aic5800 *aic, struct hpsb_host *host,
540 int phyid, int isroot, size_t size)
542 quadlet_t *q = aic->rcv_page;
543 quadlet_t lsid;
545 /* we need our own self-id packet */
546 lsid = generate_own_selfid(aic, phyid);
548 /* unconnected state? only begin and end marker in rcv_page */
549 if (size==8) {
550 hpsb_selfid_received(host, lsid);
553 /* process buffer... AIC's FIFO often contains some strangenesses */
554 while (size > 0) {
555 if (q[0] == 0xe0) {
556 /* marker */
557 q += 1;
558 size -= 4;
559 continue;
561 if (q[0] == 0x1) {
562 /* marker */
563 q += 1;
564 size -= 4;
565 break;
568 if (q[0] == ~q[1]) {
569 /* correct self-id */
571 if ((q[0] & 0x3f800000) == ((phyid + 1) << 24)) {
572 /* its our turn now! */
573 //PRINT(KERN_INFO,
574 // aic->id, "selfid packet 0x%x included", lsid);
576 hpsb_selfid_received(host, lsid);
579 //PRINT(KERN_INFO, aic->id, "selfid packet 0x%x rcvd", q[0]);
580 hpsb_selfid_received(host, q[0]);
581 q += 2;
582 size -= 8;
583 continue;
587 /* if we are root, our self-id packet is last */
588 if (isroot && phyid != 0) {
589 hpsb_selfid_received(host, lsid);
592 hpsb_selfid_complete(host, phyid, isroot);
595 static void aic_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
597 struct aic5800 *aic = (struct aic5800 *)dev_id;
598 struct hpsb_host *host = aic->host;
599 quadlet_t *q = aic->rcv_page;
601 int phyid = -1, isroot = 0;
603 u32 interruptEvent = reg_read(aic, misc_InterruptEvents);
604 reg_write(aic, misc_InterruptClear, interruptEvent);
606 //printk("InterruptEvent 0x%x\n", interruptEvent);
607 if ( (interruptEvent & 0x3f) == 0x3f ) {
608 PRINT(KERN_INFO, aic->id, "Dma Engine Error");
611 if ( interruptEvent & INT_DmaAT ) {
612 if (aic->AT_program[0].status & 0xFFFF)
613 PRINT(KERN_INFO, aic->id, "AT: could not transfer %d bytes",
614 aic->AT_program[0].status & 0xFFFF);
617 if ( interruptEvent & INT_PhyInt) {
618 PRINT(KERN_INFO, aic->id, "PhyInt");
621 if ( interruptEvent & INT_DmaAR ) {
622 int rcv_bytes;
623 int i;
625 /* we calculate the number of received bytes from the
626 residual count field */
627 rcv_bytes = AIC5800_ARFIFO_SIZE - (aic->AR_program->status & 0xFFFF);
629 //PRINT(KERN_INFO, aic->id, "AR_status 0x%x, %d bytes read", aic->AR_program->status, rcv_bytes);
631 if ((aic->AR_program->status & 0x84000000)
632 && (aic->AR_program->status & 0xFFFF) >= 8 ) {
634 #ifndef __BIG_ENDIAN
635 /* we have to do byte-swapping on non-bigendian architectures */
636 for (i=0; i< (rcv_bytes / sizeof(quadlet_t)); i++) {
637 *q = be32_to_cpu(*q);
638 q++;
640 q = aic->rcv_page;
641 #endif
643 if (*q == 0xe0) {
644 phyid = reg_read(aic, misc_NodeID);
645 isroot = phyid & 0x800000;
646 phyid = phyid & 0x3F;
647 handle_selfid(aic, host, phyid, isroot, rcv_bytes);
648 } else {
649 hpsb_packet_received(host, aic->rcv_page, rcv_bytes, 0);
651 } else {
652 PRINT(KERN_ERR, aic->id,
653 "AR DMA program status value 0x%x is incorrect!",
654 aic->AR_program->status);
657 if ( interruptEvent & INT_BusReset ) {
658 PRINT(KERN_INFO, aic->id, "bus reset occured");
659 if (!host->in_bus_reset) {
660 hpsb_bus_reset(host);
662 reg_set_bits(aic, misc_Control, 0x1);
663 aic->NumBusResets++;
666 if (interruptEvent & INT_RcvData ) {
667 aic->RxPackets++;
670 if (interruptEvent & INT_TxRdy) {
671 /* async packet sent - transmitter ready */
672 u32 ack;
673 struct hpsb_packet *packet;
675 if (aic->async_queue) {
677 spin_lock(&aic->async_queue_lock);
680 ack = reg_read(aic, AT_ChannelStatus) & 0xF;
682 packet = aic->async_queue;
683 aic->async_queue = packet->xnext;
685 if (aic->async_queue != NULL) {
686 send_next_async(aic);
688 spin_unlock(&aic->async_queue_lock);
689 PRINT(KERN_INFO,aic->id,"packet sent with ack code %d",ack);
690 hpsb_packet_sent(host, packet, ack);
691 } // else
692 //PRINT(KERN_INFO,aic->id,"packet sent without async_queue (self-id?)");
694 aic->TxRdy++;
696 if (interruptEvent & INT_ATError ) {
697 PRINT(KERN_INFO,aic->id,"ATError");
698 aic->ATError++;
700 if (interruptEvent & INT_SendRej ) {
701 aic->SendRej++;
703 if (interruptEvent & INT_HdrErr ) {
704 aic->HdrErr++;
706 if (interruptEvent & INT_TCodeErr ) {
707 PRINT(KERN_INFO,aic->id,"TCodeErr");
708 aic->TCodeErr++;
711 aic->NumInterrupts++;
715 inline static void * quadquadalign(void *buf)
717 if ((unsigned int) buf % 0x10 != 0) {
718 return (void *)(((unsigned int)buf + 0x10) & 0xFFFFFFF0);
719 } else {
720 return buf;
724 static int add_card(struct pci_dev *dev)
726 #define FAIL(fmt, args...) do {\
727 PRINT_G(KERN_ERR, fmt , ## args); \
728 num_of_cards--; \
729 remove_card(aic); \
730 return 1; } while (0)
732 struct aic5800 *aic; /* shortcut to currently handled device */
733 unsigned long page;
735 if (pci_enable_device(dev))
736 return 1;
738 if (num_of_cards == MAX_AIC5800_CARDS) {
739 PRINT_G(KERN_WARNING, "cannot handle more than %d cards. "
740 "Adjust MAX_AIC5800_CARDS in aic5800.h.",
741 MAX_AIC5800_CARDS);
742 return 1;
745 aic = &cards[num_of_cards++];
747 aic->id = num_of_cards-1;
748 aic->dev = dev;
750 if (!request_irq(dev->irq, aic_irq_handler, SA_SHIRQ,
751 AIC5800_DRIVER_NAME, aic)) {
752 PRINT(KERN_INFO, aic->id, "allocated interrupt %d", dev->irq);
753 } else {
754 FAIL("failed to allocate shared interrupt %d", dev->irq);
757 page = get_free_page(GFP_KERNEL);
758 if (page != 0) {
759 aic->rcv_page = phys_to_virt(page);
760 } else {
761 FAIL("failed to allocate receive buffer");
764 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,13)
765 aic->registers = ioremap_nocache(dev->base_address[0],
766 AIC5800_REGSPACE_SIZE);
767 #else
768 aic->registers = ioremap_nocache(dev->resource[0].start,
769 AIC5800_REGSPACE_SIZE);
770 #endif
772 if (aic->registers == NULL) {
773 FAIL("failed to remap registers - card not accessible");
776 PRINT(KERN_INFO, aic->id, "remapped memory space reg 0x%p",
777 aic->registers);
779 aic->pbuf = kmalloc(AIC5800_PBUF_SIZE, GFP_KERNEL);
781 if (!aic->pbuf) {
782 FAIL("failed to allocate program buffer");
785 aic->AT_program = quadquadalign(aic->pbuf);
786 aic->AT_program[2].control = DMA_CMD_STOP;
788 aic->AR_program = aic->AT_program + MAX_AT_PROGRAM_SIZE *
789 sizeof(struct dma_cmd);
791 return 0;
792 #undef FAIL
795 static void remove_card(struct aic5800 *aic)
797 /* Disable interrupts of this controller */
798 reg_write(aic, misc_InterruptMask, 0);
799 /* Free AR buffer */
800 free_page(virt_to_phys(aic->rcv_page));
801 /* Free channel program buffer */
802 kfree(aic->pbuf);
803 /* Free interrupt request */
804 free_irq(aic->dev->irq, aic);
805 /* Unmap register space */
806 iounmap(aic->registers);
809 static int init_driver()
811 struct pci_dev *dev = NULL;
812 int success = 0;
814 if (num_of_cards) {
815 PRINT_G(KERN_DEBUG, __PRETTY_FUNCTION__ " called again");
816 return 0;
819 while ((dev = pci_find_device(PCI_VENDOR_ID_ADAPTEC,
820 PCI_DEVICE_ID_ADAPTEC_5800, dev))
821 != NULL) {
822 if (add_card(dev) == 0) {
823 success = 1;
827 if (success == 0) {
828 PRINT_G(KERN_WARNING, "no operable AIC-5800 based cards found");
829 return -ENXIO;
832 return 0;
835 /** Prepare our local CSR ROM. This is done by using the software-stored
836 ROM and inserting the GUID read from the EEPROM */
837 static size_t get_aic_rom(struct hpsb_host *host, const quadlet_t **ptr)
839 struct aic5800 *aic = host -> hostdata;
840 u64 guid;
842 /* Read the GUID from the card's EEPROM and put it into the right
843 place in the CONFIG ROM. */
844 guid = read_guid(aic);
845 aic5800_csr_rom[15] = (u32) (guid >> 32);
846 aic5800_csr_rom[16] = (u32) (guid & 0xFFFF);
848 *ptr = aic5800_csr_rom;
850 return sizeof(aic5800_csr_rom);
853 struct hpsb_host_template *get_aic_template(void)
855 static struct hpsb_host_template tmpl;
856 static int initialized = 0;
858 if (!initialized) {
859 /* Initialize by field names so that a template structure
860 * reorganization does not influence this code. */
861 tmpl.name = "aic5800";
863 tmpl.detect_hosts = aic_detect;
864 tmpl.initialize_host = aic_initialize;
865 tmpl.release_host = aic_release;
866 tmpl.get_rom = get_aic_rom;
867 tmpl.transmit_packet = aic_transmit;
868 tmpl.devctl = aic_devctl;
870 initialized = 1;
873 return &tmpl;
876 #ifdef MODULE
878 /* EXPORT_NO_SYMBOLS; */
880 MODULE_AUTHOR("Emanuel Pirker <epirker@edu.uni-klu.ac.at>");
881 MODULE_DESCRIPTION("Adaptec AIC-5800 PCI-to-IEEE1394 controller driver");
882 MODULE_SUPPORTED_DEVICE("aic5800");
884 void cleanup_module(void)
886 hpsb_unregister_lowlevel(get_aic_template());
887 PRINT_G(KERN_INFO, "removed " AIC5800_DRIVER_NAME " module");
890 int init_module(void)
892 if (hpsb_register_lowlevel(get_aic_template())) {
893 PRINT_G(KERN_ERR, "registering failed");
894 return -ENXIO;
895 } else {
896 return 0;
900 #endif /* MODULE */