include/asm-sparc64/parport.h

   1 /* $Id: parport.h,v 1.7 2000/01/28 13:43:14 jj Exp $
   2  * parport.h: sparc64 specific parport initialization and dma.
   3  *
   4  * Copyright (C) 1999  Eddie C. Dost  (ecd@skynet.be)
   5  */
   6
   7 #ifndef _ASM_SPARC64_PARPORT_H
   8 #define _ASM_SPARC64_PARPORT_H 1
   9
  10 #include <linux/config.h>
  11 #include <asm/ebus.h>
  12 #include <asm/ns87303.h>
  13
  14 #define PARPORT_PC_MAX_PORTS    PARPORT_MAX
  15
  16 static struct linux_ebus_dma *sparc_ebus_dmas[PARPORT_PC_MAX_PORTS];
  17
  18 static __inline__ void
  19 reset_dma(unsigned int dmanr)
  20 {
  21         unsigned int dcsr;
  22
  23         writel(EBUS_DCSR_RESET, &sparc_ebus_dmas[dmanr]->dcsr);
  24         udelay(1);
  25         dcsr = EBUS_DCSR_BURST_SZ_16 | EBUS_DCSR_TCI_DIS |
  26                EBUS_DCSR_EN_CNT | EBUS_DCSR_INT_EN;
  27         writel(dcsr, &sparc_ebus_dmas[dmanr]->dcsr);
  28 }
  29
  30 static __inline__ void
  31 enable_dma(unsigned int dmanr)
  32 {
  33         unsigned int dcsr;
  34
  35         dcsr = readl(&sparc_ebus_dmas[dmanr]->dcsr);
  36         dcsr |= EBUS_DCSR_EN_DMA;
  37         writel(dcsr, &sparc_ebus_dmas[dmanr]->dcsr);
  38 }
  39
  40 static __inline__ void
  41 disable_dma(unsigned int dmanr)
  42 {
  43         unsigned int dcsr;
  44
  45         dcsr = readl(&sparc_ebus_dmas[dmanr]->dcsr);
  46         if (dcsr & EBUS_DCSR_EN_DMA) {
  47                 while (dcsr & EBUS_DCSR_DRAIN) {
  48                         udelay(1);
  49                         dcsr = readl(&sparc_ebus_dmas[dmanr]->dcsr);
  50                 }
  51                 dcsr &= ~(EBUS_DCSR_EN_DMA);
  52                 writel(dcsr, &sparc_ebus_dmas[dmanr]->dcsr);
  53
  54                 dcsr = readl(&sparc_ebus_dmas[dmanr]->dcsr);
  55                 if (dcsr & EBUS_DCSR_ERR_PEND)
  56                         reset_dma(dmanr);
  57         }
  58 }
  59
  60 static __inline__ void
  61 clear_dma_ff(unsigned int dmanr)
  62 {
  63         /* nothing */
  64 }
  65
  66 static __inline__ void
  67 set_dma_mode(unsigned int dmanr, char mode)
  68 {
  69         unsigned int dcsr;
  70
  71         dcsr = readl(&sparc_ebus_dmas[dmanr]->dcsr);
  72         dcsr |= EBUS_DCSR_EN_CNT | EBUS_DCSR_TC;
  73         if (mode == DMA_MODE_WRITE)
  74                 dcsr &= ~(EBUS_DCSR_WRITE);
  75         else
  76                 dcsr |= EBUS_DCSR_WRITE;
  77         writel(dcsr, &sparc_ebus_dmas[dmanr]->dcsr);
  78 }
  79
  80 static __inline__ void
  81 set_dma_addr(unsigned int dmanr, unsigned int addr)
  82 {
  83         writel(addr, &sparc_ebus_dmas[dmanr]->dacr);
  84 }
  85
  86 static __inline__ void
  87 set_dma_count(unsigned int dmanr, unsigned int count)
  88 {
  89         writel(count, &sparc_ebus_dmas[dmanr]->dbcr);
  90 }
  91
  92 static __inline__ int
  93 get_dma_residue(unsigned int dmanr)
  94 {
  95         int res;
  96
  97         res = readl(&sparc_ebus_dmas[dmanr]->dbcr);
  98         if (res != 0)
  99                 reset_dma(dmanr);
 100         return res;
 101 }
 102
 103 static int parport_pc_find_nonpci_ports (int autoirq, int autodma)
 104 {
 105         struct linux_ebus *ebus;
 106         struct linux_ebus_device *edev;
 107         int count = 0;
 108
 109         if (!pci_present())
 110                 return 0;
 111
 112         for_each_ebus(ebus) {
 113                 for_each_ebusdev(edev, ebus) {
 114                         if (!strcmp(edev->prom_name, "ecpp")) {
 115                                 unsigned long base = edev->resource[0].start;
 116                                 unsigned long config = edev->resource[1].start;
 117
 118                                 sparc_ebus_dmas[count] =
 119                                                 (struct linux_ebus_dma *)
 120                                                         edev->resource[2].start;
 121                                 reset_dma(count);
 122
 123                                 /* Configure IRQ to Push Pull, Level Low */
 124                                 /* Enable ECP, set bit 2 of the CTR first */
 125                                 outb(0x04, base + 0x02);
 126                                 ns87303_modify(config, PCR,
 127                                                PCR_EPP_ENABLE |
 128                                                PCR_IRQ_ODRAIN,
 129                                                PCR_ECP_ENABLE |
 130                                                PCR_ECP_CLK_ENA |
 131                                                PCR_IRQ_POLAR);
 132
 133                                 /* CTR bit 5 controls direction of port */
 134                                 ns87303_modify(config, PTR,
 135                                                0, PTR_LPT_REG_DIR);
 136
 137                                 if (parport_pc_probe_port(base, base + 0x400,
 138                                                           edev->irqs[0],
 139                                                           count, ebus->self))
 140                                         count++;
 141                         }
 142                 }
 143         }
 144
 145         return count;
 146 }
 147
 148 #endif /* !(_ASM_SPARC64_PARPORT_H */