drivers/ide/sl82c105.c

   1 /*
   2  * linux/drivers/block/sl82c105.c
   3  *
   4  * SL82C105/Winbond 553 IDE driver
   5  *
   6  * Maintainer unknown.
   7  *
   8  * Drive tuning added from Rebel.com's kernel sources
   9  *  -- Russell King (15/11/98) linux@arm.linux.org.uk
  10  */
  11
  12 #include <linux/config.h>
  13 #include <linux/types.h>
  14 #include <linux/kernel.h>
  15 #include <linux/timer.h>
  16 #include <linux/mm.h>
  17 #include <linux/ioport.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/blkdev.h>
  20 #include <linux/hdreg.h>
  21 #include <linux/pci.h>
  22 #include <linux/ide.h>
  23
  24 #include <asm/io.h>
  25 #include <asm/dma.h>
  26
  27 #include "ide_modes.h"
  28
  29 extern char *ide_xfer_verbose (byte xfer_rate);
  30
  31 #ifdef CONFIG_ARCH_NETWINDER
  32 /*
  33  * Convert a PIO mode and cycle time to the required on/off
  34  * times for the interface.  This has protection against run-away
  35  * timings.
  36  */
  37 static unsigned int get_timing_sl82c105(ide_pio_data_t *p)
  38 {
  39         unsigned int cmd_on;
  40         unsigned int cmd_off;
  41
  42         cmd_on = (ide_pio_timings[p->pio_mode].active_time + 29) / 30;
  43         cmd_off = (p->cycle_time - 30 * cmd_on + 29) / 30;
  44
  45         if (cmd_on > 32)
  46                 cmd_on = 32;
  47         if (cmd_on == 0)
  48                 cmd_on = 1;
  49
  50         if (cmd_off > 32)
  51                 cmd_off = 32;
  52         if (cmd_off == 0)
  53                 cmd_off = 1;
  54
  55         return (cmd_on - 1) << 8 | (cmd_off - 1) | (p->use_iordy ? 0x40 : 0x00);
  56 }
  57
  58 /*
  59  * We only deal with PIO mode here - DMA mode 'using_dma' is not
  60  * initialised at the point that this function is called.
  61  */
  62 static void tune_sl82c105(ide_drive_t *drive, byte pio)
  63 {
  64         ide_hwif_t *hwif = HWIF(drive);
  65         struct pci_dev *dev = hwif->pci_dev;
  66         ide_pio_data_t p;
  67         unsigned short drv_ctrl = 0x909;
  68         unsigned int xfer_mode, reg;
  69
  70         reg = (hwif->channel ? 0x4c : 0x44) + (drive->select.b.unit ? 4 : 0);
  71
  72         pio = ide_get_best_pio_mode(drive, pio, 5, &p);
  73
  74         switch (pio) {
  75         default:
  76         case 0:         xfer_mode = XFER_PIO_0;         break;
  77         case 1:         xfer_mode = XFER_PIO_1;         break;
  78         case 2:         xfer_mode = XFER_PIO_2;         break;
  79         case 3:         xfer_mode = XFER_PIO_3;         break;
  80         case 4:         xfer_mode = XFER_PIO_4;         break;
  81         }
  82
  83         if (ide_config_drive_speed(drive, xfer_mode) == 0)
  84                 drv_ctrl = get_timing_sl82c105(&p);
  85
  86         pci_write_config_word(dev, reg, drv_ctrl);
  87         pci_read_config_word(dev, reg, &drv_ctrl);
  88
  89         printk("%s: selected %s (%dns) (%04X)\n", drive->name,
  90                ide_xfer_verbose(xfer_mode), p.cycle_time, drv_ctrl);
  91 }
  92 #endif
  93
  94 void ide_dmacapable_sl82c105(ide_hwif_t *hwif, unsigned long dmabase)
  95 {
  96         unsigned char rev;
  97
  98         pci_read_config_byte(hwif->pci_dev, PCI_REVISION_ID, &rev);
  99
 100         if (rev <= 5) {
 101                 hwif->autodma = 0;
 102                 hwif->drives[0].autotune = 1;
 103                 hwif->drives[1].autotune = 1;
 104                 printk("    %s: revision %d, Bus-Master DMA disabled\n",
 105                        hwif->name, rev);
 106         }
 107         ide_setup_dma(hwif, dmabase, 8);
 108 }
 109
 110 void ide_init_sl82c105(ide_hwif_t *hwif)
 111 {
 112         struct pci_dev *dev = hwif->pci_dev;
 113
 114 #ifdef CONFIG_ARCH_NETWINDER
 115         unsigned char ctrl_stat;
 116
 117         pci_read_config_byte(dev, 0x40, &ctrl_stat);
 118         pci_write_config_byte(dev, 0x40, ctrl_stat | 0x33);
 119
 120         hwif->tuneproc = tune_sl82c105;
 121 #else
 122         unsigned short t16;
 123         unsigned int t32;
 124         pci_read_config_word(dev, PCI_COMMAND, &t16);
 125         printk("SL82C105 command word: %x\n",t16);
 126         t16 |= PCI_COMMAND_IO;
 127         pci_write_config_word(dev, PCI_COMMAND, t16);
 128         /* IDE timing */
 129         pci_read_config_dword(dev, 0x44, &t32);
 130         printk("IDE timing: %08x, resetting to PIO0 timing\n",t32);
 131         pci_write_config_dword(dev, 0x44, 0x03e4);
 132 #ifndef CONFIG_MBX
 133         pci_read_config_dword(dev, 0x40, &t32);
 134         printk("IDE control/status register: %08x\n",t32);
 135         pci_write_config_dword(dev, 0x40, 0x10ff08a1);
 136 #endif /* CONFIG_MBX */
 137 #endif
 138 }