Merge with 2.3.48.
[linux-2.6/linux-mips.git] / arch / alpha / kernel / traps.c
blob828044b24c28d39d348b09d80bca4ef463ace474
1 /*
2 * arch/alpha/kernel/traps.c
4 * (C) Copyright 1994 Linus Torvalds
5 */
7 /*
8 * This file initializes the trap entry points
9 */
11 #include <linux/config.h>
12 #include <linux/mm.h>
13 #include <linux/sched.h>
14 #include <linux/tty.h>
15 #include <linux/delay.h>
16 #include <linux/smp_lock.h>
18 #include <asm/gentrap.h>
19 #include <asm/uaccess.h>
20 #include <asm/unaligned.h>
21 #include <asm/sysinfo.h>
23 #include "proto.h"
25 void
26 dik_show_regs(struct pt_regs *regs, unsigned long *r9_15)
28 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx\n",
29 regs->pc, regs->r26, regs->ps);
30 printk("r0 = %016lx r1 = %016lx r2 = %016lx\n",
31 regs->r0, regs->r1, regs->r2);
32 printk("r3 = %016lx r4 = %016lx r5 = %016lx\n",
33 regs->r3, regs->r4, regs->r5);
34 printk("r6 = %016lx r7 = %016lx r8 = %016lx\n",
35 regs->r6, regs->r7, regs->r8);
37 if (r9_15) {
38 printk("r9 = %016lx r10= %016lx r11= %016lx\n",
39 r9_15[9], r9_15[10], r9_15[11]);
40 printk("r12= %016lx r13= %016lx r14= %016lx\n",
41 r9_15[12], r9_15[13], r9_15[14]);
42 printk("r15= %016lx\n", r9_15[15]);
45 printk("r16= %016lx r17= %016lx r18= %016lx\n",
46 regs->r16, regs->r17, regs->r18);
47 printk("r19= %016lx r20= %016lx r21= %016lx\n",
48 regs->r19, regs->r20, regs->r21);
49 printk("r22= %016lx r23= %016lx r24= %016lx\n",
50 regs->r22, regs->r23, regs->r24);
51 printk("r25= %016lx r27= %016lx r28= %016lx\n",
52 regs->r25, regs->r27, regs->r28);
53 printk("gp = %016lx sp = %p\n", regs->gp, regs+1);
56 static void
57 dik_show_code(unsigned int *pc)
59 long i;
61 printk("Code:");
62 for (i = -3; i < 6; i++) {
63 unsigned int insn;
64 if (__get_user(insn, pc+i))
65 break;
66 printk("%c%08x%c",i?' ':'<',insn,i?' ':'>');
68 printk("\n");
71 static void
72 dik_show_trace(unsigned long *sp)
74 long i = 0;
75 printk("Trace:");
76 while (0x1ff8 & (unsigned long) sp) {
77 extern unsigned long _stext, _etext;
78 unsigned long tmp = *sp;
79 sp++;
80 if (tmp < (unsigned long) &_stext)
81 continue;
82 if (tmp >= (unsigned long) &_etext)
83 continue;
84 printk(" [<%lx>]", tmp);
85 if (++i > 40) {
86 printk(" ...");
87 break;
90 printk("\n");
93 void
94 die_if_kernel(char * str, struct pt_regs *regs, long err, unsigned long *r9_15)
96 if (regs->ps & 8)
97 return;
98 #ifdef __SMP__
99 printk("CPU %d ", hard_smp_processor_id());
100 #endif
101 printk("%s(%d): %s %ld\n", current->comm, current->pid, str, err);
102 dik_show_regs(regs, r9_15);
103 dik_show_code((unsigned int *)regs->pc);
104 dik_show_trace((unsigned long *)(regs+1));
106 if (current->thread.flags & (1UL << 63)) {
107 printk("die_if_kernel recursion detected.\n");
108 sti();
109 while (1);
111 current->thread.flags |= (1UL << 63);
112 do_exit(SIGSEGV);
115 #ifndef CONFIG_MATHEMU
116 static long dummy_emul(void) { return 0; }
117 long (*alpha_fp_emul_imprecise)(struct pt_regs *regs, unsigned long writemask)
118 = (void *)dummy_emul;
119 long (*alpha_fp_emul) (unsigned long pc)
120 = (void *)dummy_emul;
121 #else
122 long alpha_fp_emul_imprecise(struct pt_regs *regs, unsigned long writemask);
123 long alpha_fp_emul (unsigned long pc);
124 #endif
126 asmlinkage void
127 do_entArith(unsigned long summary, unsigned long write_mask,
128 unsigned long a2, unsigned long a3, unsigned long a4,
129 unsigned long a5, struct pt_regs regs)
131 if (summary & 1) {
132 /* Software-completion summary bit is set, so try to
133 emulate the instruction. */
134 if (!amask(AMASK_PRECISE_TRAP)) {
135 /* 21264 (except pass 1) has precise exceptions. */
136 if (alpha_fp_emul(regs.pc - 4))
137 return;
138 } else {
139 if (alpha_fp_emul_imprecise(&regs, write_mask))
140 return;
144 #if 0
145 printk("%s: arithmetic trap at %016lx: %02lx %016lx\n",
146 current->comm, regs.pc, summary, write_mask);
147 #endif
148 die_if_kernel("Arithmetic fault", &regs, 0, 0);
149 send_sig(SIGFPE, current, 1);
152 asmlinkage void
153 do_entIF(unsigned long type, unsigned long a1,
154 unsigned long a2, unsigned long a3, unsigned long a4,
155 unsigned long a5, struct pt_regs regs)
157 die_if_kernel((type == 1 ? "Kernel Bug" : "Instruction fault"),
158 &regs, type, 0);
160 switch (type) {
161 case 0: /* breakpoint */
162 if (ptrace_cancel_bpt(current)) {
163 regs.pc -= 4; /* make pc point to former bpt */
165 send_sig(SIGTRAP, current, 1);
166 break;
168 case 1: /* bugcheck */
169 send_sig(SIGTRAP, current, 1);
170 break;
172 case 2: /* gentrap */
174 * The exception code should be passed on to the signal
175 * handler as the second argument. Linux doesn't do that
176 * yet (also notice that Linux *always* behaves like
177 * DEC Unix with SA_SIGINFO off; see DEC Unix man page
178 * for sigaction(2)).
180 switch ((long) regs.r16) {
181 case GEN_INTOVF: case GEN_INTDIV: case GEN_FLTOVF:
182 case GEN_FLTDIV: case GEN_FLTUND: case GEN_FLTINV:
183 case GEN_FLTINE: case GEN_ROPRAND:
184 send_sig(SIGFPE, current, 1);
185 break;
187 case GEN_DECOVF:
188 case GEN_DECDIV:
189 case GEN_DECINV:
190 case GEN_ASSERTERR:
191 case GEN_NULPTRERR:
192 case GEN_STKOVF:
193 case GEN_STRLENERR:
194 case GEN_SUBSTRERR:
195 case GEN_RANGERR:
196 case GEN_SUBRNG:
197 case GEN_SUBRNG1:
198 case GEN_SUBRNG2:
199 case GEN_SUBRNG3:
200 case GEN_SUBRNG4:
201 case GEN_SUBRNG5:
202 case GEN_SUBRNG6:
203 case GEN_SUBRNG7:
204 send_sig(SIGTRAP, current, 1);
205 break;
207 break;
209 case 3: /* FEN fault */
210 send_sig(SIGILL, current, 1);
211 break;
213 case 4: /* opDEC */
214 if (implver() == IMPLVER_EV4) {
215 /* EV4 does not implement anything except normal
216 rounding. Everything else will come here as
217 an illegal instruction. Emulate them. */
218 if (alpha_fp_emul(regs.pc)) {
219 regs.pc += 4;
220 return;
223 send_sig(SIGILL, current, 1);
224 break;
226 default:
227 panic("do_entIF: unexpected instruction-fault type");
231 /* There is an ifdef in the PALcode in MILO that enables a
232 "kernel debugging entry point" as an unprivilaged call_pal.
234 We don't want to have anything to do with it, but unfortunately
235 several versions of MILO included in distributions have it enabled,
236 and if we don't put something on the entry point we'll oops. */
238 asmlinkage void
239 do_entDbg(unsigned long type, unsigned long a1,
240 unsigned long a2, unsigned long a3, unsigned long a4,
241 unsigned long a5, struct pt_regs regs)
243 die_if_kernel("Instruction fault", &regs, type, 0);
244 force_sig(SIGILL, current);
249 * entUna has a different register layout to be reasonably simple. It
250 * needs access to all the integer registers (the kernel doesn't use
251 * fp-regs), and it needs to have them in order for simpler access.
253 * Due to the non-standard register layout (and because we don't want
254 * to handle floating-point regs), user-mode unaligned accesses are
255 * handled separately by do_entUnaUser below.
257 * Oh, btw, we don't handle the "gp" register correctly, but if we fault
258 * on a gp-register unaligned load/store, something is _very_ wrong
259 * in the kernel anyway..
261 struct allregs {
262 unsigned long regs[32];
263 unsigned long ps, pc, gp, a0, a1, a2;
266 struct unaligned_stat {
267 unsigned long count, va, pc;
268 } unaligned[2];
271 /* Macro for exception fixup code to access integer registers. */
272 #define una_reg(r) (regs.regs[(r) >= 16 && (r) <= 18 ? (r)+19 : (r)])
275 asmlinkage void
276 do_entUna(void * va, unsigned long opcode, unsigned long reg,
277 unsigned long a3, unsigned long a4, unsigned long a5,
278 struct allregs regs)
280 long error, tmp1, tmp2, tmp3, tmp4;
281 unsigned long pc = regs.pc - 4;
282 unsigned fixup;
284 unaligned[0].count++;
285 unaligned[0].va = (unsigned long) va;
286 unaligned[0].pc = pc;
288 /* We don't want to use the generic get/put unaligned macros as
289 we want to trap exceptions. Only if we actually get an
290 exception will we decide whether we should have caught it. */
292 switch (opcode) {
293 case 0x0c: /* ldwu */
294 __asm__ __volatile__(
295 "1: ldq_u %1,0(%3)\n"
296 "2: ldq_u %2,1(%3)\n"
297 " extwl %1,%3,%1\n"
298 " extwh %2,%3,%2\n"
299 "3:\n"
300 ".section __ex_table,\"a\"\n"
301 " .gprel32 1b\n"
302 " lda %1,3b-1b(%0)\n"
303 " .gprel32 2b\n"
304 " lda %2,3b-2b(%0)\n"
305 ".previous"
306 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
307 : "r"(va), "0"(0));
308 if (error)
309 goto got_exception;
310 una_reg(reg) = tmp1|tmp2;
311 return;
313 case 0x28: /* ldl */
314 __asm__ __volatile__(
315 "1: ldq_u %1,0(%3)\n"
316 "2: ldq_u %2,3(%3)\n"
317 " extll %1,%3,%1\n"
318 " extlh %2,%3,%2\n"
319 "3:\n"
320 ".section __ex_table,\"a\"\n"
321 " .gprel32 1b\n"
322 " lda %1,3b-1b(%0)\n"
323 " .gprel32 2b\n"
324 " lda %2,3b-2b(%0)\n"
325 ".previous"
326 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
327 : "r"(va), "0"(0));
328 if (error)
329 goto got_exception;
330 una_reg(reg) = (int)(tmp1|tmp2);
331 return;
333 case 0x29: /* ldq */
334 __asm__ __volatile__(
335 "1: ldq_u %1,0(%3)\n"
336 "2: ldq_u %2,7(%3)\n"
337 " extql %1,%3,%1\n"
338 " extqh %2,%3,%2\n"
339 "3:\n"
340 ".section __ex_table,\"a\"\n"
341 " .gprel32 1b\n"
342 " lda %1,3b-1b(%0)\n"
343 " .gprel32 2b\n"
344 " lda %2,3b-2b(%0)\n"
345 ".previous"
346 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
347 : "r"(va), "0"(0));
348 if (error)
349 goto got_exception;
350 una_reg(reg) = tmp1|tmp2;
351 return;
353 /* Note that the store sequences do not indicate that they change
354 memory because it _should_ be affecting nothing in this context.
355 (Otherwise we have other, much larger, problems.) */
356 case 0x0d: /* stw */
357 __asm__ __volatile__(
358 "1: ldq_u %2,1(%5)\n"
359 "2: ldq_u %1,0(%5)\n"
360 " inswh %6,%5,%4\n"
361 " inswl %6,%5,%3\n"
362 " mskwh %2,%5,%2\n"
363 " mskwl %1,%5,%1\n"
364 " or %2,%4,%2\n"
365 " or %1,%3,%1\n"
366 "3: stq_u %2,1(%5)\n"
367 "4: stq_u %1,0(%5)\n"
368 "5:\n"
369 ".section __ex_table,\"a\"\n"
370 " .gprel32 1b\n"
371 " lda %2,5b-1b(%0)\n"
372 " .gprel32 2b\n"
373 " lda %1,5b-2b(%0)\n"
374 " .gprel32 3b\n"
375 " lda $31,5b-3b(%0)\n"
376 " .gprel32 4b\n"
377 " lda $31,5b-4b(%0)\n"
378 ".previous"
379 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
380 "=&r"(tmp3), "=&r"(tmp4)
381 : "r"(va), "r"(una_reg(reg)), "0"(0));
382 if (error)
383 goto got_exception;
384 return;
386 case 0x2c: /* stl */
387 __asm__ __volatile__(
388 "1: ldq_u %2,3(%5)\n"
389 "2: ldq_u %1,0(%5)\n"
390 " inslh %6,%5,%4\n"
391 " insll %6,%5,%3\n"
392 " msklh %2,%5,%2\n"
393 " mskll %1,%5,%1\n"
394 " or %2,%4,%2\n"
395 " or %1,%3,%1\n"
396 "3: stq_u %2,3(%5)\n"
397 "4: stq_u %1,0(%5)\n"
398 "5:\n"
399 ".section __ex_table,\"a\"\n"
400 " .gprel32 1b\n"
401 " lda %2,5b-1b(%0)\n"
402 " .gprel32 2b\n"
403 " lda %1,5b-2b(%0)\n"
404 " .gprel32 3b\n"
405 " lda $31,5b-3b(%0)\n"
406 " .gprel32 4b\n"
407 " lda $31,5b-4b(%0)\n"
408 ".previous"
409 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
410 "=&r"(tmp3), "=&r"(tmp4)
411 : "r"(va), "r"(una_reg(reg)), "0"(0));
412 if (error)
413 goto got_exception;
414 return;
416 case 0x2d: /* stq */
417 __asm__ __volatile__(
418 "1: ldq_u %2,7(%5)\n"
419 "2: ldq_u %1,0(%5)\n"
420 " insqh %6,%5,%4\n"
421 " insql %6,%5,%3\n"
422 " mskqh %2,%5,%2\n"
423 " mskql %1,%5,%1\n"
424 " or %2,%4,%2\n"
425 " or %1,%3,%1\n"
426 "3: stq_u %2,7(%5)\n"
427 "4: stq_u %1,0(%5)\n"
428 "5:\n"
429 ".section __ex_table,\"a\"\n\t"
430 " .gprel32 1b\n"
431 " lda %2,5b-1b(%0)\n"
432 " .gprel32 2b\n"
433 " lda %1,5b-2b(%0)\n"
434 " .gprel32 3b\n"
435 " lda $31,5b-3b(%0)\n"
436 " .gprel32 4b\n"
437 " lda $31,5b-4b(%0)\n"
438 ".previous"
439 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
440 "=&r"(tmp3), "=&r"(tmp4)
441 : "r"(va), "r"(una_reg(reg)), "0"(0));
442 if (error)
443 goto got_exception;
444 return;
447 lock_kernel();
448 printk("Bad unaligned kernel access at %016lx: %p %lx %ld\n",
449 pc, va, opcode, reg);
450 do_exit(SIGSEGV);
452 got_exception:
453 /* Ok, we caught the exception, but we don't want it. Is there
454 someone to pass it along to? */
455 if ((fixup = search_exception_table(pc)) != 0) {
456 unsigned long newpc;
457 newpc = fixup_exception(una_reg, fixup, pc);
459 printk("Forwarding unaligned exception at %lx (%lx)\n",
460 pc, newpc);
462 (&regs)->pc = newpc;
463 return;
467 * Yikes! No one to forward the exception to.
468 * Since the registers are in a weird format, dump them ourselves.
470 lock_kernel();
472 printk("%s(%d): unhandled unaligned exception\n",
473 current->comm, current->pid);
475 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx\n",
476 pc, una_reg(26), regs.ps);
477 printk("r0 = %016lx r1 = %016lx r2 = %016lx\n",
478 una_reg(0), una_reg(1), una_reg(2));
479 printk("r3 = %016lx r4 = %016lx r5 = %016lx\n",
480 una_reg(3), una_reg(4), una_reg(5));
481 printk("r6 = %016lx r7 = %016lx r8 = %016lx\n",
482 una_reg(6), una_reg(7), una_reg(8));
483 printk("r9 = %016lx r10= %016lx r11= %016lx\n",
484 una_reg(9), una_reg(10), una_reg(11));
485 printk("r12= %016lx r13= %016lx r14= %016lx\n",
486 una_reg(12), una_reg(13), una_reg(14));
487 printk("r15= %016lx\n", una_reg(15));
488 printk("r16= %016lx r17= %016lx r18= %016lx\n",
489 una_reg(16), una_reg(17), una_reg(18));
490 printk("r19= %016lx r20= %016lx r21= %016lx\n",
491 una_reg(19), una_reg(20), una_reg(21));
492 printk("r22= %016lx r23= %016lx r24= %016lx\n",
493 una_reg(22), una_reg(23), una_reg(24));
494 printk("r25= %016lx r27= %016lx r28= %016lx\n",
495 una_reg(25), una_reg(27), una_reg(28));
496 printk("gp = %016lx sp = %p\n", regs.gp, &regs+1);
498 dik_show_code((unsigned int *)pc);
499 dik_show_trace((unsigned long *)(&regs+1));
501 if (current->thread.flags & (1UL << 63)) {
502 printk("die_if_kernel recursion detected.\n");
503 sti();
504 while (1);
506 current->thread.flags |= (1UL << 63);
507 do_exit(SIGSEGV);
511 * Convert an s-floating point value in memory format to the
512 * corresponding value in register format. The exponent
513 * needs to be remapped to preserve non-finite values
514 * (infinities, not-a-numbers, denormals).
516 static inline unsigned long
517 s_mem_to_reg (unsigned long s_mem)
519 unsigned long frac = (s_mem >> 0) & 0x7fffff;
520 unsigned long sign = (s_mem >> 31) & 0x1;
521 unsigned long exp_msb = (s_mem >> 30) & 0x1;
522 unsigned long exp_low = (s_mem >> 23) & 0x7f;
523 unsigned long exp;
525 exp = (exp_msb << 10) | exp_low; /* common case */
526 if (exp_msb) {
527 if (exp_low == 0x7f) {
528 exp = 0x7ff;
530 } else {
531 if (exp_low == 0x00) {
532 exp = 0x000;
533 } else {
534 exp |= (0x7 << 7);
537 return (sign << 63) | (exp << 52) | (frac << 29);
541 * Convert an s-floating point value in register format to the
542 * corresponding value in memory format.
544 static inline unsigned long
545 s_reg_to_mem (unsigned long s_reg)
547 return ((s_reg >> 62) << 30) | ((s_reg << 5) >> 34);
551 * Handle user-level unaligned fault. Handling user-level unaligned
552 * faults is *extremely* slow and produces nasty messages. A user
553 * program *should* fix unaligned faults ASAP.
555 * Notice that we have (almost) the regular kernel stack layout here,
556 * so finding the appropriate registers is a little more difficult
557 * than in the kernel case.
559 * Finally, we handle regular integer load/stores only. In
560 * particular, load-linked/store-conditionally and floating point
561 * load/stores are not supported. The former make no sense with
562 * unaligned faults (they are guaranteed to fail) and I don't think
563 * the latter will occur in any decent program.
565 * Sigh. We *do* have to handle some FP operations, because GCC will
566 * uses them as temporary storage for integer memory to memory copies.
567 * However, we need to deal with stt/ldt and sts/lds only.
570 #define OP_INT_MASK ( 1L << 0x28 | 1L << 0x2c /* ldl stl */ \
571 | 1L << 0x29 | 1L << 0x2d /* ldq stq */ \
572 | 1L << 0x0c | 1L << 0x0d /* ldwu stw */ \
573 | 1L << 0x0a | 1L << 0x0e ) /* ldbu stb */
575 #define OP_WRITE_MASK ( 1L << 0x26 | 1L << 0x27 /* sts stt */ \
576 | 1L << 0x2c | 1L << 0x2d /* stl stq */ \
577 | 1L << 0x0d | 1L << 0x0e ) /* stw stb */
579 #define R(x) ((size_t) &((struct pt_regs *)0)->x)
581 static int unauser_reg_offsets[32] = {
582 R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), R(r8),
583 /* r9 ... r15 are stored in front of regs. */
584 -56, -48, -40, -32, -24, -16, -8,
585 R(r16), R(r17), R(r18),
586 R(r19), R(r20), R(r21), R(r22), R(r23), R(r24), R(r25), R(r26),
587 R(r27), R(r28), R(gp),
588 0, 0
591 #undef R
593 asmlinkage void
594 do_entUnaUser(void * va, unsigned long opcode,
595 unsigned long reg, struct pt_regs *regs)
597 static int cnt = 0;
598 static long last_time = 0;
600 unsigned long tmp1, tmp2, tmp3, tmp4;
601 unsigned long fake_reg, *reg_addr = &fake_reg;
602 unsigned long uac_bits;
603 long error;
605 /* Check the UAC bits to decide what the user wants us to do
606 with the unaliged access. */
608 uac_bits = (current->thread.flags >> UAC_SHIFT) & UAC_BITMASK;
609 if (!(uac_bits & UAC_NOPRINT)) {
610 if (cnt >= 5 && jiffies - last_time > 5*HZ) {
611 cnt = 0;
613 if (++cnt < 5) {
614 printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n",
615 current->comm, current->pid,
616 regs->pc - 4, va, opcode, reg);
618 last_time = jiffies;
620 if (uac_bits & UAC_SIGBUS) {
621 goto give_sigbus;
623 if (uac_bits & UAC_NOFIX) {
624 /* Not sure why you'd want to use this, but... */
625 return;
628 /* Don't bother reading ds in the access check since we already
629 know that this came from the user. Also rely on the fact that
630 the page at TASK_SIZE is unmapped and so can't be touched anyway. */
631 if (!__access_ok((unsigned long)va, 0, USER_DS))
632 goto give_sigsegv;
634 ++unaligned[1].count;
635 unaligned[1].va = (unsigned long)va;
636 unaligned[1].pc = regs->pc - 4;
638 if ((1L << opcode) & OP_INT_MASK) {
639 /* it's an integer load/store */
640 if (reg < 30) {
641 reg_addr = (unsigned long *)
642 ((char *)regs + unauser_reg_offsets[reg]);
643 } else if (reg == 30) {
644 /* usp in PAL regs */
645 fake_reg = rdusp();
646 } else {
647 /* zero "register" */
648 fake_reg = 0;
652 /* We don't want to use the generic get/put unaligned macros as
653 we want to trap exceptions. Only if we actually get an
654 exception will we decide whether we should have caught it. */
656 switch (opcode) {
657 case 0x0c: /* ldwu */
658 __asm__ __volatile__(
659 "1: ldq_u %1,0(%3)\n"
660 "2: ldq_u %2,1(%3)\n"
661 " extwl %1,%3,%1\n"
662 " extwh %2,%3,%2\n"
663 "3:\n"
664 ".section __ex_table,\"a\"\n"
665 " .gprel32 1b\n"
666 " lda %1,3b-1b(%0)\n"
667 " .gprel32 2b\n"
668 " lda %2,3b-2b(%0)\n"
669 ".previous"
670 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
671 : "r"(va), "0"(0));
672 if (error)
673 goto give_sigsegv;
674 *reg_addr = tmp1|tmp2;
675 break;
677 case 0x22: /* lds */
678 __asm__ __volatile__(
679 "1: ldq_u %1,0(%3)\n"
680 "2: ldq_u %2,3(%3)\n"
681 " extll %1,%3,%1\n"
682 " extlh %2,%3,%2\n"
683 "3:\n"
684 ".section __ex_table,\"a\"\n"
685 " .gprel32 1b\n"
686 " lda %1,3b-1b(%0)\n"
687 " .gprel32 2b\n"
688 " lda %2,3b-2b(%0)\n"
689 ".previous"
690 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
691 : "r"(va), "0"(0));
692 if (error)
693 goto give_sigsegv;
694 alpha_write_fp_reg(reg, s_mem_to_reg((int)(tmp1|tmp2)));
695 return;
697 case 0x23: /* ldt */
698 __asm__ __volatile__(
699 "1: ldq_u %1,0(%3)\n"
700 "2: ldq_u %2,7(%3)\n"
701 " extql %1,%3,%1\n"
702 " extqh %2,%3,%2\n"
703 "3:\n"
704 ".section __ex_table,\"a\"\n"
705 " .gprel32 1b\n"
706 " lda %1,3b-1b(%0)\n"
707 " .gprel32 2b\n"
708 " lda %2,3b-2b(%0)\n"
709 ".previous"
710 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
711 : "r"(va), "0"(0));
712 if (error)
713 goto give_sigsegv;
714 alpha_write_fp_reg(reg, tmp1|tmp2);
715 return;
717 case 0x28: /* ldl */
718 __asm__ __volatile__(
719 "1: ldq_u %1,0(%3)\n"
720 "2: ldq_u %2,3(%3)\n"
721 " extll %1,%3,%1\n"
722 " extlh %2,%3,%2\n"
723 "3:\n"
724 ".section __ex_table,\"a\"\n"
725 " .gprel32 1b\n"
726 " lda %1,3b-1b(%0)\n"
727 " .gprel32 2b\n"
728 " lda %2,3b-2b(%0)\n"
729 ".previous"
730 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
731 : "r"(va), "0"(0));
732 if (error)
733 goto give_sigsegv;
734 *reg_addr = (int)(tmp1|tmp2);
735 break;
737 case 0x29: /* ldq */
738 __asm__ __volatile__(
739 "1: ldq_u %1,0(%3)\n"
740 "2: ldq_u %2,7(%3)\n"
741 " extql %1,%3,%1\n"
742 " extqh %2,%3,%2\n"
743 "3:\n"
744 ".section __ex_table,\"a\"\n"
745 " .gprel32 1b\n"
746 " lda %1,3b-1b(%0)\n"
747 " .gprel32 2b\n"
748 " lda %2,3b-2b(%0)\n"
749 ".previous"
750 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
751 : "r"(va), "0"(0));
752 if (error)
753 goto give_sigsegv;
754 *reg_addr = tmp1|tmp2;
755 break;
757 /* Note that the store sequences do not indicate that they change
758 memory because it _should_ be affecting nothing in this context.
759 (Otherwise we have other, much larger, problems.) */
760 case 0x0d: /* stw */
761 __asm__ __volatile__(
762 "1: ldq_u %2,1(%5)\n"
763 "2: ldq_u %1,0(%5)\n"
764 " inswh %6,%5,%4\n"
765 " inswl %6,%5,%3\n"
766 " mskwh %2,%5,%2\n"
767 " mskwl %1,%5,%1\n"
768 " or %2,%4,%2\n"
769 " or %1,%3,%1\n"
770 "3: stq_u %2,1(%5)\n"
771 "4: stq_u %1,0(%5)\n"
772 "5:\n"
773 ".section __ex_table,\"a\"\n"
774 " .gprel32 1b\n"
775 " lda %2,5b-1b(%0)\n"
776 " .gprel32 2b\n"
777 " lda %1,5b-2b(%0)\n"
778 " .gprel32 3b\n"
779 " lda $31,5b-3b(%0)\n"
780 " .gprel32 4b\n"
781 " lda $31,5b-4b(%0)\n"
782 ".previous"
783 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
784 "=&r"(tmp3), "=&r"(tmp4)
785 : "r"(va), "r"(*reg_addr), "0"(0));
786 if (error)
787 goto give_sigsegv;
788 return;
790 case 0x26: /* sts */
791 fake_reg = s_reg_to_mem(alpha_read_fp_reg(reg));
792 /* FALLTHRU */
794 case 0x2c: /* stl */
795 __asm__ __volatile__(
796 "1: ldq_u %2,3(%5)\n"
797 "2: ldq_u %1,0(%5)\n"
798 " inslh %6,%5,%4\n"
799 " insll %6,%5,%3\n"
800 " msklh %2,%5,%2\n"
801 " mskll %1,%5,%1\n"
802 " or %2,%4,%2\n"
803 " or %1,%3,%1\n"
804 "3: stq_u %2,3(%5)\n"
805 "4: stq_u %1,0(%5)\n"
806 "5:\n"
807 ".section __ex_table,\"a\"\n"
808 " .gprel32 1b\n"
809 " lda %2,5b-1b(%0)\n"
810 " .gprel32 2b\n"
811 " lda %1,5b-2b(%0)\n"
812 " .gprel32 3b\n"
813 " lda $31,5b-3b(%0)\n"
814 " .gprel32 4b\n"
815 " lda $31,5b-4b(%0)\n"
816 ".previous"
817 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
818 "=&r"(tmp3), "=&r"(tmp4)
819 : "r"(va), "r"(*reg_addr), "0"(0));
820 if (error)
821 goto give_sigsegv;
822 return;
824 case 0x27: /* stt */
825 fake_reg = alpha_read_fp_reg(reg);
826 /* FALLTHRU */
828 case 0x2d: /* stq */
829 __asm__ __volatile__(
830 "1: ldq_u %2,7(%5)\n"
831 "2: ldq_u %1,0(%5)\n"
832 " insqh %6,%5,%4\n"
833 " insql %6,%5,%3\n"
834 " mskqh %2,%5,%2\n"
835 " mskql %1,%5,%1\n"
836 " or %2,%4,%2\n"
837 " or %1,%3,%1\n"
838 "3: stq_u %2,7(%5)\n"
839 "4: stq_u %1,0(%5)\n"
840 "5:\n"
841 ".section __ex_table,\"a\"\n\t"
842 " .gprel32 1b\n"
843 " lda %2,5b-1b(%0)\n"
844 " .gprel32 2b\n"
845 " lda %1,5b-2b(%0)\n"
846 " .gprel32 3b\n"
847 " lda $31,5b-3b(%0)\n"
848 " .gprel32 4b\n"
849 " lda $31,5b-4b(%0)\n"
850 ".previous"
851 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
852 "=&r"(tmp3), "=&r"(tmp4)
853 : "r"(va), "r"(*reg_addr), "0"(0));
854 if (error)
855 goto give_sigsegv;
856 return;
858 default:
859 /* What instruction were you trying to use, exactly? */
860 goto give_sigbus;
863 /* Only integer loads should get here; everyone else returns early. */
864 if (reg == 30)
865 wrusp(fake_reg);
866 return;
868 give_sigsegv:
869 regs->pc -= 4; /* make pc point to faulting insn */
870 send_sig(SIGSEGV, current, 1);
871 return;
873 give_sigbus:
874 regs->pc -= 4;
875 send_sig(SIGBUS, current, 1);
876 return;
880 * Unimplemented system calls.
882 asmlinkage long
883 alpha_ni_syscall(unsigned long a0, unsigned long a1, unsigned long a2,
884 unsigned long a3, unsigned long a4, unsigned long a5,
885 struct pt_regs regs)
887 /* We only get here for OSF system calls, minus #112;
888 the rest go to sys_ni_syscall. */
889 printk("<sc %ld(%lx,%lx,%lx)>", regs.r0, a0, a1, a2);
890 return -ENOSYS;
893 void
894 trap_init(void)
896 /* Tell PAL-code what global pointer we want in the kernel. */
897 register unsigned long gptr __asm__("$29");
898 wrkgp(gptr);
900 wrent(entArith, 1);
901 wrent(entMM, 2);
902 wrent(entIF, 3);
903 wrent(entUna, 4);
904 wrent(entSys, 5);
905 wrent(entDbg, 6);