1 #ifndef __ASM_SOFTIRQ_H
2 #define __ASM_SOFTIRQ_H
4 #include <asm/atomic.h>
5 #include <asm/hardirq.h>
7 extern unsigned int local_bh_count
[NR_CPUS
];
9 #define get_active_bhs() (bh_mask & bh_active)
10 #define clear_active_bhs(x) atomic_clear_mask((x),&bh_active)
12 extern inline void init_bh(int nr
, void (*routine
)(void))
14 bh_base
[nr
] = routine
;
15 atomic_set(&bh_mask_count
[nr
], 0);
19 extern inline void remove_bh(int nr
)
21 bh_mask
&= ~(1 << nr
);
26 extern inline void mark_bh(int nr
)
28 set_bit(nr
, &bh_active
);
34 * The locking mechanism for base handlers, to prevent re-entrancy,
35 * is entirely private to an implementation, it should not be
36 * referenced at all outside of this file.
38 extern atomic_t global_bh_lock
;
39 extern atomic_t global_bh_count
;
41 extern void synchronize_bh(void);
43 static inline void start_bh_atomic(void)
45 atomic_inc(&global_bh_lock
);
49 static inline void end_bh_atomic(void)
51 atomic_dec(&global_bh_lock
);
54 /* These are for the IRQs testing the lock */
55 static inline int softirq_trylock(int cpu
)
57 if (!test_and_set_bit(0,&global_bh_count
)) {
58 if (atomic_read(&global_bh_lock
) == 0) {
59 ++local_bh_count
[cpu
];
62 clear_bit(0,&global_bh_count
);
67 static inline void softirq_endlock(int cpu
)
69 local_bh_count
[cpu
]--;
70 clear_bit(0,&global_bh_count
);
75 extern inline void start_bh_atomic(void)
77 local_bh_count
[smp_processor_id()]++;
81 extern inline void end_bh_atomic(void)
84 local_bh_count
[smp_processor_id()]--;
87 /* These are for the irq's testing the lock */
88 #define softirq_trylock(cpu) (local_bh_count[cpu] ? 0 : (local_bh_count[cpu]=1))
89 #define softirq_endlock(cpu) (local_bh_count[cpu] = 0)
90 #define synchronize_bh() barrier()
95 * These use a mask count to correctly handle
96 * nested disable/enable calls
98 extern inline void disable_bh(int nr
)
100 bh_mask
&= ~(1 << nr
);
101 atomic_inc(&bh_mask_count
[nr
]);
105 extern inline void enable_bh(int nr
)
107 if (atomic_dec_and_test(&bh_mask_count
[nr
]))
111 #endif /* __ASM_SOFTIRQ_H */