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[linux-2.6/linux-mips.git] / include / asm-parisc / smp.h
blobe03ccc7732c24e56056d694b5cad7668f72fc90e
1 #ifndef __ASM_SMP_H
2 #define __ASM_SMP_H
4 #include <linux/config.h>
6 #if defined(CONFIG_SMP)
8 /* Page Zero Location PDC will look for the address to branch to when we poke
9 ** slave CPUs still in "Icache loop".
11 #define PDC_OS_BOOT_RENDEZVOUS 0x10
12 #define PDC_OS_BOOT_RENDEZVOUS_HI 0x28
14 #ifndef ASSEMBLY
15 #include <linux/bitops.h>
16 #include <linux/threads.h> /* for NR_CPUS */
17 typedef unsigned long address_t;
19 extern volatile unsigned long cpu_online_map;
23 * Private routines/data
25 * physical and logical are equivalent until we support CPU hotplug.
27 #define cpu_number_map(cpu) (cpu)
28 #define cpu_logical_map(cpu) (cpu)
30 extern void smp_send_reschedule(int cpu);
32 #endif /* !ASSEMBLY */
35 * This magic constant controls our willingness to transfer
36 * a process across CPUs. Such a transfer incurs cache and tlb
37 * misses. The current value is inherited from i386. Still needs
38 * to be tuned for parisc.
41 #define PROC_CHANGE_PENALTY 15 /* Schedule penalty */
43 #undef ENTRY_SYS_CPUS
44 #ifdef ENTRY_SYS_CPUS
45 #define STATE_RENDEZVOUS 0
46 #define STATE_STOPPED 1
47 #define STATE_RUNNING 2
48 #define STATE_HALTED 3
49 #endif
51 extern unsigned long cpu_present_mask;
53 #define smp_processor_id() (current_thread_info()->cpu)
54 #define cpu_online(cpu) (cpu_online_map & (1<<(cpu)))
56 #define cpu_possible(cpu) (cpu_present_mask & (1<<(cpu)))
58 extern inline unsigned int num_online_cpus(void)
60 return hweight32(cpu_online_map);
63 extern inline unsigned int any_online_cpu(unsigned int mask)
65 if (mask & cpu_online_map)
66 return __ffs(mask & cpu_online_map);
68 return NR_CPUS;
70 #endif /* CONFIG_SMP */
72 #define NO_PROC_ID 0xFF /* No processor magic marker */
73 #define ANY_PROC_ID 0xFF /* Any processor magic marker */
75 #endif /* __ASM_SMP_H */