include/asm-mips/serial.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1999 by Ralf Baechle
   7  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
   8  */
   9 #include <linux/config.h>
  10 #include <asm/jazz.h>
  11
  12 /*
  13  * This assumes you have a 1.8432 MHz clock for your UART.
  14  *
  15  * It'd be nice if someone built a serial card with a 24.576 MHz
  16  * clock, since the 16550A is capable of handling a top speed of 1.5
  17  * megabits/second; but this requires the faster clock.
  18  */
  19 #define BASE_BAUD ( 1843200 / 16 )
  20
  21 #ifndef CONFIG_OLIVETTI_M700
  22    /* Some Jazz machines seem to have an 8MHz crystal clock but I don't know
  23       exactly which ones ... XXX */
  24 #define JAZZ_BASE_BAUD ( 8000000 / 16 ) /* ( 3072000 / 16) */
  25 #else
  26 /* but the M700 isn't such a strange beast */
  27 #define JAZZ_BASE_BAUD BASE_BAUD
  28 #endif
  29
  30 /* Standard COM flags (except for COM4, because of the 8514 problem) */
  31 #ifdef CONFIG_SERIAL_DETECT_IRQ
  32 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
  33 #define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
  34 #else
  35 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
  36 #define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
  37 #endif
  38
  39 #ifdef CONFIG_SERIAL_MANY_PORTS
  40 #define FOURPORT_FLAGS ASYNC_FOURPORT
  41 #define ACCENT_FLAGS 0
  42 #define BOCA_FLAGS 0
  43 #define HUB6_FLAGS 0
  44 #define RS_TABLE_SIZE   64
  45 #else
  46 #define RS_TABLE_SIZE
  47 #endif
  48
  49 /*
  50  * The following define the access methods for the HUB6 card. All
  51  * access is through two ports for all 24 possible chips. The card is
  52  * selected through the high 2 bits, the port on that card with the
  53  * "middle" 3 bits, and the register on that port with the bottom
  54  * 3 bits.
  55  *
  56  * While the access port and interrupt is configurable, the default
  57  * port locations are 0x302 for the port control register, and 0x303
  58  * for the data read/write register. Normally, the interrupt is at irq3
  59  * but can be anything from 3 to 7 inclusive. Note that using 3 will
  60  * require disabling com2.
  61  */
  62
  63 #define C_P(card,port) (((card)<<6|(port)<<3) + 1)
  64
  65 #ifdef CONFIG_MIPS_JAZZ
  66 #define _JAZZ_SERIAL_INIT(int, base)                                    \
  67         { .baud_base = JAZZ_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS,      \
  68           .iomem_base = (u8 *) base, .iomem_reg_shift = 0,                      \
  69           .io_type = SERIAL_IO_MEM }
  70 #define JAZZ_SERIAL_PORT_DEFNS                                          \
  71         _JAZZ_SERIAL_INIT(JAZZ_SERIAL1_IRQ, JAZZ_SERIAL1_BASE),         \
  72         _JAZZ_SERIAL_INIT(JAZZ_SERIAL2_IRQ, JAZZ_SERIAL2_BASE),
  73 #else
  74 #define JAZZ_SERIAL_PORT_DEFNS
  75 #endif
  76
  77 #ifdef CONFIG_MIPS_ATLAS
  78 #include <asm/mips-boards/atlas.h>
  79 #include <asm/mips-boards/atlasint.h>
  80 #define ATLAS_SERIAL_PORT_DEFNS                 \
  81         /* UART CLK   PORT IRQ     FLAGS        */                      \
  82         { 0, ATLAS_BASE_BAUD, ATLAS_UART_REGS_BASE, ATLASINT_UART, STD_COM_FLAGS },     /* ttyS0 */
  83 #else
  84 #define ATLAS_SERIAL_PORT_DEFNS
  85 #endif
  86
  87 #ifdef CONFIG_MIPS_SEAD
  88 #include <asm/mips-boards/sead.h>
  89 #include <asm/mips-boards/seadint.h>
  90 #define SEAD_SERIAL_PORT_DEFNS                  \
  91         /* UART CLK   PORT IRQ     FLAGS        */                      \
  92         { 0, SEAD_BASE_BAUD, SEAD_UART0_REGS_BASE, SEADINT_UART0, STD_COM_FLAGS },     /* ttyS0 */
  93 #else
  94 #define SEAD_SERIAL_PORT_DEFNS
  95 #endif
  96
  97 #ifdef CONFIG_MIPS_COBALT
  98 #include <asm/cobalt/cobalt.h>
  99 #define COBALT_BASE_BAUD  (18432000 / 16)
 100 #define COBALT_SERIAL_PORT_DEFNS                \
 101         /* UART CLK   PORT  IRQ  FLAGS    */            \
 102         { 0, COBALT_BASE_BAUD, 0xc800000, COBALT_SERIAL_IRQ, STD_COM_FLAGS },   /* ttyS0 */
 103 #else
 104 #define COBALT_SERIAL_PORT_DEFNS
 105 #endif
 106
 107 /*
 108  * Both Galileo boards have the same UART mappings.
 109  */
 110 #if defined (CONFIG_MIPS_EV96100) || defined (CONFIG_MIPS_EV64120)
 111 #include <asm/galileo-boards/ev96100.h>
 112 #include <asm/galileo-boards/ev96100int.h>
 113 #define EV96100_SERIAL_PORT_DEFNS                                  \
 114     { .baud_base = EV96100_BASE_BAUD, .irq = EV96100INT_UART_0, \
 115       .flags = STD_COM_FLAGS,  \
 116       .iomem_base = EV96100_UART0_REGS_BASE, .iomem_reg_shift = 2, \
 117       .io_type = SERIAL_IO_MEM }, \
 118     { .baud_base = EV96100_BASE_BAUD, .irq = EV96100INT_UART_0, \
 119       .flags = STD_COM_FLAGS, \
 120       .iomem_base = EV96100_UART1_REGS_BASE, .iomem_reg_shift = 2, \
 121       .io_type = SERIAL_IO_MEM },
 122 #else
 123 #define EV96100_SERIAL_PORT_DEFNS
 124 #endif
 125
 126 #ifdef CONFIG_MIPS_ITE8172
 127 #include <asm/it8172/it8172.h>
 128 #include <asm/it8172/it8172_int.h>
 129 #include <asm/it8712.h>
 130 #define ITE_SERIAL_PORT_DEFNS                                  \
 131     { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_UART_BASE), \
 132       .irq = IT8172_UART_IRQ, .flags = STD_COM_FLAGS, .type = 0x3 }, \
 133     { .baud_base = (24000000/(16*13)), .port = (IT8172_PCI_IO_BASE + IT8712_UART1_PORT), \
 134       .irq = IT8172_SERIRQ_4, .flags = STD_COM_FLAGS, .type = 0x3 }, \
 135     /* Smart Card Reader 0 */ \
 136     { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR0_BASE), \
 137       .irq = IT8172_SCR0_IRQ, .flags = STD_COM_FLAGS, .type = 0x3 }, \
 138     /* Smart Card Reader 1 */ \
 139     { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \
 140       .irq = IT8172_SCR1_IRQ, .flags = STD_COM_FLAGS, .type = 0x3 },
 141 #else
 142 #define ITE_SERIAL_PORT_DEFNS
 143 #endif
 144
 145 #ifdef CONFIG_MIPS_IVR
 146 #include <asm/it8172/it8172.h>
 147 #include <asm/it8172/it8172_int.h>
 148 #define IVR_SERIAL_PORT_DEFNS                                  \
 149     { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_UART_BASE), \
 150       .irq = IT8172_UART_IRQ, .flags = STD_COM_FLAGS, .type = 0x3 },         \
 151     /* Smart Card Reader 1 */ \
 152     { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \
 153       .irq = IT8172_SCR1_IRQ, .flags = STD_COM_FLAGS, .type = 0x3 },
 154 #else
 155 #define IVR_SERIAL_PORT_DEFNS
 156 #endif
 157
 158 #ifdef CONFIG_LASAT
 159 #include <asm/lasat/serial.h>
 160 #define LASAT_SERIAL_PORT_DEFNS                                         \
 161         { .baud_base = LASAT_BASE_BAUD, .irq = LASATINT_UART,           \
 162           .flags = STD_COM_FLAGS,                                               \
 163           .port = LASAT_UART_REGS_BASE, /* Only for display */          \
 164           .iomem_base = (u8 *)KSEG1ADDR(LASAT_UART_REGS_BASE),          \
 165           .iomem_reg_shift = LASAT_UART_REGS_SHIFT, .io_type = SERIAL_IO_MEM },
 166 #else
 167 #define LASAT_SERIAL_PORT_DEFNS
 168 #endif
 169
 170 #ifdef CONFIG_SERIAL_AU1X00
 171 #include <asm/au1000.h>
 172 #define AU1X00_SERIAL_PORT_DEFNS                                    \
 173     { .baud_base = 0, .iomem_base = (u8 *)UART0_ADDR,               \
 174             .irq = AU1000_UART0_INT,  .flags = STD_COM_FLAGS,       \
 175                     .iomem_reg_shift = 2, },                        \
 176     { .baud_base = 0, .iomem_base = (u8 *)UART1_ADDR,               \
 177             .irq = AU1000_UART1_INT,  .flags = STD_COM_FLAGS,       \
 178                     .iomem_reg_shift = 2 },                         \
 179     { .baud_base = 0, .iomem_base = (u8 *)UART2_ADDR,               \
 180             .irq = AU1000_UART2_INT,  .flags = STD_COM_FLAGS,       \
 181                     .iomem_reg_shift = 2},                          \
 182     { .baud_base = 0, .iomem_base = (u8 *)UART3_ADDR,               \
 183             .irq = AU1000_UART3_INT,  .flags = STD_COM_FLAGS,       \
 184                     .iomem_reg_shift = 2},
 185 #else
 186 #define AU1X00_SERIAL_PORT_DEFNS
 187 #endif
 188
 189 #ifdef CONFIG_TOSHIBA_JMR3927
 190 #include <asm/jmr3927/jmr3927.h>
 191 #define TXX927_SERIAL_PORT_DEFNS                              \
 192     { .baud_base = JMR3927_BASE_BAUD, .port = UART0_ADDR, .irq = UART0_INT,  \
 193       .flags = UART0_FLAGS, .type = 1 },                        \
 194     { .baud_base = JMR3927_BASE_BAUD, .port = UART1_ADDR, .irq = UART1_INT,  \
 195       .flags = UART1_FLAGS, .type = 1 },
 196 #else
 197 #define TXX927_SERIAL_PORT_DEFNS
 198 #endif
 199
 200 #ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT
 201 #define STD_SERIAL_PORT_DEFNS                   \
 202         /* UART CLK   PORT IRQ     FLAGS        */                      \
 203         { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS },      /* ttyS0 */     \
 204         { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS },      /* ttyS1 */     \
 205         { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS },      /* ttyS2 */     \
 206         { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS },     /* ttyS3 */
 207
 208 #ifdef CONFIG_SERIAL_MANY_PORTS
 209 #define EXTRA_SERIAL_PORT_DEFNS                 \
 210         { 0, BASE_BAUD, 0x1A0, 9, FOURPORT_FLAGS },     /* ttyS4 */     \
 211         { 0, BASE_BAUD, 0x1A8, 9, FOURPORT_FLAGS },     /* ttyS5 */     \
 212         { 0, BASE_BAUD, 0x1B0, 9, FOURPORT_FLAGS },     /* ttyS6 */     \
 213         { 0, BASE_BAUD, 0x1B8, 9, FOURPORT_FLAGS },     /* ttyS7 */     \
 214         { 0, BASE_BAUD, 0x2A0, 5, FOURPORT_FLAGS },     /* ttyS8 */     \
 215         { 0, BASE_BAUD, 0x2A8, 5, FOURPORT_FLAGS },     /* ttyS9 */     \
 216         { 0, BASE_BAUD, 0x2B0, 5, FOURPORT_FLAGS },     /* ttyS10 */    \
 217         { 0, BASE_BAUD, 0x2B8, 5, FOURPORT_FLAGS },     /* ttyS11 */    \
 218         { 0, BASE_BAUD, 0x330, 4, ACCENT_FLAGS },       /* ttyS12 */    \
 219         { 0, BASE_BAUD, 0x338, 4, ACCENT_FLAGS },       /* ttyS13 */    \
 220         { 0, BASE_BAUD, 0x000, 0, 0 },                  /* ttyS14 (spare) */ \
 221         { 0, BASE_BAUD, 0x000, 0, 0 },                  /* ttyS15 (spare) */ \
 222         { 0, BASE_BAUD, 0x100, 12, BOCA_FLAGS },        /* ttyS16 */    \
 223         { 0, BASE_BAUD, 0x108, 12, BOCA_FLAGS },        /* ttyS17 */    \
 224         { 0, BASE_BAUD, 0x110, 12, BOCA_FLAGS },        /* ttyS18 */    \
 225         { 0, BASE_BAUD, 0x118, 12, BOCA_FLAGS },        /* ttyS19 */    \
 226         { 0, BASE_BAUD, 0x120, 12, BOCA_FLAGS },        /* ttyS20 */    \
 227         { 0, BASE_BAUD, 0x128, 12, BOCA_FLAGS },        /* ttyS21 */    \
 228         { 0, BASE_BAUD, 0x130, 12, BOCA_FLAGS },        /* ttyS22 */    \
 229         { 0, BASE_BAUD, 0x138, 12, BOCA_FLAGS },        /* ttyS23 */    \
 230         { 0, BASE_BAUD, 0x140, 12, BOCA_FLAGS },        /* ttyS24 */    \
 231         { 0, BASE_BAUD, 0x148, 12, BOCA_FLAGS },        /* ttyS25 */    \
 232         { 0, BASE_BAUD, 0x150, 12, BOCA_FLAGS },        /* ttyS26 */    \
 233         { 0, BASE_BAUD, 0x158, 12, BOCA_FLAGS },        /* ttyS27 */    \
 234         { 0, BASE_BAUD, 0x160, 12, BOCA_FLAGS },        /* ttyS28 */    \
 235         { 0, BASE_BAUD, 0x168, 12, BOCA_FLAGS },        /* ttyS29 */    \
 236         { 0, BASE_BAUD, 0x170, 12, BOCA_FLAGS },        /* ttyS30 */    \
 237         { 0, BASE_BAUD, 0x178, 12, BOCA_FLAGS },        /* ttyS31 */
 238 #else /* CONFIG_SERIAL_MANY_PORTS */
 239 #define EXTRA_SERIAL_PORT_DEFNS
 240 #endif /* CONFIG_SERIAL_MANY_PORTS */
 241
 242 #else /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
 243 #define STD_SERIAL_PORT_DEFNS
 244 #define EXTRA_SERIAL_PORT_DEFNS
 245 #endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
 246
 247 /* You can have up to four HUB6's in the system, but I've only
 248  * included two cards here for a total of twelve ports.
 249  */
 250 #if (defined(CONFIG_HUB6) && defined(CONFIG_SERIAL_MANY_PORTS))
 251 #define HUB6_SERIAL_PORT_DFNS           \
 252         { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,0) },  /* ttyS32 */ \
 253         { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,1) },  /* ttyS33 */ \
 254         { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,2) },  /* ttyS34 */ \
 255         { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,3) },  /* ttyS35 */ \
 256         { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,4) },  /* ttyS36 */ \
 257         { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,5) },  /* ttyS37 */ \
 258         { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,0) },  /* ttyS38 */ \
 259         { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,1) },  /* ttyS39 */ \
 260         { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,2) },  /* ttyS40 */ \
 261         { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,3) },  /* ttyS41 */ \
 262         { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,4) },  /* ttyS42 */ \
 263         { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,5) },  /* ttyS43 */
 264 #else
 265 #define HUB6_SERIAL_PORT_DFNS
 266 #endif
 267
 268 #ifdef CONFIG_MCA
 269 #define MCA_SERIAL_PORT_DFNS                    \
 270         { 0, BASE_BAUD, 0x3220, 3, STD_COM_FLAGS },     \
 271         { 0, BASE_BAUD, 0x3228, 3, STD_COM_FLAGS },     \
 272         { 0, BASE_BAUD, 0x4220, 3, STD_COM_FLAGS },     \
 273         { 0, BASE_BAUD, 0x4228, 3, STD_COM_FLAGS },     \
 274         { 0, BASE_BAUD, 0x5220, 3, STD_COM_FLAGS },     \
 275         { 0, BASE_BAUD, 0x5228, 3, STD_COM_FLAGS },
 276 #else
 277 #define MCA_SERIAL_PORT_DFNS
 278 #endif
 279
 280 #ifdef CONFIG_MOMENCO_OCELOT
 281 /* Ordinary NS16552 duart with a 20MHz crystal.  */
 282 #define OCELOT_BASE_BAUD ( 20000000 / 16 )
 283
 284 #define OCELOT_SERIAL1_IRQ      4
 285 #define OCELOT_SERIAL1_BASE     0xe0001020
 286
 287 #define _OCELOT_SERIAL_INIT(int, base)                                  \
 288         { .baud_base = OCELOT_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS,    \
 289           .iomem_base = (u8 *) base, .iomem_reg_shift = 2,                      \
 290           .io_type = SERIAL_IO_MEM }
 291 #define MOMENCO_OCELOT_SERIAL_PORT_DEFNS                                \
 292         _OCELOT_SERIAL_INIT(OCELOT_SERIAL1_IRQ, OCELOT_SERIAL1_BASE)
 293 #else
 294 #define MOMENCO_OCELOT_SERIAL_PORT_DEFNS
 295 #endif
 296
 297 #ifdef CONFIG_MOMENCO_OCELOT_G
 298 /* Ordinary NS16552 duart with a 20MHz crystal.  */
 299 #define OCELOT_G_BASE_BAUD ( 20000000 / 16 )
 300
 301 #define OCELOT_G_SERIAL1_IRQ    4
 302 #if 0
 303 #define OCELOT_G_SERIAL1_BASE   0xe0001020
 304 #else
 305 #define OCELOT_G_SERIAL1_BASE   0xfd000020
 306 #endif
 307
 308 #define _OCELOT_G_SERIAL_INIT(int, base)                                \
 309         { .baud_base = OCELOT_G_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS,\
 310           .iomem_base = (u8 *) base, .iomem_reg_shift = 2,                      \
 311           .io_type = SERIAL_IO_MEM }
 312 #define MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS                              \
 313         _OCELOT_G_SERIAL_INIT(OCELOT_G_SERIAL1_IRQ, OCELOT_G_SERIAL1_BASE)
 314 #else
 315 #define MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS
 316 #endif
 317
 318 #ifdef CONFIG_MOMENCO_OCELOT_C
 319 /* Ordinary NS16552 duart with a 20MHz crystal.  */
 320 #define OCELOT_C_BASE_BAUD ( 20000000 / 16 )
 321
 322 #define OCELOT_C_SERIAL1_IRQ    80
 323 #define OCELOT_C_SERIAL1_BASE   0xfd000020
 324
 325 #define OCELOT_C_SERIAL2_IRQ    81
 326 #define OCELOT_C_SERIAL2_BASE   0xfd000000
 327
 328 #define _OCELOT_C_SERIAL_INIT(int, base)                                 \
 329         { baud_base: OCELOT_C_BASE_BAUD, irq: int, flags: STD_COM_FLAGS,\
 330           iomem_base: (u8 *) base, iomem_reg_shift: 2,                   \
 331           io_type: SERIAL_IO_MEM }
 332 #define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS                              \
 333         _OCELOT_C_SERIAL_INIT(OCELOT_C_SERIAL1_IRQ, OCELOT_C_SERIAL1_BASE), \
 334         _OCELOT_C_SERIAL_INIT(OCELOT_C_SERIAL2_IRQ, OCELOT_C_SERIAL2_BASE)
 335 #else
 336 #define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS
 337 #endif
 338
 339 #ifdef CONFIG_DDB5477
 340 #include <asm/ddb5xxx/ddb5477.h>
 341 #define DDB5477_SERIAL_PORT_DEFNS                                       \
 342         { .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART0,             \
 343           .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04200,        \
 344           .iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM},              \
 345         { .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART1,             \
 346           .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04240,        \
 347           .iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM},
 348 #else
 349 #define DDB5477_SERIAL_PORT_DEFNS
 350 #endif
 351
 352 #define SERIAL_PORT_DFNS                        \
 353         IVR_SERIAL_PORT_DEFNS                   \
 354         ITE_SERIAL_PORT_DEFNS                   \
 355         ATLAS_SERIAL_PORT_DEFNS                 \
 356         SEAD_SERIAL_PORT_DEFNS                  \
 357         COBALT_SERIAL_PORT_DEFNS                \
 358         LASAT_SERIAL_PORT_DEFNS                 \
 359         EV96100_SERIAL_PORT_DEFNS               \
 360         JAZZ_SERIAL_PORT_DEFNS                  \
 361         STD_SERIAL_PORT_DEFNS                   \
 362         EXTRA_SERIAL_PORT_DEFNS                 \
 363         HUB6_SERIAL_PORT_DFNS                   \
 364         MOMENCO_OCELOT_SERIAL_PORT_DEFNS        \
 365         MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS      \
 366         MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS      \
 367         AU1X00_SERIAL_PORT_DEFNS                \
 368         TXX927_SERIAL_PORT_DEFNS                \
 369         DDB5477_SERIAL_PORT_DEFNS