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Same irqreturn_t as always ...
[linux-2.6/linux-mips.git] / drivers / scsi / dec_esp.c
blobe52117559cfbd57534ebb4dfc7282a26e85e0100
1 /*
2 * dec_esp.c: Driver for SCSI chips on IOASIC based TURBOchannel DECstations
3 * and TURBOchannel PMAZ-A cards
4 *
5 * TURBOchannel changes by Harald Koerfgen
6 * PMAZ-A support by David Airlie
7 *
8 * based on jazz_esp.c:
9 * Copyright (C) 1997 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
10 *
11 * jazz_esp is based on David S. Miller's ESP driver and cyber_esp
12 *
13 * 20000819 - Small PMAZ-AA fixes by Florian Lohoff <flo@rfc822.org>
14 * Be warned the PMAZ-AA works currently as a single card.
15 * Dont try to put multiple cards in one machine - They are
16 * both detected but it may crash under high load garbling your
17 * data.
18 * 20001005 - Initialization fixes for 2.4.0-test9
19 * Florian Lohoff <flo@rfc822.org>
20 *
21 * Copyright (C) 2002, 2003 Maciej W. Rozycki
22 */
23
24 #include <linux/kernel.h>
25 #include <linux/delay.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
28 #include <linux/slab.h>
29 #include <linux/blk.h>
30 #include <linux/proc_fs.h>
31 #include <linux/spinlock.h>
32 #include <linux/stat.h>
33
34 #include <asm/dma.h>
35 #include <asm/irq.h>
36 #include <asm/pgtable.h>
37 #include <asm/system.h>
38
39 #include <asm/dec/interrupts.h>
40 #include <asm/dec/ioasic.h>
41 #include <asm/dec/ioasic_addrs.h>
42 #include <asm/dec/ioasic_ints.h>
43 #include <asm/dec/machtype.h>
44 #include <asm/dec/tc.h>
45
46 #define DEC_SCSI_SREG 0
47 #define DEC_SCSI_DMAREG 0x40000
48 #define DEC_SCSI_SRAM 0x80000
49 #define DEC_SCSI_DIAG 0xC0000
50
51 #include "scsi.h"
52 #include "hosts.h"
53 #include "NCR53C9x.h"
54
55 static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count);
56 static void dma_drain(struct NCR_ESP *esp);
57 static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd * sp);
58 static void dma_dump_state(struct NCR_ESP *esp);
59 static void dma_init_read(struct NCR_ESP *esp, u32 vaddress, int length);
60 static void dma_init_write(struct NCR_ESP *esp, u32 vaddress, int length);
61 static void dma_ints_off(struct NCR_ESP *esp);
62 static void dma_ints_on(struct NCR_ESP *esp);
63 static int dma_irq_p(struct NCR_ESP *esp);
64 static int dma_ports_p(struct NCR_ESP *esp);
65 static void dma_setup(struct NCR_ESP *esp, u32 addr, int count, int write);
66 static void dma_mmu_get_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd * sp);
67 static void dma_mmu_get_scsi_sgl(struct NCR_ESP *esp, Scsi_Cmnd * sp);
68 static void dma_advance_sg(Scsi_Cmnd * sp);
69
70 static void pmaz_dma_drain(struct NCR_ESP *esp);
71 static void pmaz_dma_init_read(struct NCR_ESP *esp, u32 vaddress, int length);
72 static void pmaz_dma_init_write(struct NCR_ESP *esp, u32 vaddress, int length);
73 static void pmaz_dma_ints_off(struct NCR_ESP *esp);
74 static void pmaz_dma_ints_on(struct NCR_ESP *esp);
75 static void pmaz_dma_setup(struct NCR_ESP *esp, u32 addr, int count, int write);
76 static void pmaz_dma_mmu_get_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd * sp);
77
78 #define TC_ESP_RAM_SIZE 0x20000
79 #define ESP_TGT_DMA_SIZE ((TC_ESP_RAM_SIZE/7) & ~(sizeof(int)-1))
80 #define ESP_NCMD 7
81
82 #define TC_ESP_DMAR_MASK 0x1ffff
83 #define TC_ESP_DMAR_WRITE 0x80000000
84 #define TC_ESP_DMA_ADDR(x) ((unsigned)(x) & TC_ESP_DMAR_MASK)
85
86 u32 esp_virt_buffer;
87 int scsi_current_length;
88
89 volatile unsigned char cmd_buffer[16];
90 volatile unsigned char pmaz_cmd_buffer[16];
91 /* This is where all commands are put
92 * before they are trasfered to the ESP chip
93 * via PIO.
94 */
95
96 static irqreturn_t scsi_dma_merr_int(int, void *, struct pt_regs *);
97 static irqreturn_t scsi_dma_err_int(int, void *, struct pt_regs *);
98 static irqreturn_t scsi_dma_int(int, void *, struct pt_regs *);
99
100 int dec_esp_detect(Scsi_Host_Template * tpnt);
101
102 static Scsi_Host_Template driver_template = {
103 .proc_name = "esp",
104 .proc_info = &esp_proc_info,
105 .name = "NCR53C94",
106 .detect = dec_esp_detect,
107 .info = esp_info,
108 .command = esp_command,
109 .queuecommand = esp_queue,
110 .eh_abort_handler = esp_abort,
111 .eh_bus_reset_handler = esp_reset,
112 .can_queue = 7,
113 .this_id = 7,
114 .sg_tablesize = SG_ALL,
115 .cmd_per_lun = 1,
116 .use_clustering = DISABLE_CLUSTERING,
117 };
118
119
120 #include "scsi_module.c"
121
122 /***************************************************************** Detection */
123 int dec_esp_detect(Scsi_Host_Template * tpnt)
124 {
125 struct NCR_ESP *esp;
126 struct ConfigDev *esp_dev;
127 int slot;
128 unsigned long mem_start;
129
130 if (IOASIC) {
131 esp_dev = 0;
132 esp = esp_allocate(tpnt, (void *) esp_dev);
133
134 /* Do command transfer with programmed I/O */
135 esp->do_pio_cmds = 1;
136
137 /* Required functions */
138 esp->dma_bytes_sent = &dma_bytes_sent;
139 esp->dma_can_transfer = &dma_can_transfer;
140 esp->dma_dump_state = &dma_dump_state;
141 esp->dma_init_read = &dma_init_read;
142 esp->dma_init_write = &dma_init_write;
143 esp->dma_ints_off = &dma_ints_off;
144 esp->dma_ints_on = &dma_ints_on;
145 esp->dma_irq_p = &dma_irq_p;
146 esp->dma_ports_p = &dma_ports_p;
147 esp->dma_setup = &dma_setup;
148
149 /* Optional functions */
150 esp->dma_barrier = 0;
151 esp->dma_drain = &dma_drain;
152 esp->dma_invalidate = 0;
153 esp->dma_irq_entry = 0;
154 esp->dma_irq_exit = 0;
155 esp->dma_poll = 0;
156 esp->dma_reset = 0;
157 esp->dma_led_off = 0;
158 esp->dma_led_on = 0;
159
160 /* virtual DMA functions */
161 esp->dma_mmu_get_scsi_one = &dma_mmu_get_scsi_one;
162 esp->dma_mmu_get_scsi_sgl = &dma_mmu_get_scsi_sgl;
163 esp->dma_mmu_release_scsi_one = 0;
164 esp->dma_mmu_release_scsi_sgl = 0;
165 esp->dma_advance_sg = &dma_advance_sg;
166
167
168 /* SCSI chip speed */
169 esp->cfreq = 25000000;
170
171 esp->dregs = 0;
172
173 /* ESP register base */
174 esp->eregs = (struct ESP_regs *) (system_base + IOASIC_SCSI);
175
176 /* Set the command buffer */
177 esp->esp_command = (volatile unsigned char *) cmd_buffer;
178
179 /* get virtual dma address for command buffer */
180 esp->esp_command_dvma = virt_to_phys(cmd_buffer);
181
182 esp->irq = dec_interrupt[DEC_IRQ_ASC];
183
184 esp->scsi_id = 7;
185
186 /* Check for differential SCSI-bus */
187 esp->diff = 0;
188
189 esp_initialize(esp);
190
191 if (request_irq(esp->irq, esp_intr, SA_INTERRUPT,
192 "ncr53c94", esp->ehost))
193 goto err_dealloc;
194 if (request_irq(dec_interrupt[DEC_IRQ_ASC_MERR],
195 scsi_dma_merr_int, SA_INTERRUPT,
196 "ncr53c94 error", esp->ehost))
197 goto err_free_irq;
198 if (request_irq(dec_interrupt[DEC_IRQ_ASC_ERR],
199 scsi_dma_err_int, SA_INTERRUPT,
200 "ncr53c94 overrun", esp->ehost))
201 goto err_free_irq_merr;
202 if (request_irq(dec_interrupt[DEC_IRQ_ASC_DMA],
203 scsi_dma_int, SA_INTERRUPT,
204 "ncr53c94 dma", esp->ehost))
205 goto err_free_irq_err;
206
207 }
208
209 if (TURBOCHANNEL) {
210 while ((slot = search_tc_card("PMAZ-AA")) >= 0) {
211 claim_tc_card(slot);
212
213 esp_dev = 0;
214 esp = esp_allocate(tpnt, (void *) esp_dev);
215
216 mem_start = get_tc_base_addr(slot);
217
218 /* Store base addr into esp struct */
219 esp->slot = PHYSADDR(mem_start);
220
221 esp->dregs = 0;
222 esp->eregs = (struct ESP_regs *) (mem_start + DEC_SCSI_SREG);
223 esp->do_pio_cmds = 1;
224
225 /* Set the command buffer */
226 esp->esp_command = (volatile unsigned char *) pmaz_cmd_buffer;
227
228 /* get virtual dma address for command buffer */
229 esp->esp_command_dvma = virt_to_phys(pmaz_cmd_buffer);
230
231 esp->cfreq = get_tc_speed();
232
233 esp->irq = get_tc_irq_nr(slot);
234
235 /* Required functions */
236 esp->dma_bytes_sent = &dma_bytes_sent;
237 esp->dma_can_transfer = &dma_can_transfer;
238 esp->dma_dump_state = &dma_dump_state;
239 esp->dma_init_read = &pmaz_dma_init_read;
240 esp->dma_init_write = &pmaz_dma_init_write;
241 esp->dma_ints_off = &pmaz_dma_ints_off;
242 esp->dma_ints_on = &pmaz_dma_ints_on;
243 esp->dma_irq_p = &dma_irq_p;
244 esp->dma_ports_p = &dma_ports_p;
245 esp->dma_setup = &pmaz_dma_setup;
246
247 /* Optional functions */
248 esp->dma_barrier = 0;
249 esp->dma_drain = &pmaz_dma_drain;
250 esp->dma_invalidate = 0;
251 esp->dma_irq_entry = 0;
252 esp->dma_irq_exit = 0;
253 esp->dma_poll = 0;
254 esp->dma_reset = 0;
255 esp->dma_led_off = 0;
256 esp->dma_led_on = 0;
257
258 esp->dma_mmu_get_scsi_one = pmaz_dma_mmu_get_scsi_one;
259 esp->dma_mmu_get_scsi_sgl = 0;
260 esp->dma_mmu_release_scsi_one = 0;
261 esp->dma_mmu_release_scsi_sgl = 0;
262 esp->dma_advance_sg = 0;
263
264 if (request_irq(esp->irq, esp_intr, SA_INTERRUPT,
265 "PMAZ_AA", esp->ehost)) {
266 esp_deallocate(esp);
267 release_tc_card(slot);
268 continue;
269 }
270 esp->scsi_id = 7;
271 esp->diff = 0;
272 esp_initialize(esp);
273 }
274 }
275
276 if(nesps) {
277 printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps, esps_in_use);
278 esps_running = esps_in_use;
279 return esps_in_use;
280 }
281 return 0;
282
283 err_free_irq_err:
284 free_irq(dec_interrupt[DEC_IRQ_ASC_ERR], scsi_dma_err_int);
285 err_free_irq_merr:
286 free_irq(dec_interrupt[DEC_IRQ_ASC_MERR], scsi_dma_merr_int);
287 err_free_irq:
288 free_irq(esp->irq, esp_intr);
289 err_dealloc:
290 esp_deallocate(esp);
291 return 0;
292 }
293
294 /************************************************************* DMA Functions */
295 static irqreturn_t scsi_dma_merr_int(int irq, void *dev_id, struct pt_regs *regs)
296 {
297 printk("Got unexpected SCSI DMA Interrupt! < ");
298 printk("SCSI_DMA_MEMRDERR ");
299 printk(">\n");
300
301 return IRQ_HANDLED;
302 }
303
304 static irqreturn_t scsi_dma_err_int(int irq, void *dev_id, struct pt_regs *regs)
305 {
306 /* empty */
307
308 return IRQ_HANDLED;
309 }
310
311 static irqreturn_t scsi_dma_int(int irq, void *dev_id, struct pt_regs *regs)
312 {
313 u32 scsi_next_ptr;
314
315 scsi_next_ptr = ioasic_read(IO_REG_SCSI_DMA_P);
316
317 /* next page */
318 scsi_next_ptr = (((scsi_next_ptr >> 3) + PAGE_SIZE) & PAGE_MASK) << 3;
319 ioasic_write(IO_REG_SCSI_DMA_BP, scsi_next_ptr);
320 fast_iob();
321
322 return IRQ_HANDLED;
323 }
324
325 static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count)
326 {
327 return fifo_count;
328 }
329
330 static void dma_drain(struct NCR_ESP *esp)
331 {
332 u32 nw, data0, data1, scsi_data_ptr;
333 u16 *p;
334
335 nw = ioasic_read(IO_REG_SCSI_SCR);
336
337 /*
338 * Is there something in the dma buffers left?
339 */
340 if (nw) {
341 scsi_data_ptr = ioasic_read(IO_REG_SCSI_DMA_P) >> 3;
342 p = phys_to_virt(scsi_data_ptr);
343 switch (nw) {
344 case 1:
345 data0 = ioasic_read(IO_REG_SCSI_SDR0);
346 p[0] = data0 & 0xffff;
347 break;
348 case 2:
349 data0 = ioasic_read(IO_REG_SCSI_SDR0);
350 p[0] = data0 & 0xffff;
351 p[1] = (data0 >> 16) & 0xffff;
352 break;
353 case 3:
354 data0 = ioasic_read(IO_REG_SCSI_SDR0);
355 data1 = ioasic_read(IO_REG_SCSI_SDR1);
356 p[0] = data0 & 0xffff;
357 p[1] = (data0 >> 16) & 0xffff;
358 p[2] = data1 & 0xffff;
359 break;
360 default:
361 printk("Strange: %d words in dma buffer left\n", nw);
362 break;
363 }
364 }
365 }
366
367 static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd * sp)
368 {
369 return sp->SCp.this_residual;;
370 }
371
372 static void dma_dump_state(struct NCR_ESP *esp)
373 {
374 }
375
376 static void dma_init_read(struct NCR_ESP *esp, u32 vaddress, int length)
377 {
378 u32 scsi_next_ptr, ioasic_ssr;
379 unsigned long flags;
380
381 if (vaddress & 3)
382 panic("dec_esp.c: unable to handle partial word transfers, yet...");
383
384 dma_cache_wback_inv((unsigned long) phys_to_virt(vaddress), length);
385
386 spin_lock_irqsave(&ioasic_ssr_lock, flags);
387
388 fast_mb();
389 ioasic_ssr = ioasic_read(IO_REG_SSR);
390
391 ioasic_ssr &= ~IO_SSR_SCSI_DMA_EN;
392 ioasic_write(IO_REG_SSR, ioasic_ssr);
393
394 fast_wmb();
395 ioasic_write(IO_REG_SCSI_SCR, 0);
396 ioasic_write(IO_REG_SCSI_DMA_P, vaddress << 3);
397
398 /* prepare for next page */
399 scsi_next_ptr = ((vaddress + PAGE_SIZE) & PAGE_MASK) << 3;
400 ioasic_write(IO_REG_SCSI_DMA_BP, scsi_next_ptr);
401
402 ioasic_ssr |= (IO_SSR_SCSI_DMA_DIR | IO_SSR_SCSI_DMA_EN);
403 fast_wmb();
404 ioasic_write(IO_REG_SSR, ioasic_ssr);
405
406 fast_iob();
407 spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
408 }
409
410 static void dma_init_write(struct NCR_ESP *esp, u32 vaddress, int length)
411 {
412 u32 scsi_next_ptr, ioasic_ssr;
413 unsigned long flags;
414
415 if (vaddress & 3)
416 panic("dec_esp.c: unable to handle partial word transfers, yet...");
417
418 dma_cache_wback_inv((unsigned long) phys_to_virt(vaddress), length);
419
420 spin_lock_irqsave(&ioasic_ssr_lock, flags);
421
422 fast_mb();
423 ioasic_ssr = ioasic_read(IO_REG_SSR);
424
425 ioasic_ssr &= ~(IO_SSR_SCSI_DMA_DIR | IO_SSR_SCSI_DMA_EN);
426 ioasic_write(IO_REG_SSR, ioasic_ssr);
427
428 fast_wmb();
429 ioasic_write(IO_REG_SCSI_SCR, 0);
430 ioasic_write(IO_REG_SCSI_DMA_P, vaddress << 3);
431
432 /* prepare for next page */
433 scsi_next_ptr = ((vaddress + PAGE_SIZE) & PAGE_MASK) << 3;
434 ioasic_write(IO_REG_SCSI_DMA_BP, scsi_next_ptr);
435
436 ioasic_ssr |= IO_SSR_SCSI_DMA_EN;
437 fast_wmb();
438 ioasic_write(IO_REG_SSR, ioasic_ssr);
439
440 fast_iob();
441 spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
442 }
443
444 static void dma_ints_off(struct NCR_ESP *esp)
445 {
446 disable_irq(dec_interrupt[DEC_IRQ_ASC_DMA]);
447 }
448
449 static void dma_ints_on(struct NCR_ESP *esp)
450 {
451 enable_irq(dec_interrupt[DEC_IRQ_ASC_DMA]);
452 }
453
454 static int dma_irq_p(struct NCR_ESP *esp)
455 {
456 return (esp->eregs->esp_status & ESP_STAT_INTR);
457 }
458
459 static int dma_ports_p(struct NCR_ESP *esp)
460 {
461 /*
462 * FIXME: what's this good for?
463 */
464 return 1;
465 }
466
467 static void dma_setup(struct NCR_ESP *esp, u32 addr, int count, int write)
468 {
469 /*
470 * DMA_ST_WRITE means "move data from device to memory"
471 * so when (write) is true, it actually means READ!
472 */
473 if (write)
474 dma_init_read(esp, addr, count);
475 else
476 dma_init_write(esp, addr, count);
477 }
478
479 static void dma_mmu_get_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd * sp)
480 {
481 sp->SCp.ptr = (char *)virt_to_phys(sp->request_buffer);
482 }
483
484 static void dma_mmu_get_scsi_sgl(struct NCR_ESP *esp, Scsi_Cmnd * sp)
485 {
486 int sz = sp->SCp.buffers_residual;
487 struct scatterlist *sg = sp->SCp.buffer;
488
489 while (sz >= 0) {
490 sg[sz].dma_address = page_to_phys(sg[sz].page) + sg[sz].offset;
491 sz--;
492 }
493 sp->SCp.ptr = (char *)(sp->SCp.buffer->dma_address);
494 }
495
496 static void dma_advance_sg(Scsi_Cmnd * sp)
497 {
498 sp->SCp.ptr = (char *)(sp->SCp.buffer->dma_address);
499 }
500
501 static void pmaz_dma_drain(struct NCR_ESP *esp)
502 {
503 memcpy(phys_to_virt(esp_virt_buffer),
504 (void *)KSEG1ADDR(esp->slot + DEC_SCSI_SRAM + ESP_TGT_DMA_SIZE),
505 scsi_current_length);
506 }
507
508 static void pmaz_dma_init_read(struct NCR_ESP *esp, u32 vaddress, int length)
509 {
510 volatile u32 *dmareg =
511 (volatile u32 *)KSEG1ADDR(esp->slot + DEC_SCSI_DMAREG);
512
513 if (length > ESP_TGT_DMA_SIZE)
514 length = ESP_TGT_DMA_SIZE;
515
516 *dmareg = TC_ESP_DMA_ADDR(ESP_TGT_DMA_SIZE);
517
518 iob();
519
520 esp_virt_buffer = vaddress;
521 scsi_current_length = length;
522 }
523
524 static void pmaz_dma_init_write(struct NCR_ESP *esp, u32 vaddress, int length)
525 {
526 volatile u32 *dmareg =
527 (volatile u32 *)KSEG1ADDR(esp->slot + DEC_SCSI_DMAREG);
528
529 memcpy((void *)KSEG1ADDR(esp->slot + DEC_SCSI_SRAM + ESP_TGT_DMA_SIZE),
530 phys_to_virt(vaddress), length);
531
532 wmb();
533 *dmareg = TC_ESP_DMAR_WRITE | TC_ESP_DMA_ADDR(ESP_TGT_DMA_SIZE);
534
535 iob();
536 }
537
538 static void pmaz_dma_ints_off(struct NCR_ESP *esp)
539 {
540 }
541
542 static void pmaz_dma_ints_on(struct NCR_ESP *esp)
543 {
544 }
545
546 static void pmaz_dma_setup(struct NCR_ESP *esp, u32 addr, int count, int write)
547 {
548 /*
549 * DMA_ST_WRITE means "move data from device to memory"
550 * so when (write) is true, it actually means READ!
551 */
552 if (write)
553 pmaz_dma_init_read(esp, addr, count);
554 else
555 pmaz_dma_init_write(esp, addr, count);
556 }
557
558 static void pmaz_dma_mmu_get_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd * sp)
559 {
560 sp->SCp.ptr = (char *)virt_to_phys(sp->request_buffer);
561 }
Mirror of the linux-mips.org kernel tree