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[linux-2.6/linux-mips.git] / sound / oss / rme96xx.c
blobc85e53d46a507568ad44ee9fd1a77ed6ced6ad47
1 /* (C) 2000 Guenter Geiger <geiger@debian.org>
2 with copy/pastes from the driver of Winfried Ritsch <ritsch@iem.kug.ac.at>
3 based on es1370.c
4
5
6
7 * 10 Jan 2001: 0.1 initial version
8 * 19 Jan 2001: 0.2 fixed bug in select()
9 * 27 Apr 2001: 0.3 more than one card usable
10 * 11 May 2001: 0.4 fixed for SMP, included into kernel source tree
11 * 17 May 2001: 0.5 draining code didn't work on new cards
12 * 18 May 2001: 0.6 remove synchronize_irq() call
13 * 17 Jul 2001: 0.7 updated xrmectrl to make it work for newer cards
14 * 2 feb 2002: 0.8 fixed pci device handling, see below for patches from Heiko (Thanks!)
15 Marcus Meissner <Marcus.Meissner@caldera.de>
16
17 Modifications - Heiko Purnhagen <purnhage@tnt.uni-hannover.de>
18 HP20020108 fixed handling of "large" read()
19 HP20020116 towards REV 1.5 support, based on ALSA's card-rme9652.c
20 HP20020118 made mixer ioctl and handling of devices>1 more safe
21 HP20020201 fixed handling of "large" read() properly
22 added REV 1.5 S/P-DIF receiver support
23 SNDCTL_DSP_SPEED now returns the actual speed
24 * 10 Aug 2002: added synchronize_irq() again
25
26 TODO:
27 - test more than one card --- done
28 - check for pci IOREGION (see es1370) in rme96xx_probe ??
29 - error detection
30 - mmap interface
31 - mixer mmap interface
32 - mixer ioctl
33 - get rid of noise upon first open (why ??)
34 - allow multiple open (at least for read)
35 - allow multiple open for non overlapping regions
36 - recheck the multiple devices part (offsets of different devices, etc)
37 - do decent draining in _release --- done
38 - SMP support
39 - what about using fragstotal>2 for small fragsize? (HP20020118)
40 - add support for AFMT_S32_LE
41 */
42
43 #ifndef RMEVERSION
44 #define RMEVERSION "0.8"
45 #endif
46
47 #include <linux/version.h>
48 #include <linux/module.h>
49 #include <linux/string.h>
50 #include <linux/sched.h>
51 #include <linux/sound.h>
52 #include <linux/soundcard.h>
53 #include <linux/pci.h>
54 #include <linux/smp_lock.h>
55 #include <linux/delay.h>
56 #include <linux/slab.h>
57 #include <asm/dma.h>
58 #include <asm/hardirq.h>
59 #include <linux/init.h>
60 #include <linux/interrupt.h>
61 #include <linux/poll.h>
62 #include <linux/wait.h>
63
64 #include <asm/dma.h>
65 #include <asm/page.h>
66
67 #include "rme96xx.h"
68
69 #define NR_DEVICE 2
70
71 static int devices = 1;
72 MODULE_PARM(devices, "1-" __MODULE_STRING(NR_DEVICE) "i");
73 MODULE_PARM_DESC(devices, "number of dsp devices allocated by the driver");
74
75
76 MODULE_AUTHOR("Guenter Geiger, geiger@debian.org");
77 MODULE_DESCRIPTION("RME9652/36 \"Hammerfall\" Driver");
78 MODULE_LICENSE("GPL");
79
80
81 #ifdef DEBUG
82 #define DBG(x) printk("RME_DEBUG:");x
83 #define COMM(x) printk("RME_COMM: " x "\n");
84 #else
85 #define DBG(x) while (0) {}
86 #define COMM(x)
87 #endif
88
89 /*--------------------------------------------------------------------------
90 Preporcessor Macros and Definitions
91 --------------------------------------------------------------------------*/
92
93 #define RME96xx_MAGIC 0x6473
94
95 /* Registers-Space in offsets from base address with 16MByte size */
96
97 #define RME96xx_IO_EXTENT 16l*1024l*1024l
98 #define RME96xx_CHANNELS_PER_CARD 26
99
100 /* Write - Register */
101
102 /* 0,4,8,12,16,20,24,28 ... hardware init (erasing fifo-pointer intern) */
103 #define RME96xx_num_of_init_regs 8
104
105 #define RME96xx_init_buffer (0/4)
106 #define RME96xx_play_buffer (32/4) /* pointer to 26x64kBit RAM from mainboard */
107 #define RME96xx_rec_buffer (36/4) /* pointer to 26x64kBit RAM from mainboard */
108 #define RME96xx_control_register (64/4) /* exact meaning see below */
109 #define RME96xx_irq_clear (96/4) /* irq acknowledge */
110 #define RME96xx_time_code (100/4) /* if used with alesis adat */
111 #define RME96xx_thru_base (128/4) /* 132...228 Thru for 26 channels */
112 #define RME96xx_thru_channels RME96xx_CHANNELS_PER_CARD
113
114 /* Read Register */
115
116 #define RME96xx_status_register 0 /* meaning see below */
117
118
119
120 /* Status Register: */
121 /* ------------------------------------------------------------------------ */
122 #define RME96xx_IRQ 0x0000001 /* IRQ is High if not reset by RMExx_irq_clear */
123 #define RME96xx_lock_2 0x0000002 /* ADAT 3-PLL: 1=locked, 0=unlocked */
124 #define RME96xx_lock_1 0x0000004 /* ADAT 2-PLL: 1=locked, 0=unlocked */
125 #define RME96xx_lock_0 0x0000008 /* ADAT 1-PLL: 1=locked, 0=unlocked */
126
127 #define RME96xx_fs48 0x0000010 /* sample rate 0 ...44.1/88.2, 1 ... 48/96 Khz */
128 #define RME96xx_wsel_rd 0x0000020 /* if Word-Clock is used and valid then 1 */
129 #define RME96xx_buf_pos1 0x0000040 /* Bit 6..15 : Position of buffer-pointer in 64Bytes-blocks */
130 #define RME96xx_buf_pos2 0x0000080 /* resolution +/- 1 64Byte/block (since 64Bytes bursts) */
131
132 #define RME96xx_buf_pos3 0x0000100 /* 10 bits = 1024 values */
133 #define RME96xx_buf_pos4 0x0000200 /* if we mask off the first 6 bits, we can take the status */
134 #define RME96xx_buf_pos5 0x0000400 /* register as sample counter in the hardware buffer */
135 #define RME96xx_buf_pos6 0x0000800
136
137 #define RME96xx_buf_pos7 0x0001000
138 #define RME96xx_buf_pos8 0x0002000
139 #define RME96xx_buf_pos9 0x0004000
140 #define RME96xx_buf_pos10 0x0008000
141
142 #define RME96xx_sync_2 0x0010000 /* if ADAT-IN3 synced to system clock */
143 #define RME96xx_sync_1 0x0020000 /* if ADAT-IN2 synced to system clock */
144 #define RME96xx_sync_0 0x0040000 /* if ADAT-IN1 synced to system clock */
145 #define RME96xx_DS_rd 0x0080000 /* 1=Double Speed, 0=Normal Speed */
146
147 #define RME96xx_tc_busy 0x0100000 /* 1=time-code copy in progress (960ms) */
148 #define RME96xx_tc_out 0x0200000 /* time-code out bit */
149 #define RME96xx_F_0 0x0400000 /* 000=64kHz, 100=88.2kHz, 011=96kHz */
150 #define RME96xx_F_1 0x0800000 /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
151
152 #define RME96xx_F_2 0x1000000 /* 001=Rev 1.5+ external Crystal Chip */
153 #define RME96xx_ERF 0x2000000 /* Error-Flag of SDPIF Receiver (1=No Lock)*/
154 #define RME96xx_buffer_id 0x4000000 /* toggles by each interrupt on rec/play */
155 #define RME96xx_tc_valid 0x8000000 /* 1 = a signal is detected on time-code input */
156 #define RME96xx_SPDIF_READ 0x10000000 /* byte available from Rev 1.5+ SPDIF interface */
157
158 /* Status Register Fields */
159
160 #define RME96xx_lock (RME96xx_lock_0|RME96xx_lock_1|RME96xx_lock_2)
161 #define RME96xx_sync (RME96xx_sync_0|RME96xx_sync_1|RME96xx_sync_2)
162 #define RME96xx_F (RME96xx_F_0|RME96xx_F_1|RME96xx_F_2)
163 #define rme96xx_decode_spdif_rate(x) ((x)>>22)
164
165 /* Bit 6..15 : h/w buffer pointer */
166 #define RME96xx_buf_pos 0x000FFC0
167 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
168 Rev G EEPROMS and Rev 1.5 cards or later.
169 */
170 #define RME96xx_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME96xx_buf_pos))
171
172
173 /* Control-Register: */
174 /*--------------------------------------------------------------------------------*/
175
176 #define RME96xx_start_bit 0x0001 /* start record/play */
177 #define RME96xx_latency0 0x0002 /* Buffer size / latency */
178 #define RME96xx_latency1 0x0004 /* buffersize = 512Bytes * 2^n */
179 #define RME96xx_latency2 0x0008 /* 0=64samples ... 7=8192samples */
180
181 #define RME96xx_Master 0x0010 /* Clock Mode 1=Master, 0=Slave/Auto */
182 #define RME96xx_IE 0x0020 /* Interupt Enable */
183 #define RME96xx_freq 0x0040 /* samplerate 0=44.1/88.2, 1=48/96 kHz*/
184 #define RME96xx_freq1 0x0080 /* samplerate 0=32 kHz, 1=other rates ??? (from ALSA, but may be wrong) */
185 #define RME96xx_DS 0x0100 /* double speed 0=44.1/48, 1=88.2/96 Khz */
186 #define RME96xx_PRO 0x0200 /* SPDIF-OUT 0=consumer, 1=professional */
187 #define RME96xx_EMP 0x0400 /* SPDIF-OUT emphasis 0=off, 1=on */
188 #define RME96xx_Dolby 0x0800 /* SPDIF-OUT non-audio bit 1=set, 0=unset */
189
190 #define RME96xx_opt_out 0x1000 /* use 1st optical OUT as SPDIF: 1=yes, 0=no */
191 #define RME96xx_wsel 0x2000 /* use Wordclock as sync (overwrites master) */
192 #define RME96xx_inp_0 0x4000 /* SPDIF-IN 00=optical (ADAT1), */
193 #define RME96xx_inp_1 0x8000 /* 01=coaxial (Cinch), 10=internal CDROM */
194
195 #define RME96xx_SyncRef0 0x10000 /* preferred sync-source in autosync */
196 #define RME96xx_SyncRef1 0x20000 /* 00=ADAT1, 01=ADAT2, 10=ADAT3, 11=SPDIF */
197
198 #define RME96xx_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w SPDIF receiver */
199 #define RME96xx_SPDIF_SELECT (1<<19)
200 #define RME96xx_SPDIF_CLOCK (1<<20)
201 #define RME96xx_SPDIF_WRITE (1<<21)
202 #define RME96xx_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */
203
204
205 #define RME96xx_ctrl_init (RME96xx_latency0 |\
206 RME96xx_Master |\
207 RME96xx_inp_1)
208
209
210
211 /* Control register fields and shortcuts */
212
213 #define RME96xx_latency (RME96xx_latency0|RME96xx_latency1|RME96xx_latency2)
214 #define RME96xx_inp (RME96xx_inp_0|RME96xx_inp_1)
215 #define RME96xx_SyncRef (RME96xx_SyncRef0|RME96xx_SyncRef1)
216 #define RME96xx_mixer_allowed (RME96xx_Master|RME96xx_PRO|RME96xx_EMP|RME96xx_Dolby|RME96xx_opt_out|RME96xx_wsel|RME96xx_inp|RME96xx_SyncRef|RME96xx_ADAT1_INTERNAL)
217
218 /* latency = 512Bytes * 2^n, where n is made from Bit3 ... Bit1 (??? HP20020201) */
219
220 #define RME96xx_SET_LATENCY(x) (((x)&0x7)<<1)
221 #define RME96xx_GET_LATENCY(x) (((x)>>1)&0x7)
222 #define RME96xx_SET_inp(x) (((x)&0x3)<<14)
223 #define RME96xx_GET_inp(x) (((x)>>14)&0x3)
224 #define RME96xx_SET_SyncRef(x) (((x)&0x3)<<17)
225 #define RME96xx_GET_SyncRef(x) (((x)>>17)&0x3)
226
227
228 /* buffer sizes */
229 #define RME96xx_BYTES_PER_SAMPLE 4 /* sizeof(u32) */
230 #define RME_16K 16*1024
231
232 #define RME96xx_DMA_MAX_SAMPLES (RME_16K)
233 #define RME96xx_DMA_MAX_SIZE (RME_16K * RME96xx_BYTES_PER_SAMPLE)
234 #define RME96xx_DMA_MAX_SIZE_ALL (RME96xx_DMA_MAX_SIZE * RME96xx_CHANNELS_PER_CARD)
235
236 #define RME96xx_NUM_OF_FRAGMENTS 2
237 #define RME96xx_FRAGMENT_MAX_SIZE (RME96xx_DMA_MAX_SIZE/2)
238 #define RME96xx_FRAGMENT_MAX_SAMPLES (RME96xx_DMA_MAX_SAMPLES/2)
239 #define RME96xx_MAX_LATENCY 7 /* 16k samples */
240
241
242 #define RME96xx_MAX_DEVS 4 /* we provide some OSS stereodevs */
243 #define RME96xx_MASK_DEVS 0x3 /* RME96xx_MAX_DEVS-1 */
244
245 #define RME_MESS "rme96xx:"
246 /*------------------------------------------------------------------------
247 Types, struct and function declarations
248 ------------------------------------------------------------------------*/
249
250
251 /* --------------------------------------------------------------------- */
252
253 static const char invalid_magic[] = KERN_CRIT RME_MESS" invalid magic value\n";
254
255 #define VALIDATE_STATE(s) \
256 ({ \
257 if (!(s) || (s)->magic != RME96xx_MAGIC) { \
258 printk(invalid_magic); \
259 return -ENXIO; \
260 } \
261 })
262
263 /* --------------------------------------------------------------------- */
264
265
266 static struct file_operations rme96xx_audio_fops;
267 static struct file_operations rme96xx_mixer_fops;
268 static int numcards;
269
270 typedef int32_t raw_sample_t;
271
272 typedef struct _rme96xx_info {
273
274 /* hardware settings */
275 int magic;
276 struct pci_dev * pcidev; /* pci_dev structure */
277 unsigned long *iobase;
278 unsigned int irq;
279
280 /* list of rme96xx devices */
281 struct list_head devs;
282
283 spinlock_t lock;
284
285 u32 *recbuf; /* memory for rec buffer */
286 u32 *playbuf; /* memory for play buffer */
287
288 u32 control_register;
289
290 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
291
292 int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
293 char *card_name; /* hammerfall or hammerfall light names */
294
295 int open_count; /* unused ??? HP20020201 */
296
297 int rate;
298 int latency;
299 unsigned int fragsize;
300 int started;
301
302 int hwptr; /* can be negativ because of pci burst offset */
303 unsigned int hwbufid; /* set by interrupt, buffer which is written/read now */
304
305 struct dmabuf {
306
307 unsigned int format;
308 int formatshift;
309 int inchannels; /* number of channels for device */
310 int outchannels; /* number of channels for device */
311 int mono; /* if true, we play mono on 2 channels */
312 int inoffset; /* which channel is considered the first one */
313 int outoffset;
314
315 /* state */
316 int opened; /* open() made */
317 int started; /* first write/read */
318 int mmapped; /* mmap */
319 int open_mode;
320
321 struct _rme96xx_info *s;
322
323 /* pointer to read/write position in buffer */
324 unsigned readptr;
325 unsigned writeptr;
326
327 unsigned error; /* over/underruns cleared on sync again */
328
329 /* waiting and locking */
330 wait_queue_head_t wait;
331 struct semaphore open_sem;
332 wait_queue_head_t open_wait;
333
334 } dma[RME96xx_MAX_DEVS];
335
336 int dspnum[RME96xx_MAX_DEVS]; /* register with sound subsystem */
337 int mixer; /* register with sound subsystem */
338 } rme96xx_info;
339
340
341 /* fiddling with the card (first level hardware control) */
342
343 inline void rme96xx_set_ctrl(rme96xx_info* s,int mask)
344 {
345
346 s->control_register|=mask;
347 writel(s->control_register,s->iobase + RME96xx_control_register);
348
349 }
350
351 inline void rme96xx_unset_ctrl(rme96xx_info* s,int mask)
352 {
353
354 s->control_register&=(~mask);
355 writel(s->control_register,s->iobase + RME96xx_control_register);
356
357 }
358
359 inline int rme96xx_get_sample_rate_status(rme96xx_info* s)
360 {
361 int val;
362 u32 status;
363 status = readl(s->iobase + RME96xx_status_register);
364 val = (status & RME96xx_fs48) ? 48000 : 44100;
365 if (status & RME96xx_DS_rd)
366 val *= 2;
367 return val;
368 }
369
370 inline int rme96xx_get_sample_rate_ctrl(rme96xx_info* s)
371 {
372 int val;
373 val = (s->control_register & RME96xx_freq) ? 48000 : 44100;
374 if (s->control_register & RME96xx_DS)
375 val *= 2;
376 return val;
377 }
378
379
380 /* code from ALSA card-rme9652.c for rev 1.5 SPDIF receiver HP 20020201 */
381
382 static void rme96xx_spdif_set_bit (rme96xx_info* s, int mask, int onoff)
383 {
384 if (onoff)
385 s->control_register |= mask;
386 else
387 s->control_register &= ~mask;
388
389 writel(s->control_register,s->iobase + RME96xx_control_register);
390 }
391
392 static void rme96xx_spdif_write_byte (rme96xx_info* s, const int val)
393 {
394 long mask;
395 long i;
396
397 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
398 if (val & mask)
399 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_WRITE, 1);
400 else
401 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_WRITE, 0);
402
403 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 1);
404 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 0);
405 }
406 }
407
408 static int rme96xx_spdif_read_byte (rme96xx_info* s)
409 {
410 long mask;
411 long val;
412 long i;
413
414 val = 0;
415
416 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
417 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 1);
418 if (readl(s->iobase + RME96xx_status_register) & RME96xx_SPDIF_READ)
419 val |= mask;
420 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 0);
421 }
422
423 return val;
424 }
425
426 static void rme96xx_write_spdif_codec (rme96xx_info* s, const int address, const int data)
427 {
428 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 1);
429 rme96xx_spdif_write_byte (s, 0x20);
430 rme96xx_spdif_write_byte (s, address);
431 rme96xx_spdif_write_byte (s, data);
432 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 0);
433 }
434
435
436 static int rme96xx_spdif_read_codec (rme96xx_info* s, const int address)
437 {
438 int ret;
439
440 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 1);
441 rme96xx_spdif_write_byte (s, 0x20);
442 rme96xx_spdif_write_byte (s, address);
443 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 0);
444 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 1);
445
446 rme96xx_spdif_write_byte (s, 0x21);
447 ret = rme96xx_spdif_read_byte (s);
448 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 0);
449
450 return ret;
451 }
452
453 static void rme96xx_initialize_spdif_receiver (rme96xx_info* s)
454 {
455 /* XXX what unsets this ? */
456 /* no idea ??? HP 20020201 */
457
458 s->control_register |= RME96xx_SPDIF_RESET;
459
460 rme96xx_write_spdif_codec (s, 4, 0x40);
461 rme96xx_write_spdif_codec (s, 17, 0x13);
462 rme96xx_write_spdif_codec (s, 6, 0x02);
463 }
464
465 static inline int rme96xx_spdif_sample_rate (rme96xx_info *s, int *spdifrate)
466 {
467 unsigned int rate_bits;
468
469 *spdifrate = 0x1;
470 if (readl(s->iobase + RME96xx_status_register) & RME96xx_ERF) {
471 return -1; /* error condition */
472 }
473
474 if (s->hw_rev == 15) {
475
476 int x, y, ret;
477
478 x = rme96xx_spdif_read_codec (s, 30);
479
480 if (x != 0)
481 y = 48000 * 64 / x;
482 else
483 y = 0;
484
485 if (y > 30400 && y < 33600) {ret = 32000; *spdifrate = 0x7;}
486 else if (y > 41900 && y < 46000) {ret = 44100; *spdifrate = 0x6;}
487 else if (y > 46000 && y < 50400) {ret = 48000; *spdifrate = 0x5;}
488 else if (y > 60800 && y < 67200) {ret = 64000; *spdifrate = 0x0;}
489 else if (y > 83700 && y < 92000) {ret = 88200; *spdifrate = 0x4;}
490 else if (y > 92000 && y < 100000) {ret = 96000; *spdifrate = 0x3;}
491 else {ret = 0; *spdifrate = 0x1;}
492 return ret;
493 }
494
495 rate_bits = readl(s->iobase + RME96xx_status_register) & RME96xx_F;
496
497 switch (*spdifrate = rme96xx_decode_spdif_rate(rate_bits)) {
498 case 0x7:
499 return 32000;
500 break;
501
502 case 0x6:
503 return 44100;
504 break;
505
506 case 0x5:
507 return 48000;
508 break;
509
510 case 0x4:
511 return 88200;
512 break;
513
514 case 0x3:
515 return 96000;
516 break;
517
518 case 0x0:
519 return 64000;
520 break;
521
522 default:
523 /* was an ALSA warning ...
524 snd_printk("%s: unknown S/PDIF input rate (bits = 0x%x)\n",
525 s->card_name, rate_bits);
526 */
527 return 0;
528 break;
529 }
530 }
531
532 /* end of code from ALSA card-rme9652.c */
533
534
535
536 /* the hwbuf in the status register seems to have some jitter, to get rid of
537 it, we first only let the numbers grow, to be on the secure side we
538 subtract a certain amount RME96xx_BURSTBYTES from the resulting number */
539
540 /* the function returns the hardware pointer in bytes */
541 #define RME96xx_BURSTBYTES -64 /* bytes by which hwptr could be off */
542
543 inline int rme96xx_gethwptr(rme96xx_info* s,int exact)
544 {
545 unsigned long flags;
546 if (exact) {
547 unsigned int hwp;
548 /* the hwptr seems to be rather unreliable :(, so we don't use it */
549 spin_lock_irqsave(&s->lock,flags);
550
551 hwp = readl(s->iobase + RME96xx_status_register) & 0xffc0;
552 s->hwptr = (hwp < s->hwptr) ? s->hwptr : hwp;
553 // s->hwptr = hwp;
554
555 spin_unlock_irqrestore(&s->lock,flags);
556 return (s->hwptr+RME96xx_BURSTBYTES) & ((s->fragsize<<1)-1);
557 }
558 return (s->hwbufid ? s->fragsize : 0);
559 }
560
561 inline void rme96xx_setlatency(rme96xx_info* s,int l)
562 {
563 s->latency = l;
564 s->fragsize = 1<<(8+l);
565 rme96xx_unset_ctrl(s,RME96xx_latency);
566 rme96xx_set_ctrl(s,RME96xx_SET_LATENCY(l));
567 }
568
569
570 static void rme96xx_clearbufs(struct dmabuf* dma)
571 {
572 int i,j;
573 unsigned long flags;
574
575 /* clear dmabufs */
576 for(i=0;i<devices;i++) {
577 for (j=0;j<dma->outchannels + dma->mono;j++)
578 memset(&dma->s->playbuf[(dma->outoffset + j)*RME96xx_DMA_MAX_SAMPLES],
579 0, RME96xx_DMA_MAX_SIZE);
580 }
581 spin_lock_irqsave(&dma->s->lock,flags);
582 dma->writeptr = 0;
583 dma->readptr = 0;
584 spin_unlock_irqrestore(&dma->s->lock,flags);
585 }
586
587 static int rme96xx_startcard(rme96xx_info *s,int stop)
588 {
589 int i;
590 unsigned long flags;
591
592 COMM ("startcard");
593 if(s->control_register & RME96xx_IE){
594 /* disable interrupt first */
595
596 rme96xx_unset_ctrl( s,RME96xx_start_bit );
597 udelay(10);
598 rme96xx_unset_ctrl( s,RME96xx_IE);
599 spin_lock_irqsave(&s->lock,flags); /* timing is critical */
600 s->started = 0;
601 spin_unlock_irqrestore(&s->lock,flags);
602 if (stop) {
603 COMM("Sound card stopped");
604 return 1;
605 }
606 }
607 COMM ("interrupt disabled");
608 /* first initialize all pointers on card */
609 for(i=0;i<RME96xx_num_of_init_regs;i++){
610 writel(0,s->iobase + i);
611 udelay(10); /* ?? */
612 }
613 COMM ("regs cleaned");
614
615 spin_lock_irqsave(&s->lock,flags); /* timing is critical */
616 udelay(10);
617 s->started = 1;
618 s->hwptr = 0;
619 spin_unlock_irqrestore(&s->lock,flags);
620
621 rme96xx_set_ctrl( s, RME96xx_IE | RME96xx_start_bit);
622
623
624 COMM("Sound card started");
625
626 return 1;
627 }
628
629
630 inline int rme96xx_getospace(struct dmabuf * dma, unsigned int hwp)
631 {
632 int cnt;
633 int swptr;
634 unsigned long flags;
635
636 spin_lock_irqsave(&dma->s->lock,flags);
637 swptr = dma->writeptr;
638 cnt = (hwp - swptr);
639
640 if (cnt < 0) {
641 cnt = ((dma->s->fragsize<<1) - swptr);
642 }
643 spin_unlock_irqrestore(&dma->s->lock,flags);
644 return cnt;
645 }
646
647 inline int rme96xx_getispace(struct dmabuf * dma, unsigned int hwp)
648 {
649 int cnt;
650 int swptr;
651 unsigned long flags;
652
653 spin_lock_irqsave(&dma->s->lock,flags);
654 swptr = dma->readptr;
655 cnt = (hwp - swptr);
656
657 if (cnt < 0) {
658 cnt = ((dma->s->fragsize<<1) - swptr);
659 }
660 spin_unlock_irqrestore(&dma->s->lock,flags);
661 return cnt;
662 }
663
664
665 inline int rme96xx_copyfromuser(struct dmabuf* dma,const char* buffer,int count,int hop)
666 {
667 int swptr = dma->writeptr;
668 switch (dma->format) {
669 case AFMT_S32_BLOCKED:
670 {
671 char* buf = (char*)buffer;
672 int cnt = count/dma->outchannels;
673 int i;
674 for (i=0;i < dma->outchannels;i++) {
675 char* hwbuf =(char*) &dma->s->playbuf[(dma->outoffset + i)*RME96xx_DMA_MAX_SAMPLES];
676 hwbuf+=swptr;
677
678 if (copy_from_user(hwbuf,buf, cnt))
679 return -1;
680 buf+=hop;
681 }
682 swptr+=cnt;
683 break;
684 }
685 case AFMT_S16_LE:
686 {
687 int i,j;
688 int cnt = count/dma->outchannels;
689 for (i=0;i < dma->outchannels + dma->mono;i++) {
690 short* sbuf = (short*)buffer + i*(!dma->mono);
691 short* hwbuf =(short*) &dma->s->playbuf[(dma->outoffset + i)*RME96xx_DMA_MAX_SAMPLES];
692 hwbuf+=(swptr>>1);
693 for (j=0;j<(cnt>>1);j++) {
694 hwbuf++; /* skip the low 16 bits */
695 __get_user(*hwbuf++,sbuf++);
696 sbuf+=(dma->outchannels-1);
697 }
698 }
699 swptr += (cnt<<1);
700 break;
701 }
702 default:
703 printk(RME_MESS" unsupported format\n");
704 return -1;
705 } /* switch */
706
707 swptr&=((dma->s->fragsize<<1) -1);
708 dma->writeptr = swptr;
709
710 return 0;
711 }
712
713 /* The count argument is the number of bytes */
714 inline int rme96xx_copytouser(struct dmabuf* dma,const char* buffer,int count,int hop)
715 {
716 int swptr = dma->readptr;
717 switch (dma->format) {
718 case AFMT_S32_BLOCKED:
719 {
720 char* buf = (char*)buffer;
721 int cnt = count/dma->inchannels;
722 int i;
723
724 for (i=0;i < dma->inchannels;i++) {
725 char* hwbuf =(char*) &dma->s->recbuf[(dma->inoffset + i)*RME96xx_DMA_MAX_SAMPLES];
726 hwbuf+=swptr;
727
728 if (copy_to_user(buf,hwbuf,cnt))
729 return -1;
730 buf+=hop;
731 }
732 swptr+=cnt;
733 break;
734 }
735 case AFMT_S16_LE:
736 {
737 int i,j;
738 int cnt = count/dma->inchannels;
739 for (i=0;i < dma->inchannels;i++) {
740 short* sbuf = (short*)buffer + i;
741 short* hwbuf =(short*) &dma->s->recbuf[(dma->inoffset + i)*RME96xx_DMA_MAX_SAMPLES];
742 hwbuf+=(swptr>>1);
743 for (j=0;j<(cnt>>1);j++) {
744 hwbuf++;
745 __put_user(*hwbuf++,sbuf++);
746 sbuf+=(dma->inchannels-1);
747 }
748 }
749 swptr += (cnt<<1);
750 break;
751 }
752 default:
753 printk(RME_MESS" unsupported format\n");
754 return -1;
755 } /* switch */
756
757 swptr&=((dma->s->fragsize<<1) -1);
758 dma->readptr = swptr;
759 return 0;
760 }
761
762
763 static irqreturn_t rme96xx_interrupt(int irq, void *dev_id, struct pt_regs *regs)
764 {
765 int i;
766 rme96xx_info *s = (rme96xx_info *)dev_id;
767 struct dmabuf *db;
768 u32 status;
769 unsigned long flags;
770
771 status = readl(s->iobase + RME96xx_status_register);
772 if (!(status & RME96xx_IRQ)) {
773 return IRQ_NONE;
774 }
775
776 spin_lock_irqsave(&s->lock,flags);
777 writel(0,s->iobase + RME96xx_irq_clear);
778
779 s->hwbufid = (status & RME96xx_buffer_id)>>26;
780 if ((status & 0xffc0) <= 256) s->hwptr = 0;
781 for(i=0;i<devices;i++)
782 {
783 db = &(s->dma[i]);
784 if(db->started > 0)
785 wake_up(&(db->wait));
786 }
787 spin_unlock_irqrestore(&s->lock,flags);
788 return IRQ_HANDLED;
789 }
790
791
792
793 /*----------------------------------------------------------------------------
794 PCI detection and module initialization stuff
795 ----------------------------------------------------------------------------*/
796
797 void* busmaster_malloc(int size) {
798 int pg; /* 2 s exponent of memory size */
799 char *buf;
800
801 DBG(printk("kernel malloc pages ..\n"));
802
803 for (pg = 0; PAGE_SIZE * (1 << pg) < size; pg++);
804
805 buf = (char *) __get_free_pages(GFP_KERNEL | GFP_DMA, pg);
806
807 if (buf) {
808 struct page* page, *last_page;
809
810 page = virt_to_page(buf);
811 last_page = virt_to_page(buf + (1 << pg));
812 DBG(printk("setting reserved bit\n"));
813 while (page < last_page) {
814 SetPageReserved(page);
815 page++;
816 }
817 return buf;
818 }
819 DBG(printk("allocated %ld",(long)buf));
820 return NULL;
821 }
822
823 void busmaster_free(void* ptr,int size) {
824 int pg;
825 struct page* page, *last_page;
826
827 if (ptr == NULL)
828 return;
829
830 for (pg = 0; PAGE_SIZE * (1 << pg) < size; pg++);
831
832 page = virt_to_page(ptr);
833 last_page = page + (1 << pg);
834 while (page < last_page) {
835 ClearPageReserved(page);
836 page++;
837 }
838 DBG(printk("freeing pages\n"));
839 free_pages((unsigned long) ptr, pg);
840 DBG(printk("done\n"));
841 }
842
843 /* initialize those parts of the info structure which are not pci detectable resources */
844
845 static int rme96xx_dmabuf_init(rme96xx_info * s,struct dmabuf* dma,int ioffset,int ooffset) {
846
847 init_MUTEX(&dma->open_sem);
848 init_waitqueue_head(&dma->open_wait);
849 init_waitqueue_head(&dma->wait);
850 dma->s = s;
851 dma->error = 0;
852
853 dma->format = AFMT_S32_BLOCKED;
854 dma->formatshift = 0;
855 dma->inchannels = dma->outchannels = 1;
856 dma->inoffset = ioffset;
857 dma->outoffset = ooffset;
858
859 dma->opened=0;
860 dma->started=0;
861 dma->mmapped=0;
862 dma->open_mode=0;
863 dma->mono=0;
864
865 rme96xx_clearbufs(dma);
866 return 0;
867 }
868
869
870 int rme96xx_init(rme96xx_info* s)
871 {
872 int i;
873 int status;
874 unsigned short rev;
875
876 DBG(printk(__FUNCTION__"\n"));
877 numcards++;
878
879 s->magic = RME96xx_MAGIC;
880
881 spin_lock_init(&s->lock);
882
883 COMM ("setup busmaster memory")
884 s->recbuf = busmaster_malloc(RME96xx_DMA_MAX_SIZE_ALL);
885 s->playbuf = busmaster_malloc(RME96xx_DMA_MAX_SIZE_ALL);
886
887 if (!s->recbuf || !s->playbuf) {
888 printk(KERN_ERR RME_MESS" Unable to allocate busmaster memory\n");
889 return -ENODEV;
890 }
891
892 COMM ("setting rec and playbuffers")
893
894 writel((u32) virt_to_bus(s->recbuf),s->iobase + RME96xx_rec_buffer);
895 writel((u32) virt_to_bus(s->playbuf),s->iobase + RME96xx_play_buffer);
896
897 COMM ("initializing control register")
898 rme96xx_unset_ctrl(s,0xffffffff);
899 rme96xx_set_ctrl(s,RME96xx_ctrl_init);
900
901
902 COMM ("setup devices")
903 for (i=0;i < devices;i++) {
904 struct dmabuf * dma = &s->dma[i];
905 rme96xx_dmabuf_init(s,dma,2*i,2*i);
906 }
907
908 /* code from ALSA card-rme9652.c HP 20020201 */
909 /* Determine the h/w rev level of the card. This seems like
910 a particularly kludgy way to encode it, but its what RME
911 chose to do, so we follow them ...
912 */
913
914 status = readl(s->iobase + RME96xx_status_register);
915 if (rme96xx_decode_spdif_rate(status&RME96xx_F) == 1) {
916 s->hw_rev = 15;
917 } else {
918 s->hw_rev = 11;
919 }
920
921 /* Differentiate between the standard Hammerfall, and the
922 "Light", which does not have the expansion board. This
923 method comes from information received from Mathhias
924 Clausen at RME. Display the EEPROM and h/w revID where
925 relevant.
926 */
927
928 pci_read_config_word(s->pcidev, PCI_CLASS_REVISION, &rev);
929 switch (rev & 0xff) {
930 case 8: /* original eprom */
931 if (s->hw_rev == 15) {
932 s->card_name = "RME Digi9636 (Rev 1.5)";
933 } else {
934 s->card_name = "RME Digi9636";
935 }
936 break;
937 case 9: /* W36_G EPROM */
938 s->card_name = "RME Digi9636 (Rev G)";
939 break;
940 case 4: /* W52_G EPROM */
941 s->card_name = "RME Digi9652 (Rev G)";
942 break;
943 default:
944 case 3: /* original eprom */
945 if (s->hw_rev == 15) {
946 s->card_name = "RME Digi9652 (Rev 1.5)";
947 } else {
948 s->card_name = "RME Digi9652";
949 }
950 break;
951 }
952
953 printk(KERN_INFO RME_MESS" detected %s (hw_rev %d)\n",s->card_name,s->hw_rev);
954
955 if (s->hw_rev == 15)
956 rme96xx_initialize_spdif_receiver (s);
957
958 s->started = 0;
959 rme96xx_setlatency(s,7);
960
961 printk(KERN_INFO RME_MESS" card %d initialized\n",numcards);
962 return 0;
963 }
964
965
966 /* open uses this to figure out which device was opened .. this seems to be
967 unnecessary complex */
968
969 static LIST_HEAD(devs);
970
971 static int __devinit rme96xx_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
972 {
973 int i;
974 rme96xx_info *s;
975
976 DBG(printk(__FUNCTION__"\n"));
977
978 if (pcidev->irq == 0)
979 return -1;
980 if (!pci_dma_supported(pcidev, 0xffffffff)) {
981 printk(KERN_WARNING RME_MESS" architecture does not support 32bit PCI busmaster DMA\n");
982 return -1;
983 }
984 if (!(s = kmalloc(sizeof(rme96xx_info), GFP_KERNEL))) {
985 printk(KERN_WARNING RME_MESS" out of memory\n");
986 return -1;
987 }
988 memset(s, 0, sizeof(rme96xx_info));
989
990 s->pcidev = pcidev;
991 s->iobase = ioremap(pci_resource_start(pcidev, 0),RME96xx_IO_EXTENT);
992 s->irq = pcidev->irq;
993
994 DBG(printk("remapped iobase: %lx irq %d\n",(long)s->iobase,s->irq));
995
996 if (pci_enable_device(pcidev))
997 goto err_irq;
998 if (request_irq(s->irq, rme96xx_interrupt, SA_SHIRQ, "rme96xx", s)) {
999 printk(KERN_ERR RME_MESS" irq %u in use\n", s->irq);
1000 goto err_irq;
1001 }
1002
1003 /* initialize the card */
1004
1005 i = 0;
1006 if (rme96xx_init(s) < 0) {
1007 printk(KERN_ERR RME_MESS" initialization failed\n");
1008 goto err_devices;
1009 }
1010 for (i=0;i<devices;i++) {
1011 if ((s->dspnum[i] = register_sound_dsp(&rme96xx_audio_fops, -1)) < 0)
1012 goto err_devices;
1013 }
1014
1015 if ((s->mixer = register_sound_mixer(&rme96xx_mixer_fops, -1)) < 0)
1016 goto err_devices;
1017
1018 pci_set_drvdata(pcidev, s);
1019 pcidev->dma_mask = 0xffffffff; /* ????? */
1020 /* put it into driver list */
1021 list_add_tail(&s->devs, &devs);
1022
1023 DBG(printk("initialization successful\n"));
1024 return 0;
1025
1026 /* error handler */
1027 err_devices:
1028 while (i--)
1029 unregister_sound_dsp(s->dspnum[i]);
1030 free_irq(s->irq,s);
1031 err_irq:
1032 kfree(s);
1033 return -1;
1034 }
1035
1036
1037 static void __devinit rme96xx_remove(struct pci_dev *dev)
1038 {
1039 int i;
1040 rme96xx_info *s = pci_get_drvdata(dev);
1041
1042 if (!s) {
1043 printk(KERN_ERR"device structure not valid\n");
1044 return ;
1045 }
1046
1047 if (s->started) rme96xx_startcard(s,0);
1048
1049 i = devices;
1050 while (i) {
1051 i--;
1052 unregister_sound_dsp(s->dspnum[i]);
1053 }
1054
1055 unregister_sound_mixer(s->mixer);
1056 synchronize_irq(s->irq);
1057 free_irq(s->irq,s);
1058 busmaster_free(s->recbuf,RME96xx_DMA_MAX_SIZE_ALL);
1059 busmaster_free(s->playbuf,RME96xx_DMA_MAX_SIZE_ALL);
1060 kfree(s);
1061 pci_set_drvdata(dev, NULL);
1062 }
1063
1064
1065 #ifndef PCI_VENDOR_ID_RME
1066 #define PCI_VENDOR_ID_RME 0x10ee
1067 #endif
1068 #ifndef PCI_DEVICE_ID_RME9652
1069 #define PCI_DEVICE_ID_RME9652 0x3fc4
1070 #endif
1071 #ifndef PCI_ANY_ID
1072 #define PCI_ANY_ID 0
1073 #endif
1074
1075 static struct pci_device_id id_table[] __devinitdata = {
1076 {
1077 .vendor = PCI_VENDOR_ID_RME,
1078 .device = PCI_DEVICE_ID_RME9652,
1079 .subvendor = PCI_ANY_ID,
1080 .subdevice = PCI_ANY_ID,
1081 },
1082 { 0, },
1083 };
1084
1085 MODULE_DEVICE_TABLE(pci, id_table);
1086
1087 static struct pci_driver rme96xx_driver = {
1088 .name = "rme96xx",
1089 .id_table = id_table,
1090 .probe = rme96xx_probe,
1091 .remove = rme96xx_remove,
1092 };
1093
1094 static int __init init_rme96xx(void)
1095 {
1096 printk(KERN_INFO RME_MESS" version "RMEVERSION" time " __TIME__ " " __DATE__ "\n");
1097 devices = ((devices-1) & RME96xx_MASK_DEVS) + 1;
1098 printk(KERN_INFO RME_MESS" reserving %d dsp device(s)\n",devices);
1099 numcards = 0;
1100 return pci_module_init(&rme96xx_driver);
1101 }
1102
1103 static void __exit cleanup_rme96xx(void)
1104 {
1105 printk(KERN_INFO RME_MESS" unloading\n");
1106 pci_unregister_driver(&rme96xx_driver);
1107 }
1108
1109 module_init(init_rme96xx);
1110 module_exit(cleanup_rme96xx);
1111
1112
1113
1114
1115
1116 /*--------------------------------------------------------------------------
1117 Implementation of file operations
1118 ---------------------------------------------------------------------------*/
1119
1120 #define RME96xx_FMT (AFMT_S16_LE|AFMT_U8|AFMT_S32_BLOCKED)
1121 /* AFTM_U8 is not (yet?) supported ... HP20020201 */
1122
1123 static int rme96xx_ioctl(struct inode *in, struct file *file, unsigned int cmd, unsigned long arg)
1124 {
1125
1126 struct dmabuf * dma = (struct dmabuf *)file->private_data;
1127 rme96xx_info *s = dma->s;
1128 unsigned long flags;
1129 audio_buf_info abinfo;
1130 count_info cinfo;
1131 int count;
1132 int val = 0;
1133
1134 VALIDATE_STATE(s);
1135
1136 DBG(printk("ioctl %ud\n",cmd));
1137
1138 switch (cmd) {
1139 case OSS_GETVERSION:
1140 return put_user(SOUND_VERSION, (int *)arg);
1141
1142 case SNDCTL_DSP_SYNC:
1143 #if 0
1144 if (file->f_mode & FMODE_WRITE)
1145 return drain_dac2(s, 0/*file->f_flags & O_NONBLOCK*/);
1146 #endif
1147 return 0;
1148
1149 case SNDCTL_DSP_SETDUPLEX:
1150 return 0;
1151
1152 case SNDCTL_DSP_GETCAPS:
1153 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1154
1155 case SNDCTL_DSP_RESET:
1156 // rme96xx_clearbufs(dma);
1157 return 0;
1158
1159 case SNDCTL_DSP_SPEED:
1160 if (get_user(val, (int *)arg))
1161 return -EFAULT;
1162 if (val >= 0) {
1163 /* generally it's not a problem if we change the speed
1164 if (dma->open_mode & (~file->f_mode) & (FMODE_READ|FMODE_WRITE))
1165 return -EINVAL;
1166 */
1167 spin_lock_irqsave(&s->lock, flags);
1168
1169 switch (val) {
1170 case 44100:
1171 case 88200:
1172 rme96xx_unset_ctrl(s,RME96xx_freq);
1173 break;
1174 case 48000:
1175 case 96000:
1176 rme96xx_set_ctrl(s,RME96xx_freq);
1177 break;
1178 /* just report current rate as default
1179 e.g. use 0 to "select" current digital input rate
1180 default:
1181 rme96xx_unset_ctrl(s,RME96xx_freq);
1182 val = 44100;
1183 */
1184 }
1185 if (val > 50000)
1186 rme96xx_set_ctrl(s,RME96xx_DS);
1187 else
1188 rme96xx_unset_ctrl(s,RME96xx_DS);
1189 /* set val to actual value HP 20020201 */
1190 /* NOTE: if not "Sync Master", reported rate might be not yet "updated" ... but I don't want to insert a long udelay() here */
1191 if ((s->control_register & RME96xx_Master) && !(s->control_register & RME96xx_wsel))
1192 val = rme96xx_get_sample_rate_ctrl(s);
1193 else
1194 val = rme96xx_get_sample_rate_status(s);
1195 s->rate = val;
1196 spin_unlock_irqrestore(&s->lock, flags);
1197 }
1198 DBG(printk("speed set to %d\n",val));
1199 return put_user(val, (int *)arg);
1200
1201 case SNDCTL_DSP_STEREO: /* this plays a mono file on two channels */
1202 if (get_user(val, (int *)arg))
1203 return -EFAULT;
1204
1205 if (!val) {
1206 DBG(printk("setting to mono\n"));
1207 dma->mono=1;
1208 dma->inchannels = 1;
1209 dma->outchannels = 1;
1210 }
1211 else {
1212 DBG(printk("setting to stereo\n"));
1213 dma->mono = 0;
1214 dma->inchannels = 2;
1215 dma->outchannels = 2;
1216 }
1217 return 0;
1218 case SNDCTL_DSP_CHANNELS:
1219 /* remember to check for resonable offset/channel pairs here */
1220 if (get_user(val, (int *)arg))
1221 return -EFAULT;
1222
1223 if (file->f_mode & FMODE_WRITE) {
1224 if (val > 0 && (dma->outoffset + val) <= RME96xx_CHANNELS_PER_CARD)
1225 dma->outchannels = val;
1226 else
1227 dma->outchannels = val = 2;
1228 DBG(printk("setting to outchannels %d\n",val));
1229 }
1230 if (file->f_mode & FMODE_READ) {
1231 if (val > 0 && (dma->inoffset + val) <= RME96xx_CHANNELS_PER_CARD)
1232 dma->inchannels = val;
1233 else
1234 dma->inchannels = val = 2;
1235 DBG(printk("setting to inchannels %d\n",val));
1236 }
1237
1238 dma->mono=0;
1239
1240 return put_user(val, (int *)arg);
1241
1242 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1243 return put_user(RME96xx_FMT, (int *)arg);
1244
1245 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1246 DBG(printk("setting to format %x\n",val));
1247 if (get_user(val, (int *)arg))
1248 return -EFAULT;
1249 if (val != AFMT_QUERY) {
1250 if (val & RME96xx_FMT)
1251 dma->format = val;
1252 switch (dma->format) {
1253 case AFMT_S16_LE:
1254 dma->formatshift=1;
1255 break;
1256 case AFMT_S32_BLOCKED:
1257 dma->formatshift=0;
1258 break;
1259 }
1260 }
1261 return put_user(dma->format, (int *)arg);
1262
1263 case SNDCTL_DSP_POST:
1264 return 0;
1265
1266 case SNDCTL_DSP_GETTRIGGER:
1267 val = 0;
1268 #if 0
1269 if (file->f_mode & FMODE_READ && s->ctrl & CTRL_ADC_EN)
1270 val |= PCM_ENABLE_INPUT;
1271 if (file->f_mode & FMODE_WRITE && s->ctrl & CTRL_DAC2_EN)
1272 val |= PCM_ENABLE_OUTPUT;
1273 #endif
1274 return put_user(val, (int *)arg);
1275
1276 case SNDCTL_DSP_SETTRIGGER:
1277 if (get_user(val, (int *)arg))
1278 return -EFAULT;
1279 #if 0
1280 if (file->f_mode & FMODE_READ) {
1281 if (val & PCM_ENABLE_INPUT) {
1282 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1283 return ret;
1284 start_adc(s);
1285 } else
1286 stop_adc(s);
1287 }
1288 if (file->f_mode & FMODE_WRITE) {
1289 if (val & PCM_ENABLE_OUTPUT) {
1290 if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1291 return ret;
1292 start_dac2(s);
1293 } else
1294 stop_dac2(s);
1295 }
1296 #endif
1297 return 0;
1298
1299 case SNDCTL_DSP_GETOSPACE:
1300 if (!(file->f_mode & FMODE_WRITE))
1301 return -EINVAL;
1302
1303 val = rme96xx_gethwptr(dma->s,0);
1304
1305
1306 count = rme96xx_getospace(dma,val);
1307 if (!s->started) count = s->fragsize*2;
1308 abinfo.fragsize =(s->fragsize*dma->outchannels)>>dma->formatshift;
1309 abinfo.bytes = (count*dma->outchannels)>>dma->formatshift;
1310 abinfo.fragstotal = 2;
1311 abinfo.fragments = (count > s->fragsize);
1312
1313 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1314
1315 case SNDCTL_DSP_GETISPACE:
1316 if (!(file->f_mode & FMODE_READ))
1317 return -EINVAL;
1318
1319 val = rme96xx_gethwptr(dma->s,0);
1320
1321 count = rme96xx_getispace(dma,val);
1322
1323 abinfo.fragsize = (s->fragsize*dma->inchannels)>>dma->formatshift;
1324 abinfo.bytes = (count*dma->inchannels)>>dma->formatshift;;
1325 abinfo.fragstotal = 2;
1326 abinfo.fragments = count > s->fragsize;
1327 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1328
1329 case SNDCTL_DSP_NONBLOCK:
1330 file->f_flags |= O_NONBLOCK;
1331 return 0;
1332
1333 case SNDCTL_DSP_GETODELAY: /* What should this exactly do ? ,
1334 ATM it is just abinfo.bytes */
1335 if (!(file->f_mode & FMODE_WRITE))
1336 return -EINVAL;
1337
1338 val = rme96xx_gethwptr(dma->s,0);
1339 count = val - dma->readptr;
1340 if (count < 0)
1341 count += s->fragsize<<1;
1342
1343 return put_user(count, (int *)arg);
1344
1345
1346 /* check out how to use mmaped mode (can only be blocked !!!) */
1347 case SNDCTL_DSP_GETIPTR:
1348 if (!(file->f_mode & FMODE_READ))
1349 return -EINVAL;
1350 val = rme96xx_gethwptr(dma->s,0);
1351 spin_lock_irqsave(&s->lock,flags);
1352 cinfo.bytes = s->fragsize<<1;;
1353 count = val - dma->readptr;
1354 if (count < 0)
1355 count += s->fragsize<<1;
1356
1357 cinfo.blocks = (count > s->fragsize);
1358 cinfo.ptr = val;
1359 if (dma->mmapped)
1360 dma->readptr &= s->fragsize<<1;
1361 spin_unlock_irqrestore(&s->lock,flags);
1362
1363 if (copy_to_user((void *)arg, &cinfo, sizeof(cinfo)))
1364 return -EFAULT;
1365 return 0;
1366
1367 case SNDCTL_DSP_GETOPTR:
1368 if (!(file->f_mode & FMODE_READ))
1369 return -EINVAL;
1370 val = rme96xx_gethwptr(dma->s,0);
1371 spin_lock_irqsave(&s->lock,flags);
1372 cinfo.bytes = s->fragsize<<1;;
1373 count = val - dma->writeptr;
1374 if (count < 0)
1375 count += s->fragsize<<1;
1376
1377 cinfo.blocks = (count > s->fragsize);
1378 cinfo.ptr = val;
1379 if (dma->mmapped)
1380 dma->writeptr &= s->fragsize<<1;
1381 spin_unlock_irqrestore(&s->lock,flags);
1382 if (copy_to_user((void *)arg, &cinfo, sizeof(cinfo)))
1383 return -EFAULT;
1384 return 0;
1385 case SNDCTL_DSP_GETBLKSIZE:
1386 return put_user(s->fragsize, (int *)arg);
1387
1388 case SNDCTL_DSP_SETFRAGMENT:
1389 if (get_user(val, (int *)arg))
1390 return -EFAULT;
1391 val&=0xffff;
1392 val -= 7;
1393 if (val < 0) val = 0;
1394 if (val > 7) val = 7;
1395 rme96xx_setlatency(s,val);
1396 return 0;
1397
1398 case SNDCTL_DSP_SUBDIVIDE:
1399 #if 0
1400 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1401 (file->f_mode & FMODE_WRITE && s->dma_dac2.subdivision))
1402 return -EINVAL;
1403 if (get_user(val, (int *)arg))
1404 return -EFAULT;
1405 if (val != 1 && val != 2 && val != 4)
1406 return -EINVAL;
1407 if (file->f_mode & FMODE_READ)
1408 s->dma_adc.subdivision = val;
1409 if (file->f_mode & FMODE_WRITE)
1410 s->dma_dac2.subdivision = val;
1411 #endif
1412 return 0;
1413
1414 case SOUND_PCM_READ_RATE:
1415 /* HP20020201 */
1416 s->rate = rme96xx_get_sample_rate_status(s);
1417 return put_user(s->rate, (int *)arg);
1418
1419 case SOUND_PCM_READ_CHANNELS:
1420 return put_user(dma->outchannels, (int *)arg);
1421
1422 case SOUND_PCM_READ_BITS:
1423 switch (dma->format) {
1424 case AFMT_S32_BLOCKED:
1425 val = 32;
1426 break;
1427 case AFMT_S16_LE:
1428 val = 16;
1429 break;
1430 }
1431 return put_user(val, (int *)arg);
1432
1433 case SOUND_PCM_WRITE_FILTER:
1434 case SNDCTL_DSP_SETSYNCRO:
1435 case SOUND_PCM_READ_FILTER:
1436 return -EINVAL;
1437
1438 }
1439
1440
1441 return -ENODEV;
1442 }
1443
1444
1445
1446 static int rme96xx_open(struct inode *in, struct file *f)
1447 {
1448 int minor = minor(in->i_rdev);
1449 struct list_head *list;
1450 int devnum;
1451 rme96xx_info *s;
1452 struct dmabuf* dma;
1453 DECLARE_WAITQUEUE(wait, current);
1454
1455 DBG(printk("device num %d open\n",devnum));
1456
1457 for (list = devs.next; ; list = list->next) {
1458 if (list == &devs)
1459 return -ENODEV;
1460 s = list_entry(list, rme96xx_info, devs);
1461 for (devnum=0; devnum<devices; devnum++)
1462 if (!((s->dspnum[devnum] ^ minor) & ~0xf))
1463 break;
1464 if (devnum<devices)
1465 break;
1466 }
1467 VALIDATE_STATE(s);
1468
1469 dma = &s->dma[devnum];
1470 f->private_data = dma;
1471 /* wait for device to become free */
1472 down(&dma->open_sem);
1473 while (dma->open_mode & f->f_mode) {
1474 if (f->f_flags & O_NONBLOCK) {
1475 up(&dma->open_sem);
1476 return -EBUSY;
1477 }
1478 add_wait_queue(&dma->open_wait, &wait);
1479 __set_current_state(TASK_INTERRUPTIBLE);
1480 up(&dma->open_sem);
1481 schedule();
1482 remove_wait_queue(&dma->open_wait, &wait);
1483 set_current_state(TASK_RUNNING);
1484 if (signal_pending(current))
1485 return -ERESTARTSYS;
1486 down(&dma->open_sem);
1487 }
1488
1489 COMM ("hardware open")
1490
1491 if (!dma->opened) rme96xx_dmabuf_init(dma->s,dma,dma->inoffset,dma->outoffset);
1492
1493 dma->open_mode |= (f->f_mode & (FMODE_READ | FMODE_WRITE));
1494 dma->opened = 1;
1495 up(&dma->open_sem);
1496
1497 DBG(printk("device num %d open finished\n",devnum));
1498 return 0;
1499 }
1500
1501 static int rme96xx_release(struct inode *in, struct file *file)
1502 {
1503 struct dmabuf * dma = (struct dmabuf*) file->private_data;
1504 /* int hwp; ... was unused HP20020201 */
1505 DBG(printk(__FUNCTION__"\n"));
1506
1507 COMM ("draining")
1508 if (dma->open_mode & FMODE_WRITE) {
1509 #if 0 /* Why doesn't this work with some cards ?? */
1510 hwp = rme96xx_gethwptr(dma->s,0);
1511 while (rme96xx_getospace(dma,hwp)) {
1512 interruptible_sleep_on(&(dma->wait));
1513 hwp = rme96xx_gethwptr(dma->s,0);
1514 }
1515 #endif
1516 rme96xx_clearbufs(dma);
1517 }
1518
1519 dma->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
1520
1521 if (!(dma->open_mode & (FMODE_READ|FMODE_WRITE))) {
1522 dma->opened = 0;
1523 if (dma->s->started) rme96xx_startcard(dma->s,1);
1524 }
1525
1526 wake_up(&dma->open_wait);
1527 up(&dma->open_sem);
1528
1529 return 0;
1530 }
1531
1532
1533 static ssize_t rme96xx_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1534 {
1535 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1536 ssize_t ret = 0;
1537 int cnt; /* number of bytes from "buffer" that will/can be used */
1538 int hop = count/dma->outchannels;
1539 int hwp;
1540 int exact = (file->f_flags & O_NONBLOCK);
1541
1542
1543 if(dma == NULL || (dma->s) == NULL)
1544 return -ENXIO;
1545
1546 if (ppos != &file->f_pos)
1547 return -ESPIPE;
1548
1549 if (dma->mmapped || !dma->opened)
1550 return -ENXIO;
1551
1552 if (!access_ok(VERIFY_READ, buffer, count))
1553 return -EFAULT;
1554
1555 if (! (dma->open_mode & FMODE_WRITE))
1556 return -ENXIO;
1557
1558 if (!dma->s->started) rme96xx_startcard(dma->s,exact);
1559 hwp = rme96xx_gethwptr(dma->s,0);
1560
1561 if(!(dma->started)){
1562 COMM ("first write")
1563
1564 dma->readptr = hwp;
1565 dma->writeptr = hwp;
1566 dma->started = 1;
1567 }
1568
1569 while (count > 0) {
1570 cnt = rme96xx_getospace(dma,hwp);
1571 cnt>>=dma->formatshift;
1572 cnt*=dma->outchannels;
1573 if (cnt > count)
1574 cnt = count;
1575
1576 if (cnt != 0) {
1577 if (rme96xx_copyfromuser(dma,buffer,cnt,hop))
1578 return ret ? ret : -EFAULT;
1579 count -= cnt;
1580 buffer += cnt;
1581 ret += cnt;
1582 if (count == 0) return ret;
1583 }
1584 if (file->f_flags & O_NONBLOCK)
1585 return ret ? ret : -EAGAIN;
1586
1587 if ((hwp - dma->writeptr) <= 0) {
1588 interruptible_sleep_on(&(dma->wait));
1589
1590 if (signal_pending(current))
1591 return ret ? ret : -ERESTARTSYS;
1592 }
1593
1594 hwp = rme96xx_gethwptr(dma->s,exact);
1595
1596 }; /* count > 0 */
1597
1598 return ret;
1599 }
1600
1601 static ssize_t rme96xx_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1602 {
1603 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1604 ssize_t ret = 0;
1605 int cnt; /* number of bytes from "buffer" that will/can be used */
1606 int hop = count/dma->inchannels;
1607 int hwp;
1608 int exact = (file->f_flags & O_NONBLOCK);
1609
1610
1611 if(dma == NULL || (dma->s) == NULL)
1612 return -ENXIO;
1613
1614 if (ppos != &file->f_pos)
1615 return -ESPIPE;
1616
1617 if (dma->mmapped || !dma->opened)
1618 return -ENXIO;
1619
1620 if (!access_ok(VERIFY_WRITE, buffer, count))
1621 return -EFAULT;
1622
1623 if (! (dma->open_mode & FMODE_READ))
1624 return -ENXIO;
1625
1626 if (!dma->s->started) rme96xx_startcard(dma->s,exact);
1627 hwp = rme96xx_gethwptr(dma->s,0);
1628
1629 if(!(dma->started)){
1630 COMM ("first read")
1631
1632 dma->writeptr = hwp;
1633 dma->readptr = hwp;
1634 dma->started = 1;
1635 }
1636
1637 while (count > 0) {
1638 cnt = rme96xx_getispace(dma,hwp);
1639 cnt>>=dma->formatshift;
1640 cnt*=dma->inchannels;
1641
1642 if (cnt > count)
1643 cnt = count;
1644
1645 if (cnt != 0) {
1646
1647 if (rme96xx_copytouser(dma,buffer,cnt,hop))
1648 return ret ? ret : -EFAULT;
1649
1650 count -= cnt;
1651 buffer += cnt;
1652 ret += cnt;
1653 if (count == 0) return ret;
1654 }
1655 if (file->f_flags & O_NONBLOCK)
1656 return ret ? ret : -EAGAIN;
1657
1658 if ((hwp - dma->readptr) <= 0) {
1659 interruptible_sleep_on(&(dma->wait));
1660
1661 if (signal_pending(current))
1662 return ret ? ret : -ERESTARTSYS;
1663 }
1664 hwp = rme96xx_gethwptr(dma->s,exact);
1665
1666 }; /* count > 0 */
1667
1668 return ret;
1669 }
1670
1671 static int rm96xx_mmap(struct file *file, struct vm_area_struct *vma) {
1672 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1673 rme96xx_info* s = dma->s;
1674 unsigned long size;
1675
1676 VALIDATE_STATE(s);
1677 lock_kernel();
1678
1679 if (vma->vm_pgoff != 0) {
1680 unlock_kernel();
1681 return -EINVAL;
1682 }
1683 size = vma->vm_end - vma->vm_start;
1684 if (size > RME96xx_DMA_MAX_SIZE) {
1685 unlock_kernel();
1686 return -EINVAL;
1687 }
1688
1689
1690 if (vma->vm_flags & VM_WRITE) {
1691 if (!s->started) rme96xx_startcard(s,1);
1692
1693 if (remap_page_range(vma, vma->vm_start, virt_to_phys(s->playbuf + dma->outoffset*RME96xx_DMA_MAX_SIZE), size, vma->vm_page_prot)) {
1694 unlock_kernel();
1695 return -EAGAIN;
1696 }
1697 }
1698 else if (vma->vm_flags & VM_READ) {
1699 if (!s->started) rme96xx_startcard(s,1);
1700 if (remap_page_range(vma, vma->vm_start, virt_to_phys(s->playbuf + dma->inoffset*RME96xx_DMA_MAX_SIZE), size, vma->vm_page_prot)) {
1701 unlock_kernel();
1702 return -EAGAIN;
1703 }
1704 } else {
1705 unlock_kernel();
1706 return -EINVAL;
1707 }
1708
1709
1710 /* this is the mapping */
1711 vma->vm_flags &= ~VM_IO;
1712 dma->mmapped = 1;
1713 unlock_kernel();
1714 return 0;
1715 }
1716
1717 static unsigned int rme96xx_poll(struct file *file, struct poll_table_struct *wait)
1718 {
1719 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1720 rme96xx_info* s = dma->s;
1721 unsigned int mask = 0;
1722 unsigned int hwp,cnt;
1723
1724 DBG(printk("rme96xx poll_wait ...\n"));
1725 VALIDATE_STATE(s);
1726
1727 if (!s->started) {
1728 mask |= POLLOUT | POLLWRNORM;
1729 }
1730 poll_wait(file, &dma->wait, wait);
1731
1732 hwp = rme96xx_gethwptr(dma->s,0);
1733
1734 DBG(printk("rme96xx poll: ..cnt %d > %d\n",cnt,s->fragsize));
1735
1736 cnt = rme96xx_getispace(dma,hwp);
1737
1738 if (file->f_mode & FMODE_READ)
1739 if (cnt > 0)
1740 mask |= POLLIN | POLLRDNORM;
1741
1742
1743
1744 cnt = rme96xx_getospace(dma,hwp);
1745
1746 if (file->f_mode & FMODE_WRITE)
1747 if (cnt > 0)
1748 mask |= POLLOUT | POLLWRNORM;
1749
1750
1751 // printk("rme96xx poll_wait ...%d > %d\n",rme96xx_getospace(dma,hwp),rme96xx_getispace(dma,hwp));
1752
1753 return mask;
1754 }
1755
1756
1757 static struct file_operations rme96xx_audio_fops = {
1758 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
1759 .owner = THIS_MODULE,
1760 #endif
1761 .read = rme96xx_read,
1762 .write = rme96xx_write,
1763 .poll = rme96xx_poll,
1764 .ioctl = rme96xx_ioctl,
1765 .mmap = rm96xx_mmap,
1766 .open = rme96xx_open,
1767 .release = rme96xx_release
1768 };
1769
1770 static int rme96xx_mixer_open(struct inode *inode, struct file *file)
1771 {
1772 int minor = minor(inode->i_rdev);
1773 struct list_head *list;
1774 rme96xx_info *s;
1775
1776 COMM ("mixer open");
1777
1778 for (list = devs.next; ; list = list->next) {
1779 if (list == &devs)
1780 return -ENODEV;
1781 s = list_entry(list, rme96xx_info, devs);
1782 if (s->mixer== minor)
1783 break;
1784 }
1785 VALIDATE_STATE(s);
1786 file->private_data = s;
1787
1788 COMM ("mixer opened")
1789 return 0;
1790 }
1791
1792 static int rme96xx_mixer_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1793 {
1794 rme96xx_info *s = (rme96xx_info *)file->private_data;
1795 u32 status;
1796 int spdifrate;
1797
1798 status = readl(s->iobase + RME96xx_status_register);
1799 /* hack to convert rev 1.5 SPDIF rate to "crystalrate" format HP 20020201 */
1800 rme96xx_spdif_sample_rate(s,&spdifrate);
1801 status = (status & ~RME96xx_F) | ((spdifrate<<22) & RME96xx_F);
1802
1803 VALIDATE_STATE(s);
1804 if (cmd == SOUND_MIXER_PRIVATE1) {
1805 rme_mixer mixer;
1806 if (copy_from_user(&mixer,(void*)arg,sizeof(mixer)))
1807 return -EFAULT;
1808
1809 mixer.devnr &= RME96xx_MASK_DEVS;
1810 if (mixer.devnr >= devices)
1811 mixer.devnr = devices-1;
1812 if (file->f_mode & FMODE_WRITE && !s->dma[mixer.devnr].opened) {
1813 /* modify only if device not open */
1814 if (mixer.o_offset < 0)
1815 mixer.o_offset = 0;
1816 if (mixer.o_offset >= RME96xx_CHANNELS_PER_CARD)
1817 mixer.o_offset = RME96xx_CHANNELS_PER_CARD-1;
1818 if (mixer.i_offset < 0)
1819 mixer.i_offset = 0;
1820 if (mixer.i_offset >= RME96xx_CHANNELS_PER_CARD)
1821 mixer.i_offset = RME96xx_CHANNELS_PER_CARD-1;
1822 s->dma[mixer.devnr].outoffset = mixer.o_offset;
1823 s->dma[mixer.devnr].inoffset = mixer.i_offset;
1824 }
1825
1826 mixer.o_offset = s->dma[mixer.devnr].outoffset;
1827 mixer.i_offset = s->dma[mixer.devnr].inoffset;
1828
1829 return copy_to_user((void *)arg, &mixer, sizeof(mixer)) ? -EFAULT : 0;
1830 }
1831 if (cmd == SOUND_MIXER_PRIVATE2) {
1832 return put_user(status, (int *)arg);
1833 }
1834 if (cmd == SOUND_MIXER_PRIVATE3) {
1835 u32 control;
1836 if (copy_from_user(&control,(void*)arg,sizeof(control)))
1837 return -EFAULT;
1838 if (file->f_mode & FMODE_WRITE) {
1839 s->control_register &= ~RME96xx_mixer_allowed;
1840 s->control_register |= control & RME96xx_mixer_allowed;
1841 writel(control,s->iobase + RME96xx_control_register);
1842 }
1843
1844 return put_user(s->control_register, (int *)arg);
1845 }
1846 return -1;
1847 }
1848
1849
1850
1851 static int rme96xx_mixer_release(struct inode *inode, struct file *file)
1852 {
1853 return 0;
1854 }
1855
1856 static /*const*/ struct file_operations rme96xx_mixer_fops = {
1857 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
1858 .owner = THIS_MODULE,
1859 #endif
1860 .ioctl = rme96xx_mixer_ioctl,
1861 .open = rme96xx_mixer_open,
1862 .release = rme96xx_mixer_release,
1863 };
Mirror of the linux-mips.org kernel tree