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Make GET_SAVED_SP lowercase.
[linux-2.6/linux-mips.git] / sound / oss / msnd_pinnacle.c
blob760a617ec17ab544a6e78420e72bd50041e33406
1 /*********************************************************************
2 *
3 * Turtle Beach MultiSound Sound Card Driver for Linux
4 * Linux 2.0/2.2 Version
5 *
6 * msnd_pinnacle.c / msnd_classic.c
7 *
8 * -- If MSND_CLASSIC is defined:
9 *
10 * -> driver for Turtle Beach Classic/Monterey/Tahiti
11 *
12 * -- Else
13 *
14 * -> driver for Turtle Beach Pinnacle/Fiji
15 *
16 * Copyright (C) 1998 Andrew Veliath
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 *
32 * $Id: msnd_pinnacle.c,v 1.8 2000/12/30 00:33:21 sycamore Exp $
33 *
34 * 12-3-2000 Modified IO port validation Steve Sycamore
35 *
36 *
37 * $$$: msnd_pinnacle.c,v 1.75 1999/03/21 16:50:09 andrewtv $$$ $
38 *
39 ********************************************************************/
40
41 #include <linux/kernel.h>
42 #include <linux/config.h>
43 #include <linux/module.h>
44 #include <linux/slab.h>
45 #include <linux/types.h>
46 #include <linux/delay.h>
47 #include <linux/init.h>
48 #include <linux/interrupt.h>
49 #include <linux/smp_lock.h>
50 #include <asm/irq.h>
51 #include <asm/io.h>
52 #include "sound_config.h"
53 #include "sound_firmware.h"
54 #ifdef MSND_CLASSIC
55 # ifndef __alpha__
56 # define SLOWIO
57 # endif
58 #endif
59 #include "msnd.h"
60 #ifdef MSND_CLASSIC
61 # ifdef CONFIG_MSNDCLAS_HAVE_BOOT
62 # define HAVE_DSPCODEH
63 # endif
64 # include "msnd_classic.h"
65 # define LOGNAME "msnd_classic"
66 #else
67 # ifdef CONFIG_MSNDPIN_HAVE_BOOT
68 # define HAVE_DSPCODEH
69 # endif
70 # include "msnd_pinnacle.h"
71 # define LOGNAME "msnd_pinnacle"
72 #endif
73
74 #ifndef CONFIG_MSND_WRITE_NDELAY
75 # define CONFIG_MSND_WRITE_NDELAY 1
76 #endif
77
78 #define get_play_delay_jiffies(size) ((size) * HZ * \
79 dev.play_sample_size / 8 / \
80 dev.play_sample_rate / \
81 dev.play_channels)
82
83 #define get_rec_delay_jiffies(size) ((size) * HZ * \
84 dev.rec_sample_size / 8 / \
85 dev.rec_sample_rate / \
86 dev.rec_channels)
87
88 static multisound_dev_t dev;
89
90 #ifndef HAVE_DSPCODEH
91 static char *dspini, *permini;
92 static int sizeof_dspini, sizeof_permini;
93 #endif
94
95 static int dsp_full_reset(void);
96 static void dsp_write_flush(void);
97
98 static __inline__ int chk_send_dsp_cmd(multisound_dev_t *dev, register BYTE cmd)
99 {
100 if (msnd_send_dsp_cmd(dev, cmd) == 0)
101 return 0;
102 dsp_full_reset();
103 return msnd_send_dsp_cmd(dev, cmd);
104 }
105
106 static void reset_play_queue(void)
107 {
108 int n;
109 LPDAQD lpDAQ;
110
111 dev.last_playbank = -1;
112 isa_writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DAPQ + JQS_wHead);
113 isa_writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DAPQ + JQS_wTail);
114
115 for (n = 0, lpDAQ = dev.base + DAPQ_DATA_BUFF; n < 3; ++n, lpDAQ += DAQDS__size) {
116 isa_writew(PCTODSP_BASED((DWORD)(DAP_BUFF_SIZE * n)), lpDAQ + DAQDS_wStart);
117 isa_writew(0, lpDAQ + DAQDS_wSize);
118 isa_writew(1, lpDAQ + DAQDS_wFormat);
119 isa_writew(dev.play_sample_size, lpDAQ + DAQDS_wSampleSize);
120 isa_writew(dev.play_channels, lpDAQ + DAQDS_wChannels);
121 isa_writew(dev.play_sample_rate, lpDAQ + DAQDS_wSampleRate);
122 isa_writew(HIMT_PLAY_DONE * 0x100 + n, lpDAQ + DAQDS_wIntMsg);
123 isa_writew(n, lpDAQ + DAQDS_wFlags);
124 }
125 }
126
127 static void reset_record_queue(void)
128 {
129 int n;
130 LPDAQD lpDAQ;
131 unsigned long flags;
132
133 dev.last_recbank = 2;
134 isa_writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DARQ + JQS_wHead);
135 isa_writew(PCTODSP_OFFSET(dev.last_recbank * DAQDS__size), dev.DARQ + JQS_wTail);
136
137 /* Critical section: bank 1 access */
138 spin_lock_irqsave(&dev.lock, flags);
139 outb(HPBLKSEL_1, dev.io + HP_BLKS);
140 isa_memset_io(dev.base, 0, DAR_BUFF_SIZE * 3);
141 outb(HPBLKSEL_0, dev.io + HP_BLKS);
142 spin_unlock_irqrestore(&dev.lock, flags);
143
144 for (n = 0, lpDAQ = dev.base + DARQ_DATA_BUFF; n < 3; ++n, lpDAQ += DAQDS__size) {
145 isa_writew(PCTODSP_BASED((DWORD)(DAR_BUFF_SIZE * n)) + 0x4000, lpDAQ + DAQDS_wStart);
146 isa_writew(DAR_BUFF_SIZE, lpDAQ + DAQDS_wSize);
147 isa_writew(1, lpDAQ + DAQDS_wFormat);
148 isa_writew(dev.rec_sample_size, lpDAQ + DAQDS_wSampleSize);
149 isa_writew(dev.rec_channels, lpDAQ + DAQDS_wChannels);
150 isa_writew(dev.rec_sample_rate, lpDAQ + DAQDS_wSampleRate);
151 isa_writew(HIMT_RECORD_DONE * 0x100 + n, lpDAQ + DAQDS_wIntMsg);
152 isa_writew(n, lpDAQ + DAQDS_wFlags);
153 }
154 }
155
156 static void reset_queues(void)
157 {
158 if (dev.mode & FMODE_WRITE) {
159 msnd_fifo_make_empty(&dev.DAPF);
160 reset_play_queue();
161 }
162 if (dev.mode & FMODE_READ) {
163 msnd_fifo_make_empty(&dev.DARF);
164 reset_record_queue();
165 }
166 }
167
168 static int dsp_set_format(struct file *file, int val)
169 {
170 int data, i;
171 LPDAQD lpDAQ, lpDARQ;
172
173 lpDAQ = dev.base + DAPQ_DATA_BUFF;
174 lpDARQ = dev.base + DARQ_DATA_BUFF;
175
176 switch (val) {
177 case AFMT_U8:
178 case AFMT_S16_LE:
179 data = val;
180 break;
181 default:
182 data = DEFSAMPLESIZE;
183 break;
184 }
185
186 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
187 if (file->f_mode & FMODE_WRITE)
188 isa_writew(data, lpDAQ + DAQDS_wSampleSize);
189 if (file->f_mode & FMODE_READ)
190 isa_writew(data, lpDARQ + DAQDS_wSampleSize);
191 }
192 if (file->f_mode & FMODE_WRITE)
193 dev.play_sample_size = data;
194 if (file->f_mode & FMODE_READ)
195 dev.rec_sample_size = data;
196
197 return data;
198 }
199
200 static int dsp_get_frag_size(void)
201 {
202 int size;
203 size = dev.fifosize / 4;
204 if (size > 32 * 1024)
205 size = 32 * 1024;
206 return size;
207 }
208
209 static int dsp_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
210 {
211 int val, i, data, tmp;
212 LPDAQD lpDAQ, lpDARQ;
213 audio_buf_info abinfo;
214 unsigned long flags;
215
216 lpDAQ = dev.base + DAPQ_DATA_BUFF;
217 lpDARQ = dev.base + DARQ_DATA_BUFF;
218
219 switch (cmd) {
220 case SNDCTL_DSP_SUBDIVIDE:
221 case SNDCTL_DSP_SETFRAGMENT:
222 case SNDCTL_DSP_SETDUPLEX:
223 case SNDCTL_DSP_POST:
224 return 0;
225
226 case SNDCTL_DSP_GETIPTR:
227 case SNDCTL_DSP_GETOPTR:
228 case SNDCTL_DSP_MAPINBUF:
229 case SNDCTL_DSP_MAPOUTBUF:
230 return -EINVAL;
231
232 case SNDCTL_DSP_GETOSPACE:
233 if (!(file->f_mode & FMODE_WRITE))
234 return -EINVAL;
235 spin_lock_irqsave(&dev.lock, flags);
236 abinfo.fragsize = dsp_get_frag_size();
237 abinfo.bytes = dev.DAPF.n - dev.DAPF.len;
238 abinfo.fragstotal = dev.DAPF.n / abinfo.fragsize;
239 abinfo.fragments = abinfo.bytes / abinfo.fragsize;
240 spin_unlock_irqrestore(&dev.lock, flags);
241 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
242
243 case SNDCTL_DSP_GETISPACE:
244 if (!(file->f_mode & FMODE_READ))
245 return -EINVAL;
246 spin_lock_irqsave(&dev.lock, flags);
247 abinfo.fragsize = dsp_get_frag_size();
248 abinfo.bytes = dev.DARF.n - dev.DARF.len;
249 abinfo.fragstotal = dev.DARF.n / abinfo.fragsize;
250 abinfo.fragments = abinfo.bytes / abinfo.fragsize;
251 spin_unlock_irqrestore(&dev.lock, flags);
252 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
253
254 case SNDCTL_DSP_RESET:
255 dev.nresets = 0;
256 reset_queues();
257 return 0;
258
259 case SNDCTL_DSP_SYNC:
260 dsp_write_flush();
261 return 0;
262
263 case SNDCTL_DSP_GETBLKSIZE:
264 tmp = dsp_get_frag_size();
265 if (put_user(tmp, (int *)arg))
266 return -EFAULT;
267 return 0;
268
269 case SNDCTL_DSP_GETFMTS:
270 val = AFMT_S16_LE | AFMT_U8;
271 if (put_user(val, (int *)arg))
272 return -EFAULT;
273 return 0;
274
275 case SNDCTL_DSP_SETFMT:
276 if (get_user(val, (int *)arg))
277 return -EFAULT;
278
279 if (file->f_mode & FMODE_WRITE)
280 data = val == AFMT_QUERY
281 ? dev.play_sample_size
282 : dsp_set_format(file, val);
283 else
284 data = val == AFMT_QUERY
285 ? dev.rec_sample_size
286 : dsp_set_format(file, val);
287
288 if (put_user(data, (int *)arg))
289 return -EFAULT;
290 return 0;
291
292 case SNDCTL_DSP_NONBLOCK:
293 if (!test_bit(F_DISABLE_WRITE_NDELAY, &dev.flags) &&
294 file->f_mode & FMODE_WRITE)
295 dev.play_ndelay = 1;
296 if (file->f_mode & FMODE_READ)
297 dev.rec_ndelay = 1;
298 return 0;
299
300 case SNDCTL_DSP_GETCAPS:
301 val = DSP_CAP_DUPLEX | DSP_CAP_BATCH;
302 if (put_user(val, (int *)arg))
303 return -EFAULT;
304 return 0;
305
306 case SNDCTL_DSP_SPEED:
307 if (get_user(val, (int *)arg))
308 return -EFAULT;
309
310 if (val < 8000)
311 val = 8000;
312
313 if (val > 48000)
314 val = 48000;
315
316 data = val;
317
318 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
319 if (file->f_mode & FMODE_WRITE)
320 isa_writew(data, lpDAQ + DAQDS_wSampleRate);
321 if (file->f_mode & FMODE_READ)
322 isa_writew(data, lpDARQ + DAQDS_wSampleRate);
323 }
324 if (file->f_mode & FMODE_WRITE)
325 dev.play_sample_rate = data;
326 if (file->f_mode & FMODE_READ)
327 dev.rec_sample_rate = data;
328
329 if (put_user(data, (int *)arg))
330 return -EFAULT;
331 return 0;
332
333 case SNDCTL_DSP_CHANNELS:
334 case SNDCTL_DSP_STEREO:
335 if (get_user(val, (int *)arg))
336 return -EFAULT;
337
338 if (cmd == SNDCTL_DSP_CHANNELS) {
339 switch (val) {
340 case 1:
341 case 2:
342 data = val;
343 break;
344 default:
345 val = data = 2;
346 break;
347 }
348 } else {
349 switch (val) {
350 case 0:
351 data = 1;
352 break;
353 default:
354 val = 1;
355 case 1:
356 data = 2;
357 break;
358 }
359 }
360
361 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
362 if (file->f_mode & FMODE_WRITE)
363 isa_writew(data, lpDAQ + DAQDS_wChannels);
364 if (file->f_mode & FMODE_READ)
365 isa_writew(data, lpDARQ + DAQDS_wChannels);
366 }
367 if (file->f_mode & FMODE_WRITE)
368 dev.play_channels = data;
369 if (file->f_mode & FMODE_READ)
370 dev.rec_channels = data;
371
372 if (put_user(val, (int *)arg))
373 return -EFAULT;
374 return 0;
375 }
376
377 return -EINVAL;
378 }
379
380 static int mixer_get(int d)
381 {
382 if (d > 31)
383 return -EINVAL;
384
385 switch (d) {
386 case SOUND_MIXER_VOLUME:
387 case SOUND_MIXER_PCM:
388 case SOUND_MIXER_LINE:
389 case SOUND_MIXER_IMIX:
390 case SOUND_MIXER_LINE1:
391 #ifndef MSND_CLASSIC
392 case SOUND_MIXER_MIC:
393 case SOUND_MIXER_SYNTH:
394 #endif
395 return (dev.left_levels[d] >> 8) * 100 / 0xff |
396 (((dev.right_levels[d] >> 8) * 100 / 0xff) << 8);
397 default:
398 return 0;
399 }
400 }
401
402 #define update_volm(a,b) \
403 isa_writew((dev.left_levels[a] >> 1) * \
404 isa_readw(dev.SMA + SMA_wCurrMastVolLeft) / 0xffff, \
405 dev.SMA + SMA_##b##Left); \
406 isa_writew((dev.right_levels[a] >> 1) * \
407 isa_readw(dev.SMA + SMA_wCurrMastVolRight) / 0xffff, \
408 dev.SMA + SMA_##b##Right);
409
410 #define update_potm(d,s,ar) \
411 isa_writeb((dev.left_levels[d] >> 8) * \
412 isa_readw(dev.SMA + SMA_wCurrMastVolLeft) / 0xffff, \
413 dev.SMA + SMA_##s##Left); \
414 isa_writeb((dev.right_levels[d] >> 8) * \
415 isa_readw(dev.SMA + SMA_wCurrMastVolRight) / 0xffff, \
416 dev.SMA + SMA_##s##Right); \
417 if (msnd_send_word(&dev, 0, 0, ar) == 0) \
418 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
419
420 #define update_pot(d,s,ar) \
421 isa_writeb(dev.left_levels[d] >> 8, \
422 dev.SMA + SMA_##s##Left); \
423 isa_writeb(dev.right_levels[d] >> 8, \
424 dev.SMA + SMA_##s##Right); \
425 if (msnd_send_word(&dev, 0, 0, ar) == 0) \
426 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
427
428 static int mixer_set(int d, int value)
429 {
430 int left = value & 0x000000ff;
431 int right = (value & 0x0000ff00) >> 8;
432 int bLeft, bRight;
433 int wLeft, wRight;
434 int updatemaster = 0;
435
436 if (d > 31)
437 return -EINVAL;
438
439 bLeft = left * 0xff / 100;
440 wLeft = left * 0xffff / 100;
441
442 bRight = right * 0xff / 100;
443 wRight = right * 0xffff / 100;
444
445 dev.left_levels[d] = wLeft;
446 dev.right_levels[d] = wRight;
447
448 switch (d) {
449 /* master volume unscaled controls */
450 case SOUND_MIXER_LINE: /* line pot control */
451 /* scaled by IMIX in digital mix */
452 isa_writeb(bLeft, dev.SMA + SMA_bInPotPosLeft);
453 isa_writeb(bRight, dev.SMA + SMA_bInPotPosRight);
454 if (msnd_send_word(&dev, 0, 0, HDEXAR_IN_SET_POTS) == 0)
455 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
456 break;
457 #ifndef MSND_CLASSIC
458 case SOUND_MIXER_MIC: /* mic pot control */
459 /* scaled by IMIX in digital mix */
460 isa_writeb(bLeft, dev.SMA + SMA_bMicPotPosLeft);
461 isa_writeb(bRight, dev.SMA + SMA_bMicPotPosRight);
462 if (msnd_send_word(&dev, 0, 0, HDEXAR_MIC_SET_POTS) == 0)
463 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
464 break;
465 #endif
466 case SOUND_MIXER_VOLUME: /* master volume */
467 isa_writew(wLeft, dev.SMA + SMA_wCurrMastVolLeft);
468 isa_writew(wRight, dev.SMA + SMA_wCurrMastVolRight);
469 /* fall through */
470
471 case SOUND_MIXER_LINE1: /* aux pot control */
472 /* scaled by master volume */
473 /* fall through */
474
475 /* digital controls */
476 case SOUND_MIXER_SYNTH: /* synth vol (dsp mix) */
477 case SOUND_MIXER_PCM: /* pcm vol (dsp mix) */
478 case SOUND_MIXER_IMIX: /* input monitor (dsp mix) */
479 /* scaled by master volume */
480 updatemaster = 1;
481 break;
482
483 default:
484 return 0;
485 }
486
487 if (updatemaster) {
488 /* update master volume scaled controls */
489 update_volm(SOUND_MIXER_PCM, wCurrPlayVol);
490 update_volm(SOUND_MIXER_IMIX, wCurrInVol);
491 #ifndef MSND_CLASSIC
492 update_volm(SOUND_MIXER_SYNTH, wCurrMHdrVol);
493 #endif
494 update_potm(SOUND_MIXER_LINE1, bAuxPotPos, HDEXAR_AUX_SET_POTS);
495 }
496
497 return mixer_get(d);
498 }
499
500 static void mixer_setup(void)
501 {
502 update_pot(SOUND_MIXER_LINE, bInPotPos, HDEXAR_IN_SET_POTS);
503 update_potm(SOUND_MIXER_LINE1, bAuxPotPos, HDEXAR_AUX_SET_POTS);
504 update_volm(SOUND_MIXER_PCM, wCurrPlayVol);
505 update_volm(SOUND_MIXER_IMIX, wCurrInVol);
506 #ifndef MSND_CLASSIC
507 update_pot(SOUND_MIXER_MIC, bMicPotPos, HDEXAR_MIC_SET_POTS);
508 update_volm(SOUND_MIXER_SYNTH, wCurrMHdrVol);
509 #endif
510 }
511
512 static unsigned long set_recsrc(unsigned long recsrc)
513 {
514 if (dev.recsrc == recsrc)
515 return dev.recsrc;
516 #ifdef HAVE_NORECSRC
517 else if (recsrc == 0)
518 dev.recsrc = 0;
519 #endif
520 else
521 dev.recsrc ^= recsrc;
522
523 #ifndef MSND_CLASSIC
524 if (dev.recsrc & SOUND_MASK_IMIX) {
525 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_ANA_IN) == 0)
526 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
527 }
528 else if (dev.recsrc & SOUND_MASK_SYNTH) {
529 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_SYNTH_IN) == 0)
530 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
531 }
532 else if ((dev.recsrc & SOUND_MASK_DIGITAL1) && test_bit(F_HAVEDIGITAL, &dev.flags)) {
533 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_DAT_IN) == 0)
534 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
535 }
536 else {
537 #ifdef HAVE_NORECSRC
538 /* Select no input (?) */
539 dev.recsrc = 0;
540 #else
541 dev.recsrc = SOUND_MASK_IMIX;
542 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_ANA_IN) == 0)
543 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
544 #endif
545 }
546 #endif /* MSND_CLASSIC */
547
548 return dev.recsrc;
549 }
550
551 static unsigned long force_recsrc(unsigned long recsrc)
552 {
553 dev.recsrc = 0;
554 return set_recsrc(recsrc);
555 }
556
557 #define set_mixer_info() \
558 strncpy(info.id, "MSNDMIXER", sizeof(info.id)); \
559 strncpy(info.name, "MultiSound Mixer", sizeof(info.name));
560
561 static int mixer_ioctl(unsigned int cmd, unsigned long arg)
562 {
563 if (cmd == SOUND_MIXER_INFO) {
564 mixer_info info;
565 set_mixer_info();
566 info.modify_counter = dev.mixer_mod_count;
567 if (copy_to_user((void *)arg, &info, sizeof(info)))
568 return -EFAULT;
569 return 0;
570 } else if (cmd == SOUND_OLD_MIXER_INFO) {
571 _old_mixer_info info;
572 set_mixer_info();
573 if (copy_to_user((void *)arg, &info, sizeof(info)))
574 return -EFAULT;
575 return 0;
576 } else if (cmd == SOUND_MIXER_PRIVATE1) {
577 dev.nresets = 0;
578 dsp_full_reset();
579 return 0;
580 } else if (((cmd >> 8) & 0xff) == 'M') {
581 int val = 0;
582
583 if (_SIOC_DIR(cmd) & _SIOC_WRITE) {
584 switch (cmd & 0xff) {
585 case SOUND_MIXER_RECSRC:
586 if (get_user(val, (int *)arg))
587 return -EFAULT;
588 val = set_recsrc(val);
589 break;
590
591 default:
592 if (get_user(val, (int *)arg))
593 return -EFAULT;
594 val = mixer_set(cmd & 0xff, val);
595 break;
596 }
597 ++dev.mixer_mod_count;
598 return put_user(val, (int *)arg);
599 } else {
600 switch (cmd & 0xff) {
601 case SOUND_MIXER_RECSRC:
602 val = dev.recsrc;
603 break;
604
605 case SOUND_MIXER_DEVMASK:
606 case SOUND_MIXER_STEREODEVS:
607 val = SOUND_MASK_PCM |
608 SOUND_MASK_LINE |
609 SOUND_MASK_IMIX |
610 SOUND_MASK_LINE1 |
611 #ifndef MSND_CLASSIC
612 SOUND_MASK_MIC |
613 SOUND_MASK_SYNTH |
614 #endif
615 SOUND_MASK_VOLUME;
616 break;
617
618 case SOUND_MIXER_RECMASK:
619 #ifdef MSND_CLASSIC
620 val = 0;
621 #else
622 val = SOUND_MASK_IMIX |
623 SOUND_MASK_SYNTH;
624 if (test_bit(F_HAVEDIGITAL, &dev.flags))
625 val |= SOUND_MASK_DIGITAL1;
626 #endif
627 break;
628
629 case SOUND_MIXER_CAPS:
630 val = SOUND_CAP_EXCL_INPUT;
631 break;
632
633 default:
634 if ((val = mixer_get(cmd & 0xff)) < 0)
635 return -EINVAL;
636 break;
637 }
638 }
639
640 return put_user(val, (int *)arg);
641 }
642
643 return -EINVAL;
644 }
645
646 static int dev_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
647 {
648 int minor = minor(inode->i_rdev);
649
650 if (cmd == OSS_GETVERSION) {
651 int sound_version = SOUND_VERSION;
652 return put_user(sound_version, (int *)arg);
653 }
654
655 if (minor == dev.dsp_minor)
656 return dsp_ioctl(file, cmd, arg);
657 else if (minor == dev.mixer_minor)
658 return mixer_ioctl(cmd, arg);
659
660 return -EINVAL;
661 }
662
663 static void dsp_write_flush(void)
664 {
665 if (!(dev.mode & FMODE_WRITE) || !test_bit(F_WRITING, &dev.flags))
666 return;
667 set_bit(F_WRITEFLUSH, &dev.flags);
668 interruptible_sleep_on_timeout(
669 &dev.writeflush,
670 get_play_delay_jiffies(dev.DAPF.len));
671 clear_bit(F_WRITEFLUSH, &dev.flags);
672 if (!signal_pending(current)) {
673 current->state = TASK_INTERRUPTIBLE;
674 schedule_timeout(get_play_delay_jiffies(DAP_BUFF_SIZE));
675 }
676 clear_bit(F_WRITING, &dev.flags);
677 }
678
679 static void dsp_halt(struct file *file)
680 {
681 if ((file ? file->f_mode : dev.mode) & FMODE_READ) {
682 clear_bit(F_READING, &dev.flags);
683 chk_send_dsp_cmd(&dev, HDEX_RECORD_STOP);
684 msnd_disable_irq(&dev);
685 if (file) {
686 printk(KERN_DEBUG LOGNAME ": Stopping read for %p\n", file);
687 dev.mode &= ~FMODE_READ;
688 }
689 clear_bit(F_AUDIO_READ_INUSE, &dev.flags);
690 }
691 if ((file ? file->f_mode : dev.mode) & FMODE_WRITE) {
692 if (test_bit(F_WRITING, &dev.flags)) {
693 dsp_write_flush();
694 chk_send_dsp_cmd(&dev, HDEX_PLAY_STOP);
695 }
696 msnd_disable_irq(&dev);
697 if (file) {
698 printk(KERN_DEBUG LOGNAME ": Stopping write for %p\n", file);
699 dev.mode &= ~FMODE_WRITE;
700 }
701 clear_bit(F_AUDIO_WRITE_INUSE, &dev.flags);
702 }
703 }
704
705 static int dsp_release(struct file *file)
706 {
707 dsp_halt(file);
708 return 0;
709 }
710
711 static int dsp_open(struct file *file)
712 {
713 if ((file ? file->f_mode : dev.mode) & FMODE_WRITE) {
714 set_bit(F_AUDIO_WRITE_INUSE, &dev.flags);
715 clear_bit(F_WRITING, &dev.flags);
716 msnd_fifo_make_empty(&dev.DAPF);
717 reset_play_queue();
718 if (file) {
719 printk(KERN_DEBUG LOGNAME ": Starting write for %p\n", file);
720 dev.mode |= FMODE_WRITE;
721 }
722 msnd_enable_irq(&dev);
723 }
724 if ((file ? file->f_mode : dev.mode) & FMODE_READ) {
725 set_bit(F_AUDIO_READ_INUSE, &dev.flags);
726 clear_bit(F_READING, &dev.flags);
727 msnd_fifo_make_empty(&dev.DARF);
728 reset_record_queue();
729 if (file) {
730 printk(KERN_DEBUG LOGNAME ": Starting read for %p\n", file);
731 dev.mode |= FMODE_READ;
732 }
733 msnd_enable_irq(&dev);
734 }
735 return 0;
736 }
737
738 static void set_default_play_audio_parameters(void)
739 {
740 dev.play_sample_size = DEFSAMPLESIZE;
741 dev.play_sample_rate = DEFSAMPLERATE;
742 dev.play_channels = DEFCHANNELS;
743 }
744
745 static void set_default_rec_audio_parameters(void)
746 {
747 dev.rec_sample_size = DEFSAMPLESIZE;
748 dev.rec_sample_rate = DEFSAMPLERATE;
749 dev.rec_channels = DEFCHANNELS;
750 }
751
752 static void set_default_audio_parameters(void)
753 {
754 set_default_play_audio_parameters();
755 set_default_rec_audio_parameters();
756 }
757
758 static int dev_open(struct inode *inode, struct file *file)
759 {
760 int minor = minor(inode->i_rdev);
761 int err = 0;
762
763 if (minor == dev.dsp_minor) {
764 if ((file->f_mode & FMODE_WRITE &&
765 test_bit(F_AUDIO_WRITE_INUSE, &dev.flags)) ||
766 (file->f_mode & FMODE_READ &&
767 test_bit(F_AUDIO_READ_INUSE, &dev.flags)))
768 return -EBUSY;
769
770 if ((err = dsp_open(file)) >= 0) {
771 dev.nresets = 0;
772 if (file->f_mode & FMODE_WRITE) {
773 set_default_play_audio_parameters();
774 if (!test_bit(F_DISABLE_WRITE_NDELAY, &dev.flags))
775 dev.play_ndelay = (file->f_flags & O_NDELAY) ? 1 : 0;
776 else
777 dev.play_ndelay = 0;
778 }
779 if (file->f_mode & FMODE_READ) {
780 set_default_rec_audio_parameters();
781 dev.rec_ndelay = (file->f_flags & O_NDELAY) ? 1 : 0;
782 }
783 }
784 }
785 else if (minor == dev.mixer_minor) {
786 /* nothing */
787 } else
788 err = -EINVAL;
789
790 return err;
791 }
792
793 static int dev_release(struct inode *inode, struct file *file)
794 {
795 int minor = minor(inode->i_rdev);
796 int err = 0;
797
798 lock_kernel();
799 if (minor == dev.dsp_minor)
800 err = dsp_release(file);
801 else if (minor == dev.mixer_minor) {
802 /* nothing */
803 } else
804 err = -EINVAL;
805 unlock_kernel();
806 return err;
807 }
808
809 static __inline__ int pack_DARQ_to_DARF(register int bank)
810 {
811 register int size, n, timeout = 3;
812 register WORD wTmp;
813 LPDAQD DAQD;
814
815 /* Increment the tail and check for queue wrap */
816 wTmp = isa_readw(dev.DARQ + JQS_wTail) + PCTODSP_OFFSET(DAQDS__size);
817 if (wTmp > isa_readw(dev.DARQ + JQS_wSize))
818 wTmp = 0;
819 while (wTmp == isa_readw(dev.DARQ + JQS_wHead) && timeout--)
820 udelay(1);
821 isa_writew(wTmp, dev.DARQ + JQS_wTail);
822
823 /* Get our digital audio queue struct */
824 DAQD = bank * DAQDS__size + dev.base + DARQ_DATA_BUFF;
825
826 /* Get length of data */
827 size = isa_readw(DAQD + DAQDS_wSize);
828
829 /* Read data from the head (unprotected bank 1 access okay
830 since this is only called inside an interrupt) */
831 outb(HPBLKSEL_1, dev.io + HP_BLKS);
832 if ((n = msnd_fifo_write(
833 &dev.DARF,
834 (char *)(dev.base + bank * DAR_BUFF_SIZE),
835 size, 0)) <= 0) {
836 outb(HPBLKSEL_0, dev.io + HP_BLKS);
837 return n;
838 }
839 outb(HPBLKSEL_0, dev.io + HP_BLKS);
840
841 return 1;
842 }
843
844 static __inline__ int pack_DAPF_to_DAPQ(register int start)
845 {
846 register WORD DAPQ_tail;
847 register int protect = start, nbanks = 0;
848 LPDAQD DAQD;
849
850 DAPQ_tail = isa_readw(dev.DAPQ + JQS_wTail);
851 while (DAPQ_tail != isa_readw(dev.DAPQ + JQS_wHead) || start) {
852 register int bank_num = DAPQ_tail / PCTODSP_OFFSET(DAQDS__size);
853 register int n;
854 unsigned long flags;
855
856 /* Write the data to the new tail */
857 if (protect) {
858 /* Critical section: protect fifo in non-interrupt */
859 spin_lock_irqsave(&dev.lock, flags);
860 if ((n = msnd_fifo_read(
861 &dev.DAPF,
862 (char *)(dev.base + bank_num * DAP_BUFF_SIZE),
863 DAP_BUFF_SIZE, 0)) < 0) {
864 spin_unlock_irqrestore(&dev.lock, flags);
865 return n;
866 }
867 spin_unlock_irqrestore(&dev.lock, flags);
868 } else {
869 if ((n = msnd_fifo_read(
870 &dev.DAPF,
871 (char *)(dev.base + bank_num * DAP_BUFF_SIZE),
872 DAP_BUFF_SIZE, 0)) < 0) {
873 return n;
874 }
875 }
876 if (!n)
877 break;
878
879 if (start)
880 start = 0;
881
882 /* Get our digital audio queue struct */
883 DAQD = bank_num * DAQDS__size + dev.base + DAPQ_DATA_BUFF;
884
885 /* Write size of this bank */
886 isa_writew(n, DAQD + DAQDS_wSize);
887 ++nbanks;
888
889 /* Then advance the tail */
890 DAPQ_tail = (++bank_num % 3) * PCTODSP_OFFSET(DAQDS__size);
891 isa_writew(DAPQ_tail, dev.DAPQ + JQS_wTail);
892 /* Tell the DSP to play the bank */
893 msnd_send_dsp_cmd(&dev, HDEX_PLAY_START);
894 }
895 return nbanks;
896 }
897
898 static int dsp_read(char *buf, size_t len)
899 {
900 int count = len;
901
902 while (count > 0) {
903 int n;
904 unsigned long flags;
905
906 /* Critical section: protect fifo in non-interrupt */
907 spin_lock_irqsave(&dev.lock, flags);
908 if ((n = msnd_fifo_read(&dev.DARF, buf, count, 1)) < 0) {
909 printk(KERN_WARNING LOGNAME ": FIFO read error\n");
910 spin_unlock_irqrestore(&dev.lock, flags);
911 return n;
912 }
913 spin_unlock_irqrestore(&dev.lock, flags);
914 buf += n;
915 count -= n;
916
917 if (!test_bit(F_READING, &dev.flags) && dev.mode & FMODE_READ) {
918 dev.last_recbank = -1;
919 if (chk_send_dsp_cmd(&dev, HDEX_RECORD_START) == 0)
920 set_bit(F_READING, &dev.flags);
921 }
922
923 if (dev.rec_ndelay)
924 return count == len ? -EAGAIN : len - count;
925
926 if (count > 0) {
927 set_bit(F_READBLOCK, &dev.flags);
928 if (!interruptible_sleep_on_timeout(
929 &dev.readblock,
930 get_rec_delay_jiffies(DAR_BUFF_SIZE)))
931 clear_bit(F_READING, &dev.flags);
932 clear_bit(F_READBLOCK, &dev.flags);
933 if (signal_pending(current))
934 return -EINTR;
935 }
936 }
937
938 return len - count;
939 }
940
941 static int dsp_write(const char *buf, size_t len)
942 {
943 int count = len;
944
945 while (count > 0) {
946 int n;
947 unsigned long flags;
948
949 /* Critical section: protect fifo in non-interrupt */
950 spin_lock_irqsave(&dev.lock, flags);
951 if ((n = msnd_fifo_write(&dev.DAPF, buf, count, 1)) < 0) {
952 printk(KERN_WARNING LOGNAME ": FIFO write error\n");
953 spin_unlock_irqrestore(&dev.lock, flags);
954 return n;
955 }
956 spin_unlock_irqrestore(&dev.lock, flags);
957 buf += n;
958 count -= n;
959
960 if (!test_bit(F_WRITING, &dev.flags) && (dev.mode & FMODE_WRITE)) {
961 dev.last_playbank = -1;
962 if (pack_DAPF_to_DAPQ(1) > 0)
963 set_bit(F_WRITING, &dev.flags);
964 }
965
966 if (dev.play_ndelay)
967 return count == len ? -EAGAIN : len - count;
968
969 if (count > 0) {
970 set_bit(F_WRITEBLOCK, &dev.flags);
971 interruptible_sleep_on_timeout(
972 &dev.writeblock,
973 get_play_delay_jiffies(DAP_BUFF_SIZE));
974 clear_bit(F_WRITEBLOCK, &dev.flags);
975 if (signal_pending(current))
976 return -EINTR;
977 }
978 }
979
980 return len - count;
981 }
982
983 static ssize_t dev_read(struct file *file, char *buf, size_t count, loff_t *off)
984 {
985 int minor = minor(file->f_dentry->d_inode->i_rdev);
986 if (minor == dev.dsp_minor)
987 return dsp_read(buf, count);
988 else
989 return -EINVAL;
990 }
991
992 static ssize_t dev_write(struct file *file, const char *buf, size_t count, loff_t *off)
993 {
994 int minor = minor(file->f_dentry->d_inode->i_rdev);
995 if (minor == dev.dsp_minor)
996 return dsp_write(buf, count);
997 else
998 return -EINVAL;
999 }
1000
1001 static __inline__ void eval_dsp_msg(register WORD wMessage)
1002 {
1003 switch (HIBYTE(wMessage)) {
1004 case HIMT_PLAY_DONE:
1005 if (dev.last_playbank == LOBYTE(wMessage) || !test_bit(F_WRITING, &dev.flags))
1006 break;
1007 dev.last_playbank = LOBYTE(wMessage);
1008
1009 if (pack_DAPF_to_DAPQ(0) <= 0) {
1010 if (!test_bit(F_WRITEBLOCK, &dev.flags)) {
1011 if (test_and_clear_bit(F_WRITEFLUSH, &dev.flags))
1012 wake_up_interruptible(&dev.writeflush);
1013 }
1014 clear_bit(F_WRITING, &dev.flags);
1015 }
1016
1017 if (test_bit(F_WRITEBLOCK, &dev.flags))
1018 wake_up_interruptible(&dev.writeblock);
1019 break;
1020
1021 case HIMT_RECORD_DONE:
1022 if (dev.last_recbank == LOBYTE(wMessage))
1023 break;
1024 dev.last_recbank = LOBYTE(wMessage);
1025
1026 pack_DARQ_to_DARF(dev.last_recbank);
1027
1028 if (test_bit(F_READBLOCK, &dev.flags))
1029 wake_up_interruptible(&dev.readblock);
1030 break;
1031
1032 case HIMT_DSP:
1033 switch (LOBYTE(wMessage)) {
1034 #ifndef MSND_CLASSIC
1035 case HIDSP_PLAY_UNDER:
1036 #endif
1037 case HIDSP_INT_PLAY_UNDER:
1038 /* printk(KERN_DEBUG LOGNAME ": Play underflow\n"); */
1039 clear_bit(F_WRITING, &dev.flags);
1040 break;
1041
1042 case HIDSP_INT_RECORD_OVER:
1043 /* printk(KERN_DEBUG LOGNAME ": Record overflow\n"); */
1044 clear_bit(F_READING, &dev.flags);
1045 break;
1046
1047 default:
1048 /* printk(KERN_DEBUG LOGNAME ": DSP message %d 0x%02x\n",
1049 LOBYTE(wMessage), LOBYTE(wMessage)); */
1050 break;
1051 }
1052 break;
1053
1054 case HIMT_MIDI_IN_UCHAR:
1055 if (dev.midi_in_interrupt)
1056 (*dev.midi_in_interrupt)(&dev);
1057 break;
1058
1059 default:
1060 /* printk(KERN_DEBUG LOGNAME ": HIMT message %d 0x%02x\n", HIBYTE(wMessage), HIBYTE(wMessage)); */
1061 break;
1062 }
1063 }
1064
1065 static irqreturn_t intr(int irq, void *dev_id, struct pt_regs *regs)
1066 {
1067 /* Send ack to DSP */
1068 inb(dev.io + HP_RXL);
1069
1070 /* Evaluate queued DSP messages */
1071 while (isa_readw(dev.DSPQ + JQS_wTail) != isa_readw(dev.DSPQ + JQS_wHead)) {
1072 register WORD wTmp;
1073
1074 eval_dsp_msg(isa_readw(dev.pwDSPQData + 2*isa_readw(dev.DSPQ + JQS_wHead)));
1075
1076 if ((wTmp = isa_readw(dev.DSPQ + JQS_wHead) + 1) > isa_readw(dev.DSPQ + JQS_wSize))
1077 isa_writew(0, dev.DSPQ + JQS_wHead);
1078 else
1079 isa_writew(wTmp, dev.DSPQ + JQS_wHead);
1080 }
1081 return IRQ_HANDLED;
1082 }
1083
1084 static struct file_operations dev_fileops = {
1085 .owner = THIS_MODULE,
1086 .read = dev_read,
1087 .write = dev_write,
1088 .ioctl = dev_ioctl,
1089 .open = dev_open,
1090 .release = dev_release,
1091 };
1092
1093 static int reset_dsp(void)
1094 {
1095 int timeout = 100;
1096
1097 outb(HPDSPRESET_ON, dev.io + HP_DSPR);
1098 mdelay(1);
1099 #ifndef MSND_CLASSIC
1100 dev.info = inb(dev.io + HP_INFO);
1101 #endif
1102 outb(HPDSPRESET_OFF, dev.io + HP_DSPR);
1103 mdelay(1);
1104 while (timeout-- > 0) {
1105 if (inb(dev.io + HP_CVR) == HP_CVR_DEF)
1106 return 0;
1107 mdelay(1);
1108 }
1109 printk(KERN_ERR LOGNAME ": Cannot reset DSP\n");
1110
1111 return -EIO;
1112 }
1113
1114 static int __init probe_multisound(void)
1115 {
1116 #ifndef MSND_CLASSIC
1117 char *xv, *rev = NULL;
1118 char *pin = "Pinnacle", *fiji = "Fiji";
1119 char *pinfiji = "Pinnacle/Fiji";
1120 #endif
1121
1122 if (check_region(dev.io, dev.numio)) {
1123 printk(KERN_ERR LOGNAME ": I/O port conflict\n");
1124 return -ENODEV;
1125 }
1126 request_region(dev.io, dev.numio, "probing");
1127
1128 if (reset_dsp() < 0) {
1129 release_region(dev.io, dev.numio);
1130 return -ENODEV;
1131 }
1132
1133 #ifdef MSND_CLASSIC
1134 dev.name = "Classic/Tahiti/Monterey";
1135 printk(KERN_INFO LOGNAME ": %s, "
1136 #else
1137 switch (dev.info >> 4) {
1138 case 0xf: xv = "<= 1.15"; break;
1139 case 0x1: xv = "1.18/1.2"; break;
1140 case 0x2: xv = "1.3"; break;
1141 case 0x3: xv = "1.4"; break;
1142 default: xv = "unknown"; break;
1143 }
1144
1145 switch (dev.info & 0x7) {
1146 case 0x0: rev = "I"; dev.name = pin; break;
1147 case 0x1: rev = "F"; dev.name = pin; break;
1148 case 0x2: rev = "G"; dev.name = pin; break;
1149 case 0x3: rev = "H"; dev.name = pin; break;
1150 case 0x4: rev = "E"; dev.name = fiji; break;
1151 case 0x5: rev = "C"; dev.name = fiji; break;
1152 case 0x6: rev = "D"; dev.name = fiji; break;
1153 case 0x7:
1154 rev = "A-B (Fiji) or A-E (Pinnacle)";
1155 dev.name = pinfiji;
1156 break;
1157 }
1158 printk(KERN_INFO LOGNAME ": %s revision %s, Xilinx version %s, "
1159 #endif /* MSND_CLASSIC */
1160 "I/O 0x%x-0x%x, IRQ %d, memory mapped to 0x%lX-0x%lX\n",
1161 dev.name,
1162 #ifndef MSND_CLASSIC
1163 rev, xv,
1164 #endif
1165 dev.io, dev.io + dev.numio - 1,
1166 dev.irq,
1167 dev.base, dev.base + 0x7fff);
1168
1169 release_region(dev.io, dev.numio);
1170 return 0;
1171 }
1172
1173 static int init_sma(void)
1174 {
1175 static int initted;
1176 WORD mastVolLeft, mastVolRight;
1177 unsigned long flags;
1178
1179 #ifdef MSND_CLASSIC
1180 outb(dev.memid, dev.io + HP_MEMM);
1181 #endif
1182 outb(HPBLKSEL_0, dev.io + HP_BLKS);
1183 if (initted) {
1184 mastVolLeft = isa_readw(dev.SMA + SMA_wCurrMastVolLeft);
1185 mastVolRight = isa_readw(dev.SMA + SMA_wCurrMastVolRight);
1186 } else
1187 mastVolLeft = mastVolRight = 0;
1188 isa_memset_io(dev.base, 0, 0x8000);
1189
1190 /* Critical section: bank 1 access */
1191 spin_lock_irqsave(&dev.lock, flags);
1192 outb(HPBLKSEL_1, dev.io + HP_BLKS);
1193 isa_memset_io(dev.base, 0, 0x8000);
1194 outb(HPBLKSEL_0, dev.io + HP_BLKS);
1195 spin_unlock_irqrestore(&dev.lock, flags);
1196
1197 dev.pwDSPQData = (dev.base + DSPQ_DATA_BUFF);
1198 dev.pwMODQData = (dev.base + MODQ_DATA_BUFF);
1199 dev.pwMIDQData = (dev.base + MIDQ_DATA_BUFF);
1200
1201 /* Motorola 56k shared memory base */
1202 dev.SMA = dev.base + SMA_STRUCT_START;
1203
1204 /* Digital audio play queue */
1205 dev.DAPQ = dev.base + DAPQ_OFFSET;
1206 msnd_init_queue(dev.DAPQ, DAPQ_DATA_BUFF, DAPQ_BUFF_SIZE);
1207
1208 /* Digital audio record queue */
1209 dev.DARQ = dev.base + DARQ_OFFSET;
1210 msnd_init_queue(dev.DARQ, DARQ_DATA_BUFF, DARQ_BUFF_SIZE);
1211
1212 /* MIDI out queue */
1213 dev.MODQ = dev.base + MODQ_OFFSET;
1214 msnd_init_queue(dev.MODQ, MODQ_DATA_BUFF, MODQ_BUFF_SIZE);
1215
1216 /* MIDI in queue */
1217 dev.MIDQ = dev.base + MIDQ_OFFSET;
1218 msnd_init_queue(dev.MIDQ, MIDQ_DATA_BUFF, MIDQ_BUFF_SIZE);
1219
1220 /* DSP -> host message queue */
1221 dev.DSPQ = dev.base + DSPQ_OFFSET;
1222 msnd_init_queue(dev.DSPQ, DSPQ_DATA_BUFF, DSPQ_BUFF_SIZE);
1223
1224 /* Setup some DSP values */
1225 #ifndef MSND_CLASSIC
1226 isa_writew(1, dev.SMA + SMA_wCurrPlayFormat);
1227 isa_writew(dev.play_sample_size, dev.SMA + SMA_wCurrPlaySampleSize);
1228 isa_writew(dev.play_channels, dev.SMA + SMA_wCurrPlayChannels);
1229 isa_writew(dev.play_sample_rate, dev.SMA + SMA_wCurrPlaySampleRate);
1230 #endif
1231 isa_writew(dev.play_sample_rate, dev.SMA + SMA_wCalFreqAtoD);
1232 isa_writew(mastVolLeft, dev.SMA + SMA_wCurrMastVolLeft);
1233 isa_writew(mastVolRight, dev.SMA + SMA_wCurrMastVolRight);
1234 #ifndef MSND_CLASSIC
1235 isa_writel(0x00010000, dev.SMA + SMA_dwCurrPlayPitch);
1236 isa_writel(0x00000001, dev.SMA + SMA_dwCurrPlayRate);
1237 #endif
1238 isa_writew(0x303, dev.SMA + SMA_wCurrInputTagBits);
1239
1240 initted = 1;
1241
1242 return 0;
1243 }
1244
1245 static int __init calibrate_adc(WORD srate)
1246 {
1247 isa_writew(srate, dev.SMA + SMA_wCalFreqAtoD);
1248 if (dev.calibrate_signal == 0)
1249 isa_writew(isa_readw(dev.SMA + SMA_wCurrHostStatusFlags)
1250 | 0x0001, dev.SMA + SMA_wCurrHostStatusFlags);
1251 else
1252 isa_writew(isa_readw(dev.SMA + SMA_wCurrHostStatusFlags)
1253 & ~0x0001, dev.SMA + SMA_wCurrHostStatusFlags);
1254 if (msnd_send_word(&dev, 0, 0, HDEXAR_CAL_A_TO_D) == 0 &&
1255 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ) == 0) {
1256 current->state = TASK_INTERRUPTIBLE;
1257 schedule_timeout(HZ / 3);
1258 return 0;
1259 }
1260 printk(KERN_WARNING LOGNAME ": ADC calibration failed\n");
1261
1262 return -EIO;
1263 }
1264
1265 static int upload_dsp_code(void)
1266 {
1267 outb(HPBLKSEL_0, dev.io + HP_BLKS);
1268 #ifndef HAVE_DSPCODEH
1269 INITCODESIZE = mod_firmware_load(INITCODEFILE, &INITCODE);
1270 if (!INITCODE) {
1271 printk(KERN_ERR LOGNAME ": Error loading " INITCODEFILE);
1272 return -EBUSY;
1273 }
1274
1275 PERMCODESIZE = mod_firmware_load(PERMCODEFILE, &PERMCODE);
1276 if (!PERMCODE) {
1277 printk(KERN_ERR LOGNAME ": Error loading " PERMCODEFILE);
1278 vfree(INITCODE);
1279 return -EBUSY;
1280 }
1281 #endif
1282 isa_memcpy_toio(dev.base, PERMCODE, PERMCODESIZE);
1283 if (msnd_upload_host(&dev, INITCODE, INITCODESIZE) < 0) {
1284 printk(KERN_WARNING LOGNAME ": Error uploading to DSP\n");
1285 return -ENODEV;
1286 }
1287 #ifdef HAVE_DSPCODEH
1288 printk(KERN_INFO LOGNAME ": DSP firmware uploaded (resident)\n");
1289 #else
1290 printk(KERN_INFO LOGNAME ": DSP firmware uploaded\n");
1291 #endif
1292
1293 #ifndef HAVE_DSPCODEH
1294 vfree(INITCODE);
1295 vfree(PERMCODE);
1296 #endif
1297
1298 return 0;
1299 }
1300
1301 #ifdef MSND_CLASSIC
1302 static void reset_proteus(void)
1303 {
1304 outb(HPPRORESET_ON, dev.io + HP_PROR);
1305 mdelay(TIME_PRO_RESET);
1306 outb(HPPRORESET_OFF, dev.io + HP_PROR);
1307 mdelay(TIME_PRO_RESET_DONE);
1308 }
1309 #endif
1310
1311 static int initialize(void)
1312 {
1313 int err, timeout;
1314
1315 #ifdef MSND_CLASSIC
1316 outb(HPWAITSTATE_0, dev.io + HP_WAIT);
1317 outb(HPBITMODE_16, dev.io + HP_BITM);
1318
1319 reset_proteus();
1320 #endif
1321 if ((err = init_sma()) < 0) {
1322 printk(KERN_WARNING LOGNAME ": Cannot initialize SMA\n");
1323 return err;
1324 }
1325
1326 if ((err = reset_dsp()) < 0)
1327 return err;
1328
1329 if ((err = upload_dsp_code()) < 0) {
1330 printk(KERN_WARNING LOGNAME ": Cannot upload DSP code\n");
1331 return err;
1332 }
1333
1334 timeout = 200;
1335 while (isa_readw(dev.base)) {
1336 mdelay(1);
1337 if (!timeout--) {
1338 printk(KERN_DEBUG LOGNAME ": DSP reset timeout\n");
1339 return -EIO;
1340 }
1341 }
1342
1343 mixer_setup();
1344
1345 return 0;
1346 }
1347
1348 static int dsp_full_reset(void)
1349 {
1350 int rv;
1351
1352 if (test_bit(F_RESETTING, &dev.flags) || ++dev.nresets > 10)
1353 return 0;
1354
1355 set_bit(F_RESETTING, &dev.flags);
1356 printk(KERN_INFO LOGNAME ": DSP reset\n");
1357 dsp_halt(NULL); /* Unconditionally halt */
1358 if ((rv = initialize()))
1359 printk(KERN_WARNING LOGNAME ": DSP reset failed\n");
1360 force_recsrc(dev.recsrc);
1361 dsp_open(NULL);
1362 clear_bit(F_RESETTING, &dev.flags);
1363
1364 return rv;
1365 }
1366
1367 static int __init attach_multisound(void)
1368 {
1369 int err;
1370
1371 if ((err = request_irq(dev.irq, intr, 0, dev.name, &dev)) < 0) {
1372 printk(KERN_ERR LOGNAME ": Couldn't grab IRQ %d\n", dev.irq);
1373 return err;
1374 }
1375 request_region(dev.io, dev.numio, dev.name);
1376
1377 if ((err = dsp_full_reset()) < 0) {
1378 release_region(dev.io, dev.numio);
1379 free_irq(dev.irq, &dev);
1380 return err;
1381 }
1382
1383 if ((err = msnd_register(&dev)) < 0) {
1384 printk(KERN_ERR LOGNAME ": Unable to register MultiSound\n");
1385 release_region(dev.io, dev.numio);
1386 free_irq(dev.irq, &dev);
1387 return err;
1388 }
1389
1390 if ((dev.dsp_minor = register_sound_dsp(&dev_fileops, -1)) < 0) {
1391 printk(KERN_ERR LOGNAME ": Unable to register DSP operations\n");
1392 msnd_unregister(&dev);
1393 release_region(dev.io, dev.numio);
1394 free_irq(dev.irq, &dev);
1395 return dev.dsp_minor;
1396 }
1397
1398 if ((dev.mixer_minor = register_sound_mixer(&dev_fileops, -1)) < 0) {
1399 printk(KERN_ERR LOGNAME ": Unable to register mixer operations\n");
1400 unregister_sound_mixer(dev.mixer_minor);
1401 msnd_unregister(&dev);
1402 release_region(dev.io, dev.numio);
1403 free_irq(dev.irq, &dev);
1404 return dev.mixer_minor;
1405 }
1406
1407 dev.ext_midi_dev = dev.hdr_midi_dev = -1;
1408
1409 disable_irq(dev.irq);
1410 calibrate_adc(dev.play_sample_rate);
1411 #ifndef MSND_CLASSIC
1412 force_recsrc(SOUND_MASK_IMIX);
1413 #endif
1414
1415 return 0;
1416 }
1417
1418 static void __exit unload_multisound(void)
1419 {
1420 release_region(dev.io, dev.numio);
1421 free_irq(dev.irq, &dev);
1422 unregister_sound_mixer(dev.mixer_minor);
1423 unregister_sound_dsp(dev.dsp_minor);
1424 msnd_unregister(&dev);
1425 }
1426
1427 #ifndef MSND_CLASSIC
1428
1429 /* Pinnacle/Fiji Logical Device Configuration */
1430
1431 static int __init msnd_write_cfg(int cfg, int reg, int value)
1432 {
1433 outb(reg, cfg);
1434 outb(value, cfg + 1);
1435 if (value != inb(cfg + 1)) {
1436 printk(KERN_ERR LOGNAME ": msnd_write_cfg: I/O error\n");
1437 return -EIO;
1438 }
1439 return 0;
1440 }
1441
1442 static int __init msnd_write_cfg_io0(int cfg, int num, WORD io)
1443 {
1444 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1445 return -EIO;
1446 if (msnd_write_cfg(cfg, IREG_IO0_BASEHI, HIBYTE(io)))
1447 return -EIO;
1448 if (msnd_write_cfg(cfg, IREG_IO0_BASELO, LOBYTE(io)))
1449 return -EIO;
1450 return 0;
1451 }
1452
1453 static int __init msnd_write_cfg_io1(int cfg, int num, WORD io)
1454 {
1455 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1456 return -EIO;
1457 if (msnd_write_cfg(cfg, IREG_IO1_BASEHI, HIBYTE(io)))
1458 return -EIO;
1459 if (msnd_write_cfg(cfg, IREG_IO1_BASELO, LOBYTE(io)))
1460 return -EIO;
1461 return 0;
1462 }
1463
1464 static int __init msnd_write_cfg_irq(int cfg, int num, WORD irq)
1465 {
1466 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1467 return -EIO;
1468 if (msnd_write_cfg(cfg, IREG_IRQ_NUMBER, LOBYTE(irq)))
1469 return -EIO;
1470 if (msnd_write_cfg(cfg, IREG_IRQ_TYPE, IRQTYPE_EDGE))
1471 return -EIO;
1472 return 0;
1473 }
1474
1475 static int __init msnd_write_cfg_mem(int cfg, int num, int mem)
1476 {
1477 WORD wmem;
1478
1479 mem >>= 8;
1480 mem &= 0xfff;
1481 wmem = (WORD)mem;
1482 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1483 return -EIO;
1484 if (msnd_write_cfg(cfg, IREG_MEMBASEHI, HIBYTE(wmem)))
1485 return -EIO;
1486 if (msnd_write_cfg(cfg, IREG_MEMBASELO, LOBYTE(wmem)))
1487 return -EIO;
1488 if (wmem && msnd_write_cfg(cfg, IREG_MEMCONTROL, (MEMTYPE_HIADDR | MEMTYPE_16BIT)))
1489 return -EIO;
1490 return 0;
1491 }
1492
1493 static int __init msnd_activate_logical(int cfg, int num)
1494 {
1495 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1496 return -EIO;
1497 if (msnd_write_cfg(cfg, IREG_ACTIVATE, LD_ACTIVATE))
1498 return -EIO;
1499 return 0;
1500 }
1501
1502 static int __init msnd_write_cfg_logical(int cfg, int num, WORD io0, WORD io1, WORD irq, int mem)
1503 {
1504 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1505 return -EIO;
1506 if (msnd_write_cfg_io0(cfg, num, io0))
1507 return -EIO;
1508 if (msnd_write_cfg_io1(cfg, num, io1))
1509 return -EIO;
1510 if (msnd_write_cfg_irq(cfg, num, irq))
1511 return -EIO;
1512 if (msnd_write_cfg_mem(cfg, num, mem))
1513 return -EIO;
1514 if (msnd_activate_logical(cfg, num))
1515 return -EIO;
1516 return 0;
1517 }
1518
1519 typedef struct msnd_pinnacle_cfg_device {
1520 WORD io0, io1, irq;
1521 int mem;
1522 } msnd_pinnacle_cfg_t[4];
1523
1524 static int __init msnd_pinnacle_cfg_devices(int cfg, int reset, msnd_pinnacle_cfg_t device)
1525 {
1526 int i;
1527
1528 /* Reset devices if told to */
1529 if (reset) {
1530 printk(KERN_INFO LOGNAME ": Resetting all devices\n");
1531 for (i = 0; i < 4; ++i)
1532 if (msnd_write_cfg_logical(cfg, i, 0, 0, 0, 0))
1533 return -EIO;
1534 }
1535
1536 /* Configure specified devices */
1537 for (i = 0; i < 4; ++i) {
1538
1539 switch (i) {
1540 case 0: /* DSP */
1541 if (!(device[i].io0 && device[i].irq && device[i].mem))
1542 continue;
1543 break;
1544 case 1: /* MPU */
1545 if (!(device[i].io0 && device[i].irq))
1546 continue;
1547 printk(KERN_INFO LOGNAME
1548 ": Configuring MPU to I/O 0x%x IRQ %d\n",
1549 device[i].io0, device[i].irq);
1550 break;
1551 case 2: /* IDE */
1552 if (!(device[i].io0 && device[i].io1 && device[i].irq))
1553 continue;
1554 printk(KERN_INFO LOGNAME
1555 ": Configuring IDE to I/O 0x%x, 0x%x IRQ %d\n",
1556 device[i].io0, device[i].io1, device[i].irq);
1557 break;
1558 case 3: /* Joystick */
1559 if (!(device[i].io0))
1560 continue;
1561 printk(KERN_INFO LOGNAME
1562 ": Configuring joystick to I/O 0x%x\n",
1563 device[i].io0);
1564 break;
1565 }
1566
1567 /* Configure the device */
1568 if (msnd_write_cfg_logical(cfg, i, device[i].io0, device[i].io1, device[i].irq, device[i].mem))
1569 return -EIO;
1570 }
1571
1572 return 0;
1573 }
1574 #endif
1575
1576 #ifdef MODULE
1577 MODULE_AUTHOR ("Andrew Veliath <andrewtv@usa.net>");
1578 MODULE_DESCRIPTION ("Turtle Beach " LONGNAME " Linux Driver");
1579 MODULE_LICENSE("GPL");
1580
1581 MODULE_PARM (io, "i");
1582 MODULE_PARM (irq, "i");
1583 MODULE_PARM (mem, "i");
1584 MODULE_PARM (write_ndelay, "i");
1585 MODULE_PARM (fifosize, "i");
1586 MODULE_PARM (calibrate_signal, "i");
1587 #ifndef MSND_CLASSIC
1588 MODULE_PARM (digital, "i");
1589 MODULE_PARM (cfg, "i");
1590 MODULE_PARM (reset, "i");
1591 MODULE_PARM (mpu_io, "i");
1592 MODULE_PARM (mpu_irq, "i");
1593 MODULE_PARM (ide_io0, "i");
1594 MODULE_PARM (ide_io1, "i");
1595 MODULE_PARM (ide_irq, "i");
1596 MODULE_PARM (joystick_io, "i");
1597 #endif
1598
1599 static int io __initdata = -1;
1600 static int irq __initdata = -1;
1601 static int mem __initdata = -1;
1602 static int write_ndelay __initdata = -1;
1603
1604 #ifndef MSND_CLASSIC
1605 /* Pinnacle/Fiji non-PnP Config Port */
1606 static int cfg __initdata = -1;
1607
1608 /* Extra Peripheral Configuration */
1609 static int reset __initdata = 0;
1610 static int mpu_io __initdata = 0;
1611 static int mpu_irq __initdata = 0;
1612 static int ide_io0 __initdata = 0;
1613 static int ide_io1 __initdata = 0;
1614 static int ide_irq __initdata = 0;
1615 static int joystick_io __initdata = 0;
1616
1617 /* If we have the digital daugherboard... */
1618 static int digital __initdata = 0;
1619 #endif
1620
1621 static int fifosize __initdata = DEFFIFOSIZE;
1622 static int calibrate_signal __initdata = 0;
1623
1624 #else /* not a module */
1625
1626 static int write_ndelay __initdata = -1;
1627
1628 #ifdef MSND_CLASSIC
1629 static int io __initdata = CONFIG_MSNDCLAS_IO;
1630 static int irq __initdata = CONFIG_MSNDCLAS_IRQ;
1631 static int mem __initdata = CONFIG_MSNDCLAS_MEM;
1632 #else /* Pinnacle/Fiji */
1633
1634 static int io __initdata = CONFIG_MSNDPIN_IO;
1635 static int irq __initdata = CONFIG_MSNDPIN_IRQ;
1636 static int mem __initdata = CONFIG_MSNDPIN_MEM;
1637
1638 /* Pinnacle/Fiji non-PnP Config Port */
1639 #ifdef CONFIG_MSNDPIN_NONPNP
1640 # ifndef CONFIG_MSNDPIN_CFG
1641 # define CONFIG_MSNDPIN_CFG 0x250
1642 # endif
1643 #else
1644 # ifdef CONFIG_MSNDPIN_CFG
1645 # undef CONFIG_MSNDPIN_CFG
1646 # endif
1647 # define CONFIG_MSNDPIN_CFG -1
1648 #endif
1649 static int cfg __initdata = CONFIG_MSNDPIN_CFG;
1650 /* If not a module, we don't need to bother with reset=1 */
1651 static int reset;
1652
1653 /* Extra Peripheral Configuration (Default: Disable) */
1654 #ifndef CONFIG_MSNDPIN_MPU_IO
1655 # define CONFIG_MSNDPIN_MPU_IO 0
1656 #endif
1657 static int mpu_io __initdata = CONFIG_MSNDPIN_MPU_IO;
1658
1659 #ifndef CONFIG_MSNDPIN_MPU_IRQ
1660 # define CONFIG_MSNDPIN_MPU_IRQ 0
1661 #endif
1662 static int mpu_irq __initdata = CONFIG_MSNDPIN_MPU_IRQ;
1663
1664 #ifndef CONFIG_MSNDPIN_IDE_IO0
1665 # define CONFIG_MSNDPIN_IDE_IO0 0
1666 #endif
1667 static int ide_io0 __initdata = CONFIG_MSNDPIN_IDE_IO0;
1668
1669 #ifndef CONFIG_MSNDPIN_IDE_IO1
1670 # define CONFIG_MSNDPIN_IDE_IO1 0
1671 #endif
1672 static int ide_io1 __initdata = CONFIG_MSNDPIN_IDE_IO1;
1673
1674 #ifndef CONFIG_MSNDPIN_IDE_IRQ
1675 # define CONFIG_MSNDPIN_IDE_IRQ 0
1676 #endif
1677 static int ide_irq __initdata = CONFIG_MSNDPIN_IDE_IRQ;
1678
1679 #ifndef CONFIG_MSNDPIN_JOYSTICK_IO
1680 # define CONFIG_MSNDPIN_JOYSTICK_IO 0
1681 #endif
1682 static int joystick_io __initdata = CONFIG_MSNDPIN_JOYSTICK_IO;
1683
1684 /* Have SPDIF (Digital) Daughterboard */
1685 #ifndef CONFIG_MSNDPIN_DIGITAL
1686 # define CONFIG_MSNDPIN_DIGITAL 0
1687 #endif
1688 static int digital __initdata = CONFIG_MSNDPIN_DIGITAL;
1689
1690 #endif /* MSND_CLASSIC */
1691
1692 #ifndef CONFIG_MSND_FIFOSIZE
1693 # define CONFIG_MSND_FIFOSIZE DEFFIFOSIZE
1694 #endif
1695 static int fifosize __initdata = CONFIG_MSND_FIFOSIZE;
1696
1697 #ifndef CONFIG_MSND_CALSIGNAL
1698 # define CONFIG_MSND_CALSIGNAL 0
1699 #endif
1700 static int
1701 calibrate_signal __initdata = CONFIG_MSND_CALSIGNAL;
1702 #endif /* MODULE */
1703
1704
1705 static int __init msnd_init(void)
1706 {
1707 int err;
1708 #ifndef MSND_CLASSIC
1709 static msnd_pinnacle_cfg_t pinnacle_devs;
1710 #endif /* MSND_CLASSIC */
1711
1712 printk(KERN_INFO LOGNAME ": Turtle Beach " LONGNAME " Linux Driver Version "
1713 VERSION ", Copyright (C) 1998 Andrew Veliath\n");
1714
1715 if (io == -1 || irq == -1 || mem == -1)
1716 printk(KERN_WARNING LOGNAME ": io, irq and mem must be set\n");
1717
1718 #ifdef MSND_CLASSIC
1719 if (io == -1 ||
1720 !(io == 0x290 ||
1721 io == 0x260 ||
1722 io == 0x250 ||
1723 io == 0x240 ||
1724 io == 0x230 ||
1725 io == 0x220 ||
1726 io == 0x210 ||
1727 io == 0x3e0)) {
1728 printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must be set to 0x210, 0x220, 0x230, 0x240, 0x250, 0x260, 0x290, or 0x3E0\n");
1729 return -EINVAL;
1730 }
1731 #else
1732 if (io == -1 ||
1733 io < 0x100 ||
1734 io > 0x3e0 ||
1735 (io % 0x10) != 0) {
1736 printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must within the range 0x100 to 0x3E0 and must be evenly divisible by 0x10\n");
1737 return -EINVAL;
1738 }
1739 #endif /* MSND_CLASSIC */
1740
1741 if (irq == -1 ||
1742 !(irq == 5 ||
1743 irq == 7 ||
1744 irq == 9 ||
1745 irq == 10 ||
1746 irq == 11 ||
1747 irq == 12)) {
1748 printk(KERN_ERR LOGNAME ": \"irq\" - must be set to 5, 7, 9, 10, 11 or 12\n");
1749 return -EINVAL;
1750 }
1751
1752 if (mem == -1 ||
1753 !(mem == 0xb0000 ||
1754 mem == 0xc8000 ||
1755 mem == 0xd0000 ||
1756 mem == 0xd8000 ||
1757 mem == 0xe0000 ||
1758 mem == 0xe8000)) {
1759 printk(KERN_ERR LOGNAME ": \"mem\" - must be set to "
1760 "0xb0000, 0xc8000, 0xd0000, 0xd8000, 0xe0000 or 0xe8000\n");
1761 return -EINVAL;
1762 }
1763
1764 #ifdef MSND_CLASSIC
1765 switch (irq) {
1766 case 5: dev.irqid = HPIRQ_5; break;
1767 case 7: dev.irqid = HPIRQ_7; break;
1768 case 9: dev.irqid = HPIRQ_9; break;
1769 case 10: dev.irqid = HPIRQ_10; break;
1770 case 11: dev.irqid = HPIRQ_11; break;
1771 case 12: dev.irqid = HPIRQ_12; break;
1772 }
1773
1774 switch (mem) {
1775 case 0xb0000: dev.memid = HPMEM_B000; break;
1776 case 0xc8000: dev.memid = HPMEM_C800; break;
1777 case 0xd0000: dev.memid = HPMEM_D000; break;
1778 case 0xd8000: dev.memid = HPMEM_D800; break;
1779 case 0xe0000: dev.memid = HPMEM_E000; break;
1780 case 0xe8000: dev.memid = HPMEM_E800; break;
1781 }
1782 #else
1783 if (cfg == -1) {
1784 printk(KERN_INFO LOGNAME ": Assuming PnP mode\n");
1785 } else if (cfg != 0x250 && cfg != 0x260 && cfg != 0x270) {
1786 printk(KERN_INFO LOGNAME ": Config port must be 0x250, 0x260 or 0x270 (or unspecified for PnP mode)\n");
1787 return -EINVAL;
1788 } else {
1789 printk(KERN_INFO LOGNAME ": Non-PnP mode: configuring at port 0x%x\n", cfg);
1790
1791 /* DSP */
1792 pinnacle_devs[0].io0 = io;
1793 pinnacle_devs[0].irq = irq;
1794 pinnacle_devs[0].mem = mem;
1795
1796 /* The following are Pinnacle specific */
1797
1798 /* MPU */
1799 pinnacle_devs[1].io0 = mpu_io;
1800 pinnacle_devs[1].irq = mpu_irq;
1801
1802 /* IDE */
1803 pinnacle_devs[2].io0 = ide_io0;
1804 pinnacle_devs[2].io1 = ide_io1;
1805 pinnacle_devs[2].irq = ide_irq;
1806
1807 /* Joystick */
1808 pinnacle_devs[3].io0 = joystick_io;
1809
1810 if (check_region(cfg, 2)) {
1811 printk(KERN_ERR LOGNAME ": Config port 0x%x conflict\n", cfg);
1812 return -EIO;
1813 }
1814
1815 request_region(cfg, 2, "Pinnacle/Fiji Config");
1816 if (msnd_pinnacle_cfg_devices(cfg, reset, pinnacle_devs)) {
1817 printk(KERN_ERR LOGNAME ": Device configuration error\n");
1818 release_region(cfg, 2);
1819 return -EIO;
1820 }
1821 release_region(cfg, 2);
1822 }
1823 #endif /* MSND_CLASSIC */
1824
1825 if (fifosize < 16)
1826 fifosize = 16;
1827
1828 if (fifosize > 1024)
1829 fifosize = 1024;
1830
1831 set_default_audio_parameters();
1832 #ifdef MSND_CLASSIC
1833 dev.type = msndClassic;
1834 #else
1835 dev.type = msndPinnacle;
1836 #endif
1837 dev.io = io;
1838 dev.numio = DSP_NUMIO;
1839 dev.irq = irq;
1840 dev.base = mem;
1841 dev.fifosize = fifosize * 1024;
1842 dev.calibrate_signal = calibrate_signal ? 1 : 0;
1843 dev.recsrc = 0;
1844 dev.dspq_data_buff = DSPQ_DATA_BUFF;
1845 dev.dspq_buff_size = DSPQ_BUFF_SIZE;
1846 if (write_ndelay == -1)
1847 write_ndelay = CONFIG_MSND_WRITE_NDELAY;
1848 if (write_ndelay)
1849 clear_bit(F_DISABLE_WRITE_NDELAY, &dev.flags);
1850 else
1851 set_bit(F_DISABLE_WRITE_NDELAY, &dev.flags);
1852 #ifndef MSND_CLASSIC
1853 if (digital)
1854 set_bit(F_HAVEDIGITAL, &dev.flags);
1855 #endif
1856 init_waitqueue_head(&dev.writeblock);
1857 init_waitqueue_head(&dev.readblock);
1858 init_waitqueue_head(&dev.writeflush);
1859 msnd_fifo_init(&dev.DAPF);
1860 msnd_fifo_init(&dev.DARF);
1861 spin_lock_init(&dev.lock);
1862 printk(KERN_INFO LOGNAME ": %u byte audio FIFOs (x2)\n", dev.fifosize);
1863 if ((err = msnd_fifo_alloc(&dev.DAPF, dev.fifosize)) < 0) {
1864 printk(KERN_ERR LOGNAME ": Couldn't allocate write FIFO\n");
1865 return err;
1866 }
1867
1868 if ((err = msnd_fifo_alloc(&dev.DARF, dev.fifosize)) < 0) {
1869 printk(KERN_ERR LOGNAME ": Couldn't allocate read FIFO\n");
1870 msnd_fifo_free(&dev.DAPF);
1871 return err;
1872 }
1873
1874 if ((err = probe_multisound()) < 0) {
1875 printk(KERN_ERR LOGNAME ": Probe failed\n");
1876 msnd_fifo_free(&dev.DAPF);
1877 msnd_fifo_free(&dev.DARF);
1878 return err;
1879 }
1880
1881 if ((err = attach_multisound()) < 0) {
1882 printk(KERN_ERR LOGNAME ": Attach failed\n");
1883 msnd_fifo_free(&dev.DAPF);
1884 msnd_fifo_free(&dev.DARF);
1885 return err;
1886 }
1887
1888 return 0;
1889 }
1890
1891 static void __exit msdn_cleanup(void)
1892 {
1893 unload_multisound();
1894 msnd_fifo_free(&dev.DAPF);
1895 msnd_fifo_free(&dev.DARF);
1896 }
1897
1898 module_init(msnd_init);
1899 module_exit(msdn_cleanup);
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