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Meth updates.
[linux-2.6/linux-mips.git] / drivers / net / meth.c
blob664304fd768f60886fed43fe17865dee2658f789
1 /*
2 * meth.c -- O2 Builtin 10/100 Ethernet driver
3 *
4 * Copyright (C) 2001 Ilya Volynets
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11 #include <linux/module.h>
12 #include <linux/init.h>
13
14 #include <linux/sched.h>
15 #include <linux/kernel.h> /* printk() */
16 #include <linux/delay.h>
17 #include <linux/slab.h>
18 #include <linux/errno.h> /* error codes */
19 #include <linux/types.h> /* size_t */
20 #include <linux/interrupt.h> /* mark_bh */
21 #include <linux/pci.h>
22
23 #include <linux/in.h>
24 #include <linux/netdevice.h> /* struct device, and other headers */
25 #include <linux/etherdevice.h> /* eth_type_trans */
26 #include <linux/ip.h> /* struct iphdr */
27 #include <linux/tcp.h> /* struct tcphdr */
28 #include <linux/skbuff.h>
29 #include <linux/mii.h> /*MII definitions */
30
31 #include <asm/ip32/crime.h>
32 #include <asm/ip32/mace.h>
33 #include <asm/ip32/ip32_ints.h>
34
35 #include "meth.h"
36
37 #include <linux/in6.h>
38 #include <asm/checksum.h>
39
40 #ifndef MFE_DEBUG
41 #define MFE_DEBUG 0
42 #endif
43
44 #if MFE_DEBUG>=1
45 #define DPRINTK(str,args...) printk (KERN_DEBUG "meth(%ld): %s: " str, jiffies, __FUNCTION__ , ## args)
46 #define MFE_RX_DEBUG 2
47 #else
48 #define DPRINTK(str,args...)
49 #define MFE_RX_DEBUG 0
50 #endif
51
52
53 static const char *version="meth.c: Ilya Volynets (ilya@theIlya.com)";
54 static const char *meth_str="SGI O2 Fast Ethernet";
55 MODULE_AUTHOR("Ilya Volynets");
56 MODULE_DESCRIPTION("SGI O2 Builtin Fast Ethernet driver");
57
58 #define HAVE_TX_TIMEOUT
59 /* The maximum time waited (in jiffies) before assuming a Tx failed. (400ms) */
60 #define TX_TIMEOUT (400*HZ/1000)
61
62 #ifdef HAVE_TX_TIMEOUT
63 static int timeout = TX_TIMEOUT;
64 MODULE_PARM(timeout, "i");
65 #endif
66
67 /*
68 * This structure is private to each device. It is used to pass
69 * packets in and out, so there is place for a packet
70 */
71
72 typedef struct meth_private {
73 struct net_device_stats stats;
74 volatile struct meth_regs *regs;
75 u64 mode; /* in-memory copy of MAC control register */
76 int phy_addr; /* address of phy, used by mdio_* functions, initialized in mdio_probe*/
77 tx_packet *tx_ring;
78 dma_addr_t tx_ring_dma;
79 int free_space;
80 struct sk_buff *tx_skbs[TX_RING_ENTRIES];
81 dma_addr_t tx_skb_dmas[TX_RING_ENTRIES];
82 int tx_read,tx_write;
83 int tx_count;
84
85 rx_packet *rx_ring[RX_RING_ENTRIES];
86 dma_addr_t rx_ring_dmas[RX_RING_ENTRIES];
87 int rx_write;
88
89 spinlock_t meth_lock;
90 } meth_private;
91
92 extern struct net_device meth_devs[];
93 void meth_tx_timeout (struct net_device *dev);
94 irqreturn_t meth_interrupt(int irq, void *dev_id, struct pt_regs *pregs);
95
96 /* global, initialized in ip32-setup.c */
97 char o2meth_eaddr[8]={0,0,0,0,0,0,0,0};
98
99 static inline void load_eaddr(struct net_device *dev,
100 volatile struct meth_regs *regs)
101 {
102 int i;
103 DPRINTK("Loading MAC Address: %02x:%02x:%02x:%02x:%02x:%02x\n",
104 (int)o2meth_eaddr[0]&0xFF,(int)o2meth_eaddr[1]&0xFF,(int)o2meth_eaddr[2]&0xFF,
105 (int)o2meth_eaddr[3]&0xFF,(int)o2meth_eaddr[4]&0xFF,(int)o2meth_eaddr[5]&0xFF);
106 for (i=0; i<6; i++)
107 dev->dev_addr[i]=o2meth_eaddr[i];
108 regs->mac_addr=(*(u64*)o2meth_eaddr)>>16;
109 }
110
111 /*
112 *Waits for BUSY status of mdio bus to clear
113 */
114 #define WAIT_FOR_PHY(___regs, ___rval) \
115 while((___rval=___regs->phy_data)&MDIO_BUSY){ \
116 udelay(25); \
117 }
118 /*read phy register, return value read */
119 static int mdio_read(meth_private *priv,int phyreg)
120 {
121 volatile meth_regs* regs=priv->regs;
122 volatile u32 rval;
123 WAIT_FOR_PHY(regs,rval);
124 regs->phy_registers=(priv->phy_addr<<5)|(phyreg&0x1f);
125 udelay(25);
126 regs->phy_trans_go=1;
127 udelay(25);
128 WAIT_FOR_PHY(regs,rval);
129 return rval&MDIO_DATA_MASK;
130 }
131
132 /*write phy register */
133 static void mdio_write(meth_private* priv,int pfyreg,int val)
134 {
135 volatile meth_regs* regs=priv->regs;
136 int rval;
137 spin_lock(&priv->meth_lock);
138 WAIT_FOR_PHY(regs,rval);
139 regs->phy_registers=(priv->phy_addr<<5)|(pfyreg&0x1f);
140 regs->phy_data=val;
141 udelay(25);
142 WAIT_FOR_PHY(regs,rval);
143 spin_unlock(&priv->meth_lock);
144 }
145
146 /* Modify phy register using given mask and value */
147 static void mdio_update(meth_private* priv,int phyreg, int val, int mask)
148 {
149 int rval;
150 DPRINTK("RMW value %i to PHY register %i with mask %i\n",val,phyreg,mask);
151 rval=mdio_read(priv,phyreg);
152 rval=(rval&~mask)|(val&mask);
153 mdio_write(priv,phyreg,rval);
154 }
155
156 static int mdio_probe(meth_private *priv)
157 {
158 int i, p2, p3;
159 DPRINTK("Detecting PHY kind\n");
160 /* check if phy is detected already */
161 if(priv->phy_addr>=0&&priv->phy_addr<32)
162 return 0;
163 spin_lock(&priv->meth_lock);
164 for (i=0;i<32;++i){
165 priv->phy_addr=(char)i;
166 p2=mdio_read(priv,2);
167 #ifdef MFE_DEBUG
168 p3=mdio_read(priv,3);
169 switch ((p2<<12)|(p3>>4)){
170 case PHY_QS6612X:
171 DPRINTK("PHY is QS6612X\n");
172 break;
173 case PHY_ICS1889:
174 DPRINTK("PHY is ICS1889\n");
175 break;
176 case PHY_ICS1890:
177 DPRINTK("PHY is ICS1890\n");
178 break;
179 case PHY_DP83840:
180 DPRINTK("PHY is DP83840\n");
181 break;
182 }
183 #endif
184 if(p2!=0xffff&&p2!=0x0000){
185 DPRINTK("PHY code: %x\n",(p2<<12)|(p3>>4));
186 break;
187 }
188 }
189 spin_unlock(&priv->meth_lock);
190 if(priv->phy_addr<32) {
191 return 0;
192 }
193 DPRINTK("Oopsie! PHY is not known!\n");
194 priv->phy_addr=-1;
195 return -ENODEV;
196 }
197
198 static void meth_check_link(struct net_device *dev)
199 {
200 struct meth_private *priv = (struct meth_private *) dev->priv;
201 int mii_partner = mdio_read(priv, 5);
202 int mii_advertising = mdio_read(priv, 4);
203 int negotiated = mii_advertising & mii_partner;
204 int duplex, speed;
205
206 if (mii_partner == 0xffff)
207 return;
208
209 duplex = ((negotiated & 0x0100) || (negotiated & 0x01C0) == 0x0040)?METH_PHY_FDX:0;
210 speed = (negotiated & 0x0380)?METH_100MBIT:0;
211
212 if ((priv->mode & METH_PHY_FDX) ^ duplex)
213 {
214 DPRINTK("Setting %s-duplex\n", duplex ? "full" : "half");
215 if (duplex)
216 priv->mode |= METH_PHY_FDX;
217 else
218 priv->mode &= ~METH_PHY_FDX;
219 priv->regs->mac_ctrl = priv->mode;
220 }
221
222 if ((priv->mode & METH_100MBIT) ^ speed)
223 {
224 DPRINTK("Setting %dMbs mode\n", speed ? 100 : 10);
225 if (duplex)
226 priv->mode |= METH_100MBIT;
227 else
228 priv->mode &= ~METH_100MBIT;
229 priv->regs->mac_ctrl = priv->mode;
230 }
231 }
232
233
234 static int meth_init_tx_ring(meth_private *priv)
235 {
236 /* Init TX ring */
237 DPRINTK("Initializing TX ring\n");
238 priv->tx_ring = (tx_packet *) pci_alloc_consistent(NULL,TX_RING_BUFFER_SIZE,&(priv->tx_ring_dma));
239 if(!priv->tx_ring)
240 return -ENOMEM;
241 memset(priv->tx_ring, 0, TX_RING_BUFFER_SIZE);
242 priv->tx_count = priv->tx_read = priv->tx_write = 0;
243 priv->regs->tx_ring_base = priv->tx_ring_dma;
244 priv->free_space = TX_RING_ENTRIES;
245 /* Now init skb save area */
246 memset(priv->tx_skbs,0,sizeof(priv->tx_skbs));
247 memset(priv->tx_skb_dmas,0,sizeof(priv->tx_skb_dmas));
248 DPRINTK("Done with TX ring init\n");
249 return 0;
250 }
251
252 static int meth_init_rx_ring(meth_private *priv)
253 {
254 int i;
255 for(i=0;i<RX_RING_ENTRIES;i++){
256 priv->rx_ring[i]=(rx_packet*)pci_alloc_consistent(NULL,METH_RX_BUFF_SIZE,&(priv->rx_ring_dmas[i]));
257 /* I'll need to re-sync it after each RX */
258 priv->regs->rx_fifo=priv->rx_ring_dmas[i];
259 }
260 priv->rx_write = 0;
261 DPRINTK("Done with RX ring\n");
262 return 0;
263 }
264 static void meth_free_tx_ring(meth_private *priv)
265 {
266 int i;
267
268 /* Remove any pending skb */
269 for (i = 0; i < TX_RING_ENTRIES; i++) {
270 if (priv->tx_skbs[i])
271 dev_kfree_skb(priv->tx_skbs[i]);
272 priv->tx_skbs[i] = NULL;
273 }
274 pci_free_consistent(NULL,
275 TX_RING_BUFFER_SIZE,
276 priv->tx_ring,
277 priv->tx_ring_dma);
278 }
279 static void meth_free_rx_ring(meth_private *priv)
280 {
281 int i;
282
283 for(i=0;i<RX_RING_ENTRIES;i++)
284 pci_free_consistent(NULL,
285 METH_RX_BUFF_SIZE,
286 priv->rx_ring[i],
287 priv->rx_ring_dmas[i]);
288 }
289
290 int meth_reset(struct net_device *dev)
291 {
292 struct meth_private *priv = (struct meth_private *) dev->priv;
293
294 /* Reset card */
295 priv->regs->mac_ctrl = SGI_MAC_RESET;
296 priv->regs->mac_ctrl = 0;
297 udelay(25);
298
299 /* Load ethernet address */
300 load_eaddr(dev, priv->regs);
301 /* Should load some "errata", but later */
302
303 /* Check for device */
304 if(mdio_probe(priv) < 0) {
305 DPRINTK("Unable to find PHY\n");
306 return -ENODEV;
307 }
308
309 /* Initial mode -- 10|Half-duplex|Accept normal packets */
310 priv->mode=METH_ACCEPT_MCAST|METH_DEFAULT_IPG;
311 if(dev->flags | IFF_PROMISC)
312 priv->mode |= METH_PROMISC;
313 priv->regs->mac_ctrl = priv->mode;
314
315 /* Autonegociate speed and duplex mode */
316 meth_check_link(dev);
317
318 /* Now set dma control, but don't enable DMA, yet */
319 priv->regs->dma_ctrl= (4 << METH_RX_OFFSET_SHIFT) |
320 (RX_RING_ENTRIES << METH_RX_DEPTH_SHIFT);
321
322 return(0);
323 }
324
325 /*============End Helper Routines=====================*/
326
327 /*
328 * Open and close
329 */
330
331 int meth_open(struct net_device *dev)
332 {
333 meth_private *priv=dev->priv;
334 volatile meth_regs *regs=priv->regs;
335 int ret;
336
337 /* Initialize the hardware */
338 if((ret=meth_reset(dev)) < 0)
339 return ret;
340
341 /* Allocate the ring buffers */
342 if((ret=meth_init_tx_ring(priv))<0||(ret=meth_init_rx_ring(priv))<0){
343 meth_free_tx_ring(priv);
344 meth_free_rx_ring(priv);
345 return ret;
346 }
347
348 DPRINTK("Will set dma_ctl now\n");
349 /* Start DMA */
350 regs->dma_ctrl|=
351 METH_DMA_TX_EN|/*METH_DMA_TX_INT_EN|*/
352 METH_DMA_RX_EN|METH_DMA_RX_INT_EN;
353
354 if(request_irq(dev->irq,meth_interrupt,SA_SHIRQ,meth_str,dev)){
355 printk(KERN_ERR "%s: Can't get irq %d\n", dev->name, dev->irq);
356 return -EAGAIN;
357 }
358 DPRINTK("About to start queue\n");
359 netif_start_queue(dev);
360 DPRINTK("Opened... DMA control=0x%08lx\n", regs->dma_ctrl);
361 return 0;
362 }
363
364 int meth_release(struct net_device *dev)
365 {
366 meth_private *priv=dev->priv;
367 netif_stop_queue(dev); /* can't transmit any more */
368 /* shut down dma */
369 ((meth_private*)(dev->priv))->regs->dma_ctrl&=
370 ~(METH_DMA_TX_EN|METH_DMA_TX_INT_EN|
371 METH_DMA_RX_EN|METH_DMA_RX_INT_EN);
372 free_irq(dev->irq, dev);
373 meth_free_tx_ring(priv);
374 meth_free_rx_ring(priv);
375 return 0;
376 }
377
378 /*
379 * Configuration changes (passed on by ifconfig)
380 */
381 int meth_config(struct net_device *dev, struct ifmap *map)
382 {
383 if (dev->flags & IFF_UP) /* can't act on a running interface */
384 return -EBUSY;
385
386 /* Don't allow changing the I/O address */
387 if (map->base_addr != dev->base_addr) {
388 printk(KERN_WARNING "meth: Can't change I/O address\n");
389 return -EOPNOTSUPP;
390 }
391
392 /* Don't allow changing the IRQ */
393 if (map->irq != dev->irq) {
394 printk(KERN_WARNING "meth: Can't change IRQ\n");
395 return -EOPNOTSUPP;
396 }
397 DPRINTK("Configured\n");
398
399 /* ignore other fields */
400 return 0;
401 }
402
403 /*
404 * Receive a packet: retrieve, encapsulate and pass over to upper levels
405 */
406 void meth_rx(struct net_device* dev)
407 {
408 struct sk_buff *skb;
409 struct meth_private *priv = (struct meth_private *) dev->priv;
410 rx_packet *rxb;
411 int twptr=priv->rx_write;
412 u64 status;
413 spin_lock(&(priv->meth_lock));
414 while ((status=(rxb=priv->rx_ring[priv->rx_write])->status.raw)&0x8000000000000000)
415 {
416 int len=(status&0xFFFF) - 4; /* omit CRC */
417 /* length sanity check */
418 if(len < 60 || len > 1518) {
419 printk(KERN_DEBUG "%s: bogus packet size: %d, status=%#2lx.\n",
420 dev->name, priv->rx_write, rxb->status.raw);
421 priv->stats.rx_errors++;
422 priv->stats.rx_length_errors++;
423 }
424 if(!(status&METH_RX_STATUS_ERRORS)){
425 skb=alloc_skb(len+2,GFP_ATOMIC);/* Should be atomic -- we are in interrupt */
426 if(!skb){
427 /* Ouch! No memory! Drop packet on the floor */
428 priv->stats.rx_dropped++;
429 } else {
430 skb_reserve(skb, 2); /* align IP on 16B boundary */
431 memcpy(skb_put(skb, len), rxb->buf, len);
432 /* Write metadata, and then pass to the receive level */
433 skb->dev = dev;
434 skb->protocol = eth_type_trans(skb, dev);
435
436 dev->last_rx = jiffies;
437 priv->stats.rx_packets++;
438 priv->stats.rx_bytes+=len;
439 netif_rx(skb);
440 }
441 } else {
442 printk(KERN_WARNING "meth: RX error: status=0x%016lx\n",status);
443 if(status&METH_RX_ST_RCV_CODE_VIOLATION)
444 printk(KERN_WARNING "Receive Code Violation\n");
445 if(status&METH_RX_ST_CRC_ERR)
446 printk(KERN_WARNING "CRC error\n");
447 if(status&METH_RX_ST_INV_PREAMBLE_CTX)
448 printk(KERN_WARNING "Invalid Preamble Context\n");
449 if(status&METH_RX_ST_LONG_EVT_SEEN)
450 printk(KERN_WARNING "Long Event Seen...\n");
451 if(status&METH_RX_ST_BAD_PACKET)
452 printk(KERN_WARNING "Bad Packet\n");
453 if(status&METH_RX_ST_CARRIER_EVT_SEEN)
454 printk(KERN_WARNING "Carrier Event Seen\n");
455 }
456 rxb->status.raw=0;
457 priv->regs->rx_fifo=priv->rx_ring_dmas[priv->rx_write];
458 priv->rx_write=(priv->rx_write+1)&(RX_RING_ENTRIES-1);
459 if(priv->rx_write==twptr) {
460 DPRINTK("going rounds\n");
461 }
462 }
463 spin_unlock(&(priv->meth_lock));
464 }
465
466 static int meth_tx_full(struct net_device *dev)
467 {
468 struct meth_private *priv = (struct meth_private *) dev->priv;
469
470 return(priv->tx_count >= TX_RING_ENTRIES-1);
471 }
472
473 void meth_tx_cleanup(struct net_device* dev, int rptr)
474 {
475 meth_private *priv=dev->priv;
476 tx_packet* status;
477 struct sk_buff *skb;
478
479 spin_lock(&priv->meth_lock);
480
481 /* Stop DMA */
482 priv->regs->dma_ctrl &= ~(METH_DMA_TX_INT_EN);
483
484 while(priv->tx_read != rptr){
485 skb = priv->tx_skbs[priv->tx_read];
486 status = &priv->tx_ring[priv->tx_read];
487 if(!status->header.res.sent)
488 break;
489 if(status->header.raw & METH_TX_STATUS_DONE) {
490 priv->stats.tx_packets++;
491 priv->stats.tx_bytes += skb->len;
492 }
493 dev_kfree_skb_irq(skb);
494 priv->tx_skbs[priv->tx_read] = NULL;
495 status->header.raw = 0;
496 priv->tx_read = (priv->tx_read+1)&(TX_RING_ENTRIES-1);
497 priv->tx_count --;
498 }
499
500 /* wake up queue if it was stopped */
501 if (netif_queue_stopped(dev) && ! meth_tx_full(dev)) {
502 netif_wake_queue(dev);
503 }
504
505 spin_unlock(priv->meth_lock);
506 }
507
508 /*
509 * The typical interrupt entry point
510 */
511 irqreturn_t meth_interrupt(int irq, void *dev_id, struct pt_regs *pregs)
512 {
513 struct meth_private *priv;
514 u32 status;
515 /*
516 * As usual, check the "device" pointer for shared handlers.
517 * Then assign "struct device *dev"
518 */
519 struct net_device *dev = (struct net_device *)dev_id;
520 /* ... and check with hw if it's really ours */
521
522 if (!dev /*paranoid*/ ) return IRQ_HANDLED;
523
524 priv = (struct meth_private *) dev->priv;
525
526 status = priv->regs->int_flags;
527
528 if (status & METH_INT_RX_THRESHOLD) {
529 /* send it to meth_rx for handling */
530 meth_rx(dev);
531 }
532
533 if (status & (METH_INT_TX_EMPTY|METH_INT_TX_PKT)) {
534 /* a transmission is over: free the skb */
535 meth_tx_cleanup(dev, (priv->regs->tx_info&TX_INFO_RPTR)>>16);
536 }
537 /* check for errors too... */
538 if (status & (METH_INT_TX_LINK_FAIL))
539 printk(KERN_WARNING "meth: link failure\n");
540 if (status & (METH_INT_MEM_ERROR))
541 printk(KERN_WARNING "meth: memory error\n");
542 if (status & (METH_INT_TX_ABORT))
543 printk(KERN_WARNING "meth: aborted\n");
544 if (status & (METH_INT_RX_OVERFLOW))
545 printk(KERN_WARNING "meth: RX overflow\n");
546 if (status & (METH_INT_RX_UNDERFLOW))
547 printk(KERN_WARNING "meth: RX underflow\n");
548
549 #define METH_INT_ERROR (METH_INT_TX_LINK_FAIL| \
550 METH_INT_MEM_ERROR| \
551 METH_INT_TX_ABORT| \
552 METH_INT_RX_OVERFLOW| \
553 METH_INT_RX_UNDERFLOW)
554 if( status & METH_INT_ERROR) {
555 printk(KERN_WARNING "meth: error status: 0x%08x\n",status);
556 netif_wake_queue(dev);
557 }
558 priv->regs->int_flags=status&0xff; /* clear interrupts */
559 return IRQ_HANDLED;
560 }
561
562 /*
563 * Transmits packets that fit into TX descriptor (are <=120B)
564 */
565 static void meth_tx_short_prepare(meth_private* priv, struct sk_buff* skb)
566 {
567 tx_packet *desc=&priv->tx_ring[priv->tx_write];
568 int len = (skb->len<ETH_ZLEN)?ETH_ZLEN:skb->len;
569
570 /* maybe I should set whole thing to 0 first... */
571 memcpy(desc->data.dt+(120-len),skb->data,skb->len);
572 if(skb->len < len)
573 memset(desc->data.dt+120-len+skb->len,0,len-skb->len);
574 desc->header.raw=METH_TX_CMD_INT_EN|(len-1)|((128-len)<<16);
575 }
576 #define TX_CATBUF1 BIT(25)
577 static void meth_tx_1page_prepare(meth_private* priv, struct sk_buff* skb)
578 {
579 tx_packet *desc=&priv->tx_ring[priv->tx_write];
580 void *buffer_data = (void *)(((u64)skb->data + 7ULL) & (~7ULL));
581 int unaligned_len = (int)((u64)buffer_data - (u64)skb->data);
582 int buffer_len = skb->len - unaligned_len;
583 dma_addr_t catbuf;
584
585 desc->header.raw=METH_TX_CMD_INT_EN|TX_CATBUF1|(skb->len-1);
586
587 /* unaligned part */
588 if(unaligned_len){
589 memcpy(desc->data.dt+(120-unaligned_len),
590 skb->data, unaligned_len);
591 desc->header.raw |= (128-unaligned_len) << 16;
592 }
593
594 /* first page */
595 catbuf = pci_map_single(NULL,
596 buffer_data,
597 buffer_len,
598 PCI_DMA_TODEVICE);
599 desc->data.cat_buf[0].form.start_addr = catbuf >> 3;
600 desc->data.cat_buf[0].form.len = buffer_len-1;
601 }
602 #define TX_CATBUF2 BIT(26)
603 static void meth_tx_2page_prepare(meth_private* priv, struct sk_buff* skb)
604 {
605 tx_packet *desc=&priv->tx_ring[priv->tx_write];
606 void *buffer1_data = (void *)(((u64)skb->data + 7ULL) & (~7ULL));
607 void *buffer2_data = (void *)PAGE_ALIGN((u64)skb->data);
608 int unaligned_len = (int)((u64)buffer1_data - (u64)skb->data);
609 int buffer1_len = (int)((u64)buffer2_data - (u64)buffer1_data);
610 int buffer2_len = skb->len - buffer1_len - unaligned_len;
611 dma_addr_t catbuf1, catbuf2;
612
613 desc->header.raw=METH_TX_CMD_INT_EN|TX_CATBUF1|TX_CATBUF2|(skb->len-1);
614 /* unaligned part */
615 if(unaligned_len){
616 memcpy(desc->data.dt+(120-unaligned_len),
617 skb->data, unaligned_len);
618 desc->header.raw |= (128-unaligned_len) << 16;
619 }
620
621 /* first page */
622 catbuf1 = pci_map_single(NULL,
623 buffer1_data,
624 buffer1_len,
625 PCI_DMA_TODEVICE);
626 desc->data.cat_buf[0].form.start_addr = catbuf1 >> 3;
627 desc->data.cat_buf[0].form.len = buffer1_len-1;
628 /* second page */
629 catbuf2 = pci_map_single(NULL,
630 buffer2_data,
631 buffer2_len,
632 PCI_DMA_TODEVICE);
633 desc->data.cat_buf[1].form.start_addr = catbuf2 >> 3;
634 desc->data.cat_buf[1].form.len = buffer2_len-1;
635 }
636
637 void meth_add_to_tx_ring(meth_private *priv, struct sk_buff* skb)
638 {
639 if(skb->len <= 120) {
640 /* Whole packet fits into descriptor */
641 meth_tx_short_prepare(priv,skb);
642 } else if(PAGE_ALIGN((u64)skb->data) !=
643 PAGE_ALIGN((u64)skb->data+skb->len-1)) {
644 /* Packet crosses page boundary */
645 meth_tx_2page_prepare(priv,skb);
646 } else {
647 /* Packet is in one page */
648 meth_tx_1page_prepare(priv,skb);
649 }
650
651 /* Remember the skb, so we can free it at interrupt time */
652 priv->tx_skbs[priv->tx_write] = skb;
653 priv->tx_write = (priv->tx_write+1) & (TX_RING_ENTRIES-1);
654 priv->regs->tx_info = priv->tx_write;
655 priv->tx_count ++;
656 /* Enable DMA transfer */
657 priv->regs->dma_ctrl |= METH_DMA_TX_INT_EN;
658 }
659
660 /*
661 * Transmit a packet (called by the kernel)
662 */
663 int meth_tx(struct sk_buff *skb, struct net_device *dev)
664 {
665 struct meth_private *priv = (struct meth_private *) dev->priv;
666
667 spin_lock(&priv->meth_lock);
668
669 meth_add_to_tx_ring(priv, skb);
670 dev->trans_start = jiffies; /* save the timestamp */
671
672 /* If TX ring is full, tell the upper layer to stop sending packets */
673 if (meth_tx_full(dev)) {
674 printk("TX full: stopping\n");
675 netif_stop_queue(dev);
676 }
677
678 spin_unlock(&priv->meth_lock);
679
680 return 0;
681 }
682
683 /*
684 * Deal with a transmit timeout.
685 */
686
687 void meth_tx_timeout (struct net_device *dev)
688 {
689 struct meth_private *priv = (struct meth_private *) dev->priv;
690
691 printk(KERN_WARNING "%s: transmit timed out\n", dev->name);
692
693 /* Protect against concurrent rx interrupts */
694 spin_lock(&priv->meth_lock);
695
696 /* Try to reset the interface. */
697 meth_reset(dev);
698
699 priv->stats.tx_errors++;
700
701 /* Clear all rings */
702 meth_free_tx_ring(priv);
703 meth_free_rx_ring(priv);
704 meth_init_tx_ring(priv);
705 meth_init_rx_ring(priv);
706
707 /* Restart dma */
708 priv->regs->dma_ctrl|=METH_DMA_TX_EN|METH_DMA_RX_EN|METH_DMA_RX_INT_EN;
709
710 /* Enable interrupt */
711 spin_unlock(&priv->meth_lock);
712
713 dev->trans_start = jiffies;
714 netif_wake_queue(dev);
715
716 return;
717 }
718
719 /*
720 * Ioctl commands
721 */
722 int meth_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
723 {
724
725 DPRINTK("ioctl\n");
726 return 0;
727 }
728
729 /*
730 * Return statistics to the caller
731 */
732 struct net_device_stats *meth_stats(struct net_device *dev)
733 {
734 struct meth_private *priv = (struct meth_private *) dev->priv;
735 return &priv->stats;
736 }
737
738 /*
739 * The init function (sometimes called probe).
740 * It is invoked by register_netdev()
741 */
742 int meth_init(struct net_device *dev)
743 {
744 meth_private *priv;
745 /*
746 * Then, assign other fields in dev, using ether_setup() and some
747 * hand assignments
748 */
749 ether_setup(dev); /* assign some of the fields */
750
751 dev->open = meth_open;
752 dev->stop = meth_release;
753 dev->set_config = meth_config;
754 dev->hard_start_xmit = meth_tx;
755 dev->do_ioctl = meth_ioctl;
756 dev->get_stats = meth_stats;
757 #ifdef HAVE_TX_TIMEOUT
758 dev->tx_timeout = meth_tx_timeout;
759 dev->watchdog_timeo = timeout;
760 #endif
761 dev->irq = MACE_ETHERNET_IRQ;
762 SET_MODULE_OWNER(dev);
763
764 /*
765 * Then, allocate the priv field. This encloses the statistics
766 * and a few private fields.
767 */
768 priv = kmalloc(sizeof(struct meth_private), GFP_KERNEL);
769 if (priv == NULL)
770 return -ENOMEM;
771 dev->priv=priv;
772 memset(priv, 0, sizeof(struct meth_private));
773 spin_lock_init(&((struct meth_private *) dev->priv)->meth_lock);
774 /*
775 * Make the usual checks: check_region(), probe irq, ... -ENODEV
776 * should be returned if no device found. No resource should be
777 * grabbed: this is done on open().
778 */
779 priv->regs=(meth_regs*)SGI_MFE;
780 dev->base_addr=SGI_MFE;
781 priv->phy_addr = -1; /* No phy is known yet... */
782
783 printk("SGI O2 Fast Ethernet rev. %ld\n", priv->regs->mac_ctrl >> 29);
784
785 return 0;
786 }
787
788 /*
789 * The devices
790 */
791
792 struct net_device meth_devs[1] = {
793 { init: meth_init, } /* init, nothing more */
794 };
795
796 /*
797 * Finally, the module stuff
798 */
799
800 int meth_init_module(void)
801 {
802 int result, device_present = 0;
803
804 strcpy(meth_devs[0].name, "eth%d");
805
806 if ( (result = register_netdev(meth_devs)) )
807 printk("meth: error %i registering device \"%s\"\n",
808 result, meth_devs->name);
809 else device_present++;
810
811 return device_present ? 0 : -ENODEV;
812 }
813
814 void meth_cleanup(void)
815 {
816 kfree(meth_devs->priv);
817 unregister_netdev(meth_devs);
818 return;
819 }
820
821 module_init(meth_init_module);
822 module_exit(meth_cleanup);
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