include/asm-mips/mach-ip32/dma-coherence.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 2006  Ralf Baechle <ralf@linux-mips.org>
   7  *
   8  */
   9 #ifndef __ASM_MACH_IP35_DMA_COHERENCE_H
  10 #define __ASM_MACH_IP35_DMA_COHERENCE_H
  11
  12 #include <asm/ip32/crime.h>
  13
  14 struct device;
  15
  16 /*
  17  * Few notes.
  18  * 1. CPU sees memory as two chunks: 0-256M@0x0, and the rest @0x40000000+256M
  19  * 2. PCI sees memory as one big chunk @0x0 (or we could use 0x40000000 for
  20  *    native-endian)
  21  * 3. All other devices see memory as one big chunk at 0x40000000
  22  * 4. Non-PCI devices will pass NULL as struct device*
  23  *
  24  * Thus we translate differently, depending on device.
  25  */
  26
  27 #define RAM_OFFSET_MASK 0x3fffffffUL
  28
  29 static dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size)
  30 {
  31         dma_addr_t pa = virt_to_phys(addr) & RAM_OFFSET_MASK;
  32
  33         if (dev == NULL)
  34                 pa += CRIME_HI_MEM_BASE;
  35
  36         return pa;
  37 }
  38
  39 static dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page)
  40 {
  41         dma_addr_t pa;
  42
  43         pa = page_to_phys(page) & RAM_OFFSET_MASK;
  44
  45         if (dev == NULL)
  46                 pa += CRIME_HI_MEM_BASE;
  47
  48         return pa;
  49 }
  50
  51 /* This is almost certainly wrong but it's what dma-ip32.c used to use  */
  52 static unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr)
  53 {
  54         unsigned long addr = dma_addr & RAM_OFFSET_MASK;
  55
  56         if (dma_addr >= 256*1024*1024)
  57                 addr += CRIME_HI_MEM_BASE;
  58
  59         return addr;
  60 }
  61
  62 static void plat_unmap_dma_mem(dma_addr_t dma_addr)
  63 {
  64 }
  65
  66 static inline int plat_device_is_coherent(struct device *dev)
  67 {
  68         return 0;               /* IP32 is non-cohernet */
  69 }
  70
  71 #endif /* __ASM_MACH_IP35_DMA_COHERENCE_H */