drivers/usb/usb-ohci.h

   1  /*
   2  * URB OHCI HCD (Host Controller Driver) for USB.
   3  *
   4  *(C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   5  *
   6  * usb-ohci.h
   7  *
   8  */
   9
  10
  11 #define MODSTR "ohci: "
  12
  13
  14 static int cc_to_error[16] = {
  15
  16 /* mapping of the OHCI CC status to error codes */
  17 #ifdef USB_ST_CRC /* status codes */
  18         /* No  Error  */               USB_ST_NOERROR,
  19         /* CRC Error  */               USB_ST_CRC,
  20         /* Bit Stuff  */               USB_ST_BITSTUFF,
  21         /* Data Togg  */               USB_ST_CRC,
  22         /* Stall      */               USB_ST_STALL,
  23         /* DevNotResp */               USB_ST_NORESPONSE,
  24         /* PIDCheck   */               USB_ST_BITSTUFF,
  25         /* UnExpPID   */               USB_ST_BITSTUFF,
  26         /* DataOver   */               USB_ST_DATAOVERRUN,
  27         /* DataUnder  */               USB_ST_DATAUNDERRUN,
  28         /* reservd    */               USB_ST_NORESPONSE,
  29         /* reservd    */               USB_ST_NORESPONSE,
  30         /* BufferOver */               USB_ST_BUFFEROVERRUN,
  31         /* BuffUnder  */               USB_ST_BUFFERUNDERRUN,
  32         /* Not Access */               USB_ST_NORESPONSE,
  33         /* Not Access */               USB_ST_NORESPONSE
  34 };
  35
  36 #else  /* error codes */
  37         /* No  Error  */               0,
  38         /* CRC Error  */               -EILSEQ,
  39         /* Bit Stuff  */               -EPROTO,
  40         /* Data Togg  */               -EILSEQ,
  41         /* Stall      */               -EPIPE,
  42         /* DevNotResp */               -ETIMEDOUT,
  43         /* PIDCheck   */               -EPROTO,
  44         /* UnExpPID   */               -EPROTO,
  45         /* DataOver   */               -EOVERFLOW,
  46         /* DataUnder  */               -EREMOTEIO,
  47         /* reservd    */               -ETIMEDOUT,
  48         /* reservd    */               -ETIMEDOUT,
  49         /* BufferOver */               -ECOMM,
  50         /* BuffUnder  */               -ECOMM,
  51         /* Not Access */               -ETIMEDOUT,
  52         /* Not Access */               -ETIMEDOUT
  53 };
  54 #define USB_ST_URB_PENDING              -EINPROGRESS
  55 #endif
  56
  57
  58
  59 struct ed;
  60 struct td;
  61 /* for ED and TD structures */
  62
  63 /* ED States */
  64
  65 #define ED_NEW          0x00
  66 #define ED_UNLINK       0x01
  67 #define ED_OPER         0x02
  68 #define ED_DEL          0x04
  69 #define ED_URB_DEL  0x08
  70
  71 /* usb_ohci_ed */
  72 typedef struct ed {
  73         __u32 hwINFO;
  74         __u32 hwTailP;
  75         __u32 hwHeadP;
  76         __u32 hwNextED;
  77
  78         struct ed * ed_prev;
  79         __u8 int_period;
  80         __u8 int_branch;
  81         __u8 int_load;
  82         __u8 int_interval;
  83         __u8 state;
  84         __u8 type;
  85         __u16 last_iso;
  86     struct ed * ed_rm_list;
  87
  88 } ed_t;
  89
  90
  91 /* TD info field */
  92 #define TD_CC       0xf0000000
  93 #define TD_CC_GET(td_p) ((td_p >>28) & 0x0f)
  94 #define TD_CC_SET(td_p, cc) (td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28)
  95 #define TD_EC       0x0C000000
  96 #define TD_T        0x03000000
  97 #define TD_T_DATA0  0x02000000
  98 #define TD_T_DATA1  0x03000000
  99 #define TD_T_TOGGLE 0x00000000
 100 #define TD_R        0x00040000
 101 #define TD_DI       0x00E00000
 102 #define TD_DI_SET(X) (((X) & 0x07)<< 21)
 103 #define TD_DP       0x00180000
 104 #define TD_DP_SETUP 0x00000000
 105 #define TD_DP_IN    0x00100000
 106 #define TD_DP_OUT   0x00080000
 107
 108 #define TD_ISO          0x00010000
 109 #define TD_DEL      0x00020000
 110
 111 /* CC Codes */
 112 #define TD_CC_NOERROR      0x00
 113 #define TD_CC_CRC          0x01
 114 #define TD_CC_BITSTUFFING  0x02
 115 #define TD_CC_DATATOGGLEM  0x03
 116 #define TD_CC_STALL        0x04
 117 #define TD_DEVNOTRESP      0x05
 118 #define TD_PIDCHECKFAIL    0x06
 119 #define TD_UNEXPECTEDPID   0x07
 120 #define TD_DATAOVERRUN     0x08
 121 #define TD_DATAUNDERRUN    0x09
 122 #define TD_BUFFEROVERRUN   0x0C
 123 #define TD_BUFFERUNDERRUN  0x0D
 124 #define TD_NOTACCESSED     0x0F
 125
 126
 127 #define MAXPSW 1
 128
 129 typedef struct td {
 130         __u32 hwINFO;
 131         __u32 hwCBP;            /* Current Buffer Pointer */
 132         __u32 hwNextTD;         /* Next TD Pointer */
 133         __u32 hwBE;             /* Memory Buffer End Pointer */
 134         __u16 hwPSW[MAXPSW];
 135
 136         __u8 type;
 137         __u8 index;
 138         struct ed * ed;
 139         struct td * next_dl_td;
 140         urb_t * urb;
 141 } td_t;
 142
 143
 144 /* TD types */
 145 #define BULK            0x03
 146 #define INT                     0x01
 147 #define CTRL            0x02
 148 #define ISO                     0x00
 149
 150 #define SEND            0x01
 151 #define ST_ADDR         0x02
 152 #define ADD_LEN         0x04
 153 #define DEL             0x08
 154
 155
 156 #define OHCI_ED_SKIP    (1 << 14)
 157
 158 /*
 159  * The HCCA (Host Controller Communications Area) is a 256 byte
 160  * structure defined in the OHCI spec. that the host controller is
 161  * told the base address of.  It must be 256-byte aligned.
 162  */
 163
 164 #define NUM_INTS 32     /* part of the OHCI standard */
 165 struct ohci_hcca {
 166     __u32       int_table[NUM_INTS];    /* Interrupt ED table */
 167         __u16   frame_no;               /* current frame number */
 168         __u16   pad1;                   /* set to 0 on each frame_no change */
 169         __u32   done_head;              /* info returned for an interrupt */
 170         u8              reserved_for_hc[116];
 171 } __attribute((aligned(256)));
 172
 173
 174 /*
 175  * Maximum number of root hub ports.
 176  */
 177 #define MAX_ROOT_PORTS  15      /* maximum OHCI root hub ports */
 178
 179 /*
 180  * This is the structure of the OHCI controller's memory mapped I/O
 181  * region.  This is Memory Mapped I/O.  You must use the readl() and
 182  * writel() macros defined in asm/io.h to access these!!
 183  */
 184 struct ohci_regs {
 185         /* control and status registers */
 186         __u32   revision;
 187         __u32   control;
 188         __u32   cmdstatus;
 189         __u32   intrstatus;
 190         __u32   intrenable;
 191         __u32   intrdisable;
 192         /* memory pointers */
 193         __u32   hcca;
 194         __u32   ed_periodcurrent;
 195         __u32   ed_controlhead;
 196         __u32   ed_controlcurrent;
 197         __u32   ed_bulkhead;
 198         __u32   ed_bulkcurrent;
 199         __u32   donehead;
 200         /* frame counters */
 201         __u32   fminterval;
 202         __u32   fmremaining;
 203         __u32   fmnumber;
 204         __u32   periodicstart;
 205         __u32   lsthresh;
 206         /* Root hub ports */
 207         struct  ohci_roothub_regs {
 208                 __u32   a;
 209                 __u32   b;
 210                 __u32   status;
 211                 __u32   portstatus[MAX_ROOT_PORTS];
 212         } roothub;
 213 } __attribute((aligned(32)));
 214
 215
 216 /* OHCI CONTROL AND STATUS REGISTER MASKS */
 217
 218 /*
 219  * HcControl (control) register masks
 220  */
 221 #define OHCI_CTRL_CBSR  (3 << 0)        /* control/bulk service ratio */
 222 #define OHCI_CTRL_PLE   (1 << 2)        /* periodic list enable */
 223 #define OHCI_CTRL_IE    (1 << 3)        /* isochronous enable */
 224 #define OHCI_CTRL_CLE   (1 << 4)        /* control list enable */
 225 #define OHCI_CTRL_BLE   (1 << 5)        /* bulk list enable */
 226 #define OHCI_CTRL_HCFS  (3 << 6)        /* host controller functional state */
 227 #define OHCI_CTRL_IR    (1 << 8)        /* interrupt routing */
 228 #define OHCI_CTRL_RWC   (1 << 9)        /* remote wakeup connected */
 229 #define OHCI_CTRL_RWE   (1 << 10)       /* remote wakeup enable */
 230
 231 /* pre-shifted values for HCFS */
 232 #       define OHCI_USB_RESET   (0 << 6)
 233 #       define OHCI_USB_RESUME  (1 << 6)
 234 #       define OHCI_USB_OPER    (2 << 6)
 235 #       define OHCI_USB_SUSPEND (3 << 6)
 236
 237 /*
 238  * HcCommandStatus (cmdstatus) register masks
 239  */
 240 #define OHCI_HCR        (1 << 0)        /* host controller reset */
 241 #define OHCI_CLF        (1 << 1)        /* control list filled */
 242 #define OHCI_BLF        (1 << 2)        /* bulk list filled */
 243 #define OHCI_OCR        (1 << 3)        /* ownership change request */
 244 #define OHCI_SOC        (3 << 16)       /* scheduling overrun count */
 245
 246 /*
 247  * masks used with interrupt registers:
 248  * HcInterruptStatus (intrstatus)
 249  * HcInterruptEnable (intrenable)
 250  * HcInterruptDisable (intrdisable)
 251  */
 252 #define OHCI_INTR_SO    (1 << 0)        /* scheduling overrun */
 253 #define OHCI_INTR_WDH   (1 << 1)        /* writeback of done_head */
 254 #define OHCI_INTR_SF    (1 << 2)        /* start frame */
 255 #define OHCI_INTR_RD    (1 << 3)        /* resume detect */
 256 #define OHCI_INTR_UE    (1 << 4)        /* unrecoverable error */
 257 #define OHCI_INTR_FNO   (1 << 5)        /* frame number overflow */
 258 #define OHCI_INTR_RHSC  (1 << 6)        /* root hub status change */
 259 #define OHCI_INTR_OC    (1 << 30)       /* ownership change */
 260 #define OHCI_INTR_MIE   (1 << 31)       /* master interrupt enable */
 261
 262
 263
 264 /* Virtual Root HUB */
 265 struct virt_root_hub {
 266         int devnum; /* Address of Root Hub endpoint */
 267         void * urb;
 268         void * int_addr;
 269         int send;
 270         int interval;
 271         struct timer_list rh_int_timer;
 272 };
 273
 274
 275 /* USB HUB CONSTANTS (not OHCI-specific; see hub.h) */
 276
 277 /* destination of request */
 278 #define RH_INTERFACE               0x01
 279 #define RH_ENDPOINT                0x02
 280 #define RH_OTHER                   0x03
 281
 282 #define RH_CLASS                   0x20
 283 #define RH_VENDOR                  0x40
 284
 285 /* Requests: bRequest << 8 | bmRequestType */
 286 #define RH_GET_STATUS           0x0080
 287 #define RH_CLEAR_FEATURE        0x0100
 288 #define RH_SET_FEATURE          0x0300
 289 #define RH_SET_ADDRESS          0x0500
 290 #define RH_GET_DESCRIPTOR       0x0680
 291 #define RH_SET_DESCRIPTOR       0x0700
 292 #define RH_GET_CONFIGURATION    0x0880
 293 #define RH_SET_CONFIGURATION    0x0900
 294 #define RH_GET_STATE            0x0280
 295 #define RH_GET_INTERFACE        0x0A80
 296 #define RH_SET_INTERFACE        0x0B00
 297 #define RH_SYNC_FRAME           0x0C80
 298 /* Our Vendor Specific Request */
 299 #define RH_SET_EP               0x2000
 300
 301
 302 /* Hub port features */
 303 #define RH_PORT_CONNECTION         0x00
 304 #define RH_PORT_ENABLE             0x01
 305 #define RH_PORT_SUSPEND            0x02
 306 #define RH_PORT_OVER_CURRENT       0x03
 307 #define RH_PORT_RESET              0x04
 308 #define RH_PORT_POWER              0x08
 309 #define RH_PORT_LOW_SPEED          0x09
 310
 311 #define RH_C_PORT_CONNECTION       0x10
 312 #define RH_C_PORT_ENABLE           0x11
 313 #define RH_C_PORT_SUSPEND          0x12
 314 #define RH_C_PORT_OVER_CURRENT     0x13
 315 #define RH_C_PORT_RESET            0x14
 316
 317 /* Hub features */
 318 #define RH_C_HUB_LOCAL_POWER       0x00
 319 #define RH_C_HUB_OVER_CURRENT      0x01
 320
 321 #define RH_DEVICE_REMOTE_WAKEUP    0x00
 322 #define RH_ENDPOINT_STALL          0x01
 323
 324 #define RH_ACK                     0x01
 325 #define RH_REQ_ERR                 -1
 326 #define RH_NACK                    0x00
 327
 328
 329 /* OHCI ROOT HUB REGISTER MASKS */
 330
 331 /* roothub.portstatus [i] bits */
 332 #define RH_PS_CCS            0x00000001         /* current connect status */
 333 #define RH_PS_PES            0x00000002         /* port enable status*/
 334 #define RH_PS_PSS            0x00000004         /* port suspend status */
 335 #define RH_PS_POCI           0x00000008         /* port over current indicator */
 336 #define RH_PS_PRS            0x00000010         /* port reset status */
 337 #define RH_PS_PPS            0x00000100         /* port power status */
 338 #define RH_PS_LSDA           0x00000200         /* low speed device attached */
 339 #define RH_PS_CSC            0x00010000         /* connect status change */
 340 #define RH_PS_PESC           0x00020000         /* port enable status change */
 341 #define RH_PS_PSSC           0x00040000         /* port suspend status change */
 342 #define RH_PS_OCIC           0x00080000         /* over current indicator change */
 343 #define RH_PS_PRSC           0x00100000         /* port reset status change */
 344
 345 /* roothub.status bits */
 346 #define RH_HS_LPS            0x00000001         /* local power status */
 347 #define RH_HS_OCI            0x00000002         /* over current indicator */
 348 #define RH_HS_DRWE           0x00008000         /* device remote wakeup enable */
 349 #define RH_HS_LPSC           0x00010000         /* local power status change */
 350 #define RH_HS_OCIC           0x00020000         /* over current indicator change */
 351 #define RH_HS_CRWE           0x80000000         /* clear remote wakeup enable */
 352
 353 /* roothub.b masks */
 354 #define RH_B_DR         0x0000ffff              /* device removable flags */
 355 #define RH_B_PPCM       0xffff0000              /* port power control mask */
 356
 357 /* roothub.a masks */
 358 #define RH_A_NDP        (0xff << 0)             /* number of downstream ports */
 359 #define RH_A_PSM        (1 << 8)                /* power switching mode */
 360 #define RH_A_NPS        (1 << 9)                /* no power switching */
 361 #define RH_A_DT         (1 << 10)               /* device type (mbz) */
 362 #define RH_A_OCPM       (1 << 11)               /* over current protection mode */
 363 #define RH_A_NOCP       (1 << 12)               /* no over current protection */
 364 #define RH_A_POTPGT     (0xff << 24)            /* power on to power good time */
 365
 366 #define min(a,b) (((a)<(b))?(a):(b))
 367
 368
 369 /* urb */
 370 typedef struct
 371 {
 372         ed_t * ed;
 373         __u16 length;   // number of tds associated with this request
 374         __u16 td_cnt;   // number of tds already serviced
 375         int   state;
 376         void * wait;
 377         td_t * td[0];   // list pointer to all corresponding TDs associated with this request
 378
 379 } urb_priv_t;
 380 #define URB_DEL 1
 381
 382 /*
 383  * This is the full ohci controller description
 384  *
 385  * Note how the "proper" USB information is just
 386  * a subset of what the full implementation needs. (Linus)
 387  */
 388
 389
 390 typedef struct ohci {
 391         struct ohci_hcca hcca;          /* hcca */
 392
 393         int irq;
 394         int disabled;                   /* e.g. got a UE, we're hung */
 395
 396         struct ohci_regs * regs;        /* OHCI controller's memory */
 397         struct list_head ohci_hcd_list; /* list of all ohci_hcd */
 398
 399         struct ohci * next;             // chain of uhci device contexts
 400         struct list_head urb_list;      // list of all pending urbs
 401         spinlock_t urb_list_lock;       // lock to keep consistency
 402
 403         int ohci_int_load[32];          /* load of the 32 Interrupt Chains (for load balancing)*/
 404         ed_t * ed_rm_list[2];     /* lists of all endpoints to be removed */
 405         ed_t * ed_bulktail;       /* last endpoint of bulk list */
 406         ed_t * ed_controltail;    /* last endpoint of control list */
 407         ed_t * ed_isotail;        /* last endpoint of iso list */
 408         int intrstatus;
 409         __u32 hc_control;               /* copy of the hc control reg */
 410         struct usb_bus * bus;
 411         struct usb_device * dev[128];
 412         struct virt_root_hub rh;
 413 } ohci_t;
 414
 415
 416 #define NUM_TDS 0               /* num of preallocated transfer descriptors */
 417 #define NUM_EDS 32              /* num of preallocated endpoint descriptors */
 418
 419 struct ohci_device {
 420         ed_t    ed[NUM_EDS];
 421         int ed_cnt;
 422         void  * wait;
 423 };
 424
 425 // #define ohci_to_usb(ohci)    ((ohci)->usb)
 426 #define usb_to_ohci(usb)        ((struct ohci_device *)(usb)->hcpriv)
 427
 428 /* hcd */
 429 /* endpoint */
 430 static int ep_link(ohci_t * ohci, ed_t * ed);
 431 static int ep_unlink(ohci_t * ohci, ed_t * ed);
 432 static ed_t * ep_add_ed(struct usb_device * usb_dev, unsigned int pipe, int interval, int load);
 433 static void ep_rm_ed(struct usb_device * usb_dev, ed_t * ed);
 434 /* td */
 435 static void td_fill(unsigned int info, void * data, int len, urb_t * urb, int index);
 436 static void td_submit_urb(urb_t * urb);
 437 /* root hub */
 438 static int rh_submit_urb(urb_t * urb);
 439 static int rh_unlink_urb(urb_t * urb);
 440 static int rh_init_int_timer(urb_t * urb);
 441
 442 #ifdef DEBUG
 443 #define OHCI_FREE(x) kfree(x); printk("OHCI FREE: %d: %4x\n", -- __ohci_free_cnt, (unsigned int) x)
 444 #define OHCI_ALLOC(x,size) (x) = kmalloc(size, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); printk("OHCI ALLO: %d: %4x\n", ++ __ohci_free_cnt,(unsigned int) x)
 445 static int __ohci_free_cnt = 0;
 446 #else
 447 #define OHCI_FREE(x) kfree(x)
 448 #define OHCI_ALLOC(x,size) (x) = kmalloc(size, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL)
 449 #endif
 450