drivers/ide/ide-pmac.c

   1 /*
   2  * linux/drivers/ide/ide-pmac.c         Version ?.??    Mar. 18, 2000
   3  *
   4  * Support for IDE interfaces on PowerMacs.
   5  * These IDE interfaces are memory-mapped and have a DBDMA channel
   6  * for doing DMA.
   7  *
   8  *  Copyright (C) 1998 Paul Mackerras.
   9  *
  10  *  Bits from Benjamin Herrenschmidt
  11  *
  12  *  This program is free software; you can redistribute it and/or
  13  *  modify it under the terms of the GNU General Public License
  14  *  as published by the Free Software Foundation; either version
  15  *  2 of the License, or (at your option) any later version.
  16  *
  17  * Some code taken from drivers/ide/ide-dma.c:
  18  *
  19  *  Copyright (c) 1995-1998  Mark Lord
  20  *
  21  */
  22 #include <linux/config.h>
  23 #include <linux/types.h>
  24 #include <linux/kernel.h>
  25 #include <linux/sched.h>
  26 #include <linux/init.h>
  27 #include <linux/delay.h>
  28 #include <linux/ide.h>
  29
  30 #include <asm/prom.h>
  31 #include <asm/io.h>
  32 #include <asm/dbdma.h>
  33 #include <asm/ide.h>
  34 #include <asm/mediabay.h>
  35 #include <asm/feature.h>
  36 #ifdef CONFIG_PMAC_PBOOK
  37 #include <linux/adb.h>
  38 #include <linux/pmu.h>
  39 #include <asm/irq.h>
  40 #endif
  41 #include "ide_modes.h"
  42
  43 extern char *ide_dmafunc_verbose(ide_dma_action_t dmafunc);
  44
  45 #undef IDE_PMAC_DEBUG
  46
  47 #define IDE_SYSCLK_NS           30
  48 #define IDE_SYSCLK_ULTRA_PS     0x1d4c /* (15 * 1000 / 2)*/
  49
  50 struct pmac_ide_hwif {
  51         ide_ioreg_t                     regbase;
  52         int                             irq;
  53         int                             kind;
  54         int                             aapl_bus_id;
  55         struct device_node*             node;
  56         u32                             timings[2];
  57 #ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
  58         volatile struct dbdma_regs*     dma_regs;
  59         struct dbdma_cmd*               dma_table;
  60 #endif
  61
  62 } pmac_ide[MAX_HWIFS];
  63
  64 static int pmac_ide_count;
  65
  66 enum {
  67         controller_ohare,       /* OHare based */
  68         controller_heathrow,    /* Heathrow/Paddington */
  69         controller_kl_ata3,     /* KeyLargo ATA-3 */
  70         controller_kl_ata4      /* KeyLargo ATA-4 */
  71 };
  72
  73
  74 #ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
  75
  76 typedef struct {
  77         int     accessTime;
  78         int     cycleTime;
  79 } pmac_ide_timing;
  80
  81 /* Multiword DMA timings */
  82 static pmac_ide_timing mdma_timings[] =
  83 {
  84     { 215,    480 },    /* Mode 0 */
  85     {  80,    150 },    /*      1 */
  86     {  70,    120 }     /*      2 */
  87 };
  88
  89 /* Ultra DMA timings (for use when I know how to calculate them */
  90 static pmac_ide_timing udma_timings[] =
  91 {
  92     {   0,    114 },    /* Mode 0 */
  93     {   0,     75 },    /*      1 */
  94     {   0,     55 },    /*      2 */
  95     {   100,   45 },    /*      3 */
  96     {   100,   25 }     /*      4 */
  97 };
  98
  99 /* allow up to 256 DBDMA commands per xfer */
 100 #define MAX_DCMDS               256
 101
 102 /* Wait 1.5s for disk to answer on IDE bus after
 103  * enable operation.
 104  * NOTE: There is at least one case I know of a disk that needs about 10sec
 105  *       before anwering on the bus. I beleive we could add a kernel command
 106  *       line arg to override this delay for such cases.
 107  */
 108 #define IDE_WAKEUP_DELAY_MS     1500
 109
 110 static void pmac_ide_setup_dma(struct device_node *np, int ix);
 111 static int pmac_ide_dmaproc(ide_dma_action_t func, ide_drive_t *drive);
 112 static int pmac_ide_build_dmatable(ide_drive_t *drive, int ix, int wr);
 113 static int pmac_ide_tune_chipset(ide_drive_t *drive, byte speed);
 114 static void pmac_ide_tuneproc(ide_drive_t *drive, byte pio);
 115 static void pmac_ide_selectproc(ide_drive_t *drive);
 116
 117 #endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
 118
 119 #ifdef CONFIG_PMAC_PBOOK
 120 static int idepmac_notify_sleep(struct pmu_sleep_notifier *self, int when);
 121 struct pmu_sleep_notifier idepmac_sleep_notifier = {
 122         idepmac_notify_sleep, SLEEP_LEVEL_BLOCK,
 123 };
 124 #endif /* CONFIG_PMAC_PBOOK */
 125
 126 static int
 127 pmac_ide_find(ide_drive_t *drive)
 128 {
 129         ide_hwif_t *hwif = HWIF(drive);
 130         ide_ioreg_t base;
 131         int i;
 132
 133         for (i=0; i<pmac_ide_count; i++) {
 134                 base = pmac_ide[i].regbase;
 135                 if (base && base == hwif->io_ports[0])
 136                         return i;
 137         }
 138         return -1;
 139 }
 140
 141 /*
 142  * N.B. this can't be an initfunc, because the media-bay task can
 143  * call ide_[un]register at any time.
 144  */
 145 void pmac_ide_init_hwif_ports(hw_regs_t *hw,
 146                               ide_ioreg_t data_port, ide_ioreg_t ctrl_port,
 147                               int *irq)
 148 {
 149         int i, ix;
 150
 151         if (data_port == 0)
 152                 return;
 153
 154         for (ix = 0; ix < MAX_HWIFS; ++ix)
 155                 if (data_port == pmac_ide[ix].regbase)
 156                         break;
 157
 158         if (ix >= MAX_HWIFS) {
 159                 /* Probably a PCI interface... */
 160                 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; ++i)
 161                         hw->io_ports[i] = data_port + i - IDE_DATA_OFFSET;
 162                 /* XXX is this right? */
 163                 hw->io_ports[IDE_CONTROL_OFFSET] = 0;
 164                 if (irq != 0)
 165                         *irq = 0;
 166                 return;
 167         }
 168
 169         for (i = 0; i < 8; ++i)
 170                 hw->io_ports[i] = data_port + i * 0x10;
 171         hw->io_ports[8] = data_port + 0x160;
 172
 173         if (irq != NULL)
 174                 *irq = pmac_ide[ix].irq;
 175
 176         ide_hwifs[ix].tuneproc = pmac_ide_tuneproc;
 177         ide_hwifs[ix].selectproc = pmac_ide_selectproc;
 178         if (pmac_ide[ix].dma_regs && pmac_ide[ix].dma_table) {
 179                 ide_hwifs[ix].dmaproc = &pmac_ide_dmaproc;
 180 #ifdef CONFIG_PMAC_IDEDMA_AUTO
 181                 ide_hwifs[ix].autodma = 1;
 182 #endif
 183 //              ide_hwifs[ix].speedproc = &pmac_ide_tune_chipset;
 184         }
 185 }
 186
 187 #if 0
 188 /* This one could be later extended to handle CMD IDE and be used by some kind
 189  * of /proc interface. I want to be able to get the devicetree path of a block
 190  * device for yaboot configuration
 191  */
 192 struct device_node*
 193 pmac_ide_get_devnode(ide_drive_t *drive)
 194 {
 195         int i = pmac_ide_find(drive);
 196         if (i < 0)
 197                 return NULL;
 198         return pmac_ide[i].node;
 199 }
 200 #endif
 201
 202 /* Setup timings for the selected drive (master/slave). I still need to verify if this
 203  * is enough, I beleive selectproc will be called whenever an IDE command is started,
 204  * but... */
 205 static void
 206 pmac_ide_selectproc(ide_drive_t *drive)
 207 {
 208         int i = pmac_ide_find(drive);
 209         if (i < 0)
 210                 return;
 211
 212         if (drive->select.all & 0x10)
 213                 out_le32((unsigned *)(IDE_DATA_REG + 0x200 + _IO_BASE), pmac_ide[i].timings[1]);
 214         else
 215                 out_le32((unsigned *)(IDE_DATA_REG + 0x200 + _IO_BASE), pmac_ide[i].timings[0]);
 216 }
 217
 218 /* Number of IDE_SYSCLK_NS ticks, argument is in nanoseconds */
 219 #define SYSCLK_TICKS(t)         (((t) + IDE_SYSCLK_NS - 1) / IDE_SYSCLK_NS)
 220 #define SYSCLK_TICKS_UDMA(t)    (((t) + IDE_SYSCLK_ULTRA_PS - 1) / IDE_SYSCLK_ULTRA_PS)
 221
 222 /* Calculate PIO timings */
 223 static void
 224 pmac_ide_tuneproc(ide_drive_t *drive, byte pio)
 225 {
 226         ide_pio_data_t d;
 227         int i;
 228         u32 *timings;
 229         int accessTicks, recTicks;
 230
 231         i = pmac_ide_find(drive);
 232         if (i < 0)
 233                 return;
 234
 235         pio = ide_get_best_pio_mode(drive, pio, 4, &d);
 236         accessTicks = SYSCLK_TICKS(ide_pio_timings[pio].active_time);
 237         if (drive->select.all & 0x10)
 238                 timings = &pmac_ide[i].timings[1];
 239         else
 240                 timings = &pmac_ide[i].timings[0];
 241
 242         if (pmac_ide[i].kind == controller_kl_ata4) {
 243                 /* The "ata-4" IDE controller of Core99 machines */
 244                 accessTicks = SYSCLK_TICKS_UDMA(ide_pio_timings[pio].active_time * 1000);
 245                 recTicks = SYSCLK_TICKS_UDMA(d.cycle_time * 1000) - accessTicks;
 246
 247                 *timings = ((*timings) & 0x1FFFFFC00) | accessTicks | (recTicks << 5);
 248         } else {
 249                 /* The old "ata-3" IDE controller */
 250                 accessTicks = SYSCLK_TICKS(ide_pio_timings[pio].active_time);
 251                 if (accessTicks < 4)
 252                         accessTicks = 4;
 253                 recTicks = SYSCLK_TICKS(d.cycle_time) - accessTicks - 4;
 254                 if (recTicks < 1)
 255                         recTicks = 1;
 256
 257                 *timings = ((*timings) & 0xFFFFFF800) | accessTicks | (recTicks << 5);
 258         }
 259
 260 #ifdef IDE_PMAC_DEBUG
 261         printk("ide_pmac: Set PIO timing for mode %d, reg: 0x%08x\n",
 262                 pio,  *timings);
 263 #endif
 264
 265         if (drive->select.all == IN_BYTE(IDE_SELECT_REG))
 266                 pmac_ide_selectproc(drive);
 267 }
 268
 269 ide_ioreg_t
 270 pmac_ide_get_base(int index)
 271 {
 272         return pmac_ide[index].regbase;
 273 }
 274
 275 static int ide_majors[] = { 3, 22, 33, 34, 56, 57 };
 276
 277 kdev_t __init
 278 pmac_find_ide_boot(char *bootdevice, int n)
 279 {
 280         int i;
 281
 282         /*
 283          * Look through the list of IDE interfaces for this one.
 284          */
 285         for (i = 0; i < pmac_ide_count; ++i) {
 286                 char *name;
 287                 if (!pmac_ide[i].node || !pmac_ide[i].node->full_name)
 288                         continue;
 289                 name = pmac_ide[i].node->full_name;
 290                 if (memcmp(name, bootdevice, n) == 0 && name[n] == 0) {
 291                         /* XXX should cope with the 2nd drive as well... */
 292                         return MKDEV(ide_majors[i], 0);
 293                 }
 294         }
 295
 296         return 0;
 297 }
 298
 299 void __init
 300 pmac_ide_probe(void)
 301 {
 302         struct device_node *np;
 303         int i;
 304         struct device_node *atas;
 305         struct device_node *p, **pp, *removables, **rp;
 306         unsigned long base;
 307         int irq, big_delay;
 308         ide_hwif_t *hwif;
 309
 310         if (_machine != _MACH_Pmac)
 311                 return;
 312         pp = &atas;
 313         rp = &removables;
 314         p = find_devices("ATA");
 315         if (p == NULL)
 316                 p = find_devices("IDE");
 317         if (p == NULL)
 318                 p = find_type_devices("ide");
 319         if (p == NULL)
 320                 p = find_type_devices("ata");
 321         /* Move removable devices such as the media-bay CDROM
 322            on the PB3400 to the end of the list. */
 323         for (; p != NULL; p = p->next) {
 324                 if (p->parent && p->parent->type
 325                     && strcasecmp(p->parent->type, "media-bay") == 0) {
 326                         *rp = p;
 327                         rp = &p->next;
 328                 } else {
 329                         *pp = p;
 330                         pp = &p->next;
 331                 }
 332         }
 333         *rp = NULL;
 334         *pp = removables;
 335         big_delay = 0;
 336
 337         for (i = 0, np = atas; i < MAX_HWIFS && np != NULL; np = np->next) {
 338                 struct device_node *tp;
 339                 int *bidp;
 340
 341                 /*
 342                  * If this node is not under a mac-io or dbdma node,
 343                  * leave it to the generic PCI driver.
 344                  */
 345                 for (tp = np->parent; tp != 0; tp = tp->parent)
 346                         if (tp->type && (strcmp(tp->type, "mac-io") == 0
 347                                          || strcmp(tp->type, "dbdma") == 0))
 348                                 break;
 349                 if (tp == 0)
 350                         continue;
 351
 352                 if (np->n_addrs == 0) {
 353                         printk(KERN_WARNING "ide: no address for device %s\n",
 354                                np->full_name);
 355                         continue;
 356                 }
 357
 358                 /*
 359                  * If this slot is taken (e.g. by ide-pci.c) try the next one.
 360                  */
 361                 while (i < MAX_HWIFS
 362                        && ide_hwifs[i].io_ports[IDE_DATA_OFFSET] != 0)
 363                         ++i;
 364                 if (i >= MAX_HWIFS)
 365                         break;
 366
 367                 base = (unsigned long) ioremap(np->addrs[0].address, 0x200) - _IO_BASE;
 368
 369                 /* XXX This is bogus. Should be fixed in the registry by checking
 370                    the kind of host interrupt controller, a bit like gatwick
 371                    fixes in irq.c
 372                  */
 373                 if (np->n_intrs == 0) {
 374                         printk("ide: no intrs for device %s, using 13\n",
 375                                np->full_name);
 376                         irq = 13;
 377                 } else {
 378                         irq = np->intrs[0].line;
 379                 }
 380                 pmac_ide[i].regbase = base;
 381                 pmac_ide[i].irq = irq;
 382                 pmac_ide[i].node = np;
 383                 if (device_is_compatible(np, "keylargo-ata")) {
 384                         if (strcmp(np->name, "ata-4") == 0)
 385                                 pmac_ide[i].kind = controller_kl_ata4;
 386                         else
 387                                 pmac_ide[i].kind = controller_kl_ata3;
 388                 } else if (device_is_compatible(np, "heathrow-ata"))
 389                         pmac_ide[i].kind = controller_heathrow;
 390                 else
 391                         pmac_ide[i].kind = controller_ohare;
 392
 393                 bidp = (int *)get_property(np, "AAPL,bus-id", NULL);
 394                 pmac_ide[i].aapl_bus_id =  bidp ? *bidp : 0;
 395
 396                 if (np->parent && np->parent->name
 397                     && strcasecmp(np->parent->name, "media-bay") == 0) {
 398                         media_bay_set_ide_infos(np->parent,base,irq,i);
 399                 } else if (pmac_ide[i].kind == controller_ohare) {
 400                         /* The code below is having trouble on some ohare machines
 401                          * (timing related ?). Until I can put my hand on one of these
 402                          * units, I keep the old way
 403                          */
 404                          feature_set(np, FEATURE_IDE0_enable);
 405                 } else {
 406                         /* This is necessary to enable IDE when net-booting */
 407                         printk("pmac_ide: enabling IDE bus ID %d\n",
 408                                 pmac_ide[i].aapl_bus_id);
 409                         switch(pmac_ide[i].aapl_bus_id) {
 410                             case 0:
 411                                 feature_set(np, FEATURE_IDE0_reset);
 412                                 mdelay(10);
 413                                 feature_set(np, FEATURE_IDE0_enable);
 414                                 mdelay(10);
 415                                 feature_clear(np, FEATURE_IDE0_reset);
 416                                 break;
 417                             case 1:
 418                                 feature_set(np, FEATURE_IDE1_reset);
 419                                 mdelay(10);
 420                                 feature_set(np, FEATURE_IDE1_enable);
 421                                 mdelay(10);
 422                                 feature_clear(np, FEATURE_IDE1_reset);
 423                                 break;
 424                             case 2:
 425                                 /* This one exists only for KL, I don't know
 426                                    about any enable bit */
 427                                 feature_set(np, FEATURE_IDE2_reset);
 428                                 mdelay(10);
 429                                 feature_clear(np, FEATURE_IDE2_reset);
 430                                 break;
 431                         }
 432                         big_delay = 1;
 433                 }
 434
 435                 hwif = &ide_hwifs[i];
 436                 pmac_ide_init_hwif_ports(&hwif->hw, base, 0, &hwif->irq);
 437                 memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports));
 438                 hwif->chipset = ide_pmac;
 439                 hwif->noprobe = (!hwif->io_ports[IDE_DATA_OFFSET]) ||
 440                         (check_media_bay_by_base(base, MB_CD) == -EINVAL);
 441
 442 #ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
 443                 if (np->n_addrs >= 2) {
 444                         /* has a DBDMA controller channel */
 445                         pmac_ide_setup_dma(np, i);
 446                 }
 447 #endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
 448
 449                 ++i;
 450         }
 451         pmac_ide_count = i;
 452         if (big_delay)
 453                 mdelay(IDE_WAKEUP_DELAY_MS);
 454
 455 #ifdef CONFIG_PMAC_PBOOK
 456         pmu_register_sleep_notifier(&idepmac_sleep_notifier);
 457 #endif /* CONFIG_PMAC_PBOOK */
 458 }
 459
 460 #ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
 461
 462 static void __init
 463 pmac_ide_setup_dma(struct device_node *np, int ix)
 464 {
 465         pmac_ide[ix].dma_regs =
 466                 (volatile struct dbdma_regs*)ioremap(np->addrs[1].address, 0x200);
 467
 468         /*
 469          * Allocate space for the DBDMA commands.
 470          * The +2 is +1 for the stop command and +1 to allow for
 471          * aligning the start address to a multiple of 16 bytes.
 472          */
 473         pmac_ide[ix].dma_table = (struct dbdma_cmd*)
 474                kmalloc((MAX_DCMDS + 2) * sizeof(struct dbdma_cmd), GFP_KERNEL);
 475         if (pmac_ide[ix].dma_table == 0) {
 476                 printk(KERN_ERR "%s: unable to allocate DMA command list\n",
 477                        ide_hwifs[ix].name);
 478                 return;
 479         }
 480
 481         ide_hwifs[ix].dmaproc = &pmac_ide_dmaproc;
 482 #ifdef CONFIG_PMAC_IDEDMA_AUTO
 483         ide_hwifs[ix].autodma = 1;
 484 #endif
 485 }
 486
 487 /*
 488  * pmac_ide_build_dmatable builds the DBDMA command list
 489  * for a transfer and sets the DBDMA channel to point to it.
 490  */
 491 static int
 492 pmac_ide_build_dmatable(ide_drive_t *drive, int ix, int wr)
 493 {
 494         struct dbdma_cmd *table, *tstart;
 495         int count = 0;
 496         struct request *rq = HWGROUP(drive)->rq;
 497         struct buffer_head *bh = rq->bh;
 498         unsigned int size, addr;
 499         volatile struct dbdma_regs *dma = pmac_ide[ix].dma_regs;
 500
 501         table = tstart = (struct dbdma_cmd *) DBDMA_ALIGN(pmac_ide[ix].dma_table);
 502         out_le32(&dma->control, (RUN|PAUSE|FLUSH|WAKE|DEAD) << 16);
 503         while (in_le32(&dma->status) & RUN)
 504                 udelay(1);
 505
 506         do {
 507                 /*
 508                  * Determine addr and size of next buffer area.  We assume that
 509                  * individual virtual buffers are always composed linearly in
 510                  * physical memory.  For example, we assume that any 8kB buffer
 511                  * is always composed of two adjacent physical 4kB pages rather
 512                  * than two possibly non-adjacent physical 4kB pages.
 513                  */
 514                 if (bh == NULL) {  /* paging requests have (rq->bh == NULL) */
 515                         addr = virt_to_bus(rq->buffer);
 516                         size = rq->nr_sectors << 9;
 517                 } else {
 518                         /* group sequential buffers into one large buffer */
 519                         addr = virt_to_bus(bh->b_data);
 520                         size = bh->b_size;
 521                         while ((bh = bh->b_reqnext) != NULL) {
 522                                 if ((addr + size) != virt_to_bus(bh->b_data))
 523                                         break;
 524                                 size += bh->b_size;
 525                         }
 526                 }
 527
 528                 /*
 529                  * Fill in the next DBDMA command block.
 530                  * Note that one DBDMA command can transfer
 531                  * at most 65535 bytes.
 532                  */
 533                 while (size) {
 534                         unsigned int tc = (size < 0xfe00)? size: 0xfe00;
 535
 536                         if (++count >= MAX_DCMDS) {
 537                                 printk("%s: DMA table too small\n",
 538                                        drive->name);
 539                                 return 0; /* revert to PIO for this request */
 540                         }
 541                         st_le16(&table->command, wr? OUTPUT_MORE: INPUT_MORE);
 542                         st_le16(&table->req_count, tc);
 543                         st_le32(&table->phy_addr, addr);
 544                         table->cmd_dep = 0;
 545                         table->xfer_status = 0;
 546                         table->res_count = 0;
 547                         addr += tc;
 548                         size -= tc;
 549                         ++table;
 550                 }
 551         } while (bh != NULL);
 552
 553         /* convert the last command to an input/output last command */
 554         if (count)
 555                 st_le16(&table[-1].command, wr? OUTPUT_LAST: INPUT_LAST);
 556         else
 557                 printk(KERN_DEBUG "%s: empty DMA table?\n", drive->name);
 558
 559         /* add the stop command to the end of the list */
 560         memset(table, 0, sizeof(struct dbdma_cmd));
 561         out_le16(&table->command, DBDMA_STOP);
 562
 563         out_le32(&dma->cmdptr, virt_to_bus(tstart));
 564         return 1;
 565 }
 566
 567
 568 /* This is fun.  -DaveM */
 569 #define IDE_SETXFER             0x03
 570 #define IDE_SETFEATURE          0xef
 571 #define IDE_DMA2_ENABLE         0x22
 572 #define IDE_DMA1_ENABLE         0x21
 573 #define IDE_DMA0_ENABLE         0x20
 574 #define IDE_UDMA4_ENABLE        0x44
 575 #define IDE_UDMA3_ENABLE        0x43
 576 #define IDE_UDMA2_ENABLE        0x42
 577 #define IDE_UDMA1_ENABLE        0x41
 578 #define IDE_UDMA0_ENABLE        0x40
 579
 580 static __inline__ unsigned char
 581 dma_bits_to_command(unsigned char bits)
 582 {
 583         if(bits & 0x04)
 584                 return IDE_DMA2_ENABLE;
 585         if(bits & 0x02)
 586                 return IDE_DMA1_ENABLE;
 587         return IDE_DMA0_ENABLE;
 588 }
 589
 590 static __inline__ unsigned char
 591 udma_bits_to_command(unsigned char bits)
 592 {
 593         if(bits & 0x10)
 594                 return IDE_UDMA4_ENABLE;
 595         if(bits & 0x08)
 596                 return IDE_UDMA3_ENABLE;
 597         if(bits & 0x04)
 598                 return IDE_UDMA2_ENABLE;
 599         if(bits & 0x02)
 600                 return IDE_UDMA1_ENABLE;
 601         if(bits & 0x01)
 602                 return IDE_UDMA0_ENABLE;
 603         return 0;
 604 }
 605
 606 static __inline__ int
 607 wait_for_ready(ide_drive_t *drive)
 608 {
 609         /* Timeout bumped for some powerbooks */
 610         int timeout = 2000;
 611         byte stat;
 612
 613         while(--timeout) {
 614                 stat = GET_STAT();
 615                 if(!(stat & BUSY_STAT)) {
 616                         if (drive->ready_stat == 0)
 617                                 break;
 618                         else if((stat & drive->ready_stat) || (stat & ERR_STAT))
 619                                 break;
 620                 }
 621                 mdelay(1);
 622         }
 623         if((stat & ERR_STAT) || timeout <= 0) {
 624                 if (stat & ERR_STAT) {
 625                         printk("ide_pmace: wait_for_ready, error status: %x\n", stat);
 626                 }
 627                 return 1;
 628         }
 629         return 0;
 630 }
 631
 632 static int
 633 pmac_ide_do_setfeature(ide_drive_t *drive, byte command)
 634 {
 635         unsigned long flags;
 636         byte old_select;
 637         int result = 1;
 638
 639         save_flags(flags);
 640         cli();
 641         old_select = IN_BYTE(IDE_SELECT_REG);
 642         OUT_BYTE(drive->select.all, IDE_SELECT_REG);
 643         udelay(10);
 644         OUT_BYTE(IDE_SETXFER, IDE_FEATURE_REG);
 645         OUT_BYTE(command, IDE_NSECTOR_REG);
 646         if(wait_for_ready(drive)) {
 647                 printk("pmac_ide_do_setfeature disk not ready before SET_FEATURE!\n");
 648                 goto out;
 649         }
 650         OUT_BYTE(IDE_SETFEATURE, IDE_COMMAND_REG);
 651         result = wait_for_ready(drive);
 652         if (result)
 653                 printk("pmac_ide_do_setfeature disk not ready after SET_FEATURE !\n");
 654 out:
 655         OUT_BYTE(old_select, IDE_SELECT_REG);
 656         restore_flags(flags);
 657
 658         return result;
 659 }
 660
 661 /* Calculate MultiWord DMA timings */
 662 static int
 663 pmac_ide_mdma_enable(ide_drive_t *drive, int idx)
 664 {
 665         byte bits = drive->id->dma_mword & 0x07;
 666         byte feature = dma_bits_to_command(bits);
 667         u32 *timings;
 668         int cycleTime, accessTime;
 669         int accessTicks, recTicks;
 670         struct hd_driveid *id = drive->id;
 671
 672         /* Set feature on drive */
 673         printk("%s: Enabling MultiWord DMA %d\n", drive->name, feature & 0xf);
 674         if (pmac_ide_do_setfeature(drive, feature)) {
 675                 printk("%s: Failed !\n", drive->name);
 676                 return 0;
 677         }
 678
 679         if (!drive->init_speed)
 680                 drive->init_speed = feature;
 681
 682         /* which drive is it ? */
 683         if (drive->select.all & 0x10)
 684                 timings = &pmac_ide[idx].timings[1];
 685         else
 686                 timings = &pmac_ide[idx].timings[0];
 687
 688         /* Calculate accesstime and cycle time */
 689         cycleTime = mdma_timings[feature & 0xf].cycleTime;
 690         accessTime = mdma_timings[feature & 0xf].accessTime;
 691         if ((id->field_valid & 2) && (id->eide_dma_time))
 692                 cycleTime = id->eide_dma_time;
 693         if ((pmac_ide[idx].kind == controller_ohare) && (cycleTime < 150))
 694                 cycleTime = 150;
 695
 696         /* For ata-4 controller, we don't know the calculation */
 697         if (pmac_ide[idx].kind == controller_kl_ata4) {
 698                 accessTicks = SYSCLK_TICKS_UDMA(accessTime * 1000);
 699                 recTicks = SYSCLK_TICKS_UDMA(cycleTime * 1000) - accessTicks;
 700                 *timings = ((*timings) & 0xffe003ff) |
 701                         (accessTicks | (recTicks << 5)) << 10;
 702         } else {
 703                 int halfTick = 0;
 704                 int origAccessTime = accessTime;
 705                 int origCycleTime = cycleTime;
 706
 707                 accessTicks = SYSCLK_TICKS(accessTime);
 708                 if (accessTicks < 1)
 709                         accessTicks = 1;
 710                 accessTime = accessTicks * IDE_SYSCLK_NS;
 711                 recTicks = SYSCLK_TICKS(cycleTime - accessTime) - 1;
 712                 if (recTicks < 1)
 713                         recTicks = 1;
 714                 cycleTime = (recTicks + 1 + accessTicks) * IDE_SYSCLK_NS;
 715
 716                 /* KeyLargo ata-3 don't support the half-tick stuff */
 717                 if ((pmac_ide[idx].kind != controller_kl_ata3) &&
 718                         (accessTicks > 1) &&
 719                         ((accessTime - IDE_SYSCLK_NS/2) >= origAccessTime) &&
 720                         ((cycleTime - IDE_SYSCLK_NS) >= origCycleTime)) {
 721                                 halfTick    = 1;
 722                                 accessTicks--;
 723                 }
 724                 *timings = ((*timings) & 0x7FF) |
 725                         (accessTicks | (recTicks << 5) | (halfTick << 10)) << 11;
 726         }
 727 #ifdef IDE_PMAC_DEBUG
 728         printk("ide_pmac: Set MDMA timing for mode %d, reg: 0x%08x\n",
 729                 feature & 0xf, *timings);
 730 #endif
 731         drive->current_speed = feature;
 732         return 1;
 733 }
 734
 735 /* Calculate Ultra DMA timings */
 736 static int
 737 pmac_ide_udma_enable(ide_drive_t *drive, int idx)
 738 {
 739         byte bits = drive->id->dma_ultra & 0x1f;
 740         byte feature = udma_bits_to_command(bits);
 741         int cycleTime, accessTime;
 742         int rdyToPauseTicks, cycleTicks;
 743         u32 *timings;
 744
 745         /* Set feature on drive */
 746         printk("%s: Enabling Ultra DMA %d\n", drive->name, feature & 0xf);
 747         if (pmac_ide_do_setfeature(drive, feature)) {
 748                 printk("%s: Failed !\n", drive->name);
 749                 return 0;
 750         }
 751
 752         if (!drive->init_speed)
 753                 drive->init_speed = feature;
 754
 755         /* which drive is it ? */
 756         if (drive->select.all & 0x10)
 757                 timings = &pmac_ide[idx].timings[1];
 758         else
 759                 timings = &pmac_ide[idx].timings[0];
 760
 761         cycleTime = udma_timings[feature & 0xf].cycleTime;
 762         accessTime = udma_timings[feature & 0xf].accessTime;
 763
 764         rdyToPauseTicks = SYSCLK_TICKS_UDMA(accessTime * 1000);
 765         cycleTicks = SYSCLK_TICKS_UDMA(cycleTime * 1000);
 766
 767         *timings = ((*timings) & 0xe00fffff) |
 768                         ((cycleTicks << 1) | (rdyToPauseTicks << 5) | 1) << 20;
 769
 770         drive->current_speed = feature;
 771         return 1;
 772 }
 773
 774 static int
 775 pmac_ide_dma_onoff(ide_drive_t *drive, int enable)
 776 {
 777         int ata4, udma, idx;
 778         struct hd_driveid *id = drive->id;
 779
 780         drive->using_dma = 0;
 781
 782         idx = pmac_ide_find(drive);
 783         if (idx < 0)
 784                 return 0;
 785
 786         if (drive->media == ide_floppy)
 787                 enable = 0;
 788         if (((id->capability & 1) == 0) && !check_drive_lists(drive, GOOD_DMA_DRIVE))
 789                 enable = 0;
 790         if (check_drive_lists(drive, BAD_DMA_DRIVE))
 791                 enable = 0;
 792
 793         udma = 0;
 794         ata4 = (pmac_ide[idx].kind == controller_kl_ata4);
 795
 796         if(enable) {
 797                 if (ata4 && (drive->media == ide_disk) &&
 798                     (id->field_valid & 0x0004) && (id->dma_ultra & 0x17)) {
 799                         /* UltraDMA modes. */
 800                         drive->using_dma = pmac_ide_udma_enable(drive, idx);
 801                 }
 802                 if (!drive->using_dma && (id->dma_mword & 0x0007)) {
 803                         /* Normal MultiWord DMA modes. */
 804                         drive->using_dma = pmac_ide_mdma_enable(drive, idx);
 805                 }
 806                 /* Without this, strange things will happen on Keylargo-based
 807                  * machines
 808                  */
 809                 OUT_BYTE(0, IDE_CONTROL_REG);
 810                 if (drive->select.all == IN_BYTE(IDE_SELECT_REG))
 811                         pmac_ide_selectproc(drive);
 812         }
 813         return 0;
 814 }
 815
 816 static int
 817 pmac_ide_tune_chipset(ide_drive_t *drive, byte speed)
 818 {
 819         return 0;
 820 }
 821
 822 int pmac_ide_dmaproc(ide_dma_action_t func, ide_drive_t *drive)
 823 {
 824         ide_hwif_t *hwif = HWIF(drive);
 825         int ix, dstat;
 826         volatile struct dbdma_regs *dma;
 827
 828         /* Can we stuff a pointer to our intf structure in config_data
 829          * or select_data in hwif ?
 830          */
 831         ix = pmac_ide_find(drive);
 832         if (ix < 0)
 833                 return 0;
 834         dma = pmac_ide[ix].dma_regs;
 835
 836         switch (func) {
 837         case ide_dma_on:
 838         case ide_dma_off:
 839         case ide_dma_off_quietly:
 840                 pmac_ide_dma_onoff(drive, (func == ide_dma_on));
 841                 break;
 842         case ide_dma_check:
 843                 printk("IDE-DMA check !\n");
 844                 if (hwif->autodma)
 845                         pmac_ide_dma_onoff(drive, 1);
 846                 break;
 847         case ide_dma_read:
 848         case ide_dma_write:
 849                 if (!pmac_ide_build_dmatable(drive, ix, func==ide_dma_write))
 850                         return 1;
 851                 drive->waiting_for_dma = 1;
 852                 if (drive->media != ide_disk)
 853                         return 0;
 854                 ide_set_handler(drive, &ide_dma_intr, WAIT_CMD, NULL);
 855                 OUT_BYTE(func==ide_dma_write? WIN_WRITEDMA: WIN_READDMA,
 856                          IDE_COMMAND_REG);
 857         case ide_dma_begin:
 858                 out_le32(&dma->control, (RUN << 16) | RUN);
 859                 break;
 860         case ide_dma_end:
 861                 drive->waiting_for_dma = 0;
 862                 dstat = in_le32(&dma->status);
 863                 out_le32(&dma->control, ((RUN|WAKE|DEAD) << 16));
 864                 /* verify good dma status */
 865                 return (dstat & (RUN|DEAD|ACTIVE)) != RUN;
 866         case ide_dma_test_irq:
 867                 return (in_le32(&dma->status) & (RUN|ACTIVE)) == RUN;
 868
 869                 /* Let's implement tose just in case someone wants them */
 870         case ide_dma_bad_drive:
 871         case ide_dma_good_drive:
 872                 return check_drive_lists(drive, (func == ide_dma_good_drive));
 873         case ide_dma_verbose:
 874                 return report_drive_dmaing(drive);
 875         case ide_dma_retune:
 876         case ide_dma_lostirq:
 877         case ide_dma_timeout:
 878                 printk("ide_pmac_dmaproc: chipset supported %s func only: %d\n", ide_dmafunc_verbose(func),  func);
 879                 return 1;
 880         default:
 881                 printk("ide_pmac_dmaproc: unsupported %s func: %d\n", ide_dmafunc_verbose(func), func);
 882                 return 1;
 883         }
 884         return 0;
 885 }
 886 #endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
 887
 888 #ifdef CONFIG_PMAC_PBOOK
 889 static void idepmac_sleep_disk(int i, unsigned long base)
 890 {
 891         struct device_node* np = pmac_ide[i].node;
 892         int j;
 893
 894         /* FIXME: We only handle the master IDE */
 895         if (ide_hwifs[i].drives[0].media == ide_disk) {
 896                 /* Spin down the drive */
 897                 outb(0xa0, base+0x60);
 898                 outb(0x0, base+0x30);
 899                 outb(0x0, base+0x20);
 900                 outb(0x0, base+0x40);
 901                 outb(0x0, base+0x50);
 902                 outb(0xe0, base+0x70);
 903                 outb(0x2, base+0x160);
 904                 for (j = 0; j < 10; j++) {
 905                         int status;
 906                         mdelay(100);
 907                         status = inb(base+0x70);
 908                         if (!(status & BUSY_STAT) && (status & DRQ_STAT))
 909                                 break;
 910                 }
 911         }
 912         feature_set(np, FEATURE_IDE0_reset);
 913         feature_clear(np, FEATURE_IDE0_enable);
 914         switch(pmac_ide[i].aapl_bus_id) {
 915             case 0:
 916                 feature_set(np, FEATURE_IDE0_reset);
 917                 feature_clear(np, FEATURE_IDE0_enable);
 918                 break;
 919             case 1:
 920                 feature_set(np, FEATURE_IDE1_reset);
 921                 feature_clear(np, FEATURE_IDE1_enable);
 922                 break;
 923             case 2:
 924                 feature_set(np, FEATURE_IDE2_reset);
 925                 break;
 926         }
 927         pmac_ide[i].timings[0] = 0;
 928         pmac_ide[i].timings[1] = 0;
 929 }
 930
 931 static void idepmac_wake_disk(int i, unsigned long base)
 932 {
 933         struct device_node* np = pmac_ide[i].node;
 934         int j;
 935
 936         /* Revive IDE disk and controller */
 937         switch(pmac_ide[i].aapl_bus_id) {
 938             case 0:
 939                 feature_set(np, FEATURE_IDE0_reset);
 940                 mdelay(10);
 941                 feature_set(np, FEATURE_IDE0_enable);
 942                 mdelay(10);
 943                 feature_clear(np, FEATURE_IDE0_reset);
 944                 break;
 945             case 1:
 946                 feature_set(np, FEATURE_IDE1_reset);
 947                 mdelay(10);
 948                 feature_set(np, FEATURE_IDE1_enable);
 949                 mdelay(10);
 950                 feature_clear(np, FEATURE_IDE1_reset);
 951                 break;
 952             case 2:
 953                 /* This one exists only for KL, I don't know
 954                    about any enable bit */
 955                 feature_set(np, FEATURE_IDE2_reset);
 956                 mdelay(10);
 957                 feature_clear(np, FEATURE_IDE2_reset);
 958                 break;
 959         }
 960         mdelay(IDE_WAKEUP_DELAY_MS);
 961
 962         /* Reset timings */
 963         pmac_ide_selectproc(&ide_hwifs[i].drives[0]);
 964         mdelay(10);
 965
 966         /* Wait up to 10 seconds (enough for recent drives) */
 967         for (j = 0; j < 100; j++) {
 968                 int status;
 969                 mdelay(100);
 970                 status = inb(base + 0x70);
 971                 if (!(status & BUSY_STAT))
 972                         break;
 973         }
 974 }
 975
 976 /* Here we handle media bay devices */
 977 static void
 978 idepmac_wake_bay(int i, unsigned long base)
 979 {
 980         int timeout;
 981
 982         /* Reset timings */
 983         pmac_ide_selectproc(&ide_hwifs[i].drives[0]);
 984         mdelay(10);
 985
 986         timeout = 10000;
 987         while ((inb(base + 0x70) & BUSY_STAT) && timeout) {
 988                 mdelay(1);
 989                 --timeout;
 990         }
 991 }
 992
 993 /* Note: We support only master drives for now. This will have to be
 994  * improved if we want to handle sleep on the iMacDV where the CD-ROM
 995  * is a slave
 996  */
 997 static int idepmac_notify_sleep(struct pmu_sleep_notifier *self, int when)
 998 {
 999         int i, ret;
1000         unsigned long base;
1001
1002         switch (when) {
1003         case PBOOK_SLEEP_REQUEST:
1004                 break;
1005         case PBOOK_SLEEP_REJECT:
1006                 break;
1007         case PBOOK_SLEEP_NOW:
1008                 for (i = 0; i < pmac_ide_count; ++i) {
1009                         if ((base = pmac_ide[i].regbase) == 0)
1010                                 continue;
1011                         /* Disable irq during sleep */
1012                         disable_irq(pmac_ide[i].irq);
1013                         ret = check_media_bay_by_base(base, MB_CD);
1014                         if ((ret == -ENODEV) && ide_hwifs[i].drives[0].present)
1015                                 /* not media bay - put the disk to sleep */
1016                                 idepmac_sleep_disk(i, base);
1017                 }
1018                 break;
1019         case PBOOK_WAKE:
1020                 for (i = 0; i < pmac_ide_count; ++i) {
1021                         ide_hwif_t *hwif;
1022                         if ((base = pmac_ide[i].regbase) == 0)
1023                                 continue;
1024                         hwif = &ide_hwifs[i];
1025                         /* We don't handle media bay devices this way */
1026                         ret = check_media_bay_by_base(base, MB_CD);
1027                         if ((ret == -ENODEV) && ide_hwifs[i].drives[0].present)
1028                                 idepmac_wake_disk(i, base);
1029                         else if (ret == 0)
1030                                 idepmac_wake_bay(i, base);
1031                         enable_irq(pmac_ide[i].irq);
1032
1033 #ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
1034                         if (hwif->drives[0].present && hwif->drives[0].using_dma)
1035                                 pmac_ide_dma_onoff(&hwif->drives[0], 1);
1036 #endif
1037                 }
1038                 break;
1039         }
1040         return PBOOK_SLEEP_OK;
1041 }
1042 #endif /* CONFIG_PMAC_PBOOK */