Merge with Linux 2.5.74.
[linux-2.6/linux-mips.git] / include / asm-s390 / hardirq.h
blob997bb41703d77550368328741dbbbf6aa4996a5c
1 /*
2 * include/asm-s390/hardirq.h
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
9 * Derived from "include/asm-i386/hardirq.h"
12 #ifndef __ASM_HARDIRQ_H
13 #define __ASM_HARDIRQ_H
15 #include <linux/config.h>
16 #include <linux/threads.h>
17 #include <linux/sched.h>
18 #include <linux/cache.h>
19 #include <asm/lowcore.h>
21 /* entry.S is sensitive to the offsets of these fields */
22 typedef struct {
23 unsigned int __softirq_pending;
24 unsigned int __syscall_count;
25 struct task_struct * __ksoftirqd_task; /* waitqueue is too large */
26 } ____cacheline_aligned irq_cpustat_t;
28 #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
31 * We put the hardirq and softirq counter into the preemption
32 * counter. The bitmask has the following meaning:
34 * - bits 0-7 are the preemption count (max preemption depth: 256)
35 * - bits 8-15 are the softirq count (max # of softirqs: 256)
36 * - bits 16-23 are the hardirq count (max # of hardirqs: 256)
38 * - ( bit 26 is the PREEMPT_ACTIVE flag. )
40 * PREEMPT_MASK: 0x000000ff
41 * SOFTIRQ_MASK: 0x0000ff00
42 * HARDIRQ_MASK: 0x00010000
45 #define PREEMPT_BITS 8
46 #define SOFTIRQ_BITS 8
47 #define HARDIRQ_BITS 1
49 #define PREEMPT_SHIFT 0
50 #define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS)
51 #define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS)
53 #define __MASK(x) ((1UL << (x))-1)
55 #define PREEMPT_MASK (__MASK(PREEMPT_BITS) << PREEMPT_SHIFT)
56 #define SOFTIRQ_MASK (__MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT)
57 #define HARDIRQ_MASK (__MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)
59 #define hardirq_count() (preempt_count() & HARDIRQ_MASK)
60 #define softirq_count() (preempt_count() & SOFTIRQ_MASK)
61 #define irq_count() (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK))
63 #define PREEMPT_OFFSET (1UL << PREEMPT_SHIFT)
64 #define SOFTIRQ_OFFSET (1UL << SOFTIRQ_SHIFT)
65 #define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT)
68 * Are we doing bottom half or hardware interrupt processing?
69 * Are we in a softirq context? Interrupt context?
71 #define in_irq() (hardirq_count())
72 #define in_softirq() (softirq_count())
73 #define in_interrupt() (irq_count())
76 #define hardirq_trylock() (!in_interrupt())
77 #define hardirq_endlock() do { } while (0)
79 #define irq_enter() (preempt_count() += HARDIRQ_OFFSET)
81 extern void do_call_softirq(void);
83 #define invoke_softirq() do_call_softirq()
85 #ifdef CONFIG_PREEMPT
86 # define in_atomic() ((preempt_count() & ~PREEMPT_ACTIVE) != kernel_locked())
87 # define IRQ_EXIT_OFFSET (HARDIRQ_OFFSET-1)
88 #else
89 # define in_atomic() (preempt_count() != 0)
90 # define IRQ_EXIT_OFFSET HARDIRQ_OFFSET
91 #endif
93 #define irq_exit() \
94 do { \
95 preempt_count() -= IRQ_EXIT_OFFSET; \
96 if (!in_interrupt() && softirq_pending(smp_processor_id())) \
97 /* Use the async. stack for softirq */ \
98 do_call_softirq(); \
99 preempt_enable_no_resched(); \
100 } while (0)
102 #ifndef CONFIG_SMP
103 # define synchronize_irq(irq) barrier()
104 #else
105 extern void synchronize_irq(unsigned int irq);
106 #endif /* CONFIG_SMP */
108 #endif /* __ASM_HARDIRQ_H */