2 * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
3 * Copyright (C) 2001, 2002
4 * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
5 * GOTO Masanori <gotom@debian.or.jp>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <linux/version.h>
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/kernel.h>
22 #include <linux/sched.h>
23 #include <linux/slab.h>
24 #include <linux/string.h>
25 #include <linux/timer.h>
26 #include <linux/ioport.h>
27 #include <linux/major.h>
28 #include <linux/blk.h>
29 #include <linux/interrupt.h>
30 #include <linux/pci.h>
31 #include <linux/delay.h>
32 #include <linux/ctype.h>
35 #include <asm/system.h>
40 #include <scsi/scsi_ioctl.h>
41 #include <scsi/scsi.h>
46 static int trans_mode
= 0; /* default: BIOS */
47 static int auto_param
= 0; /* default: ON */
48 MODULE_PARM(trans_mode
, "i");
49 MODULE_PARM(auto_param
, "i");
50 MODULE_PARM_DESC(trans_mode
, "transfer mode (0: BIOS 1: Async 2: Ultra20M");
51 MODULE_PARM_DESC(auto_param
, "AutoParameter mode (0: ON 1: OFF)");
53 #define ULTRA20M_MODE 2
55 MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
56 MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE PCI/CardBus SCSI host bus adapter module");
57 MODULE_LICENSE("GPL");
59 static const char *nsp32_release_version
= "1.0";
63 * structure for DMA/Scatter Gather list
65 #define AUTOPARAM_SIZE (sizeof(int)*0x15) /* 4x15H = 0x60 */
66 #define NSP_SG_SIZE SG_ALL
67 #define NSP32_SG_END_SGT 0x80000000 /* Last SGT marker */
68 #define NSP32_SG_CNT_MASK 0x1FFFF
70 struct nsp32_sgtable
{
71 unsigned long addr
; /* transfer address */
72 unsigned long len
; /* transfer length.
73 Bit (24-32) is for SGT_END */
77 struct nsp32_sgtable sgt
[NSP_SG_SIZE
+1]; /* SG table */
84 /* message in/out buffer */
85 #define MSGOUTBUF_MAX 13 /* 13 is ok ? */
86 #define MSGINBUF_MAX 13
88 /* flag for trans_method */
89 #define NSP32_TRANSFER_BUSMASTER BIT(0)
90 #define NSP32_TRANSFER_MMIO BIT(1) /* Not supported yet */
91 #define NSP32_TRANSFER_PIO BIT(2) /* Not supported yet */
95 * SCSI TARGET/LUN definition
97 #define NSP32_HOST_SCSIID 7 /* SCSI initiator is everytime defined as 7 */
99 #define MAX_LUN 8 /* XXX: In SPI3, max number of LUN is 64. */
103 * structure for synchronous transfer negotiation data
105 #define SYNC_NOT_YET 0
109 struct nsp32_sync_table
{
110 unsigned char period_num
; /* period number */
111 unsigned char ackwidth
; /* ack width designated by period */
112 unsigned char start_period
; /* search range - start period */
113 unsigned char end_period
; /* search range - end period */
118 * structure for target device static data
120 /* flag for nsp32_target.sync_flag */
121 #define SDTR_INITIATOR BIT(0) /* sending SDTR from initiator */
122 #define SDTR_TARGET BIT(1) /* sending SDTR from target */
123 #define SDTR_DONE BIT(2) /* exchanging SDTR has been processed */
125 /* syncronous period value for nsp32_target.config_max */
128 #define ULTRA20M 0x0c
130 /* flag for nsp32_target.{sync_offset}, period */
131 #define ASYNC_OFFSET 0 /* asynchronous transfer */
132 #define SYNC_OFFSET 0xf /* synchronous transfer max offset */
135 07 06 05 04 03 02 01 00
136 ---PERIOD-- ---OFFSET-- */
137 #define TO_SYNCREG(period, offset) (period << 4 | offset)
139 struct nsp32_target
{
140 unsigned char syncreg
; /* value for SYNCREG */
141 unsigned char ackwidth
; /* value for ACKWIDTH */
142 unsigned char offset
; /* sync offset (0-15) */
143 int sync_flag
; /* SDTR_*, 0 */
144 int limit_entry
; /* max speed limit entry designated
145 by EEPROM configuration */
148 typedef struct _nsp32_hw_data
{
152 #define NSP32_MMIO_OFFSET 0x0800
153 unsigned long MmioAddress
;
154 unsigned long length
;
156 Scsi_Cmnd
*CurrentSC
;
159 const struct pci_device_id
*pci_devid
;
160 struct Scsi_Host
*Host
;
165 /* allocated memory region */
166 struct nsp32_lunt
*lunt_list
; /* kmalloc region for lunt */
167 struct nsp32_sglun
*sg_list
; /* sglist virtual address */
168 dma_addr_t sgaddr
; /* physical address of hw_sg_table */
169 unsigned char *autoparam
; /* auto parameter transfer region */
170 dma_addr_t apaddr
; /* physical address of autoparam */
171 int cur_entry
; /* current sgt entry */
174 struct nsp32_lunt
*curlunt
; /* Current connected LUN table */
175 struct nsp32_lunt
*lunt
[MAX_TARGET
][MAX_LUN
]; /* All LUN table */
176 struct nsp32_target
*curtarget
; /* Current connected SCSI ID */
177 struct nsp32_target target
[MAX_TARGET
]; /* SCSI ID */
178 int pid
; /* Current connected target ID */
179 int plun
; /* Current connected target LUN */
181 /* behavior setting parameters */
182 int trans_method
; /* transfer method flag */
183 int resettime
; /* Reset time */
184 int clock
; /* clock dividing flag */
185 struct nsp32_sync_table
*synct
; /* sync_table determined by clock */
186 int syncnum
; /* the max number of synct element */
189 unsigned char msgoutbuf
[MSGOUTBUF_MAX
]; /* msgout buffer */
190 char msgoutlen
; /* msgoutbuf length */
191 unsigned char msginbuf
[MSGINBUF_MAX
]; /* megin buffer */
192 char msginlen
; /* msginbuf length */
196 static nsp32_hw_data nsp32_data_base
; /* probe <-> detect glue */
202 #define RESET_HOLD_TIME 10000 /* reset time in us (SCSI-2 says the
204 #define SEL_TIMEOUT_TIME 10000 /* 250ms defined in SCSI specification
206 #define ARBIT_TIMEOUT_TIME 100 /* 100us */
207 #define REQSACK_TIMEOUT_TIME 10000 /* max wait time for REQ/SACK assertion
208 or negation, 10000us == 10ms */
211 * structure for connected LUN dynamic data
213 * Note: Currently tagged queuing is disabled, each nsp32_lunt holds
214 * one SCSI command and one state.
216 #define DISCPRIV_OK BIT(0) /* DISCPRIV Enable mode */
217 #define MSGIN03 BIT(1) /* Auto Msg In 03 Flag */
220 Scsi_Cmnd
*SCpnt
; /* Current Handling Scsi_Cmnd */
221 unsigned long save_datp
; /* Save Data Pointer - saved position from initial address */
222 int msgin03
; /* auto msg in 03 flag */
223 unsigned int sg_num
; /* Total number of SG entries */
224 int cur_entry
; /* Current SG entry number */
225 struct nsp32_sglun
*sglun
; /* sg table per lun */
226 long sglun_paddr
; /* sglun physical address */
231 * Period/AckWidth speed conversion table
233 * Note: This period/ackwidth speed table must be in descending order.
235 static struct nsp32_sync_table nsp32_sync_table_40M
[] = {
236 /* {PNo, AW, SP, EP} Speed(MB/s) Period AckWidth */
237 {0x1, 0, 0x0c, 0x0c}, /* 20.0 : 50ns, 25ns */
238 {0x2, 0, 0x0d, 0x18}, /* 13.3 : 75ns, 25ns */
239 {0x3, 1, 0x19, 0x19}, /* 10.0 : 100ns, 50ns */
240 {0x4, 1, 0x1a, 0x1f}, /* 8.0 : 125ns, 50ns */
241 {0x5, 2, 0x20, 0x25}, /* 6.7 : 150ns, 75ns */
242 {0x6, 2, 0x26, 0x31}, /* 5.7 : 175ns, 75ns */
243 {0x7, 3, 0x32, 0x32}, /* 5.0 : 200ns, 100ns */
244 {0x8, 3, 0x33, 0x38}, /* 4.4 : 225ns, 100ns */
245 {0x9, 3, 0x39, 0x3e}, /* 4.0 : 250ns, 100ns */
247 static const int nsp32_table_40M_num
=
248 sizeof(nsp32_sync_table_40M
)/sizeof(struct nsp32_sync_table
);
250 static struct nsp32_sync_table nsp32_sync_table_20M
[] = {
251 {0x1, 0, 0x19, 0x19}, /* 10.0 : 100ns, 50ns */
252 {0x2, 0, 0x1a, 0x25}, /* 6.7 : 150ns, 50ns */
253 {0x3, 1, 0x26, 0x32}, /* 5.0 : 200ns, 100ns */
254 {0x4, 1, 0x33, 0x3e}, /* 4.0 : 250ns, 100ns */
255 {0x5, 2, 0x3f, 0x4b}, /* 3.3 : 300ns, 150ns */
256 {0x6, 2, 0x4c, 0x57}, /* 2.8 : 350ns, 150ns */
257 {0x7, 3, 0x58, 0x64}, /* 2.5 : 400ns, 200ns */
258 {0x8, 3, 0x65, 0x70}, /* 2.2 : 450ns, 200ns */
259 {0x9, 3, 0x71, 0x7d}, /* 2.0 : 500ns, 200ns */
261 static const int nsp32_table_20M_num
=
262 sizeof(nsp32_sync_table_20M
)/sizeof(struct nsp32_sync_table
);
264 static struct nsp32_sync_table nsp32_sync_table_pci
[] = {
265 {0x1, 0, 0x0c, 0x0f}, /* 16.6 : 60ns, 30ns */
266 {0x2, 0, 0x10, 0x16}, /* 11.1 : 90ns, 30ns */
267 {0x3, 1, 0x17, 0x1e}, /* 8.3 : 120ns, 60ns */
268 {0x4, 1, 0x1f, 0x25}, /* 6.7 : 150ns, 60ns */
269 {0x5, 2, 0x26, 0x2d}, /* 5.6 : 180ns, 90ns */
270 {0x6, 2, 0x2e, 0x34}, /* 4.8 : 210ns, 90ns */
271 {0x7, 3, 0x35, 0x3c}, /* 4.2 : 240ns, 120ns */
272 {0x8, 3, 0x3d, 0x43}, /* 3.7 : 270ns, 120ns */
273 {0x9, 3, 0x44, 0x4b}, /* 3.3 : 300ns, 120ns */
275 static const int nsp32_table_pci_num
=
276 sizeof(nsp32_sync_table_pci
)/sizeof(struct nsp32_sync_table
);
279 * function declaration
281 static int nsp32_queuecommand(Scsi_Cmnd
*, void (*done
)(Scsi_Cmnd
*));
282 static const char *nsp32_info(struct Scsi_Host
*);
283 static int nsp32_eh_abort(Scsi_Cmnd
*);
284 static int nsp32_eh_bus_reset(Scsi_Cmnd
*);
285 static int nsp32_eh_host_reset(Scsi_Cmnd
*);
286 static int nsp32_proc_info(struct Scsi_Host
*, char *, char **, off_t
, int, int);
287 static int __devinit
nsp32_probe(struct pci_dev
*, const struct pci_device_id
*);
288 static void __devexit
nsp32_remove(struct pci_dev
*);
289 static int __init
init_nsp32(void);
290 static void __exit
exit_nsp32(void);
292 static void nsp32_message(const char *, int, char *, char *, ...);
293 static void nsp32_dmessage(const char *, int, int, char *, ...);
294 static void nsp32_build_identify(nsp32_hw_data
*, Scsi_Cmnd
*);
295 static void nsp32_build_sdtr(nsp32_hw_data
*, unsigned char, unsigned char);
296 static void nsp32_build_nop(nsp32_hw_data
*);
297 static void nsp32_build_reject(nsp32_hw_data
*);
298 static int nsp32hw_start_selection(Scsi_Cmnd
*, nsp32_hw_data
*);
299 static int nsp32_selection_autoscsi(Scsi_Cmnd
*, nsp32_hw_data
*);
300 static int nsp32_reselection(nsp32_hw_data
*, unsigned char);
301 static int nsp32hw_setup_sg_table(Scsi_Cmnd
*, nsp32_hw_data
*);
302 static int nsp32hw_init(struct Scsi_Host
*);
303 static void nsp32_scsi_done(nsp32_hw_data
*, Scsi_Cmnd
*);
304 static int nsp32_busfree_occur(nsp32_hw_data
*, unsigned short);
305 static void nsp32_adjust_busfree(nsp32_hw_data
*, unsigned int);
306 static void nsp32_msgout_occur(nsp32_hw_data
*);
307 static void nsp32_restart_autoscsi(nsp32_hw_data
*, unsigned short);
308 static void nsp32_msgin_occur(nsp32_hw_data
*, unsigned long, unsigned short);
309 static void nsp32_analyze_sdtr(nsp32_hw_data
*);
310 static int nsp32_search_period_entry(nsp32_hw_data
*,struct nsp32_target
*, unsigned char);
311 static void nsp32_set_async(nsp32_hw_data
*, struct nsp32_target
*);
312 static void nsp32_set_max_sync(nsp32_hw_data
*, struct nsp32_target
*, unsigned char *, unsigned char *);
313 static void nsp32_set_sync_entry(nsp32_hw_data
*, struct nsp32_target
*, int, unsigned char);
314 static void nsp32_wait_req(nsp32_hw_data
*, int);
315 static void nsp32_wait_sack(nsp32_hw_data
*, int);
316 static void nsp32_sack_assert(nsp32_hw_data
*);
317 static void nsp32_sack_negate(nsp32_hw_data
*);
318 static void nsp32_do_bus_reset(nsp32_hw_data
*);
320 static int nsp32_getprom_param(nsp32_hw_data
*);
321 static int nsp32_getprom_new(nsp32_hw_data
*);
322 static int nsp32_getprom_standard(nsp32_hw_data
*);
323 static int nsp32_prom_read(nsp32_hw_data
*, int);
324 static void nsp32_prom_start(nsp32_hw_data
*);
325 static void nsp32_prom_stop(nsp32_hw_data
*);
326 static void nsp32_prom_write(nsp32_hw_data
*, int);
327 static int nsp32_prom_fetch(nsp32_hw_data
*);
328 static inline void nsp32_prom_set(nsp32_hw_data
*, int, int);
329 static inline int nsp32_prom_get(nsp32_hw_data
*, int);
333 * max_sectors is currently limited up to 128.
335 static Scsi_Host_Template nsp32_template
= {
336 .name
= "Workbit NinjaSCSI-32Bi/UDE",
337 .proc_name
= "nsp32",
338 .proc_info
= nsp32_proc_info
,
340 .queuecommand
= nsp32_queuecommand
,
342 .sg_tablesize
= NSP_SG_SIZE
,
346 .use_clustering
= DISABLE_CLUSTERING
,
347 .eh_abort_handler
= nsp32_eh_abort
,
348 .eh_device_reset_handler
= NULL
,
349 .eh_bus_reset_handler
= nsp32_eh_bus_reset
,
350 .eh_host_reset_handler
= nsp32_eh_host_reset
,
353 #include "nsp32_io.h"
358 #define nsp32_msg(type, args...) \
359 nsp32_message(__FUNCTION__, __LINE__, (type), ## args)
360 #define nsp32_dbg(mask, args...) \
361 nsp32_dmessage(__FUNCTION__, __LINE__, (mask), ## args)
364 # define NSP32_DEBUG_MASK 0x000000
366 # define NSP32_DEBUG_MASK 0xffffff
369 #define NSP32_DEBUG_QUEUECOMMAND 0x000001
370 #define NSP32_DEBUG_REGISTER 0x000002
371 #define NSP32_DEBUG_AUTOSCSI 0x000004
372 #define NSP32_DEBUG_INTR 0x000008
373 #define NSP32_DEBUG_SGLIST 0x000010
374 #define NSP32_DEBUG_BUSFREE 0x000020
375 #define NSP32_DEBUG_CDB_CONTENTS 0x000040
376 #define NSP32_DEBUG_RESELECTION 0x000080
377 #define NSP32_DEBUG_MSGINOCCUR 0x000100
378 #define NSP32_DEBUG_EEPROM 0x000200
379 #define NSP32_DEBUG_MSGOUTOCCUR 0x000400
380 #define NSP32_DEBUG_BUSRESET 0x000800
381 #define NSP32_DEBUG_RESTART 0x001000
382 #define NSP32_DEBUG_SYNC 0x002000
383 #define NSP32_DEBUG_WAIT 0x004000
384 #define NSP32_DEBUG_TARGETFLAG 0x008000
385 #define NSP32_DEBUG_PROC 0x010000
386 #define NSP32_DEBUG_INIT 0x020000
387 #define NSP32_SPECIAL_PRINT_REGISTER 0x100000
389 #define NSP32_DEBUG_BUF_LEN 100
391 static void nsp32_message(const char *func
, int line
, char *type
, char *fmt
, ...)
394 char buf
[NSP32_DEBUG_BUF_LEN
];
397 vsprintf(buf
, fmt
, args
);
401 printk("%snsp32: %s\n", type
, buf
);
403 printk("%snsp32: %s (%d): %s\n", type
, func
, line
, buf
);
407 static void nsp32_dmessage(const char *func
, int line
, int mask
, char *fmt
, ...)
410 char buf
[NSP32_DEBUG_BUF_LEN
];
413 vsprintf(buf
, fmt
, args
);
416 if (mask
& NSP32_DEBUG_MASK
) {
417 printk("Ninja: %d %s (%d): %s\n", mask
, func
, line
, buf
);
422 # include "nsp32_debug.c"
424 # define show_command(arg) /* */
425 # define show_busphase(arg) /* */
426 # define show_autophase(arg) /* */
430 static int pc_debug
= NSP32_DEBUG
;
431 MODULE_PARM(pc_debug
, "i");
432 #define DEBUG(n, args...) if (pc_debug>(n)) printk(/*KERN_DEBUG*/ args)
434 #define DEBUG(n, args...)
441 static void nsp32_build_identify(nsp32_hw_data
*data
, Scsi_Cmnd
*SCpnt
)
443 int pos
= data
->msgoutlen
;
445 data
->msgoutbuf
[pos
++] =
446 0x80 | /* Identify */
448 /* XXX: Auto DiscPriv detection is progressing... */
449 0x40 | /* DiscPriv */
451 SCpnt
->device
->lun
; /* LUNTRN */
453 data
->msgoutlen
= pos
;
457 * SDTR Message Routine
459 static void nsp32_build_sdtr(nsp32_hw_data
*data
,
460 unsigned char period
, unsigned char offset
)
462 int pos
= data
->msgoutlen
;
464 data
->msgoutbuf
[pos
++] = EXTENDED_MESSAGE
;
465 data
->msgoutbuf
[pos
++] = EXTENDED_SDTR_LEN
;
466 data
->msgoutbuf
[pos
++] = EXTENDED_SDTR
;
467 data
->msgoutbuf
[pos
++] = period
;
468 data
->msgoutbuf
[pos
++] = offset
;
470 data
->msgoutlen
= pos
;
474 * No Operation Message
476 static void nsp32_build_nop(nsp32_hw_data
*data
)
478 int pos
= data
->msgoutlen
;
481 nsp32_msg(KERN_WARNING
,
482 "Some messages are already contained!");
486 data
->msgoutbuf
[pos
++] = NOP
;
487 data
->msgoutlen
= pos
;
493 static void nsp32_build_reject(nsp32_hw_data
*data
)
495 int pos
= data
->msgoutlen
;
497 data
->msgoutbuf
[pos
++] = MESSAGE_REJECT
;
498 data
->msgoutlen
= pos
;
505 static void nsp32_start_timer(Scsi_Cmnd
*SCpnt
, int time
)
507 unsigned int base
= SCpnt
->host
->io_port
;
509 DEBUG(0, __func__
" time=%d\n", time
);
511 if (time
& (~TIMER_CNT_MASK
)) {
512 printk("timer set overflow\n");
515 nsp32_write2(base
, TIMER_SET
, time
& TIMER_CNT_MASK
);
521 * set SCSI command and other parameter to asic, and start selection phase
523 static int nsp32hw_start_selection(Scsi_Cmnd
*SCpnt
, nsp32_hw_data
*data
)
525 unsigned int host_id
= SCpnt
->device
->host
->this_id
;
526 unsigned int base
= SCpnt
->device
->host
->io_port
;
527 unsigned char target
= SCpnt
->device
->id
;
528 unsigned char *param
= data
->autoparam
;
529 unsigned char phase
, arbit
;
538 phase
= nsp32_read1(base
, SCSI_BUS_MONITOR
);
539 if (phase
!= BUSMON_BUS_FREE
) {
540 nsp32_msg(KERN_WARNING
, "bus busy");
541 show_busphase(phase
& BUSMON_PHASE_MASK
);
542 SCpnt
->result
= DID_BUS_BUSY
<< 16;
549 * Note: If the range of msgoutlen is 1 - 3, fill scsi_msgout.
550 * over 3 messages needs another routine.
552 if (data
->msgoutlen
== 0) {
553 nsp32_msg(KERN_ERR
, "SCSI MsgOut without any message!");
554 SCpnt
->result
= DID_ERROR
<< 16;
556 } else if (data
->msgoutlen
> 0 && data
->msgoutlen
<= 3) {
558 for (i
=0; i
<data
->msgoutlen
; i
++) {
560 * the sending order of the message is:
561 * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
562 * MCNT 2: MSG#1 -> MSG#2
566 msgout
|= (unsigned int)(data
->msgoutbuf
[i
] << 24);
568 msgout
|= MV_VALID
; /* MV valid */
569 msgout
|= (unsigned int)data
->msgoutlen
; /* len */
571 /* data->msgoutlen > 3 */
576 * setup asic parameter
578 memset(param
, 0, AUTOPARAM_SIZE
);
581 for (i
=0; i
<SCpnt
->cmd_len
; i
++) {
582 param
[4*i
] = SCpnt
->cmnd
[i
];
586 param
[4*0x10 +0] = (msgout
& 0x000000ff) >> 0;
587 param
[4*0x10 +1] = (msgout
& 0x0000ff00) >> 8;
588 param
[4*0x10 +2] = (msgout
& 0x00ff0000) >> 16;
589 param
[4*0x10 +3] = (msgout
& 0xff000000) >> 24;
591 /* syncreg, ackwidth, target id, sampleing rate */
592 param
[4*0x11 +0] = data
->curtarget
->syncreg
;
593 param
[4*0x11 +1] = data
->curtarget
->ackwidth
;
594 param
[4*0x11 +2] = BIT(host_id
) | BIT(target
);
595 param
[4*0x11 +3] = 0;
597 /* command control */
598 s
= (CLEAR_CDB_FIFO_POINTER
| AUTOSCSI_START
|
599 AUTO_MSGIN_00_OR_04
| AUTO_MSGIN_02
| AUTO_ATN
);
600 param
[4*0x12 +0] = (s
& 0x00ff) >> 0;
601 param
[4*0x12 +1] = (s
& 0xff00) >> 8;
603 /* transfer control */
605 switch (data
->trans_method
) {
606 case NSP32_TRANSFER_BUSMASTER
:
609 case NSP32_TRANSFER_MMIO
:
612 case NSP32_TRANSFER_PIO
:
616 nsp32_msg(KERN_ERR
, "unknown trans_method");
619 * ORed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
620 * For bus master transfer, it's taken off.
622 s
|= (TRANSFER_GO
| ALL_COUNTER_CLR
);
623 param
[4*0x12 +2] = (s
& 0x00ff) >> 0;
624 param
[4*0x12 +3] = (s
& 0xff00) >> 8;
627 l
= data
->curlunt
->sglun_paddr
;
628 param
[4*0x13 +0] = (l
& 0x000000ff) >> 0;
629 param
[4*0x13 +1] = (l
& 0x0000ff00) >> 8;
630 param
[4*0x13 +2] = (l
& 0x00ff0000) >> 16;
631 param
[4*0x13 +3] = (l
& 0xff000000) >> 24;
634 * transfer parameter to asic
636 nsp32_write4(base
, SGT_ADR
, virt_to_bus(param
));
637 nsp32_write2(base
, COMMAND_CONTROL
, CLEAR_CDB_FIFO_POINTER
|
641 * Arbitration Status Check
643 * Note: Arbitration counter is wait during ARBIT_GO is not lifting.
644 * Using udelay(1) consumes CPU time and system time, but
645 * arbitration delay time is defined minimal 2.4us in SCSI
646 * specification, thus udelay works as coarse grained wait timer.
650 arbit
= nsp32_read1(base
, ARBIT_STATUS
);
651 nsp32_dbg(NSP32_DEBUG_AUTOSCSI
, "arbit=0x%x", arbit
);
652 } while ((arbit
& (ARBIT_WIN
| ARBIT_FAIL
)) == 0 &&
655 nsp32_dbg(NSP32_DEBUG_AUTOSCSI
,
656 "arbit: 0x%x, delay time: %d", arbit
, time
);
658 if (arbit
& ARBIT_WIN
) {
659 SCpnt
->result
= DID_OK
<< 16;
661 nsp32_index_write1(base
, EXT_PORT
, LED_ON
);
662 } else if (arbit
& ARBIT_FAIL
) {
663 SCpnt
->result
= DID_BUS_BUSY
<< 16;
664 nsp32_write1(base
, SET_ARBIT
, ARBIT_CLEAR
);
667 /* unknown error or ARBIT_GO timeout */
668 nsp32_dbg(NSP32_DEBUG_AUTOSCSI
, "arbit fail");
669 SCpnt
->result
= DID_NO_CONNECT
<< 16;
670 nsp32_write1(base
, SET_ARBIT
, ARBIT_CLEAR
);
677 nsp32_write1(base
, SET_ARBIT
, ARBIT_CLEAR
);
684 * Selection with AUTO SCSI (without AUTO PARAMETER)
686 static int nsp32_selection_autoscsi(Scsi_Cmnd
*SCpnt
, nsp32_hw_data
*data
)
692 unsigned short command
= 0;
694 unsigned int msgout
= 0;
695 unsigned short execph
;
696 unsigned int base
= data
->BaseAddress
;
701 nsp32_write2(base
, IRQ_CONTROL
, IRQ_CONTROL_ALL_IRQ_MASK
);
706 phase
= nsp32_read1(base
, SCSI_BUS_MONITOR
);
707 if(((phase
& BUSMON_BSY
) == 1) ||
708 (phase
& BUSMON_SEL
) == 1) {
709 nsp32_msg(KERN_WARNING
, "bus busy");
710 SCpnt
->result
= DID_BUS_BUSY
<< 16;
718 execph
= nsp32_read2(base
, SCSI_EXECUTE_PHASE
);
721 * clear FIFO counter to set CDBs
723 nsp32_write2(base
, COMMAND_CONTROL
, CLEAR_CDB_FIFO_POINTER
);
728 for (i
=0; i
<SCpnt
->cmd_len
; i
++) {
729 nsp32_write1(base
, COMMAND_DATA
, SCpnt
->cmnd
[i
]);
731 nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS
, "CDB[0]=[0x%x]", SCpnt
->cmnd
[i
]);
734 * set SCSIOUT LATCH(initiator)/TARGET(target) (ORed) ID
736 nsp32_write1(base
, SCSI_OUT_LATCH_TARGET_ID
,
737 ((1 << NSP32_HOST_SCSIID
) | (1 << SCpnt
->device
->id
)));
740 * set SCSI MSGOUT REG
742 * Note: If the range of msgoutlen is 1 - 3, fill scsi_msgout.
743 * over 3 messages needs another routine.
745 if (data
->msgoutlen
== 0) {
747 "SCSI MsgOut without any message!");
748 SCpnt
->result
= DID_ERROR
<< 16;
751 } else if (data
->msgoutlen
> 0 && data
->msgoutlen
<= 3) {
753 for (i
=0; i
<data
->msgoutlen
; i
++) {
755 * the sending order of the message is:
756 * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
757 * MCNT 2: MSG#1 -> MSG#2
761 msgout
|= (unsigned int)(data
->msgoutbuf
[i
] << 24);
763 msgout
|= MV_VALID
; /* MV valid */
764 msgout
|= (unsigned int)data
->msgoutlen
; /* len */
765 nsp32_write4(base
, SCSI_MSG_OUT
, msgout
);
767 /* data->msgoutlen > 3 */
768 nsp32_write4(base
, SCSI_MSG_OUT
, 0);
772 * set selection timeout(= 250ms)
774 nsp32_write2(base
, SEL_TIME_OUT
, SEL_TIMEOUT_TIME
);
779 * TODO: smpl_rate (BASE+0F) is 0 when internal clock = 40MHz.
780 * check other internal clock!
782 nsp32_write1(base
, SREQ_SMPL_RATE
, 0);
787 nsp32_write1(base
, SET_ARBIT
, ARBIT_CLEAR
);
791 * Don't set BM_START_ADR before setting this register.
793 nsp32_write1(base
, SYNC_REG
, data
->curtarget
->syncreg
);
798 nsp32_write1(base
, ACK_WIDTH
, data
->curtarget
->ackwidth
);
800 nsp32_dbg(NSP32_DEBUG_AUTOSCSI
,
801 "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
802 nsp32_read1(base
, SYNC_REG
), nsp32_read1(base
, ACK_WIDTH
),
803 nsp32_read4(base
, SGT_ADR
), nsp32_read1(base
, SCSI_OUT_LATCH_TARGET_ID
));
804 nsp32_dbg(NSP32_DEBUG_AUTOSCSI
, "msgoutlen=%d, msgout=0x%x",
805 data
->msgoutlen
, msgout
);
808 * set SGT ADDR (physical address)
810 nsp32_write4(base
, SGT_ADR
, data
->curlunt
->sglun_paddr
);
813 * set TRANSFER CONTROL REG
816 command
|= ( TRANSFER_GO
| ALL_COUNTER_CLR
);
817 if (data
->trans_method
& NSP32_TRANSFER_BUSMASTER
) {
818 if (SCpnt
->request_bufflen
> 0) {
821 } else if (data
->trans_method
& NSP32_TRANSFER_MMIO
) {
822 command
|= CB_MMIO_MODE
;
823 } else if (data
->trans_method
& NSP32_TRANSFER_PIO
) {
824 command
|= CB_IO_MODE
;
826 nsp32_write2(base
, TRANSFER_CONTROL
, command
);
829 * start AUTO SCSI, kick off arbitration
832 command
|= (CLEAR_CDB_FIFO_POINTER
834 | AUTO_MSGIN_00_OR_04
837 nsp32_write2(base
, COMMAND_CONTROL
, command
);
840 * Arbitration Status Check
842 * Note: Arbitration counter is wait during ARBIT_GO is not lifting.
843 * Using udelay(1) consumes CPU time and system time, but
844 * arbitration delay time is defined minimal 2.4us in SCSI
845 * specification, thus udelay works as coarse grained wait timer.
849 arbit
= nsp32_read1(base
, ARBIT_STATUS
);
850 if(arbit
& ARBIT_GO
) {
853 if ( time
> ARBIT_TIMEOUT_TIME
) {
854 /* something lock up! guess no connection */
855 SCpnt
->result
= DID_NO_CONNECT
<< 16;
864 nsp32_dbg(NSP32_DEBUG_AUTOSCSI
, "arbit: 0x%x, delay time: %d", arbit
, time
);
867 * check Arbitration Status Result
869 if(arbit
& ARBIT_WIN
) {
870 /* Arbitration succeeded */
872 SCpnt
->result
= DID_OK
<< 16;
874 nsp32_index_write1(base
, EXT_PORT
, LED_ON
);
875 } else if(arbit
& ARBIT_FAIL
) {
876 /* Arbitration failed */
878 SCpnt
->result
= DID_BUS_BUSY
<< 16;
882 SCpnt
->result
= DID_ERROR
<< 16;
883 SCpnt
->result
= DID_NO_CONNECT
<< 16;
889 nsp32_write1(base
, SET_ARBIT
, ARBIT_CLEAR
);
895 nsp32_write2(base
, IRQ_CONTROL
, 0);
904 * Note: This reselection routine is called from msgin_occur,
905 * reselection target id&lun must be already set.
906 * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
908 static int nsp32_reselection(nsp32_hw_data
*data
, unsigned char newlun
)
910 unsigned int base
= data
->BaseAddress
;
911 unsigned char tmpid
, newid
;
913 nsp32_dbg(NSP32_DEBUG_RESELECTION
, "enter");
916 * calculate reselected SCSI ID
918 tmpid
= nsp32_read1(base
, RESELECT_ID
);
930 * If reselected New ID:LUN is not existed
931 * or current nexus is not existed, unexpected
932 * reselection is occurred. Send reject message.
934 if (newid
>= MAX_TARGET
|| newlun
>= MAX_LUN
) {
935 nsp32_msg(KERN_WARNING
, "unknown id/lun");
937 } else if(data
->lunt
[newid
][newlun
]->SCpnt
== NULL
) {
938 nsp32_msg(KERN_WARNING
, "no SCSI command is processing");
944 data
->curtarget
= &data
->target
[newid
];
945 data
->curlunt
= data
->lunt
[newid
][newlun
];
947 /* reset SACK/SavedACK counter (or ALL clear?) */
948 nsp32_write4(base
, CLR_COUNTER
, CLRCOUNTER_ALLMASK
);
955 * nsp32hw_setup_sg_table - build scatter gather list for transfer data
958 * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
960 static int nsp32hw_setup_sg_table(Scsi_Cmnd
*SCpnt
, nsp32_hw_data
*data
)
962 struct scatterlist
*sgl
;
963 struct nsp32_sgtable
*sgt
= data
->curlunt
->sglun
->sgt
;
966 if (SCpnt
->request_bufflen
== 0) {
971 nsp32_dbg(NSP32_DEBUG_SGLIST
, "SGT == null");
976 sgl
= (struct scatterlist
*)SCpnt
->request_buffer
;
977 num
= pci_map_sg(data
->Pci
, sgl
, SCpnt
->use_sg
,
978 scsi_to_pci_dma_dir(SCpnt
->sc_data_direction
));
979 for (i
=0; i
<num
; i
++) {
981 * Build nsp32_sglist, substitute sg dma addresses.
983 sgt
[i
].addr
= cpu_to_le32(sg_dma_address(sgl
));
984 sgt
[i
].len
= cpu_to_le32(sg_dma_len(sgl
));
987 if (sgt
[i
].len
> 65536) {
989 "can't transfer over 64KB at a time");
992 nsp32_dbg(NSP32_DEBUG_SGLIST
,
993 "num 0x%x : addr 0x%lx len 0x%x",
994 i
, sgt
[i
].addr
, sgt
[i
].len
);
996 sgt
[num
-1].len
|= NSP32_SG_END_SGT
; /* set end mark */
998 SCpnt
->SCp
.have_data_in
= pci_map_single(data
->Pci
,
999 SCpnt
->request_buffer
, SCpnt
->request_bufflen
,
1000 scsi_to_pci_dma_dir(SCpnt
->sc_data_direction
));
1001 sgt
[0].addr
= cpu_to_le32(SCpnt
->SCp
.have_data_in
);
1002 sgt
[0].len
= cpu_to_le32(SCpnt
->request_bufflen
);
1003 sgt
[0].len
|= NSP32_SG_END_SGT
; /* set end mark */
1005 nsp32_dbg(NSP32_DEBUG_SGLIST
, "single : addr 0x%lx len=0x%x",
1006 sgt
[0].addr
, sgt
[0].len
);
1012 static int nsp32_queuecommand(Scsi_Cmnd
*SCpnt
, void (*done
)(Scsi_Cmnd
*))
1014 nsp32_hw_data
*data
= (nsp32_hw_data
*)SCpnt
->device
->host
->hostdata
;
1015 struct nsp32_target
*target
;
1016 struct nsp32_lunt
*curlunt
;
1019 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND
,
1020 "enter. target: 0x%x LUN: 0x%x cmnd: 0x%x cmndlen: 0x%x "
1021 "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
1022 SCpnt
->device
->id
, SCpnt
->device
->lun
, SCpnt
->cmnd
[0], SCpnt
->cmd_len
,
1023 SCpnt
->use_sg
, SCpnt
->request_buffer
, SCpnt
->request_bufflen
);
1025 if (data
->CurrentSC
!= NULL
) {
1026 nsp32_msg(KERN_ERR
, "Currentsc != NULL. Cancel this command request");
1027 data
->CurrentSC
= NULL
;
1028 SCpnt
->result
= DID_NO_CONNECT
<< 16;
1034 /* check target ID is not same as this initiator ID */
1035 if (SCpnt
->device
->id
== NSP32_HOST_SCSIID
) {
1036 SCpnt
->result
= DID_BAD_TARGET
<< 16;
1041 /* check target LUN is allowable value */
1042 if (SCpnt
->device
->lun
>= MAX_LUN
) {
1043 SCpnt
->result
= DID_BAD_TARGET
<< 16;
1048 show_command(SCpnt
);
1050 SCpnt
->scsi_done
= done
;
1051 data
->CurrentSC
= SCpnt
;
1052 SCpnt
->SCp
.Status
= CHECK_CONDITION
;
1053 SCpnt
->SCp
.Message
= 0;
1054 SCpnt
->resid
= 0; //SCpnt->request_bufflen;
1056 SCpnt
->SCp
.ptr
= (char *) SCpnt
->request_buffer
;
1057 SCpnt
->SCp
.this_residual
= SCpnt
->request_bufflen
;
1058 SCpnt
->SCp
.buffer
= NULL
;
1059 SCpnt
->SCp
.buffers_residual
= 0;
1061 /* initialize data */
1062 data
->msgoutlen
= 0;
1064 curlunt
= data
->lunt
[SCpnt
->device
->id
][SCpnt
->device
->lun
];
1065 curlunt
->SCpnt
= SCpnt
;
1066 curlunt
->save_datp
= 0;
1067 curlunt
->msgin03
= FALSE
;
1068 data
->curlunt
= curlunt
;
1069 data
->pid
= SCpnt
->device
->id
;
1070 data
->plun
= SCpnt
->device
->lun
;
1072 ret
= nsp32hw_setup_sg_table(SCpnt
, data
);
1074 SCpnt
->result
= DID_ERROR
<< 16;
1075 nsp32_scsi_done(data
, SCpnt
);
1078 /* Build IDENTIFY */
1079 nsp32_build_identify(data
, SCpnt
);
1082 * If target is the first time to transfer after the reset
1083 * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
1084 * message SDTR is needed to do synchronous transfer.
1086 target
= &data
->target
[SCpnt
->device
->id
];
1087 data
->curtarget
= target
;
1089 if (!(target
->sync_flag
& (SDTR_DONE
| SDTR_INITIATOR
| SDTR_TARGET
))) {
1090 unsigned char period
, offset
;
1092 if (trans_mode
!= ASYNC_MODE
) {
1093 nsp32_set_max_sync(data
, target
, &period
, &offset
);
1094 nsp32_build_sdtr(data
, period
, offset
);
1095 target
->sync_flag
|= SDTR_INITIATOR
;
1097 nsp32_set_async(data
, target
);
1098 target
->sync_flag
|= SDTR_DONE
;
1101 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND
,
1102 "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
1103 target
->limit_entry
, period
, offset
);
1104 } else if (target
->sync_flag
& SDTR_INITIATOR
) {
1106 * It was negotiating SDTR with target, sending from the
1107 * initiator, but there are no chance to remove this flag.
1108 * Set async because we don't get proper negotiation.
1110 nsp32_set_async(data
, target
);
1111 target
->sync_flag
&= ~SDTR_INITIATOR
;
1112 target
->sync_flag
|= SDTR_DONE
;
1114 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND
,
1115 "SDTR_INITIATOR: fall back to async");
1116 } else if (target
->sync_flag
& SDTR_TARGET
) {
1118 * It was negotiating SDTR with target, sending from target,
1119 * but there are no chance to remove this flag. Set async
1120 * because we don't get proper negotiation.
1122 nsp32_set_async(data
, target
);
1123 target
->sync_flag
&= ~SDTR_TARGET
;
1124 target
->sync_flag
|= SDTR_DONE
;
1126 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND
,
1127 "Unknown SDTR from target is reached, fall back to async.");
1130 nsp32_dbg(NSP32_DEBUG_TARGETFLAG
,
1131 "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
1132 SCpnt
->device
->id
, target
->sync_flag
, target
->syncreg
,
1136 if (auto_param
== 0) {
1137 ret
= nsp32hw_start_selection(SCpnt
, data
);
1139 ret
= nsp32_selection_autoscsi(SCpnt
, data
);
1143 nsp32_scsi_done(data
, SCpnt
);
1150 /* initialize asic */
1151 static int nsp32hw_init(struct Scsi_Host
*host
)
1153 unsigned int base
= host
->io_port
;
1154 unsigned short irq_stat
;
1155 unsigned long lc_reg
;
1156 unsigned char power
;
1157 nsp32_hw_data
*data
= (nsp32_hw_data
*)host
->hostdata
;
1159 lc_reg
= nsp32_index_read4(base
, CFG_LATE_CACHE
);
1160 if ((lc_reg
& 0xff00) == 0) {
1161 lc_reg
|= (0x20 << 8);
1162 nsp32_index_write2(base
, CFG_LATE_CACHE
, lc_reg
& 0xffff);
1165 nsp32_write2(base
, IRQ_CONTROL
, IRQ_CONTROL_ALL_IRQ_MASK
);
1166 nsp32_write2(base
, TRANSFER_CONTROL
, 0);
1167 nsp32_write4(base
, BM_CNT
, 0);
1168 nsp32_write2(base
, SCSI_EXECUTE_PHASE
, 0);
1171 irq_stat
= nsp32_read2(base
, IRQ_STATUS
);
1172 } while (irq_stat
& IRQSTATUS_ANY_IRQ
);
1173 nsp32_dbg(NSP32_DEBUG_INIT
, "irq_stat 0x%x", irq_stat
);
1176 * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
1177 * designated by specification.
1179 if ((data
->trans_method
& NSP32_TRANSFER_PIO
) ||
1180 (data
->trans_method
& NSP32_TRANSFER_MMIO
)) {
1181 nsp32_index_write1(base
, FIFO_FULL_SHLD_COUNT
, 0x40);
1182 } else if (data
->trans_method
& NSP32_TRANSFER_BUSMASTER
) {
1183 nsp32_index_write1(base
, FIFO_FULL_SHLD_COUNT
, 0x10);
1185 nsp32_index_write1(base
, FIFO_EMPTY_SHLD_COUNT
, 0x60);
1187 nsp32_dbg(NSP32_DEBUG_INIT
, "full 0x%x emp 0x%x",
1188 nsp32_index_read1(base
, FIFO_FULL_SHLD_COUNT
),
1189 nsp32_index_read1(base
, FIFO_EMPTY_SHLD_COUNT
));
1191 nsp32_index_write1(base
, CLOCK_DIV
, data
->clock
);
1192 nsp32_index_write1(base
, BM_CYCLE
, MEMRD_CMD1
| SGT_AUTO_PARA_MEMED_CMD
);
1193 nsp32_write1(base
, PARITY_CONTROL
, 0); /* parity check is disable */
1196 * initialize I_MISC_WRRD register
1198 * Note: Designated parameters is obeyed as following:
1199 * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
1200 * MISC_MASTER_TERMINATION_SELECT: It must be set.
1201 * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
1202 * MISC_AUTOSEL_TIMING_SEL: It should be set.
1203 * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
1204 * MISC_DELAYED_BMSTART: It's selected for safety.
1206 * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
1207 * we have to set TRANSFERCONTROL_BM_START as 0 and set
1208 * appropriate value before restarting bus master transfer.
1210 nsp32_index_write2(base
, MISC_WR
,
1211 (SCSI_DIRECTION_DETECTOR_SELECT
|
1213 MASTER_TERMINATION_SELECT
|
1214 BMREQ_NEGATE_TIMING_SEL
|
1215 AUTOSEL_TIMING_SEL
|
1216 BMSTOP_CHANGE2_NONDATA_PHASE
));
1218 nsp32_index_write1(base
, TERM_PWR_CONTROL
, 0);
1219 power
= nsp32_index_read1(base
, TERM_PWR_CONTROL
);
1220 if (!(power
& SENSE
)) {
1221 nsp32_msg(KERN_INFO
, "term power on");
1222 nsp32_index_write1(base
, TERM_PWR_CONTROL
, BPWR
);
1225 nsp32_write2(base
, TIMER_SET
, TIMER_STOP
);
1226 nsp32_write2(base
, TIMER_SET
, TIMER_STOP
);
1228 nsp32_write1(base
, SYNC_REG
, 0);
1229 nsp32_write1(base
, ACK_WIDTH
, 0);
1230 nsp32_write2(base
, SEL_TIME_OUT
, 10000); /* 25us x10000 = 250ms defined in SCSI */
1233 * enable to select designated IRQ (except for
1234 * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
1236 nsp32_index_write2(base
, IRQ_SELECT
, IRQSELECT_TIMER_IRQ
|
1237 IRQSELECT_SCSIRESET_IRQ
|
1238 IRQSELECT_FIFO_SHLD_IRQ
|
1239 IRQSELECT_RESELECT_IRQ
|
1240 IRQSELECT_PHASE_CHANGE_IRQ
|
1241 IRQSELECT_AUTO_SCSI_SEQ_IRQ
|
1242 //IRQSELECT_BMCNTERR_IRQ |
1243 IRQSELECT_TARGET_ABORT_IRQ
|
1244 IRQSELECT_MASTER_ABORT_IRQ
);
1245 nsp32_write2(base
, IRQ_CONTROL
, 0);
1248 nsp32_index_write1(base
, EXT_PORT_DDR
, LED_OFF
);
1249 nsp32_index_write1(base
, EXT_PORT
, LED_OFF
);
1255 /* interrupt routine */
1256 static irqreturn_t
do_nsp32_isr(int irq
, void *dev_id
, struct pt_regs
*regs
)
1258 nsp32_hw_data
*data
= dev_id
;
1259 unsigned int base
= data
->BaseAddress
;
1260 Scsi_Cmnd
*SCpnt
= data
->CurrentSC
;
1261 unsigned short auto_stat
, irq_stat
, trans_stat
;
1262 unsigned char busmon
, busphase
;
1263 unsigned long flags
;
1267 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
1268 struct Scsi_Host
*host
= data
->Host
;
1269 spin_lock_irqsave(host
->host_lock
, flags
);
1271 spin_lock_irqsave(&io_request_lock
, flags
);
1275 * IRQ check, then enable IRQ mask
1277 irq_stat
= nsp32_read2(base
, IRQ_STATUS
);
1278 nsp32_dbg(NSP32_DEBUG_INTR
,
1279 "enter IRQ: %d, IRQstatus: 0x%x", irq
, irq_stat
);
1280 /* is this interrupt comes from Ninja asic? */
1281 if ((irq_stat
& IRQSTATUS_ANY_IRQ
) == 0) {
1282 nsp32_msg(KERN_INFO
, "spurious interrupt: irq other 0x%x", irq_stat
);
1286 nsp32_write2(base
, IRQ_CONTROL
, IRQ_CONTROL_ALL_IRQ_MASK
);
1288 busmon
= nsp32_read1(base
, SCSI_BUS_MONITOR
);
1289 busphase
= busmon
& BUSMON_PHASE_MASK
;
1291 trans_stat
= nsp32_read2(base
, TRANSFER_STATUS
);
1292 if ((irq_stat
== 0xffff) && (trans_stat
== 0xffff)) {
1293 nsp32_msg(KERN_INFO
, "card disconnect");
1294 if (data
->CurrentSC
!= NULL
) {
1295 nsp32_msg(KERN_INFO
, "clean up current SCSI command");
1296 SCpnt
->result
= DID_BAD_TARGET
<< 16;
1297 nsp32_scsi_done(data
, SCpnt
);
1303 if (irq_stat
& IRQSTATUS_TIMER_IRQ
) {
1304 DEBUG(0, "timer stop\n");
1305 nsp32_write2(base
, TIMER_SET
, TIMER_STOP
);
1310 if (irq_stat
& IRQSTATUS_SCSIRESET_IRQ
) {
1311 nsp32_msg(KERN_INFO
, "detected someone do bus reset");
1312 nsp32_do_bus_reset(data
);
1313 if (SCpnt
!= NULL
) {
1314 SCpnt
->result
= DID_RESET
<< 16;
1315 nsp32_scsi_done(data
, SCpnt
);
1320 if (SCpnt
== NULL
) {
1321 nsp32_msg(KERN_WARNING
, "SCpnt==NULL this can't be happen\n");
1322 nsp32_msg(KERN_WARNING
, "irq_stat=0x%x trans_stat=0x%x\n", irq_stat
, trans_stat
);
1327 * AutoSCSI Interrupt.
1328 * Note: This interrupt is occurred when AutoSCSI is finished. Then
1329 * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
1330 * recorded when AutoSCSI sequencer has been processed.
1332 if(irq_stat
& IRQSTATUS_AUTOSCSI_IRQ
) {
1333 /* getting SCSI executed phase */
1334 auto_stat
= nsp32_read2(base
, SCSI_EXECUTE_PHASE
);
1335 nsp32_write2(base
, SCSI_EXECUTE_PHASE
, 0);
1337 /* Selection Timeout, go busfree phase. */
1338 if (auto_stat
& SELECTION_TIMEOUT
) {
1339 nsp32_dbg(NSP32_DEBUG_INTR
,
1340 "selection timeout occurred");
1342 SCpnt
->result
= DID_TIME_OUT
<< 16;
1343 nsp32_scsi_done(data
, SCpnt
);
1347 if (auto_stat
& MSGOUT_PHASE
) {
1349 * MsgOut phase was processed.
1350 * If MSG_IN_OCCUER is not set, then MsgOut phase is
1351 * completed. Thus, msgoutlen must reset. Otherwise,
1352 * nothing to do here. If MSG_OUT_OCCUER is occurred,
1353 * then we will encounter the condition and check.
1355 if (!(auto_stat
& MSG_IN_OCCUER
) &&
1356 (data
->msgoutlen
<= 3)) {
1358 * !MSG_IN_OCCUER && msgoutlen <=3
1359 * ---> AutoSCSI with MSGOUTreg is processed.
1361 data
->msgoutlen
= 0;
1364 nsp32_dbg(NSP32_DEBUG_INTR
, "MsgOut phase processed");
1367 if ((auto_stat
& DATA_IN_PHASE
) &&
1368 (SCpnt
->resid
> 0) &&
1369 ((nsp32_read2(base
, FIFO_REST_CNT
) & FIFO_REST_MASK
) != 0)) {
1370 printk( "auto+fifo\n");
1371 //nsp32_pio_read(SCpnt);
1374 if (auto_stat
& (DATA_IN_PHASE
| DATA_OUT_PHASE
)) {
1375 /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
1376 nsp32_dbg(NSP32_DEBUG_INTR
,
1377 "Data in/out phase processed");
1379 /* read BMCNT, SGT pointer addr */
1380 nsp32_dbg(NSP32_DEBUG_INTR
, "BMCNT=0x%lx",
1381 nsp32_read4(base
, BM_CNT
));
1382 nsp32_dbg(NSP32_DEBUG_INTR
, "addr=0x%lx",
1383 nsp32_read4(base
, SGT_ADR
));
1384 nsp32_dbg(NSP32_DEBUG_INTR
, "SACK=0x%lx",
1385 nsp32_read4(base
, SACK_CNT
));
1386 nsp32_dbg(NSP32_DEBUG_INTR
, "SSACK=0x%lx",
1387 nsp32_read4(base
, SAVED_SACK_CNT
));
1394 if (auto_stat
& MSG_IN_OCCUER
) {
1395 nsp32_msgin_occur(data
, irq_stat
, auto_stat
);
1401 if (auto_stat
& MSG_OUT_OCCUER
) {
1402 nsp32_msgout_occur(data
);
1408 if (auto_stat
& BUS_FREE_OCCUER
) {
1409 ret
= nsp32_busfree_occur(data
, auto_stat
);
1415 if (auto_stat
& STATUS_PHASE
) {
1417 * Read CSB and substitute CSB for SCpnt->result
1418 * to save status phase stutas byte.
1419 * scsi error handler checks host_byte (DID_*:
1420 * low level driver to indicate status), then checks
1421 * status_byte (SCSI status byte).
1423 SCpnt
->result
= (int)nsp32_read1(base
, SCSI_CSB_IN
);
1426 if (auto_stat
& ILLEGAL_PHASE
) {
1427 /* Illegal phase is detected. SACK is not back. */
1428 nsp32_msg(KERN_WARNING
,
1429 "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
1431 /* TODO: currently we don't have any action... bus reset? */
1434 * To send back SACK, assert, wait, and negate.
1436 nsp32_sack_assert(data
);
1437 nsp32_wait_req(data
, NEGATE
);
1438 nsp32_sack_negate(data
);
1442 if (auto_stat
& COMMAND_PHASE
) {
1444 nsp32_dbg(NSP32_DEBUG_INTR
, "Command phase processed");
1447 if (auto_stat
& AUTOSCSI_BUSY
) {
1448 /* AutoSCSI is running */
1451 show_autophase(auto_stat
);
1455 if (irq_stat
& IRQSTATUS_FIFO_SHLD_IRQ
) {
1456 nsp32_dbg(NSP32_DEBUG_INTR
, "FIFO IRQ");
1459 case BUSPHASE_DATA_OUT
:
1462 //nsp32_pio_write(SCpnt);
1466 case BUSPHASE_DATA_IN
:
1469 //nsp32_pio_read(SCpnt);
1473 case BUSPHASE_STATUS
:
1474 //DEBUG(0, "fifo/status\n");
1476 SCpnt
->SCp
.Status
= nsp32_read1(base
, SCSI_CSB_IN
);
1480 printk("fifo/other phase?\n");
1481 printk("irq_stat=0x%x trans_stat=0x%x\n", irq_stat
, trans_stat
);
1482 show_busphase(busphase
);
1489 /* Phase Change IRQ */
1490 if (irq_stat
& IRQSTATUS_PHASE_CHANGE_IRQ
) {
1491 nsp32_dbg(NSP32_DEBUG_INTR
, "phase change IRQ");
1494 case BUSPHASE_MESSAGE_IN
:
1495 nsp32_dbg(NSP32_DEBUG_INTR
, "phase chg/msg in");
1496 nsp32_msgin_occur(data
, irq_stat
, 0);
1499 nsp32_msg(KERN_WARNING
, "phase chg/other phase?");
1500 nsp32_msg(KERN_WARNING
, "irq_stat=0x%x trans_stat=0x%x\n",
1501 irq_stat
, trans_stat
);
1502 show_busphase(busphase
);
1509 if (irq_stat
& IRQSTATUS_PCI_IRQ
) {
1510 nsp32_dbg(NSP32_DEBUG_INTR
, "PCI IRQ occurred");
1515 if (irq_stat
& IRQSTATUS_BMCNTERR_IRQ
) {
1516 nsp32_msg(KERN_ERR
, "Received unexpected BMCNTERR IRQ! ");
1518 * TODO: To be implemented improving bus master
1519 * transfer reliablity when BMCNTERR is occurred in
1520 * AutoSCSI phase described in specification.
1525 printk("irq_stat=0x%x trans_stat=0x%x\n", irq_stat
, trans_stat
);
1526 show_busphase(busphase
);
1530 /* disable IRQ mask */
1531 nsp32_write2(base
, IRQ_CONTROL
, 0);
1534 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
1535 spin_unlock_irqrestore(&io_request_lock
, flags
);
1537 spin_unlock_irqrestore(host
->host_lock
, flags
);
1540 nsp32_dbg(NSP32_DEBUG_INTR
, "exit");
1542 return IRQ_RETVAL(handled
);
1546 #define SPRINTF(args...) \
1547 do { if(pos < buffer + length) pos += sprintf(pos, ## args); } while(0)
1548 static int nsp32_proc_info(struct Scsi_Host
*host
, char *buffer
,
1556 unsigned long flags
;
1557 nsp32_hw_data
*data
;
1559 unsigned char mode_reg
;
1561 /* Write is not supported, just return. */
1562 if (inout
== TRUE
) {
1566 data
= (nsp32_hw_data
*)host
->hostdata
;
1567 base
= host
->io_port
;
1569 SPRINTF("NinjaSCSI-32 status\n\n");
1570 SPRINTF("Driver version: %s\n", nsp32_release_version
);
1571 SPRINTF("SCSI host No.: %d\n", host
->host_no
);
1572 SPRINTF("IRQ: %d\n", host
->irq
);
1573 SPRINTF("IO: 0x%lx-0x%lx\n", host
->io_port
, host
->io_port
+ host
->n_io_port
- 1);
1574 SPRINTF("MMIO(virtual address): 0x%lx\n", host
->base
);
1575 SPRINTF("sg_tablesize: %d\n", host
->sg_tablesize
);
1576 SPRINTF("Chip revision: %d\n", (nsp32_read2(base
, INDEX_REG
) >> 8) - 0x4f);
1578 mode_reg
= nsp32_index_read1(base
, CHIP_MODE
);
1581 //SPRINTF("Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
1583 SPRINTF("OEM: %s\n", nsp32_model
[mode_reg
& (OEM0
|OEM1
)]);
1585 spin_lock_irqsave(&(data
->Lock
), flags
);
1586 SPRINTF("CurrentSC: 0x%p\n\n", data
->CurrentSC
);
1587 spin_unlock_irqrestore(&(data
->Lock
), flags
);
1589 thislength
= pos
- (buffer
+ offset
);
1591 if(thislength
< 0) {
1597 thislength
= MIN(thislength
, length
);
1598 *start
= buffer
+ offset
;
1605 * Note: n_io_port is defined as 0x7f because I/O register port is
1607 * 0x800-0x8ff: memory mapped I/O port
1608 * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
1609 * 0xc00-0xfff: CardBus status registers
1611 static int nsp32_detect(struct pci_dev
*pdev
)
1613 struct Scsi_Host
*host
; /* registered host structure */
1615 nsp32_hw_data
*data
;
1618 nsp32_dbg(NSP32_DEBUG_REGISTER
, "enter");
1621 * register this HBA as SCSI device
1623 host
= scsi_host_alloc(&nsp32_template
, sizeof(nsp32_hw_data
));
1625 nsp32_msg (KERN_ERR
, "failed to scsi register");
1632 data
= (nsp32_hw_data
*)host
->hostdata
;
1633 memset(data
, 0, sizeof(nsp32_hw_data
));
1635 data
->IrqNumber
= nsp32_data_base
.IrqNumber
;
1636 data
->BaseAddress
= nsp32_data_base
.BaseAddress
;
1637 data
->NumAddress
= nsp32_data_base
.NumAddress
;
1638 data
->MmioAddress
= nsp32_data_base
.MmioAddress
;
1639 data
->Pci
= nsp32_data_base
.Pci
;
1640 data
->pci_devid
= nsp32_data_base
.pci_devid
;
1642 host
->irq
= data
->IrqNumber
;
1643 host
->io_port
= data
->BaseAddress
;
1644 host
->unique_id
= data
->BaseAddress
;
1645 host
->n_io_port
= data
->NumAddress
;
1646 host
->base
= data
->MmioAddress
;
1647 scsi_set_device(host
, &data
->Pci
->dev
);
1650 spin_lock_init(&(data
->Lock
));
1652 data
->curlunt
= NULL
;
1653 data
->curtarget
= NULL
;
1656 * Bus master transfer mode is supported currently.
1658 data
->trans_method
= NSP32_TRANSFER_BUSMASTER
;
1661 * Set clock div, CLOCK_4 (HBA has external clock, and
1662 * dividing * 100ns/4).
1663 * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
1665 data
->clock
= CLOCK_4
;
1668 * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
1670 switch (data
->clock
) {
1672 /* If data->clock is CLOCK_4, then select 40M sync table. */
1673 data
->synct
= nsp32_sync_table_40M
;
1674 data
->syncnum
= nsp32_table_40M_num
;
1677 /* If data->clock is CLOCK_2, then select 20M sync table. */
1678 data
->synct
= nsp32_sync_table_20M
;
1679 data
->syncnum
= nsp32_table_20M_num
;
1682 /* If data->clock is PCICLK, then select pci sync table. */
1683 data
->synct
= nsp32_sync_table_pci
;
1684 data
->syncnum
= nsp32_table_pci_num
;
1687 nsp32_msg(KERN_WARNING
,
1688 "Invalid clock div is selected, set CLOCK_4.");
1689 /* Use default value CLOCK_4 */
1690 data
->clock
= CLOCK_4
;
1691 data
->synct
= nsp32_sync_table_40M
;
1692 data
->syncnum
= nsp32_table_40M_num
;
1698 data
->lunt_list
= (struct nsp32_lunt
*)
1699 kmalloc(sizeof(struct nsp32_lunt
) * MAX_TARGET
* MAX_LUN
,
1701 if (data
->lunt_list
== NULL
) {
1702 nsp32_msg(KERN_ERR
, "cannot allocate LUN memory");
1703 goto scsi_unregister
;
1705 nsp32_dbg(NSP32_DEBUG_REGISTER
, "0x%x 0x%x",
1706 data
->lunt_list
, sizeof(struct nsp32_lunt
)*MAX_TARGET
*MAX_LUN
);
1711 if (pci_set_dma_mask(data
->Pci
, 0xffffffffUL
)) {
1712 nsp32_msg (KERN_ERR
, "failed to set PCI DMA mask");
1717 * allocate autoparam DMA resource.
1719 data
->autoparam
= pci_alloc_consistent(data
->Pci
, AUTOPARAM_SIZE
, &data
->apaddr
);
1720 if (data
->autoparam
== NULL
) {
1721 nsp32_msg(KERN_ERR
, "failed to allocate DMA memory");
1726 * allocate scatter-gather DMA resource.
1728 data
->sg_list
= pci_alloc_consistent(data
->Pci
,
1729 (sizeof(struct nsp32_sgtable
) * NSP_SG_SIZE
* MAX_TARGET
* MAX_LUN
),
1731 if (data
->sg_list
== NULL
) {
1732 nsp32_msg(KERN_ERR
, "failed to allocate DMA memory");
1733 goto free_autoparam
;
1736 for (i
=0; i
<MAX_TARGET
; i
++) {
1737 for (j
=0; j
<MAX_LUN
; j
++) {
1738 data
->lunt
[i
][j
] = data
->lunt_list
+ (i
* MAX_LUN
+ j
);
1742 for (i
=0; i
<MAX_TARGET
; i
++) {
1743 for (j
=0; j
<MAX_LUN
; j
++) {
1744 struct nsp32_lunt
*lp
= data
->lunt
[i
][j
];
1745 lp
->sglun
= (struct nsp32_sglun
*)
1746 (data
->sg_list
+ (i
* MAX_LUN
+ j
));
1747 lp
->sglun_paddr
= data
->sgaddr
+
1748 (long)((i
* MAX_LUN
+ j
)
1749 * sizeof(struct nsp32_sglun
));
1752 lp
->msgin03
= FALSE
;
1761 for (i
=0; i
<MAX_TARGET
; i
++) {
1762 struct nsp32_target
*target
= &data
->target
[i
];
1764 target
->limit_entry
= 0;
1765 target
->sync_flag
= 0;
1766 nsp32_set_async(data
, target
);
1772 ret
= nsp32_getprom_param(data
);
1774 data
->resettime
= 3; /* default 3 */
1782 snprintf(data
->info_str
, sizeof(data
->info_str
),
1783 "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
1784 host
->irq
, host
->io_port
, host
->n_io_port
);
1789 * Note: It's important to reset SCSI bus in initialization phase.
1790 * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when system is
1791 * coming up, so SCSI devices connected to HBA is set as
1792 * un-asynchronous mode. It brings the merit that this HBA is
1793 * ready to start synchronous transfer without any preparation,
1794 * but we are difficult to control transfer speed. In addition,
1795 * it prevents device transfer speed from effecting EEPROM start-up
1796 * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as Auto
1797 * Mode, then FAST-10M is selected when SCSI devices are connected
1798 * same or more than 4 devices. It should be avoided depending on
1799 * this specification Thus, resetting the SCSI bus restores all
1800 * connected SCSI devices to asynchronous mode, then this driver
1801 * put SDTR safely later, and we can control all SCSI device
1804 nsp32_do_bus_reset(data
);
1806 ret
= request_irq(host
->irq
, do_nsp32_isr
, SA_SHIRQ
, "nsp32", data
);
1808 nsp32_msg(KERN_ERR
, "Unable to allocate IRQ for NSP32 "
1809 "SCSI PCI controller. Interrupt: %d\n", host
->irq
);
1816 if(!request_region(host
->io_port
, host
->n_io_port
, "nsp32")) {
1818 "I/O region 0x%lx+0x%lx is already used",
1819 data
->BaseAddress
, data
->length
);
1823 scsi_add_host(host
, &pdev
->dev
);
1824 pci_set_drvdata(pdev
, host
);
1828 free_irq(host
->irq
, data
);
1831 pci_free_consistent(data
->Pci
, AUTOPARAM_SIZE
, data
->autoparam
, data
->apaddr
);
1834 pci_free_consistent(data
->Pci
,
1835 (sizeof(struct nsp32_sgtable
) * NSP_SG_SIZE
* MAX_TARGET
* MAX_LUN
),
1836 data
->sg_list
, data
->sgaddr
);
1839 kfree(data
->lunt_list
);
1842 scsi_host_put(host
);
1848 static const char *nsp32_info(struct Scsi_Host
*shpnt
)
1850 nsp32_hw_data
*data
= (nsp32_hw_data
*)shpnt
->hostdata
;
1852 return data
->info_str
;
1856 static int nsp32_eh_abort(Scsi_Cmnd
*SCpnt
)
1858 nsp32_hw_data
*data
= (nsp32_hw_data
*)SCpnt
->device
->host
->hostdata
;
1859 unsigned int base
= data
->BaseAddress
;
1861 nsp32_msg(KERN_WARNING
, "abort");
1863 if (data
->curlunt
->SCpnt
== NULL
) {
1867 if (data
->curtarget
->sync_flag
& (SDTR_INITIATOR
| SDTR_TARGET
)) {
1868 /* reset SDTR negotiation */
1869 data
->curtarget
->sync_flag
= 0;
1872 nsp32_write2(base
, TRANSFER_CONTROL
, 0);
1873 nsp32_write2(base
, BM_CNT
, 0);
1878 static int nsp32_eh_bus_reset(Scsi_Cmnd
*SCpnt
)
1880 nsp32_hw_data
*data
= (nsp32_hw_data
*)SCpnt
->device
->host
->hostdata
;
1881 unsigned int base
= data
->BaseAddress
;
1883 nsp32_msg(KERN_INFO
, "Bus Reset");
1884 nsp32_dbg(NSP32_DEBUG_BUSRESET
, "SCpnt=0x%x", SCpnt
);
1886 nsp32_write2(base
, IRQ_CONTROL
, IRQ_CONTROL_ALL_IRQ_MASK
);
1887 nsp32_do_bus_reset(data
);
1888 nsp32_write2(base
, IRQ_CONTROL
, 0);
1890 return SUCCESS
; /* SCSI bus reset is succeeded at any time. */
1893 static void nsp32_do_bus_reset(nsp32_hw_data
*data
)
1895 unsigned int base
= data
->BaseAddress
;
1896 unsigned short intrdat
;
1901 * clear TRANSFERCONTROL_BM_START
1904 nsp32_write2(base
, TRANSFER_CONTROL
, 0);
1905 nsp32_write4(base
, BM_CNT
, 0);
1906 nsp32_write4(base
, CLR_COUNTER
, CLRCOUNTER_ALLMASK
);
1909 * fall back to asynchronous transfer mode
1910 * initialize SDTR negotiation flag
1912 for (i
=0; i
<MAX_TARGET
; i
++) {
1913 struct nsp32_target
*target
= &data
->target
[i
];
1915 target
->sync_flag
= 0;
1916 nsp32_set_async(data
, target
);
1922 nsp32_write1(base
, SCSI_BUS_CONTROL
, BUSCTL_RST
);
1923 udelay(RESET_HOLD_TIME
);
1924 nsp32_write1(base
, SCSI_BUS_CONTROL
, 0);
1925 for(i
= 0; i
< 5; i
++) {
1926 intrdat
= nsp32_read2(base
, IRQ_STATUS
); /* dummy read */
1927 nsp32_dbg(NSP32_DEBUG_BUSRESET
, "irq:1: 0x%x", intrdat
);
1930 data
->CurrentSC
= NULL
;
1933 static int nsp32_eh_host_reset(Scsi_Cmnd
*SCpnt
)
1935 struct Scsi_Host
*host
= SCpnt
->device
->host
;
1936 nsp32_hw_data
*data
= (nsp32_hw_data
*)host
->hostdata
;
1937 unsigned int base
= data
->BaseAddress
;
1939 nsp32_msg(KERN_INFO
, "Host Reset");
1940 nsp32_dbg(NSP32_DEBUG_BUSRESET
, "SCpnt=0x%x", SCpnt
);
1943 nsp32_write2(base
, IRQ_CONTROL
, IRQ_CONTROL_ALL_IRQ_MASK
);
1944 nsp32_do_bus_reset(data
);
1945 nsp32_write2(base
, IRQ_CONTROL
, 0);
1947 return SUCCESS
; /* Host reset is succeeded at any time. */
1951 * PCI/Cardbus probe/remove routine
1953 static int __devinit
nsp32_probe(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
1956 nsp32_hw_data
*data
= &nsp32_data_base
;
1958 nsp32_dbg(NSP32_DEBUG_REGISTER
, "enter");
1960 ret
= pci_enable_device(pdev
);
1962 nsp32_msg(KERN_ERR
, "failed to enable pci device");
1967 data
->pci_devid
= id
;
1968 data
->IrqNumber
= pdev
->irq
;
1969 data
->BaseAddress
= pci_resource_start(pdev
, 0);
1970 data
->NumAddress
= pci_resource_len(pdev
, 0);
1971 data
->MmioAddress
= (unsigned long)ioremap_nocache(
1972 pci_resource_start(pdev
, 1), pci_resource_len(pdev
, 1));
1974 pci_set_master(pdev
);
1976 ret
= nsp32_detect(pdev
);
1978 nsp32_msg(KERN_INFO
, "nsp32 irq: %i mmio: 0x%lx slot: %s model: %s",
1979 pdev
->irq
, data
->MmioAddress
, pdev
->slot_name
,
1980 nsp32_model
[id
->driver_data
]);
1982 nsp32_dbg(NSP32_DEBUG_REGISTER
, "exit");
1987 static void __devexit
nsp32_remove(struct pci_dev
*pdev
)
1989 struct Scsi_Host
*shpnt
= pci_get_drvdata(pdev
);
1990 nsp32_hw_data
*data
= (nsp32_hw_data
*)shpnt
->hostdata
;
1992 kfree(data
->lunt_list
);
1993 pci_free_consistent(data
->Pci
, AUTOPARAM_SIZE
,
1994 data
->autoparam
, data
->apaddr
);
1995 pci_free_consistent(data
->Pci
,
1996 (sizeof(struct nsp32_sgtable
) * NSP_SG_SIZE
*MAX_TARGET
*MAX_LUN
),
1997 data
->sg_list
, data
->sgaddr
);
1998 free_irq(shpnt
->irq
, data
);
1999 release_region(shpnt
->io_port
, shpnt
->n_io_port
);
2000 iounmap((void *)(data
->MmioAddress
));
2003 static struct pci_device_id nsp32_pci_table
[] __devinitdata
= {
2005 .vendor
= PCI_VENDOR_ID_IODATA
,
2006 .device
= PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II
,
2007 .subvendor
= PCI_ANY_ID
,
2008 .subdevice
= PCI_ANY_ID
,
2009 .driver_data
= MODEL_IODATA
,
2012 .vendor
= PCI_VENDOR_ID_WORKBIT
,
2013 .device
= PCI_DEVICE_ID_NINJASCSI_32BI_KME
,
2014 .subvendor
= PCI_ANY_ID
,
2015 .subdevice
= PCI_ANY_ID
,
2016 .driver_data
= MODEL_KME
,
2019 .vendor
= PCI_VENDOR_ID_WORKBIT
,
2020 .device
= PCI_DEVICE_ID_NINJASCSI_32BI_WBT
,
2021 .subvendor
= PCI_ANY_ID
,
2022 .subdevice
= PCI_ANY_ID
,
2023 .driver_data
= MODEL_WORKBIT
,
2026 .vendor
= PCI_VENDOR_ID_WORKBIT
,
2027 .device
= PCI_DEVICE_ID_WORKBIT_STANDARD
,
2028 .subvendor
= PCI_ANY_ID
,
2029 .subdevice
= PCI_ANY_ID
,
2030 .driver_data
= MODEL_PCI_WORKBIT
,
2033 .vendor
= PCI_VENDOR_ID_WORKBIT
,
2034 .device
= PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC
,
2035 .subvendor
= PCI_ANY_ID
,
2036 .subdevice
= PCI_ANY_ID
,
2037 .driver_data
= MODEL_EXT_ROM
,
2040 .vendor
= PCI_VENDOR_ID_WORKBIT
,
2041 .device
= PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC
,
2042 .subvendor
= PCI_ANY_ID
,
2043 .subdevice
= PCI_ANY_ID
,
2044 .driver_data
= MODEL_PCI_LOGITEC
,
2047 .vendor
= PCI_VENDOR_ID_WORKBIT
,
2048 .device
= PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO
,
2049 .subvendor
= PCI_ANY_ID
,
2050 .subdevice
= PCI_ANY_ID
,
2051 .driver_data
= MODEL_PCI_MELCO
,
2055 MODULE_DEVICE_TABLE(pci
, nsp32_pci_table
);
2057 static struct pci_driver nsp32_driver
= {
2059 .id_table
= nsp32_pci_table
,
2060 .probe
= nsp32_probe
,
2061 .remove
= nsp32_remove
,
2063 /* .suspend = nsp32_suspend,*/
2064 /* .resume = nsp32_resume,*/
2068 static int __init
init_nsp32(void) {
2069 return pci_module_init(&nsp32_driver
);
2072 static void __exit
exit_nsp32(void) {
2073 pci_unregister_driver(&nsp32_driver
);
2076 module_init(init_nsp32
);
2077 module_exit(exit_nsp32
);
2081 * Reset parameters and call scsi_done for data->curlunt.
2082 * Be careful setting SCpnt->result = DID_* before calling this function.
2084 static void nsp32_scsi_done(nsp32_hw_data
*data
, Scsi_Cmnd
*SCpnt
)
2086 unsigned int base
= data
->BaseAddress
;
2091 if (SCpnt
->request_bufflen
== 0) {
2095 if (SCpnt
->use_sg
) {
2096 pci_unmap_sg(data
->Pci
,
2097 (struct scatterlist
*)SCpnt
->buffer
,
2099 scsi_to_pci_dma_dir(SCpnt
->sc_data_direction
));
2101 pci_unmap_single(data
->Pci
,
2102 (u32
)SCpnt
->SCp
.have_data_in
,
2103 SCpnt
->request_bufflen
,
2104 scsi_to_pci_dma_dir(SCpnt
->sc_data_direction
));
2109 * clear TRANSFERCONTROL_BM_START
2111 nsp32_write2(base
, TRANSFER_CONTROL
, 0);
2112 nsp32_write4(base
, BM_CNT
, 0);
2117 (*SCpnt
->scsi_done
)(SCpnt
);
2122 data
->curlunt
->SCpnt
= NULL
;
2123 data
->curlunt
= NULL
;
2124 data
->curtarget
= NULL
;
2125 data
->CurrentSC
= NULL
;
2132 * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
2133 * with ACK reply when below condition is matched:
2134 * MsgIn 00: Command Complete.
2135 * MsgIn 02: Save Data Pointer.
2136 * MsgIn 04: Diconnect.
2137 * In other case, unexpected BUSFREE is detected.
2139 static int nsp32_busfree_occur(nsp32_hw_data
*data
, unsigned short execph
)
2141 Scsi_Cmnd
*SCpnt
= data
->curlunt
->SCpnt
;
2142 unsigned int base
= data
->BaseAddress
;
2144 nsp32_dbg(NSP32_DEBUG_BUSFREE
, "enter");
2146 nsp32_write4(base
, BM_CNT
, 0);
2147 nsp32_write2(base
, TRANSFER_CONTROL
, 0);
2150 * MsgIn 02: Save Data Pointer
2153 * Save Data Pointer is received. Adjust pointer.
2156 * SCSI-3 says if Save Data Pointer is not received, then we restart
2157 * processing and we can't adjust any SCSI data pointer in next data
2160 if (execph
& MSGIN_02_VALID
) {
2161 nsp32_dbg(NSP32_DEBUG_BUSFREE
, "MsgIn02_Valid");
2164 * Check sack_cnt/saved_sack_cnt, then adjust sg table if
2167 if (!(execph
& MSGIN_00_VALID
) &&
2168 ((execph
& DATA_IN_PHASE
) || (execph
& DATA_OUT_PHASE
))) {
2169 unsigned int sacklen
, s_sacklen
;
2172 * Read SACK count and SAVEDSACK count, then compare.
2174 sacklen
= nsp32_read4(base
, SACK_CNT
);
2175 s_sacklen
= nsp32_read4(base
, SAVED_SACK_CNT
);
2178 * If SAVEDSACKCNT == 0, it means SavedDataPointer is
2179 * come after data transfering.
2181 if (s_sacklen
> 0) {
2183 * Comparing between sack and savedsack to
2184 * check the condition of AutoMsgIn03.
2186 * If they are same, set msgin03 == TRUE,
2187 * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
2188 * reselection. On the other hand, if they
2189 * aren't same, set msgin03 == FALSE, and
2190 * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
2193 if (sacklen
!= s_sacklen
) {
2194 data
->curlunt
->msgin03
= FALSE
;
2196 data
->curlunt
->msgin03
= TRUE
;
2199 nsp32_adjust_busfree(data
, s_sacklen
);
2203 /* This value has not substitude with valid value yet... */
2204 //data->curlunt->save_datp = data->cur_datp;
2211 if (execph
& MSGIN_03_VALID
) {
2212 /* MsgIn03 was valid to be processed. No need processing. */
2218 if (data
->curtarget
->sync_flag
& SDTR_INITIATOR
) {
2220 * SDTR negotiation pulled by the initiator has not
2221 * finished yet. Fall back to ASYNC mode.
2223 nsp32_set_async(data
, data
->curtarget
);
2224 data
->curtarget
->sync_flag
&= ~SDTR_INITIATOR
;
2225 data
->curtarget
->sync_flag
|= SDTR_DONE
;
2226 } else if (data
->curtarget
->sync_flag
& SDTR_TARGET
) {
2228 * SDTR negotiation pulled by the target has been
2231 if (execph
& (MSGIN_00_VALID
| MSGIN_04_VALID
)) {
2233 * If valid message is received, then
2234 * negotiation is succeeded.
2238 * On the contrary, if unexpected bus free is
2239 * occurred, then negotiation is failed. Fall
2240 * back to ASYNC mode.
2242 nsp32_set_async(data
, data
->curtarget
);
2244 data
->curtarget
->sync_flag
&= ~SDTR_TARGET
;
2245 data
->curtarget
->sync_flag
|= SDTR_DONE
;
2249 * It is always ensured by SCSI standard that initiator
2250 * switches into Bus Free Phase after
2251 * receiving message 00 (Command Complete), 04 (Disconnect).
2252 * It's the reason that processing here is valid.
2254 if (execph
& MSGIN_00_VALID
) {
2255 /* MsgIn 00: Command Complete */
2256 nsp32_dbg(NSP32_DEBUG_BUSFREE
, "command complete");
2258 SCpnt
->SCp
.Status
= nsp32_read1(base
, SCSI_CSB_IN
);
2259 SCpnt
->SCp
.Message
= 0;
2260 nsp32_dbg(NSP32_DEBUG_BUSFREE
,
2261 "normal end stat=0x%x resid=0x%x\n",
2262 SCpnt
->SCp
.Status
, SCpnt
->resid
);
2264 (DID_OK
<< 16) | (SCpnt
->SCp
.Message
<< 8) | (SCpnt
->SCp
.Status
<< 0);
2265 nsp32_scsi_done(data
, SCpnt
);
2266 /* All operation is done */
2268 } else if (execph
& MSGIN_04_VALID
) {
2269 /* MsgIn 04: Disconnect */
2270 SCpnt
->SCp
.Status
= nsp32_read1(base
, SCSI_CSB_IN
);
2271 SCpnt
->SCp
.Message
= 4;
2273 nsp32_dbg(NSP32_DEBUG_BUSFREE
, "disconnect");
2276 /* Unexpected bus free */
2277 nsp32_msg(KERN_WARNING
, "unexpected bus free occurred");
2280 //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0);
2281 SCpnt
->result
= DID_ERROR
<< 16;
2282 nsp32_scsi_done(data
, SCpnt
);
2290 * nsp32_adjust_busfree - adjusting SG table
2292 * Note: This driver adjust the SG table using SCSI ACK
2293 * counter instead of BMCNT counter!
2295 static void nsp32_adjust_busfree(nsp32_hw_data
*data
, unsigned int s_sacklen
)
2297 int old_entry
= data
->cur_entry
;
2299 struct nsp32_sgtable
*sgt
= data
->curlunt
->sglun
->sgt
;
2300 unsigned int restlen
, sentlen
;
2301 int sg_num
= data
->curlunt
->sg_num
;
2303 /* adjust saved SACK count with 4 byte start address boundary */
2304 s_sacklen
-= sgt
[old_entry
].addr
& 3;
2307 * calculate new_entry from sack count and each sgt[].len
2308 * calculate the byte which is intent to send
2311 for (new_entry
= old_entry
; new_entry
< sg_num
; new_entry
++) {
2312 sentlen
+= (sgt
[new_entry
].len
& ~NSP32_SG_END_SGT
);
2313 if (sentlen
> s_sacklen
) {
2318 /* all sgt is processed */
2319 if (new_entry
== sg_num
) {
2323 if (sentlen
== s_sacklen
) {
2324 /* XXX: confirm it's ok or not */
2325 /* In this case, it's ok because we are at
2326 the head element of the sg. restlen is correctly calculated. */
2329 /* calculate the rest length for transfering */
2330 restlen
= sentlen
- s_sacklen
;
2332 /* update adjusting current SG table entry */
2333 sgt
[new_entry
].addr
+= (sgt
[new_entry
].len
- restlen
);
2334 sgt
[new_entry
].len
= restlen
;
2336 /* set cur_entry with new_entry */
2337 data
->cur_entry
= new_entry
;
2342 /* update hostdata and lun */
2349 * It's called MsgOut phase occur.
2350 * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
2351 * message out phase. It, however, has more than 3 messages,
2352 * HBA creates the interrupt and we have to process by hand.
2354 static void nsp32_msgout_occur(nsp32_hw_data
*data
)
2356 unsigned int base
= data
->BaseAddress
;
2360 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR
,
2361 "enter: msgoutlen: 0x%x", data
->msgoutlen
);
2364 * If MsgOut phase is occurred without having any
2365 * message, then No_Operation is sent (SCSI-2).
2367 if (data
->msgoutlen
== 0) {
2368 nsp32_build_nop(data
);
2372 * Set SGTP ADDR current entry for restarting AUTOSCSI,
2373 * because SGTP is incremented next point.
2374 * There is few statement in the specification...
2376 new_sgtp
= data
->curlunt
->sglun_paddr
2377 + data
->curlunt
->cur_entry
* sizeof(struct nsp32_sgtable
);
2382 for (i
=0; i
<data
->msgoutlen
; i
++) {
2383 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR
,
2384 "%d : 0x%x", i
, data
->msgoutbuf
[i
]);
2387 * Check REQ is asserted.
2389 nsp32_wait_req(data
, ASSERT
);
2391 if (i
== (data
->msgoutlen
- 1)) {
2393 * If the last message, set the AutoSCSI restart
2394 * before send back the ack message. AutoSCSI
2395 * restart automatically negate ATN signal.
2397 //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
2398 //nsp32_restart_autoscsi(data, command);
2399 nsp32_write2(base
, COMMAND_CONTROL
,
2400 (CLEAR_CDB_FIFO_POINTER
|
2401 AUTO_COMMAND_PHASE
|
2403 AUTO_MSGIN_00_OR_04
|
2407 * Write data with SACK, then wait sack is
2408 * automatically negated.
2410 nsp32_write1(base
, SCSI_DATA_WITH_ACK
, data
->msgoutbuf
[i
]);
2411 nsp32_wait_sack(data
, NEGATE
);
2413 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR
, "bus: 0x%x\n",
2414 nsp32_read1(base
, SCSI_BUS_MONITOR
));
2417 data
->msgoutlen
= 0;
2419 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR
, "exit");
2425 * Note: Restarting AutoSCSI needs set:
2426 * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
2428 static void nsp32_restart_autoscsi(nsp32_hw_data
*data
, unsigned short command
)
2430 unsigned int base
= data
->BaseAddress
;
2431 unsigned short transfer
= 0;
2432 Scsi_Cmnd
*SCpnt
= data
->curlunt
->SCpnt
;
2434 nsp32_dbg(NSP32_DEBUG_RESTART
, "enter");
2436 if (data
->curtarget
== NULL
|| data
->curlunt
== NULL
) {
2437 nsp32_msg(KERN_ERR
, "Target or Lun is invalid");
2442 * Don't set BM_START_ADR before setting this register.
2444 nsp32_write1(base
, SYNC_REG
, data
->curtarget
->syncreg
);
2449 nsp32_write1(base
, ACK_WIDTH
, data
->curtarget
->ackwidth
);
2452 * set SGT ADDR (physical address)
2454 nsp32_write4(base
, SGT_ADR
, data
->curlunt
->sglun_paddr
);
2457 * set TRANSFER CONTROL REG
2460 transfer
|= (TRANSFER_GO
| ALL_COUNTER_CLR
);
2461 if (data
->trans_method
& NSP32_TRANSFER_BUSMASTER
) {
2462 if (SCpnt
->request_bufflen
> 0) {
2463 transfer
|= BM_START
;
2465 } else if (data
->trans_method
& NSP32_TRANSFER_MMIO
) {
2466 transfer
|= CB_MMIO_MODE
;
2467 } else if (data
->trans_method
& NSP32_TRANSFER_PIO
) {
2468 transfer
|= CB_IO_MODE
;
2470 nsp32_write2(base
, TRANSFER_CONTROL
, transfer
);
2475 * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
2477 command
|= (CLEAR_CDB_FIFO_POINTER
|
2478 AUTO_COMMAND_PHASE
|
2480 nsp32_write2(base
, COMMAND_CONTROL
, command
);
2482 nsp32_dbg(NSP32_DEBUG_RESTART
, "exit");
2487 * cannot run automatically message in occur
2489 static void nsp32_msgin_occur(nsp32_hw_data
*data
, unsigned long irq_status
,
2490 unsigned short execph
)
2492 unsigned int base
= data
->BaseAddress
;
2494 unsigned char msgtype
;
2495 unsigned char newlun
;
2496 unsigned short command
= 0;
2497 int msgclear
= TRUE
;
2502 * read first message
2503 * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
2504 * of Message-In have to be processed before sending back SCSI ACK.
2506 msg
= nsp32_read1(base
, SCSI_DATA_IN
);
2507 data
->msginbuf
[(unsigned char)data
->msginlen
] = msg
;
2508 msgtype
= data
->msginbuf
[0];
2509 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR
,
2510 "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
2511 data
->msginlen
, msg
, msgtype
);
2514 * TODO: We need checking whether bus phase is message in?
2520 nsp32_sack_assert(data
);
2523 * processing IDENTIFY
2525 if (msgtype
& 0x80) {
2526 if (!(irq_status
& IRQSTATUS_RESELECT_OCCUER
)) {
2527 /* Invalid (non reselect) phase */
2531 newlun
= msgtype
& 0x1f; /* TODO: SPI-3 compliant? */
2532 ret
= nsp32_reselection(data
, newlun
);
2541 * processing messages except for IDENTIFY
2543 * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
2549 case COMMAND_COMPLETE
:
2552 * These messages should not be occurred.
2553 * They should be processed on AutoSCSI sequencer.
2555 nsp32_msg(KERN_WARNING
,
2556 "unexpected message of AutoSCSI MsgIn: 0x%x", msg
);
2559 case RESTORE_POINTERS
:
2561 * AutoMsgIn03 is disabled, and HBA gets this message.
2564 if ((execph
& DATA_IN_PHASE
) || (execph
& DATA_OUT_PHASE
)) {
2565 unsigned int s_sacklen
;
2567 s_sacklen
= nsp32_read4(base
, SAVED_SACK_CNT
);
2568 if ((execph
& MSGIN_02_VALID
) && (s_sacklen
> 0)) {
2569 nsp32_adjust_busfree(data
, s_sacklen
);
2571 /* No need to rewrite SGT */
2574 data
->curlunt
->msgin03
= FALSE
;
2576 /* Update with the new value */
2578 /* reset SACK/SavedACK counter (or ALL clear?) */
2579 nsp32_write4(base
, CLR_COUNTER
, CLRCOUNTER_ALLMASK
);
2582 * set new sg pointer
2584 new_sgtp
= data
->curlunt
->sglun_paddr
+
2585 data
->curlunt
->cur_entry
* sizeof(struct nsp32_sgtable
);
2586 nsp32_write4(base
, SGT_ADR
, new_sgtp
);
2592 * These messages should not be occurred.
2593 * They should be processed on AutoSCSI sequencer.
2595 nsp32_msg (KERN_WARNING
,
2596 "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
2600 case MESSAGE_REJECT
:
2601 /* If previous message_out is sending SDTR, and get
2602 message_reject from target, SDTR negotiation is failed */
2603 if (data
->curtarget
->sync_flag
&
2604 (SDTR_INITIATOR
| SDTR_TARGET
)) {
2606 * Current target is negotiating SDTR, but it's
2607 * failed. Fall back to async transfer mode, and set
2610 nsp32_set_async(data
, data
->curtarget
);
2611 data
->curtarget
->sync_flag
&= ~SDTR_INITIATOR
;
2612 data
->curtarget
->sync_flag
|= SDTR_DONE
;
2617 case LINKED_CMD_COMPLETE
:
2618 case LINKED_FLG_CMD_COMPLETE
:
2619 /* queue tag is not supported currently */
2620 nsp32_msg (KERN_WARNING
,
2621 "unsupported message: 0x%x", msgtype
);
2624 case INITIATE_RECOVERY
:
2625 /* staring ECA (Extended Contingent Allegiance) state. */
2626 /* This message is declined in SPI2 or later. */
2633 case SIMPLE_QUEUE_TAG
:
2636 * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
2637 * No support is needed.
2639 if (data
->msginlen
>= 1) {
2643 /* current position is 1-byte of 2 byte */
2651 case EXTENDED_MESSAGE
:
2652 if (data
->msginlen
< 1) {
2654 * Current position does not reach 2-byte
2655 * (2-byte is extended message length).
2661 if ((data
->msginbuf
[1] + 1) > data
->msginlen
) {
2663 * Current extended message has msginbuf[1] + 2
2664 * (msginlen starts counting from 0, so buf[1] + 1).
2665 * If current message position is not finished,
2666 * continue receiving message.
2673 * Reach here means regular length of each type of
2674 * extended messages.
2676 switch (data
->msginbuf
[2]) {
2677 case EXTENDED_MODIFY_DATA_POINTER
:
2679 goto reject
; /* not implemented yet */
2684 * Exchange this message between initiator and target.
2686 if (data
->msginlen
!= EXTENDED_SDTR_LEN
+ 1) {
2688 * received inappropriate message.
2694 nsp32_analyze_sdtr(data
);
2698 case EXTENDED_EXTENDED_IDENTIFY
:
2699 /* SCSI-I only, not supported. */
2700 goto reject
; /* not implemented yet */
2705 goto reject
; /* not implemented yet */
2719 if (msgclear
== TRUE
) {
2723 * If restarting AutoSCSI, but there are some message to out
2724 * (msgoutlen > 0), set AutoATN, and set SCSIMSGOUT as 0
2725 * (MV_VALID = 0). When commandcontrol is written with
2726 * AutoSCSI restart, at the same time MsgOutOccur should be
2727 * happened (however, such situation is really possible...?).
2729 if (data
->msgoutlen
> 0) {
2730 nsp32_write4(base
, SCSI_MSG_OUT
, 0);
2731 command
|= AUTO_ATN
;
2736 * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
2738 command
|= (AUTO_MSGIN_00_OR_04
| AUTO_MSGIN_02
);
2741 * If current msgin03 is TRUE, then flag on.
2743 if (data
->curlunt
->msgin03
== TRUE
) {
2744 command
|= AUTO_MSGIN_03
;
2746 data
->curlunt
->msgin03
= FALSE
;
2754 nsp32_restart_autoscsi(data
, command
);
2757 * wait SCSI REQ negate for REQ-ACK handshake
2759 nsp32_wait_req(data
, NEGATE
);
2764 nsp32_sack_negate(data
);
2766 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR
, "exit");
2771 nsp32_msg(KERN_WARNING
,
2772 "invalid or unsupported MessageIn, rejected. "
2773 "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
2774 msg
, data
->msginlen
, msgtype
);
2775 nsp32_build_reject(data
);
2784 static void nsp32_analyze_sdtr(nsp32_hw_data
*data
)
2786 struct nsp32_target
*target
= data
->curtarget
;
2787 struct nsp32_sync_table
*synct
;
2788 unsigned char get_period
= data
->msginbuf
[3];
2789 unsigned char get_offset
= data
->msginbuf
[4];
2793 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR
, "enter");
2795 synct
= data
->synct
;
2796 syncnum
= data
->syncnum
;
2799 * If this inititor sent the SDTR message, then target responds SDTR,
2800 * initiator SYNCREG, ACKWIDTH from SDTR parameter.
2801 * Messages are not appropriate, then send back reject message.
2802 * If initiator did not send the SDTR, but target sends SDTR,
2803 * initiator calculator the appropriate parameter and send back SDTR.
2805 if (target
->sync_flag
& SDTR_INITIATOR
) {
2807 * Initiator sent SDTR, the target responds and
2808 * send back negotiation SDTR.
2810 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR
, "target responds SDTR");
2812 target
->sync_flag
&= ~SDTR_INITIATOR
;
2813 target
->sync_flag
|= SDTR_DONE
;
2818 if (get_offset
> SYNC_OFFSET
) {
2820 * Negotiation is failed, the target send back
2821 * unexpected offset value.
2826 if (get_offset
== ASYNC_OFFSET
) {
2828 * Negotiation is succeeded, the target want
2829 * to fall back into asynchronous transfer mode.
2836 * Check whether sync period is too short. If too short,
2837 * fall back to async mode. If it's ok, then investigate
2838 * the received sync period. If sync period is acceptable
2839 * between sync table start_period and end_period, then
2840 * set this I_T nexus as sent offset and period.
2841 * If it's not acceptable, send back reject and fall back
2844 if (get_period
< data
->synct
[0].period_num
) {
2846 * Negotiation is failed, the target send back
2847 * unexpected period value.
2852 entry
= nsp32_search_period_entry(data
, target
, get_period
);
2856 * Target want to use long period which is not
2857 * acceptable NinjaSCSI-32Bi/UDE.
2863 * Set new sync table and offset in this I_T nexus.
2865 nsp32_set_sync_entry(data
, target
, entry
, get_offset
);
2867 /* Target send SDTR to initiator. */
2868 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR
, "target send SDTR");
2870 target
->sync_flag
|= SDTR_INITIATOR
;
2873 if (get_offset
> SYNC_OFFSET
) {
2874 /* send back as SYNC_OFFSET */
2875 get_offset
= SYNC_OFFSET
;
2879 if (get_period
< data
->synct
[0].period_num
) {
2880 get_period
= data
->synct
[0].period_num
;
2883 entry
= nsp32_search_period_entry(data
, target
, get_period
);
2885 if (get_offset
== ASYNC_OFFSET
|| entry
< 0) {
2886 nsp32_set_async(data
, target
);
2887 nsp32_build_sdtr(data
, 0, ASYNC_OFFSET
);
2889 nsp32_set_sync_entry(data
, target
, entry
, get_offset
);
2890 nsp32_build_sdtr(data
, get_period
, get_offset
);
2894 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR
, "exit");
2899 * If the current message is unacceptable, send back to the target
2900 * with reject message.
2902 nsp32_build_reject(data
);
2905 nsp32_set_async(data
, target
); /* set as ASYNC transfer mode */
2907 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR
, "exit: set async");
2913 * Search config entry number matched in sync_table from given
2914 * target and speed period value. If failed to search, return negative value.
2916 static int nsp32_search_period_entry(nsp32_hw_data
*data
,
2917 struct nsp32_target
*target
,
2918 unsigned char period
)
2922 if (target
->limit_entry
>= data
->syncnum
) {
2923 nsp32_msg(KERN_ERR
, "limit_entry exceeds syncnum!");
2924 target
->limit_entry
= 0;
2927 for (i
=target
->limit_entry
; i
<data
->syncnum
; i
++) {
2928 if (period
>= data
->synct
[i
].start_period
&&
2929 period
<= data
->synct
[i
].end_period
) {
2935 * Check given period value is over the sync_table value.
2936 * If so, return max value.
2938 if (i
== data
->syncnum
) {
2947 * target <-> initiator use ASYNC transfer
2949 static void nsp32_set_async(nsp32_hw_data
*data
, struct nsp32_target
*target
)
2951 unsigned char period
= data
->synct
[target
->limit_entry
].period_num
;
2953 target
->offset
= ASYNC_OFFSET
;
2954 target
->syncreg
= TO_SYNCREG(period
, ASYNC_OFFSET
);
2955 target
->ackwidth
= 0;
2957 nsp32_dbg(NSP32_DEBUG_SYNC
, "set async");
2962 * target <-> initiator use maximum SYNC transfer
2964 static void nsp32_set_max_sync(nsp32_hw_data
*data
,
2965 struct nsp32_target
*target
,
2966 unsigned char *period
, unsigned char *offset
)
2968 unsigned char period_num
, ackwidth
;
2970 period_num
= data
->synct
[target
->limit_entry
].period_num
;
2971 *period
= data
->synct
[target
->limit_entry
].start_period
;
2972 ackwidth
= data
->synct
[target
->limit_entry
].ackwidth
;
2973 *offset
= SYNC_OFFSET
;
2975 target
->syncreg
= TO_SYNCREG(period_num
, *offset
);
2976 target
->ackwidth
= ackwidth
;
2977 target
->offset
= *offset
;
2982 * target <-> initiator use entry number speed
2984 static void nsp32_set_sync_entry(nsp32_hw_data
*data
,
2985 struct nsp32_target
*target
,
2986 int entry
, unsigned char offset
)
2988 unsigned char period
, ackwidth
;
2990 period
= data
->synct
[entry
].period_num
;
2991 ackwidth
= data
->synct
[entry
].ackwidth
;
2994 target
->syncreg
= TO_SYNCREG(period
, offset
);
2995 target
->ackwidth
= ackwidth
;
2996 target
->offset
= offset
;
2998 nsp32_dbg(NSP32_DEBUG_SYNC
, "set sync");
3003 * It waits until SCSI REQ becomes assertion or negation state.
3005 * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
3006 * connected target responds SCSI REQ negation. We have to wait
3007 * SCSI REQ becomes negation in order to negate SCSI ACK signal for
3008 * REQ-ACK handshake.
3010 static void nsp32_wait_req(nsp32_hw_data
*data
, int state
)
3012 unsigned int base
= data
->BaseAddress
;
3016 if (!((state
== ASSERT
) || (state
== NEGATE
))) {
3017 nsp32_msg(KERN_ERR
, "unknown state designation");
3019 state
<<= 5; /* REQ is BIT(5) */
3022 bus
= nsp32_read1(base
, SCSI_BUS_MONITOR
);
3023 if ((bus
& BUSMON_REQ
) == state
) {
3024 nsp32_dbg(NSP32_DEBUG_WAIT
,
3025 "wait_time: %d", wait_time
);
3030 } while (wait_time
< REQSACK_TIMEOUT_TIME
);
3032 nsp32_msg(KERN_WARNING
, "wait REQ timeout, state: %d", state
);
3036 * It waits until SCSI SACK becomes assertion or negation state.
3038 static void nsp32_wait_sack(nsp32_hw_data
*data
, int state
)
3040 unsigned int base
= data
->BaseAddress
;
3044 if (!((state
== ASSERT
) || (state
== NEGATE
))) {
3045 nsp32_msg(KERN_ERR
, "unknown state designation");
3047 state
<<= 4; /* ACK is BIT(4) */
3050 bus
= nsp32_read1(base
, SCSI_BUS_MONITOR
);
3051 if ((bus
& BUSMON_ACK
) == state
) {
3052 nsp32_dbg(NSP32_DEBUG_WAIT
,
3053 "wait_time: %d", wait_time
);
3058 } while (wait_time
< REQSACK_TIMEOUT_TIME
);
3060 nsp32_msg(KERN_WARNING
, "wait SACK timeout, state: %d", state
);
3066 * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
3068 static void nsp32_sack_assert(nsp32_hw_data
*data
)
3070 unsigned char busctrl
;
3071 unsigned int base
= data
->BaseAddress
;
3073 busctrl
= nsp32_read1(base
, SCSI_BUS_CONTROL
);
3074 busctrl
|= (BUSCTL_ACK
| AUTODIRECTION
| ACKENB
);
3075 nsp32_write1(base
, SCSI_BUS_CONTROL
,busctrl
);
3081 static void nsp32_sack_negate(nsp32_hw_data
*data
)
3083 unsigned char busctrl
;
3084 unsigned int base
= data
->BaseAddress
;
3086 busctrl
= nsp32_read1(base
, SCSI_BUS_CONTROL
);
3087 busctrl
&= ~BUSCTL_ACK
;
3088 nsp32_write1(base
, SCSI_BUS_CONTROL
, busctrl
);
3094 * getting EEPROM parameter
3096 static int nsp32_getprom_param(nsp32_hw_data
*data
)
3098 int vendor
= data
->pci_devid
->vendor
;
3099 int device
= data
->pci_devid
->device
;
3105 ret
= nsp32_prom_read(data
, 0x7e);
3107 nsp32_msg(KERN_INFO
, "No EEPROM detected: 0x%x", ret
);
3110 ret
= nsp32_prom_read(data
, 0x7f);
3112 nsp32_msg(KERN_INFO
, "Invalid number: 0x%x", ret
);
3119 if (vendor
== PCI_VENDOR_ID_WORKBIT
&&
3120 device
== PCI_DEVICE_ID_WORKBIT_STANDARD
) {
3121 ret
= nsp32_getprom_standard(data
);
3122 } else if (vendor
== PCI_VENDOR_ID_WORKBIT
&&
3123 device
== PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC
) {
3124 ret
= nsp32_getprom_new(data
);
3125 } else if (vendor
== PCI_VENDOR_ID_WORKBIT
&&
3126 device
== PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO
) {
3127 ret
= nsp32_getprom_new(data
);
3129 nsp32_msg(KERN_WARNING
, "Unknown EEPROM");
3133 /* for debug : SPROM data full checking */
3134 for (i
=0; i
<=0x1f; i
++) {
3135 val
= nsp32_prom_read(data
, i
);
3136 nsp32_dbg(NSP32_DEBUG_EEPROM
,
3137 "rom address 0x%x : 0x%x", i
, val
);
3145 * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
3148 * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
3149 * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
3150 * 0x07 : HBA Synchronous Transfer Period
3151 * Value 0: AutoSync, 1: Manual Setting
3152 * 0x08 - 0x0f : Not Used? (0x0)
3153 * 0x10 : Bus Termination
3154 * Value 0: Auto[ON], 1: ON, 2: OFF
3155 * 0x11 : Not Used? (0)
3156 * 0x12 : Bus Reset Delay Time (0x03)
3157 * 0x13 : Bootable CD Support
3158 * Value 0: Disable, 1: Enable
3159 * 0x14 : Device Scan
3160 * Bit 7 6 5 4 3 2 1 0
3161 * | <----------------->
3162 * | SCSI ID: Value 0: Skip, 1: YES
3163 * |-> Value 0: ALL scan, Value 1: Manual
3164 * 0x15 - 0x1b : Not Used? (0)
3165 * 0x1c : Constant? (0x01) (clock div?)
3166 * 0x1d - 0x7c : Not Used (0xff)
3167 * 0x7d : Not Used? (0xff)
3168 * 0x7e : Constant (0x55), HBA chip revision
3169 * 0x7f : Constant (0xaa), HBA value
3171 static int nsp32_getprom_new(nsp32_hw_data
*data
)
3175 struct nsp32_target
*target
;
3179 * Reset time which is designated by EEPROM.
3181 * TODO: Not used yet.
3183 data
->resettime
= nsp32_prom_read(data
, 0x12);
3186 * HBA Synchronous Transfer Period
3188 * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
3189 * that if auto_sync is 0 (auto), and connected SCSI devices are
3190 * same or lower than 3, then transfer speed is set as ULTRA-20M.
3191 * On the contrary if connected SCSI devices are same or higher
3192 * than 4, then transfer speed is set as FAST-10M.
3194 * I break this rule. The number of connected SCSI devices are
3195 * only ignored. If auto_sync is 0 (auto), then transfer speed is
3196 * forced as ULTRA-20M.
3198 ret
= nsp32_prom_read(data
, 0x07);
3207 nsp32_msg(KERN_WARNING
,
3208 "Unsupported Auto Sync mode."
3209 "Fall back to manual mode.");
3213 if (trans_mode
== ULTRA20M_MODE
) {
3218 * each device Synchronous Transfer Period
3220 for (i
=0; i
<NSP32_HOST_SCSIID
; i
++) {
3221 target
= &data
->target
[i
];
3222 if (auto_sync
== TRUE
) {
3223 target
->limit_entry
= 0; /* set as ULTRA20M */
3225 ret
= nsp32_prom_read(data
, i
);
3226 entry
= nsp32_search_period_entry(data
, target
, ret
);
3228 /* search failed... set maximum speed */
3231 target
->limit_entry
= entry
;
3240 * ? (I-O Data: SC-NBD) data map:
3243 * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
3244 * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
3245 * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
3246 * 0x08 - 0x0f : Not Used? (0x0)
3247 * 0x10 : Transfer Mode
3248 * Value 0: PIO, 1: Busmater
3249 * 0x11 : Bus Reset Delay Time (0x00-0x20)
3250 * 0x12 : Bus Termination
3251 * Value 0: Disable, 1: Enable
3252 * 0x13 - 0x19 : Disconnection
3253 * Value 0: Disable, 1: Enable
3254 * 0x1a - 0x7c : Not Used? (0)
3255 * 0x7d : Not Used? (0xf8)
3256 * 0x7e : Constant (0x55), HBA chip revision
3257 * 0x7f : Constant (0xaa), HBA value
3259 static int nsp32_getprom_standard(nsp32_hw_data
*data
)
3262 struct nsp32_target
*target
;
3266 * Reset time which is designated by EEPROM.
3268 * TODO: Not used yet.
3270 data
->resettime
= nsp32_prom_read(data
, 0x11);
3273 * each device Synchronous Transfer Period
3275 for (i
=0; i
<NSP32_HOST_SCSIID
; i
++) {
3276 target
= &data
->target
[i
];
3277 ret
= nsp32_prom_read(data
, i
);
3279 case 0: /* 20MB/s */
3282 case 1: /* 10MB/s */
3291 default: /* default 20MB/s */
3294 entry
= nsp32_search_period_entry(data
, target
, val
);
3295 if (entry
< 0 || trans_mode
== ULTRA20M_MODE
) {
3296 /* search failed... set maximum speed */
3299 target
->limit_entry
= entry
;
3307 * Atmel AT24C01A (drived in 5V) serial EEPROM routines
3309 static int nsp32_prom_read(nsp32_hw_data
*data
, int romaddr
)
3313 /* start condition */
3314 nsp32_prom_start(data
);
3316 /* device address */
3317 nsp32_prom_write(data
, 1); /* 1 */
3318 nsp32_prom_write(data
, 0); /* 0 */
3319 nsp32_prom_write(data
, 1); /* 1 */
3320 nsp32_prom_write(data
, 0); /* 0 */
3321 nsp32_prom_write(data
, 0); /* A2: 0 (GND) */
3322 nsp32_prom_write(data
, 0); /* A1: 0 (GND) */
3323 nsp32_prom_write(data
, 0); /* A0: 0 (GND) */
3325 /* R/W: W for dummy write */
3326 nsp32_prom_write(data
, 0);
3329 nsp32_prom_write(data
, 0);
3332 for (i
=7; i
>=0; i
--) {
3333 nsp32_prom_write(data
, ((romaddr
>> i
) & 1));
3337 nsp32_prom_write(data
, 0);
3339 /* start condition */
3340 nsp32_prom_start(data
);
3342 /* device address */
3343 nsp32_prom_write(data
, 1); /* 1 */
3344 nsp32_prom_write(data
, 0); /* 0 */
3345 nsp32_prom_write(data
, 1); /* 1 */
3346 nsp32_prom_write(data
, 0); /* 0 */
3347 nsp32_prom_write(data
, 0); /* A2: 0 (GND) */
3348 nsp32_prom_write(data
, 0); /* A1: 0 (GND) */
3349 nsp32_prom_write(data
, 0); /* A0: 0 (GND) */
3352 nsp32_prom_write(data
, 1);
3355 nsp32_prom_write(data
, 0);
3359 for (i
=7; i
>=0; i
--) {
3360 val
+= (nsp32_prom_fetch(data
) << i
);
3364 nsp32_prom_write(data
, 1);
3366 /* stop condition */
3367 nsp32_prom_stop(data
);
3372 static void nsp32_prom_start (nsp32_hw_data
*data
)
3374 /* start condition */
3375 nsp32_prom_set(data
, SCL
, 1);
3376 nsp32_prom_set(data
, SDA
, 1);
3377 nsp32_prom_set(data
, ENA
, 1); /* output mode */
3378 nsp32_prom_set(data
, SDA
, 0); /* keeping SCL=1 and transiting
3379 * SDA 1->0 is start condition */
3380 nsp32_prom_set(data
, SCL
, 0);
3383 static void nsp32_prom_stop (nsp32_hw_data
*data
)
3385 /* stop condition */
3386 nsp32_prom_set(data
, SCL
, 1);
3387 nsp32_prom_set(data
, SDA
, 0);
3388 nsp32_prom_set(data
, ENA
, 1); /* output mode */
3389 nsp32_prom_set(data
, SDA
, 1);
3390 nsp32_prom_set(data
, SCL
, 0);
3393 static void nsp32_prom_write (nsp32_hw_data
*data
, int val
)
3396 nsp32_prom_set(data
, SDA
, val
);
3397 nsp32_prom_set(data
, SCL
, 1);
3398 nsp32_prom_set(data
, SCL
, 0);
3401 static int nsp32_prom_fetch (nsp32_hw_data
*data
)
3406 nsp32_prom_set(data
, ENA
, 0); /* input mode */
3407 nsp32_prom_set(data
, SCL
, 1);
3408 val
= nsp32_prom_get(data
, SDA
);
3409 nsp32_prom_set(data
, SCL
, 0);
3410 nsp32_prom_set(data
, ENA
, 1); /* output mode */
3414 static inline void nsp32_prom_set(nsp32_hw_data
*data
, int bit
, int val
)
3417 int base
= data
->BaseAddress
;
3421 cur
= nsp32_index_read1(base
, SERIAL_ROM_CTL
);
3422 nsp32_index_write1(base
, SERIAL_ROM_CTL
, cur
& ~bit
);
3425 cur
= nsp32_index_read1(base
, SERIAL_ROM_CTL
);
3426 nsp32_index_write1(base
, SERIAL_ROM_CTL
, cur
| bit
);
3429 nsp32_msg(KERN_ERR
, "val must be 0 or 1");
3436 static inline int nsp32_prom_get(nsp32_hw_data
*data
, int bit
)
3439 int base
= data
->BaseAddress
;
3441 ret
= nsp32_index_read1(base
, SERIAL_ROM_CTL
) & bit
;
3450 nsp32_msg(KERN_ERR
, "return value is not appropriate");