2 * Regular cardbus driver ("yenta_socket")
4 * (C) Copyright 1999, 2000 Linus Torvalds
7 * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
8 * Dynamically adjust the size of the bridge resource
10 * May 2003: Dominik Brodowski <linux@brodo.de>
11 * Merge pci_socket.c and yenta.c into one file
13 #include <linux/init.h>
14 #include <linux/pci.h>
15 #include <linux/sched.h>
16 #include <linux/workqueue.h>
17 #include <linux/interrupt.h>
18 #include <linux/delay.h>
19 #include <linux/module.h>
21 #include <pcmcia/version.h>
22 #include <pcmcia/cs_types.h>
23 #include <pcmcia/ss.h>
24 #include <pcmcia/cs.h>
28 #include "yenta_socket.h"
33 #define DEBUG(x,args...) printk("%s: " x, __FUNCTION__, ##args)
35 #define DEBUG(x,args...)
39 #define to_cycles(ns) ((ns)/120)
40 #define to_ns(cycles) ((cycles)*120)
43 * Generate easy-to-use ways of reading a cardbus sockets
44 * regular memory space ("cb_xxx"), configuration space
45 * ("config_xxx") and compatibility space ("exca_xxxx")
47 static inline u32
cb_readl(struct yenta_socket
*socket
, unsigned reg
)
49 u32 val
= readl(socket
->base
+ reg
);
50 DEBUG("%p %04x %08x\n", socket
, reg
, val
);
54 static inline void cb_writel(struct yenta_socket
*socket
, unsigned reg
, u32 val
)
56 DEBUG("%p %04x %08x\n", socket
, reg
, val
);
57 writel(val
, socket
->base
+ reg
);
60 static inline u8
config_readb(struct yenta_socket
*socket
, unsigned offset
)
63 pci_read_config_byte(socket
->dev
, offset
, &val
);
64 DEBUG("%p %04x %02x\n", socket
, offset
, val
);
68 static inline u16
config_readw(struct yenta_socket
*socket
, unsigned offset
)
71 pci_read_config_word(socket
->dev
, offset
, &val
);
72 DEBUG("%p %04x %04x\n", socket
, offset
, val
);
76 static inline u32
config_readl(struct yenta_socket
*socket
, unsigned offset
)
79 pci_read_config_dword(socket
->dev
, offset
, &val
);
80 DEBUG("%p %04x %08x\n", socket
, offset
, val
);
84 static inline void config_writeb(struct yenta_socket
*socket
, unsigned offset
, u8 val
)
86 DEBUG("%p %04x %02x\n", socket
, offset
, val
);
87 pci_write_config_byte(socket
->dev
, offset
, val
);
90 static inline void config_writew(struct yenta_socket
*socket
, unsigned offset
, u16 val
)
92 DEBUG("%p %04x %04x\n", socket
, offset
, val
);
93 pci_write_config_word(socket
->dev
, offset
, val
);
96 static inline void config_writel(struct yenta_socket
*socket
, unsigned offset
, u32 val
)
98 DEBUG("%p %04x %08x\n", socket
, offset
, val
);
99 pci_write_config_dword(socket
->dev
, offset
, val
);
102 static inline u8
exca_readb(struct yenta_socket
*socket
, unsigned reg
)
104 u8 val
= readb(socket
->base
+ 0x800 + reg
);
105 DEBUG("%p %04x %02x\n", socket
, reg
, val
);
109 static inline u8
exca_readw(struct yenta_socket
*socket
, unsigned reg
)
112 val
= readb(socket
->base
+ 0x800 + reg
);
113 val
|= readb(socket
->base
+ 0x800 + reg
+ 1) << 8;
114 DEBUG("%p %04x %04x\n", socket
, reg
, val
);
118 static inline void exca_writeb(struct yenta_socket
*socket
, unsigned reg
, u8 val
)
120 DEBUG("%p %04x %02x\n", socket
, reg
, val
);
121 writeb(val
, socket
->base
+ 0x800 + reg
);
124 static void exca_writew(struct yenta_socket
*socket
, unsigned reg
, u16 val
)
126 DEBUG("%p %04x %04x\n", socket
, reg
, val
);
127 writeb(val
, socket
->base
+ 0x800 + reg
);
128 writeb(val
>> 8, socket
->base
+ 0x800 + reg
+ 1);
132 * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
133 * on what kind of card is inserted..
135 static int yenta_get_status(struct pcmcia_socket
*sock
, unsigned int *value
)
137 struct yenta_socket
*socket
= container_of(sock
, struct yenta_socket
, socket
);
139 u32 state
= cb_readl(socket
, CB_SOCKET_STATE
);
141 val
= (state
& CB_3VCARD
) ? SS_3VCARD
: 0;
142 val
|= (state
& CB_XVCARD
) ? SS_XVCARD
: 0;
143 val
|= (state
& (CB_CDETECT1
| CB_CDETECT2
| CB_5VCARD
| CB_3VCARD
144 | CB_XVCARD
| CB_YVCARD
)) ? 0 : SS_PENDING
;
146 if (state
& CB_CBCARD
) {
148 val
|= (state
& CB_CARDSTS
) ? SS_STSCHG
: 0;
149 val
|= (state
& (CB_CDETECT1
| CB_CDETECT2
)) ? 0 : SS_DETECT
;
150 val
|= (state
& CB_PWRCYCLE
) ? SS_POWERON
| SS_READY
: 0;
152 u8 status
= exca_readb(socket
, I365_STATUS
);
153 val
|= ((status
& I365_CS_DETECT
) == I365_CS_DETECT
) ? SS_DETECT
: 0;
154 if (exca_readb(socket
, I365_INTCTL
) & I365_PC_IOCARD
) {
155 val
|= (status
& I365_CS_STSCHG
) ? 0 : SS_STSCHG
;
157 val
|= (status
& I365_CS_BVD1
) ? 0 : SS_BATDEAD
;
158 val
|= (status
& I365_CS_BVD2
) ? 0 : SS_BATWARN
;
160 val
|= (status
& I365_CS_WRPROT
) ? SS_WRPROT
: 0;
161 val
|= (status
& I365_CS_READY
) ? SS_READY
: 0;
162 val
|= (status
& I365_CS_POWERON
) ? SS_POWERON
: 0;
169 static int yenta_Vcc_power(u32 control
)
171 switch (control
& CB_SC_VCC_MASK
) {
172 case CB_SC_VCC_5V
: return 50;
173 case CB_SC_VCC_3V
: return 33;
178 static int yenta_Vpp_power(u32 control
)
180 switch (control
& CB_SC_VPP_MASK
) {
181 case CB_SC_VPP_12V
: return 120;
182 case CB_SC_VPP_5V
: return 50;
183 case CB_SC_VPP_3V
: return 33;
188 static int yenta_get_socket(struct pcmcia_socket
*sock
, socket_state_t
*state
)
190 struct yenta_socket
*socket
= container_of(sock
, struct yenta_socket
, socket
);
194 control
= cb_readl(socket
, CB_SOCKET_CONTROL
);
196 state
->Vcc
= yenta_Vcc_power(control
);
197 state
->Vpp
= yenta_Vpp_power(control
);
198 state
->io_irq
= socket
->io_irq
;
200 if (cb_readl(socket
, CB_SOCKET_STATE
) & CB_CBCARD
) {
201 u16 bridge
= config_readw(socket
, CB_BRIDGE_CONTROL
);
202 if (bridge
& CB_BRIDGE_CRST
)
203 state
->flags
|= SS_RESET
;
207 /* 16-bit card state.. */
208 reg
= exca_readb(socket
, I365_POWER
);
209 state
->flags
= (reg
& I365_PWR_AUTO
) ? SS_PWR_AUTO
: 0;
210 state
->flags
|= (reg
& I365_PWR_OUT
) ? SS_OUTPUT_ENA
: 0;
212 reg
= exca_readb(socket
, I365_INTCTL
);
213 state
->flags
|= (reg
& I365_PC_RESET
) ? 0 : SS_RESET
;
214 state
->flags
|= (reg
& I365_PC_IOCARD
) ? SS_IOCARD
: 0;
216 reg
= exca_readb(socket
, I365_CSCINT
);
217 state
->csc_mask
= (reg
& I365_CSC_DETECT
) ? SS_DETECT
: 0;
218 if (state
->flags
& SS_IOCARD
) {
219 state
->csc_mask
|= (reg
& I365_CSC_STSCHG
) ? SS_STSCHG
: 0;
221 state
->csc_mask
|= (reg
& I365_CSC_BVD1
) ? SS_BATDEAD
: 0;
222 state
->csc_mask
|= (reg
& I365_CSC_BVD2
) ? SS_BATWARN
: 0;
223 state
->csc_mask
|= (reg
& I365_CSC_READY
) ? SS_READY
: 0;
229 static void yenta_set_power(struct yenta_socket
*socket
, socket_state_t
*state
)
231 u32 reg
= 0; /* CB_SC_STPCLK? */
232 switch (state
->Vcc
) {
233 case 33: reg
= CB_SC_VCC_3V
; break;
234 case 50: reg
= CB_SC_VCC_5V
; break;
235 default: reg
= 0; break;
237 switch (state
->Vpp
) {
238 case 33: reg
|= CB_SC_VPP_3V
; break;
239 case 50: reg
|= CB_SC_VPP_5V
; break;
240 case 120: reg
|= CB_SC_VPP_12V
; break;
242 if (reg
!= cb_readl(socket
, CB_SOCKET_CONTROL
))
243 cb_writel(socket
, CB_SOCKET_CONTROL
, reg
);
246 static int yenta_set_socket(struct pcmcia_socket
*sock
, socket_state_t
*state
)
248 struct yenta_socket
*socket
= container_of(sock
, struct yenta_socket
, socket
);
251 if (state
->flags
& SS_DEBOUNCED
) {
252 /* The insertion debounce period has ended. Clear any pending insertion events */
253 state
->flags
&= ~SS_DEBOUNCED
; /* SS_DEBOUNCED is oneshot */
255 yenta_set_power(socket
, state
);
256 socket
->io_irq
= state
->io_irq
;
257 bridge
= config_readw(socket
, CB_BRIDGE_CONTROL
) & ~(CB_BRIDGE_CRST
| CB_BRIDGE_INTR
);
258 if (cb_readl(socket
, CB_SOCKET_STATE
) & CB_CBCARD
) {
260 bridge
|= (state
->flags
& SS_RESET
) ? CB_BRIDGE_CRST
: 0;
262 /* ISA interrupt control? */
263 intr
= exca_readb(socket
, I365_INTCTL
);
264 intr
= (intr
& ~0xf);
265 if (!socket
->cb_irq
) {
266 intr
|= state
->io_irq
;
267 bridge
|= CB_BRIDGE_INTR
;
269 exca_writeb(socket
, I365_INTCTL
, intr
);
273 reg
= exca_readb(socket
, I365_INTCTL
) & (I365_RING_ENA
| I365_INTR_ENA
);
274 reg
|= (state
->flags
& SS_RESET
) ? 0 : I365_PC_RESET
;
275 reg
|= (state
->flags
& SS_IOCARD
) ? I365_PC_IOCARD
: 0;
276 if (state
->io_irq
!= socket
->cb_irq
) {
277 reg
|= state
->io_irq
;
278 bridge
|= CB_BRIDGE_INTR
;
280 exca_writeb(socket
, I365_INTCTL
, reg
);
282 reg
= exca_readb(socket
, I365_POWER
) & (I365_VCC_MASK
|I365_VPP1_MASK
);
283 reg
|= I365_PWR_NORESET
;
284 if (state
->flags
& SS_PWR_AUTO
) reg
|= I365_PWR_AUTO
;
285 if (state
->flags
& SS_OUTPUT_ENA
) reg
|= I365_PWR_OUT
;
286 if (exca_readb(socket
, I365_POWER
) != reg
)
287 exca_writeb(socket
, I365_POWER
, reg
);
289 /* CSC interrupt: no ISA irq for CSC */
290 reg
= I365_CSC_DETECT
;
291 if (state
->flags
& SS_IOCARD
) {
292 if (state
->csc_mask
& SS_STSCHG
) reg
|= I365_CSC_STSCHG
;
294 if (state
->csc_mask
& SS_BATDEAD
) reg
|= I365_CSC_BVD1
;
295 if (state
->csc_mask
& SS_BATWARN
) reg
|= I365_CSC_BVD2
;
296 if (state
->csc_mask
& SS_READY
) reg
|= I365_CSC_READY
;
298 exca_writeb(socket
, I365_CSCINT
, reg
);
299 exca_readb(socket
, I365_CSC
);
301 config_writew(socket
, CB_BRIDGE_CONTROL
, bridge
);
302 /* Socket event mask: get card insert/remove events.. */
303 cb_writel(socket
, CB_SOCKET_EVENT
, -1);
304 cb_writel(socket
, CB_SOCKET_MASK
, CB_CDMASK
);
308 static int yenta_set_io_map(struct pcmcia_socket
*sock
, struct pccard_io_map
*io
)
310 struct yenta_socket
*socket
= container_of(sock
, struct yenta_socket
, socket
);
312 unsigned char ioctl
, addr
, enable
;
319 enable
= I365_ENA_IO(map
);
320 addr
= exca_readb(socket
, I365_ADDRWIN
);
322 /* Disable the window before changing it.. */
325 exca_writeb(socket
, I365_ADDRWIN
, addr
);
328 exca_writew(socket
, I365_IO(map
)+I365_W_START
, io
->start
);
329 exca_writew(socket
, I365_IO(map
)+I365_W_STOP
, io
->stop
);
331 ioctl
= exca_readb(socket
, I365_IOCTL
) & ~I365_IOCTL_MASK(map
);
332 if (io
->flags
& MAP_0WS
) ioctl
|= I365_IOCTL_0WS(map
);
333 if (io
->flags
& MAP_16BIT
) ioctl
|= I365_IOCTL_16BIT(map
);
334 if (io
->flags
& MAP_AUTOSZ
) ioctl
|= I365_IOCTL_IOCS16(map
);
335 exca_writeb(socket
, I365_IOCTL
, ioctl
);
337 if (io
->flags
& MAP_ACTIVE
)
338 exca_writeb(socket
, I365_ADDRWIN
, addr
| enable
);
342 static int yenta_set_mem_map(struct pcmcia_socket
*sock
, struct pccard_mem_map
*mem
)
344 struct yenta_socket
*socket
= container_of(sock
, struct yenta_socket
, socket
);
346 unsigned char addr
, enable
;
347 unsigned int start
, stop
, card_start
;
351 start
= mem
->sys_start
;
352 stop
= mem
->sys_stop
;
353 card_start
= mem
->card_start
;
355 if (map
> 4 || start
> stop
|| ((start
^ stop
) >> 24) ||
356 (card_start
>> 26) || mem
->speed
> 1000)
359 enable
= I365_ENA_MEM(map
);
360 addr
= exca_readb(socket
, I365_ADDRWIN
);
363 exca_writeb(socket
, I365_ADDRWIN
, addr
);
366 exca_writeb(socket
, CB_MEM_PAGE(map
), start
>> 24);
368 word
= (start
>> 12) & 0x0fff;
369 if (mem
->flags
& MAP_16BIT
)
370 word
|= I365_MEM_16BIT
;
371 if (mem
->flags
& MAP_0WS
)
372 word
|= I365_MEM_0WS
;
373 exca_writew(socket
, I365_MEM(map
) + I365_W_START
, word
);
375 word
= (stop
>> 12) & 0x0fff;
376 switch (to_cycles(mem
->speed
)) {
378 case 1: word
|= I365_MEM_WS0
; break;
379 case 2: word
|= I365_MEM_WS1
; break;
380 default: word
|= I365_MEM_WS1
| I365_MEM_WS0
; break;
382 exca_writew(socket
, I365_MEM(map
) + I365_W_STOP
, word
);
384 word
= ((card_start
- start
) >> 12) & 0x3fff;
385 if (mem
->flags
& MAP_WRPROT
)
386 word
|= I365_MEM_WRPROT
;
387 if (mem
->flags
& MAP_ATTRIB
)
388 word
|= I365_MEM_REG
;
389 exca_writew(socket
, I365_MEM(map
) + I365_W_OFF
, word
);
391 if (mem
->flags
& MAP_ACTIVE
)
392 exca_writeb(socket
, I365_ADDRWIN
, addr
| enable
);
397 static unsigned int yenta_events(struct yenta_socket
*socket
)
403 /* Clear interrupt status for the event */
404 cb_event
= cb_readl(socket
, CB_SOCKET_EVENT
);
405 cb_writel(socket
, CB_SOCKET_EVENT
, cb_event
);
407 csc
= exca_readb(socket
, I365_CSC
);
409 events
= (cb_event
& (CB_CD1EVENT
| CB_CD2EVENT
)) ? SS_DETECT
: 0 ;
410 events
|= (csc
& I365_CSC_DETECT
) ? SS_DETECT
: 0;
411 if (exca_readb(socket
, I365_INTCTL
) & I365_PC_IOCARD
) {
412 events
|= (csc
& I365_CSC_STSCHG
) ? SS_STSCHG
: 0;
414 events
|= (csc
& I365_CSC_BVD1
) ? SS_BATDEAD
: 0;
415 events
|= (csc
& I365_CSC_BVD2
) ? SS_BATWARN
: 0;
416 events
|= (csc
& I365_CSC_READY
) ? SS_READY
: 0;
422 static irqreturn_t
yenta_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
)
425 struct yenta_socket
*socket
= (struct yenta_socket
*) dev_id
;
427 events
= yenta_events(socket
);
429 pcmcia_parse_events(&socket
->socket
, events
);
435 static void yenta_interrupt_wrapper(unsigned long data
)
437 struct yenta_socket
*socket
= (struct yenta_socket
*) data
;
439 yenta_interrupt(0, (void *)socket
, NULL
);
440 socket
->poll_timer
.expires
= jiffies
+ HZ
;
441 add_timer(&socket
->poll_timer
);
445 * Only probe "regular" interrupts, don't
446 * touch dangerous spots like the mouse irq,
447 * because there are mice that apparently
448 * get really confused if they get fondled
451 * Default to 11, 10, 9, 7, 6, 5, 4, 3.
453 static u32 isa_interrupts
= 0x0ef8;
455 static unsigned int yenta_probe_irq(struct yenta_socket
*socket
, u32 isa_irq_mask
)
462 /* Set up ISA irq routing to probe the ISA irqs.. */
463 bridge_ctrl
= config_readw(socket
, CB_BRIDGE_CONTROL
);
464 if (!(bridge_ctrl
& CB_BRIDGE_INTR
)) {
465 bridge_ctrl
|= CB_BRIDGE_INTR
;
466 config_writew(socket
, CB_BRIDGE_CONTROL
, bridge_ctrl
);
470 * Probe for usable interrupts using the force
471 * register to generate bogus card status events.
473 cb_writel(socket
, CB_SOCKET_EVENT
, -1);
474 cb_writel(socket
, CB_SOCKET_MASK
, CB_CSTSMASK
);
475 exca_writeb(socket
, I365_CSCINT
, 0);
476 val
= probe_irq_on() & isa_irq_mask
;
477 for (i
= 1; i
< 16; i
++) {
478 if (!((val
>> i
) & 1))
480 exca_writeb(socket
, I365_CSCINT
, I365_CSC_STSCHG
| (i
<< 4));
481 cb_writel(socket
, CB_SOCKET_FORCE
, CB_FCARDSTS
);
483 cb_writel(socket
, CB_SOCKET_EVENT
, -1);
485 cb_writel(socket
, CB_SOCKET_MASK
, 0);
486 exca_writeb(socket
, I365_CSCINT
, 0);
488 mask
= probe_irq_mask(val
) & 0xffff;
490 bridge_ctrl
&= ~CB_BRIDGE_INTR
;
491 config_writew(socket
, CB_BRIDGE_CONTROL
, bridge_ctrl
);
497 * Set static data that doesn't need re-initializing..
499 static void yenta_get_socket_capabilities(struct yenta_socket
*socket
, u32 isa_irq_mask
)
501 socket
->socket
.features
|= SS_CAP_PAGE_REGS
| SS_CAP_PCCARD
| SS_CAP_CARDBUS
;
502 socket
->socket
.map_size
= 0x1000;
503 socket
->socket
.pci_irq
= socket
->cb_irq
;
504 socket
->socket
.irq_mask
= yenta_probe_irq(socket
, isa_irq_mask
);
505 socket
->socket
.cb_dev
= socket
->dev
;
507 printk("Yenta IRQ list %04x, PCI irq%d\n", socket
->socket
.irq_mask
, socket
->cb_irq
);
511 static void yenta_clear_maps(struct yenta_socket
*socket
)
514 pccard_io_map io
= { 0, 0, 0, 0, 1 };
515 pccard_mem_map mem
= { 0, 0, 0, 0, 0, 0 };
517 mem
.sys_stop
= 0x0fff;
518 yenta_set_socket(&socket
->socket
, &dead_socket
);
519 for (i
= 0; i
< 2; i
++) {
521 yenta_set_io_map(&socket
->socket
, &io
);
523 for (i
= 0; i
< 5; i
++) {
525 yenta_set_mem_map(&socket
->socket
, &mem
);
530 * Initialize the standard cardbus registers
532 static void yenta_config_init(struct yenta_socket
*socket
)
535 struct pci_dev
*dev
= socket
->dev
;
537 pci_set_power_state(socket
->dev
, 0);
539 config_writel(socket
, CB_LEGACY_MODE_BASE
, 0);
540 config_writel(socket
, PCI_BASE_ADDRESS_0
, dev
->resource
[0].start
);
541 config_writew(socket
, PCI_COMMAND
,
547 /* MAGIC NUMBERS! Fixme */
548 config_writeb(socket
, PCI_CACHE_LINE_SIZE
, L1_CACHE_BYTES
/ 4);
549 config_writeb(socket
, PCI_LATENCY_TIMER
, 168);
550 config_writel(socket
, PCI_PRIMARY_BUS
,
551 (176 << 24) | /* sec. latency timer */
552 (dev
->subordinate
->subordinate
<< 16) | /* subordinate bus */
553 (dev
->subordinate
->secondary
<< 8) | /* secondary bus */
554 dev
->subordinate
->primary
); /* primary bus */
557 * Set up the bridging state:
558 * - enable write posting.
559 * - memory window 0 prefetchable, window 1 non-prefetchable
560 * - PCI interrupts enabled if a PCI interrupt exists..
562 bridge
= config_readw(socket
, CB_BRIDGE_CONTROL
);
563 bridge
&= ~(CB_BRIDGE_CRST
| CB_BRIDGE_PREFETCH1
| CB_BRIDGE_INTR
| CB_BRIDGE_ISAEN
| CB_BRIDGE_VGAEN
);
564 bridge
|= CB_BRIDGE_PREFETCH0
| CB_BRIDGE_POSTEN
;
566 bridge
|= CB_BRIDGE_INTR
;
567 config_writew(socket
, CB_BRIDGE_CONTROL
, bridge
);
569 exca_writeb(socket
, I365_GBLCTL
, 0x00);
570 exca_writeb(socket
, I365_GENCTL
, 0x00);
572 /* Redo card voltage interrogation */
573 cb_writel(socket
, CB_SOCKET_FORCE
, CB_CVSTEST
);
576 /* Called at resume and initialization events */
577 static int yenta_init(struct pcmcia_socket
*sock
)
579 struct yenta_socket
*socket
= container_of(sock
, struct yenta_socket
, socket
);
580 yenta_config_init(socket
);
581 yenta_clear_maps(socket
);
583 /* Re-enable interrupts */
584 cb_writel(socket
, CB_SOCKET_MASK
, CB_CDMASK
);
588 static int yenta_suspend(struct pcmcia_socket
*sock
)
590 struct yenta_socket
*socket
= container_of(sock
, struct yenta_socket
, socket
);
592 yenta_set_socket(sock
, &dead_socket
);
594 /* Disable interrupts */
595 cb_writel(socket
, CB_SOCKET_MASK
, 0x0);
598 * This does not work currently. The controller
599 * loses too much information during D3 to come up
600 * cleanly. We should probably fix yenta_init()
601 * to update all the critical registers, notably
602 * the IO and MEM bridging region data.. That is
603 * something that pci_set_power_state() should
604 * probably know about bridges anyway.
606 pci_set_power_state(socket->dev, 3);
613 * Use an adaptive allocation for the memory resource,
614 * sometimes the memory behind pci bridges is limited:
615 * 1/8 of the size of the io window of the parent.
616 * max 4 MB, min 16 kB.
618 #define BRIDGE_MEM_MAX 4*1024*1024
619 #define BRIDGE_MEM_MIN 16*1024
621 #define BRIDGE_IO_MAX 256
622 #define BRIDGE_IO_MIN 32
624 static void yenta_allocate_res(struct yenta_socket
*socket
, int nr
, unsigned type
)
627 struct resource
*root
, *res
;
629 u32 align
, size
, min
;
633 /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
635 if (type
& IORESOURCE_IO
)
638 offset
= 0x1c + 8*nr
;
639 bus
= socket
->dev
->subordinate
;
640 res
= socket
->dev
->resource
+ PCI_BRIDGE_RESOURCES
+ nr
;
641 res
->name
= bus
->name
;
645 root
= pci_find_parent_resource(socket
->dev
, res
);
650 start
= config_readl(socket
, offset
) & mask
;
651 end
= config_readl(socket
, offset
+4) | ~mask
;
652 if (start
&& end
> start
) {
655 if (request_resource(root
, res
) == 0)
657 printk(KERN_INFO
"yenta %s: Preassigned resource %d busy, reconfiguring...\n",
658 socket
->dev
->slot_name
, nr
);
659 res
->start
= res
->end
= 0;
662 if (type
& IORESOURCE_IO
) {
664 size
= BRIDGE_IO_MAX
;
666 start
= PCIBIOS_MIN_IO
;
669 unsigned long avail
= root
->end
- root
->start
;
671 size
= BRIDGE_MEM_MAX
;
672 if (size
> avail
/8) {
674 /* round size down to next power of 2 */
676 while ((size
/= 2) != 0)
680 if (size
< BRIDGE_MEM_MIN
)
681 size
= BRIDGE_MEM_MIN
;
682 min
= BRIDGE_MEM_MIN
;
684 start
= PCIBIOS_MIN_MEM
;
689 if (allocate_resource(root
, res
, size
, start
, end
, align
, NULL
, NULL
)==0) {
690 config_writel(socket
, offset
, res
->start
);
691 config_writel(socket
, offset
+4, res
->end
);
696 } while (size
>= min
);
697 printk(KERN_INFO
"yenta %s: no resource of type %x available, trying to continue...\n",
698 socket
->dev
->slot_name
, type
);
699 res
->start
= res
->end
= 0;
703 * Allocate the bridge mappings for the device..
705 static void yenta_allocate_resources(struct yenta_socket
*socket
)
707 yenta_allocate_res(socket
, 0, IORESOURCE_MEM
|IORESOURCE_PREFETCH
);
708 yenta_allocate_res(socket
, 1, IORESOURCE_MEM
);
709 yenta_allocate_res(socket
, 2, IORESOURCE_IO
);
710 yenta_allocate_res(socket
, 3, IORESOURCE_IO
); /* PCI isn't clever enough to use this one yet */
715 * Free the bridge mappings for the device..
717 static void yenta_free_resources(struct yenta_socket
*socket
)
721 struct resource
*res
;
722 res
= socket
->dev
->resource
+ PCI_BRIDGE_RESOURCES
+ i
;
723 if (res
->start
!= 0 && res
->end
!= 0)
724 release_resource(res
);
725 res
->start
= res
->end
= 0;
731 * Close it down - release our resources and go home..
733 static void yenta_close(struct pci_dev
*dev
)
735 struct yenta_socket
*sock
= pci_get_drvdata(dev
);
737 /* we don't want a dying socket registered */
738 pcmcia_unregister_socket(&sock
->socket
);
740 /* Disable all events so we don't die in an IRQ storm */
741 cb_writel(sock
, CB_SOCKET_MASK
, 0x0);
742 exca_writeb(sock
, I365_CSCINT
, 0);
745 free_irq(sock
->cb_irq
, sock
);
747 del_timer_sync(&sock
->poll_timer
);
751 yenta_free_resources(sock
);
753 pci_set_drvdata(dev
, NULL
);
757 static struct pccard_operations yenta_socket_operations
= {
759 .suspend
= yenta_suspend
,
760 .get_status
= yenta_get_status
,
761 .get_socket
= yenta_get_socket
,
762 .set_socket
= yenta_set_socket
,
763 .set_io_map
= yenta_set_io_map
,
764 .set_mem_map
= yenta_set_mem_map
,
772 * Different cardbus controllers have slightly different
773 * initialization sequences etc details. List them here..
775 #define PD(x,y) PCI_VENDOR_ID_##x, PCI_DEVICE_ID_##x##_##y
776 struct cardbus_override_struct
{
777 unsigned short vendor
;
778 unsigned short device
;
779 int (*override
) (struct yenta_socket
*socket
);
780 } cardbus_override
[] = {
781 { PD(TI
,1031), &ti_override
},
783 /* TBD: Check if these TI variants can use more
784 * advanced overrides instead */
785 { PD(TI
,1210), &ti_override
},
786 { PD(TI
,1211), &ti_override
},
787 { PD(TI
,1251A
), &ti_override
},
788 { PD(TI
,1251B
), &ti_override
},
789 { PD(TI
,1420), &ti_override
},
790 { PD(TI
,1450), &ti_override
},
791 { PD(TI
,4410), &ti_override
},
792 { PD(TI
,4451), &ti_override
},
794 { PD(TI
,1130), &ti113x_override
},
795 { PD(TI
,1131), &ti113x_override
},
797 { PD(TI
,1220), &ti12xx_override
},
798 { PD(TI
,1221), &ti12xx_override
},
799 { PD(TI
,1225), &ti12xx_override
},
800 { PD(TI
,1520), &ti12xx_override
},
802 { PD(TI
,1250), &ti1250_override
},
803 { PD(TI
,1410), &ti1250_override
},
805 { PD(RICOH
,RL5C465
), &ricoh_override
},
806 { PD(RICOH
,RL5C466
), &ricoh_override
},
807 { PD(RICOH
,RL5C475
), &ricoh_override
},
808 { PD(RICOH
,RL5C476
), &ricoh_override
},
809 { PD(RICOH
,RL5C478
), &ricoh_override
},
811 { }, /* all zeroes */
816 * Initialize a cardbus controller. Make sure we have a usable
817 * interrupt, and that we can map the cardbus area. Fill in the
818 * socket information structure..
820 static int __devinit
yenta_probe (struct pci_dev
*dev
, const struct pci_device_id
*id
)
822 struct yenta_socket
*socket
;
823 struct cardbus_override_struct
*d
;
825 socket
= kmalloc(sizeof(struct yenta_socket
), GFP_KERNEL
);
828 memset(socket
, 0, sizeof(*socket
));
830 /* prepare pcmcia_socket */
831 socket
->socket
.ss_entry
= ¥ta_socket_operations
;
832 socket
->socket
.dev
.dev
= &dev
->dev
;
833 socket
->socket
.driver_data
= socket
;
834 socket
->socket
.owner
= THIS_MODULE
;
836 /* prepare struct yenta_socket */
838 pci_set_drvdata(dev
, socket
);
841 * Do some basic sanity checking..
843 if (pci_enable_device(dev
))
845 if (!pci_resource_start(dev
, 0)) {
846 printk("No cardbus resource!\n");
851 * Ok, start setup.. Map the cardbus registers,
852 * and request the IRQ.
854 socket
->base
= ioremap(pci_resource_start(dev
, 0), 0x1000);
858 yenta_config_init(socket
);
860 /* Disable all events */
861 cb_writel(socket
, CB_SOCKET_MASK
, 0x0);
863 /* Set up the bridge regions.. */
864 yenta_allocate_resources(socket
);
866 socket
->cb_irq
= dev
->irq
;
868 /* Do we have special options for the device? */
869 d
= cardbus_override
;
870 while (d
->override
) {
871 if ((dev
->vendor
== d
->vendor
) && (dev
->device
== d
->device
)) {
872 int retval
= d
->override(socket
);
879 /* We must finish initialization here */
881 if (!socket
->cb_irq
|| request_irq(socket
->cb_irq
, yenta_interrupt
, SA_SHIRQ
, socket
->dev
->dev
.name
, socket
)) {
882 /* No IRQ or request_irq failed. Poll */
883 socket
->cb_irq
= 0; /* But zero is a valid IRQ number. */
884 init_timer(&socket
->poll_timer
);
885 socket
->poll_timer
.function
= yenta_interrupt_wrapper
;
886 socket
->poll_timer
.data
= (unsigned long)socket
;
887 socket
->poll_timer
.expires
= jiffies
+ HZ
;
888 add_timer(&socket
->poll_timer
);
891 /* Figure out what the dang thing can do for the PCMCIA layer... */
892 yenta_get_socket_capabilities(socket
, isa_interrupts
);
893 printk("Socket status: %08x\n", cb_readl(socket
, CB_SOCKET_STATE
));
895 /* Register it with the pcmcia layer.. */
896 return pcmcia_register_socket(&socket
->socket
);
900 static int yenta_dev_suspend (struct pci_dev
*dev
, u32 state
)
902 return pcmcia_socket_dev_suspend(&dev
->dev
, state
, 0);
906 static int yenta_dev_resume (struct pci_dev
*dev
)
908 return pcmcia_socket_dev_resume(&dev
->dev
, RESUME_RESTORE_STATE
);
912 static struct pci_device_id yenta_table
[] __devinitdata
= { {
913 .class = PCI_CLASS_BRIDGE_CARDBUS
<< 8,
916 .vendor
= PCI_ANY_ID
,
917 .device
= PCI_ANY_ID
,
918 .subvendor
= PCI_ANY_ID
,
919 .subdevice
= PCI_ANY_ID
,
920 }, { /* all zeroes */ }
922 MODULE_DEVICE_TABLE(pci
, yenta_table
);
925 static struct pci_driver yenta_cardbus_driver
= {
926 .name
= "yenta_cardbus",
927 .id_table
= yenta_table
,
928 .probe
= yenta_probe
,
929 .remove
= __devexit_p(yenta_close
),
930 .suspend
= yenta_dev_suspend
,
931 .resume
= yenta_dev_resume
,
935 static int __init
yenta_socket_init(void)
937 return pci_register_driver (¥ta_cardbus_driver
);
941 static void __exit
yenta_socket_exit (void)
943 pci_unregister_driver (¥ta_cardbus_driver
);
947 module_init(yenta_socket_init
);
948 module_exit(yenta_socket_exit
);
950 MODULE_LICENSE("GPL");