Merge with Linux 2.5.74.
[linux-2.6/linux-mips.git] / drivers / ieee1394 / dv1394.c
bloba876cbf82598889d387ec0d36b1aa1a3a5a262df
1 /*
2 * dv1394.c - DV input/output over IEEE 1394 on OHCI chips
3 * Copyright (C)2001 Daniel Maas <dmaas@dcine.com>
4 * receive, proc_fs by Dan Dennedy <dan@dennedy.org>
6 * based on:
7 * video1394.c - video driver for OHCI 1394 boards
8 * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software Foundation,
22 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 OVERVIEW
28 I designed dv1394 as a "pipe" that you can use to shoot DV onto a
29 FireWire bus. In transmission mode, dv1394 does the following:
31 1. accepts contiguous frames of DV data from user-space, via write()
32 or mmap() (see dv1394.h for the complete API)
33 2. wraps IEC 61883 packets around the DV data, inserting
34 empty synchronization packets as necessary
35 3. assigns accurate SYT timestamps to the outgoing packets
36 4. shoots them out using the OHCI card's IT DMA engine
38 Thanks to Dan Dennedy, we now have a receive mode that does the following:
40 1. accepts raw IEC 61883 packets from the OHCI card
41 2. re-assembles the DV data payloads into contiguous frames,
42 discarding empty packets
43 3. sends the DV data to user-space via read() or mmap()
47 TODO:
49 - tunable frame-drop behavior: either loop last frame, or halt transmission
51 - use a scatter/gather buffer for DMA programs (f->descriptor_pool)
52 so that we don't rely on allocating 64KB of contiguous kernel memory
53 via pci_alloc_consistent()
55 DONE:
56 - during reception, better handling of dropped frames and continuity errors
57 - during reception, prevent DMA from bypassing the irq tasklets
58 - reduce irq rate during reception (1/250 packets).
59 - add many more internal buffers during reception with scatter/gather dma.
60 - add dbc (continuity) checking on receive, increment status.dropped_frames
61 if not continuous.
62 - restart IT DMA after a bus reset
63 - safely obtain and release ISO Tx channels in cooperation with OHCI driver
64 - map received DIF blocks to their proper location in DV frame (ensure
65 recovery if dropped packet)
66 - handle bus resets gracefully (OHCI card seems to take care of this itself(!))
67 - do not allow resizing the user_buf once allocated; eliminate nuke_buffer_mappings
68 - eliminated #ifdef DV1394_DEBUG_LEVEL by inventing macros debug_printk and irq_printk
69 - added wmb() and mb() to places where PCI read/write ordering needs to be enforced
70 - set video->id correctly
71 - store video_cards in an array indexed by OHCI card ID, rather than a list
72 - implement DMA context allocation to cooperate with other users of the OHCI
73 - fix all XXX showstoppers
74 - disable IR/IT DMA interrupts on shutdown
75 - flush pci writes to the card by issuing a read
76 - devfs and character device dispatching (* needs testing with Linux 2.2.x)
77 - switch over to the new kernel DMA API (pci_map_*()) (* needs testing on platforms with IOMMU!)
78 - keep all video_cards in a list (for open() via chardev), set file->private_data = video
79 - dv1394_poll should indicate POLLIN when receiving buffers are available
80 - add proc fs interface to set cip_n, cip_d, syt_offset, and video signal
81 - expose xmit and recv as separate devices (not exclusive)
82 - expose NTSC and PAL as separate devices (can be overridden)
83 - read/edit channel in procfs
87 #include <linux/config.h>
88 #include <linux/kernel.h>
89 #include <linux/list.h>
90 #include <linux/slab.h>
91 #include <linux/interrupt.h>
92 #include <linux/wait.h>
93 #include <linux/errno.h>
94 #include <linux/module.h>
95 #include <linux/init.h>
96 #include <linux/pci.h>
97 #include <linux/fs.h>
98 #include <linux/poll.h>
99 #include <linux/smp_lock.h>
100 #include <linux/bitops.h>
101 #include <asm/byteorder.h>
102 #include <asm/atomic.h>
103 #include <asm/io.h>
104 #include <asm/uaccess.h>
105 #include <linux/proc_fs.h>
106 #include <linux/delay.h>
107 #include <asm/pgtable.h>
108 #include <asm/page.h>
109 #include <linux/sched.h>
110 #include <linux/types.h>
111 #include <linux/vmalloc.h>
112 #include <linux/string.h>
113 #include <linux/ioctl32.h>
114 #include <linux/compat.h>
116 #include "ieee1394.h"
117 #include "ieee1394_types.h"
118 #include "nodemgr.h"
119 #include "hosts.h"
120 #include "ieee1394_core.h"
121 #include "highlevel.h"
122 #include "dv1394.h"
123 #include "dv1394-private.h"
125 #include "ohci1394.h"
127 #ifndef virt_to_page
128 #define virt_to_page(x) MAP_NR(x)
129 #endif
131 #ifndef vmalloc_32
132 #define vmalloc_32(x) vmalloc(x)
133 #endif
136 /* DEBUG LEVELS:
137 0 - no debugging messages
138 1 - some debugging messages, but none during DMA frame transmission
139 2 - lots of messages, including during DMA frame transmission
140 (will cause undeflows if your machine is too slow!)
143 #define DV1394_DEBUG_LEVEL 0
145 /* for debugging use ONLY: allow more than one open() of the device */
146 /* #define DV1394_ALLOW_MORE_THAN_ONE_OPEN 1 */
148 #if DV1394_DEBUG_LEVEL >= 2
149 #define irq_printk( args... ) printk( args )
150 #else
151 #define irq_printk( args... )
152 #endif
154 #if DV1394_DEBUG_LEVEL >= 1
155 #define debug_printk( args... ) printk( args)
156 #else
157 #define debug_printk( args... )
158 #endif
160 /* issue a dummy PCI read to force the preceding write
161 to be posted to the PCI bus immediately */
163 static inline void flush_pci_write(struct ti_ohci *ohci)
165 mb();
166 reg_read(ohci, OHCI1394_IsochronousCycleTimer);
169 static void it_tasklet_func(unsigned long data);
170 static void ir_tasklet_func(unsigned long data);
172 /* GLOBAL DATA */
174 /* list of all video_cards */
175 static LIST_HEAD(dv1394_cards);
176 static spinlock_t dv1394_cards_lock = SPIN_LOCK_UNLOCKED;
178 /* translate from a struct file* to the corresponding struct video_card* */
180 static inline struct video_card* file_to_video_card(struct file *file)
182 return (struct video_card*) file->private_data;
185 /*** FRAME METHODS *********************************************************/
187 static void frame_reset(struct frame *f)
189 f->state = FRAME_CLEAR;
190 f->done = 0;
191 f->n_packets = 0;
192 f->frame_begin_timestamp = NULL;
193 f->assigned_timestamp = 0;
194 f->cip_syt1 = NULL;
195 f->cip_syt2 = NULL;
196 f->mid_frame_timestamp = NULL;
197 f->frame_end_timestamp = NULL;
198 f->frame_end_branch = NULL;
201 static struct frame* frame_new(unsigned int frame_num, struct video_card *video)
203 struct frame *f = kmalloc(sizeof(*f), GFP_KERNEL);
204 if (!f)
205 return NULL;
207 f->video = video;
208 f->frame_num = frame_num;
210 f->header_pool = pci_alloc_consistent(f->video->ohci->dev, PAGE_SIZE, &f->header_pool_dma);
211 if (!f->header_pool) {
212 printk(KERN_ERR "dv1394: failed to allocate CIP header pool\n");
213 kfree(f);
214 return NULL;
217 debug_printk("dv1394: frame_new: allocated CIP header pool at virt 0x%08lx (contig) dma 0x%08lx size %ld\n",
218 (unsigned long) f->header_pool, (unsigned long) f->header_pool_dma, PAGE_SIZE);
220 f->descriptor_pool_size = MAX_PACKETS * sizeof(struct DMA_descriptor_block);
221 /* make it an even # of pages */
222 f->descriptor_pool_size += PAGE_SIZE - (f->descriptor_pool_size%PAGE_SIZE);
224 f->descriptor_pool = pci_alloc_consistent(f->video->ohci->dev,
225 f->descriptor_pool_size,
226 &f->descriptor_pool_dma);
227 if (!f->descriptor_pool) {
228 pci_free_consistent(f->video->ohci->dev, PAGE_SIZE, f->header_pool, f->header_pool_dma);
229 kfree(f);
230 return NULL;
233 debug_printk("dv1394: frame_new: allocated DMA program memory at virt 0x%08lx (contig) dma 0x%08lx size %ld\n",
234 (unsigned long) f->descriptor_pool, (unsigned long) f->descriptor_pool_dma, f->descriptor_pool_size);
236 f->data = 0;
237 frame_reset(f);
239 return f;
242 static void frame_delete(struct frame *f)
244 pci_free_consistent(f->video->ohci->dev, PAGE_SIZE, f->header_pool, f->header_pool_dma);
245 pci_free_consistent(f->video->ohci->dev, f->descriptor_pool_size, f->descriptor_pool, f->descriptor_pool_dma);
246 kfree(f);
253 frame_prepare() - build the DMA program for transmitting
255 Frame_prepare() must be called OUTSIDE the video->spinlock.
256 However, frame_prepare() must still be serialized, so
257 it should be called WITH the video->sem taken.
260 static void frame_prepare(struct video_card *video, unsigned int this_frame)
262 struct frame *f = video->frames[this_frame];
263 int last_frame;
265 struct DMA_descriptor_block *block;
266 dma_addr_t block_dma;
267 struct CIP_header *cip;
268 dma_addr_t cip_dma;
270 unsigned int n_descriptors, full_packets, packets_per_frame, payload_size;
272 /* these flags denote packets that need special attention */
273 int empty_packet, first_packet, last_packet, mid_packet;
275 u32 *branch_address, *last_branch_address = NULL;
276 unsigned long data_p;
277 int first_packet_empty = 0;
278 u32 cycleTimer, ct_sec, ct_cyc, ct_off;
279 unsigned long irq_flags;
281 irq_printk("frame_prepare( %d ) ---------------------\n", this_frame);
283 full_packets = 0;
287 if (video->pal_or_ntsc == DV1394_PAL)
288 packets_per_frame = DV1394_PAL_PACKETS_PER_FRAME;
289 else
290 packets_per_frame = DV1394_NTSC_PACKETS_PER_FRAME;
292 while ( full_packets < packets_per_frame ) {
293 empty_packet = first_packet = last_packet = mid_packet = 0;
295 data_p = f->data + full_packets * 480;
297 /************************************************/
298 /* allocate a descriptor block and a CIP header */
299 /************************************************/
301 /* note: these should NOT cross a page boundary (DMA restriction) */
303 if (f->n_packets >= MAX_PACKETS) {
304 printk(KERN_ERR "dv1394: FATAL ERROR: max packet count exceeded\n");
305 return;
308 /* the block surely won't cross a page boundary,
309 since an even number of descriptor_blocks fit on a page */
310 block = &(f->descriptor_pool[f->n_packets]);
312 /* DMA address of the block = offset of block relative
313 to the kernel base address of the descriptor pool
314 + DMA base address of the descriptor pool */
315 block_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
318 /* the whole CIP pool fits on one page, so no worries about boundaries */
319 if ( ((unsigned long) &(f->header_pool[f->n_packets]) - (unsigned long) f->header_pool)
320 > PAGE_SIZE) {
321 printk(KERN_ERR "dv1394: FATAL ERROR: no room to allocate CIP header\n");
322 return;
325 cip = &(f->header_pool[f->n_packets]);
327 /* DMA address of the CIP header = offset of cip
328 relative to kernel base address of the header pool
329 + DMA base address of the header pool */
330 cip_dma = (unsigned long) cip % PAGE_SIZE + f->header_pool_dma;
332 /* is this an empty packet? */
334 if (video->cip_accum > (video->cip_d - video->cip_n)) {
335 empty_packet = 1;
336 payload_size = 8;
337 video->cip_accum -= (video->cip_d - video->cip_n);
338 } else {
339 payload_size = 488;
340 video->cip_accum += video->cip_n;
343 /* there are three important packets each frame:
345 the first packet in the frame - we ask the card to record the timestamp when
346 this packet is actually sent, so we can monitor
347 how accurate our timestamps are. Also, the first
348 packet serves as a semaphore to let us know that
349 it's OK to free the *previous* frame's DMA buffer
351 the last packet in the frame - this packet is used to detect buffer underflows.
352 if this is the last ready frame, the last DMA block
353 will have a branch back to the beginning of the frame
354 (so that the card will re-send the frame on underflow).
355 if this branch gets taken, we know that at least one
356 frame has been dropped. When the next frame is ready,
357 the branch is pointed to its first packet, and the
358 semaphore is disabled.
360 a "mid" packet slightly before the end of the frame - this packet should trigger
361 an interrupt so we can go and assign a timestamp to the first packet
362 in the next frame. We don't use the very last packet in the frame
363 for this purpose, because that would leave very little time to set
364 the timestamp before DMA starts on the next frame.
367 if (f->n_packets == 0) {
368 first_packet = 1;
369 } else if ( full_packets == (packets_per_frame-1) ) {
370 last_packet = 1;
371 } else if (f->n_packets == packets_per_frame) {
372 mid_packet = 1;
376 /********************/
377 /* setup CIP header */
378 /********************/
380 /* the timestamp will be written later from the
381 mid-frame interrupt handler. For now we just
382 store the address of the CIP header(s) that
383 need a timestamp. */
385 /* first packet in the frame needs a timestamp */
386 if (first_packet) {
387 f->cip_syt1 = cip;
388 if (empty_packet)
389 first_packet_empty = 1;
391 } else if (first_packet_empty && (f->n_packets == 1) ) {
392 /* if the first packet was empty, the second
393 packet's CIP header also needs a timestamp */
394 f->cip_syt2 = cip;
397 fill_cip_header(cip,
398 /* the node ID number of the OHCI card */
399 reg_read(video->ohci, OHCI1394_NodeID) & 0x3F,
400 video->continuity_counter,
401 video->pal_or_ntsc,
402 0xFFFF /* the timestamp is filled in later */);
404 /* advance counter, only for full packets */
405 if ( ! empty_packet )
406 video->continuity_counter++;
408 /******************************/
409 /* setup DMA descriptor block */
410 /******************************/
412 /* first descriptor - OUTPUT_MORE_IMMEDIATE, for the controller's IT header */
413 fill_output_more_immediate( &(block->u.out.omi), 1, video->channel, 0, payload_size);
415 if (empty_packet) {
416 /* second descriptor - OUTPUT_LAST for CIP header */
417 fill_output_last( &(block->u.out.u.empty.ol),
419 /* want completion status on all interesting packets */
420 (first_packet || mid_packet || last_packet) ? 1 : 0,
422 /* want interrupts on all interesting packets */
423 (first_packet || mid_packet || last_packet) ? 1 : 0,
425 sizeof(struct CIP_header), /* data size */
426 cip_dma);
428 if (first_packet)
429 f->frame_begin_timestamp = &(block->u.out.u.empty.ol.q[3]);
430 else if (mid_packet)
431 f->mid_frame_timestamp = &(block->u.out.u.empty.ol.q[3]);
432 else if (last_packet) {
433 f->frame_end_timestamp = &(block->u.out.u.empty.ol.q[3]);
434 f->frame_end_branch = &(block->u.out.u.empty.ol.q[2]);
437 branch_address = &(block->u.out.u.empty.ol.q[2]);
438 n_descriptors = 3;
439 if (first_packet)
440 f->first_n_descriptors = n_descriptors;
442 } else { /* full packet */
444 /* second descriptor - OUTPUT_MORE for CIP header */
445 fill_output_more( &(block->u.out.u.full.om),
446 sizeof(struct CIP_header), /* data size */
447 cip_dma);
450 /* third (and possibly fourth) descriptor - for DV data */
451 /* the 480-byte payload can cross a page boundary; if so,
452 we need to split it into two DMA descriptors */
454 /* does the 480-byte data payload cross a page boundary? */
455 if ( (PAGE_SIZE- ((unsigned long)data_p % PAGE_SIZE) ) < 480 ) {
457 /* page boundary crossed */
459 fill_output_more( &(block->u.out.u.full.u.cross.om),
460 /* data size - how much of data_p fits on the first page */
461 PAGE_SIZE - (data_p % PAGE_SIZE),
463 /* DMA address of data_p */
464 dma_region_offset_to_bus(&video->dv_buf,
465 data_p - (unsigned long) video->dv_buf.kvirt));
467 fill_output_last( &(block->u.out.u.full.u.cross.ol),
469 /* want completion status on all interesting packets */
470 (first_packet || mid_packet || last_packet) ? 1 : 0,
472 /* want interrupt on all interesting packets */
473 (first_packet || mid_packet || last_packet) ? 1 : 0,
475 /* data size - remaining portion of data_p */
476 480 - (PAGE_SIZE - (data_p % PAGE_SIZE)),
478 /* DMA address of data_p + PAGE_SIZE - (data_p % PAGE_SIZE) */
479 dma_region_offset_to_bus(&video->dv_buf,
480 data_p + PAGE_SIZE - (data_p % PAGE_SIZE) - (unsigned long) video->dv_buf.kvirt));
482 if (first_packet)
483 f->frame_begin_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
484 else if (mid_packet)
485 f->mid_frame_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
486 else if (last_packet) {
487 f->frame_end_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
488 f->frame_end_branch = &(block->u.out.u.full.u.cross.ol.q[2]);
491 branch_address = &(block->u.out.u.full.u.cross.ol.q[2]);
493 n_descriptors = 5;
494 if (first_packet)
495 f->first_n_descriptors = n_descriptors;
497 full_packets++;
499 } else {
500 /* fits on one page */
502 fill_output_last( &(block->u.out.u.full.u.nocross.ol),
504 /* want completion status on all interesting packets */
505 (first_packet || mid_packet || last_packet) ? 1 : 0,
507 /* want interrupt on all interesting packets */
508 (first_packet || mid_packet || last_packet) ? 1 : 0,
510 480, /* data size (480 bytes of DV data) */
513 /* DMA address of data_p */
514 dma_region_offset_to_bus(&video->dv_buf,
515 data_p - (unsigned long) video->dv_buf.kvirt));
517 if (first_packet)
518 f->frame_begin_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
519 else if (mid_packet)
520 f->mid_frame_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
521 else if (last_packet) {
522 f->frame_end_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
523 f->frame_end_branch = &(block->u.out.u.full.u.nocross.ol.q[2]);
526 branch_address = &(block->u.out.u.full.u.nocross.ol.q[2]);
528 n_descriptors = 4;
529 if (first_packet)
530 f->first_n_descriptors = n_descriptors;
532 full_packets++;
536 /* link this descriptor block into the DMA program by filling in
537 the branch address of the previous block */
539 /* note: we are not linked into the active DMA chain yet */
541 if (last_branch_address) {
542 *(last_branch_address) = cpu_to_le32(block_dma | n_descriptors);
545 last_branch_address = branch_address;
548 f->n_packets++;
552 /* when we first assemble a new frame, set the final branch
553 to loop back up to the top */
554 *(f->frame_end_branch) = cpu_to_le32(f->descriptor_pool_dma | f->first_n_descriptors);
556 /* make the latest version of this frame visible to the PCI card */
557 dma_region_sync(&video->dv_buf, f->data - (unsigned long) video->dv_buf.kvirt, video->frame_size);
559 /* lock against DMA interrupt */
560 spin_lock_irqsave(&video->spinlock, irq_flags);
562 f->state = FRAME_READY;
564 video->n_clear_frames--;
566 last_frame = video->first_clear_frame - 1;
567 if (last_frame == -1)
568 last_frame = video->n_frames-1;
570 video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
572 irq_printk(" frame %d prepared, active_frame = %d, n_clear_frames = %d, first_clear_frame = %d\n last=%d\n",
573 this_frame, video->active_frame, video->n_clear_frames, video->first_clear_frame, last_frame);
575 irq_printk(" begin_ts %08lx mid_ts %08lx end_ts %08lx end_br %08lx\n",
576 (unsigned long) f->frame_begin_timestamp,
577 (unsigned long) f->mid_frame_timestamp,
578 (unsigned long) f->frame_end_timestamp,
579 (unsigned long) f->frame_end_branch);
581 if (video->active_frame != -1) {
583 /* if DMA is already active, we are almost done */
584 /* just link us onto the active DMA chain */
585 if (video->frames[last_frame]->frame_end_branch) {
586 u32 temp;
588 /* point the previous frame's tail to this frame's head */
589 *(video->frames[last_frame]->frame_end_branch) = cpu_to_le32(f->descriptor_pool_dma | f->first_n_descriptors);
591 /* this write MUST precede the next one, or we could silently drop frames */
592 wmb();
594 /* disable the want_status semaphore on the last packet */
595 temp = le32_to_cpu(*(video->frames[last_frame]->frame_end_branch - 2));
596 temp &= 0xF7CFFFFF;
597 *(video->frames[last_frame]->frame_end_branch - 2) = cpu_to_le32(temp);
599 /* flush these writes to memory ASAP */
600 flush_pci_write(video->ohci);
602 /* NOTE:
603 ideally the writes should be "atomic": if
604 the OHCI card reads the want_status flag in
605 between them, we'll falsely report a
606 dropped frame. Hopefully this window is too
607 small to really matter, and the consequence
608 is rather harmless. */
611 irq_printk(" new frame %d linked onto DMA chain\n", this_frame);
613 } else {
614 printk(KERN_ERR "dv1394: last frame not ready???\n");
617 } else {
619 u32 transmit_sec, transmit_cyc;
620 u32 ts_cyc, ts_off;
622 /* DMA is stopped, so this is the very first frame */
623 video->active_frame = this_frame;
625 /* set CommandPtr to address and size of first descriptor block */
626 reg_write(video->ohci, video->ohci_IsoXmitCommandPtr,
627 video->frames[video->active_frame]->descriptor_pool_dma |
628 f->first_n_descriptors);
630 /* assign a timestamp based on the current cycle time...
631 We'll tell the card to begin DMA 100 cycles from now,
632 and assign a timestamp 103 cycles from now */
634 cycleTimer = reg_read(video->ohci, OHCI1394_IsochronousCycleTimer);
636 ct_sec = cycleTimer >> 25;
637 ct_cyc = (cycleTimer >> 12) & 0x1FFF;
638 ct_off = cycleTimer & 0xFFF;
640 transmit_sec = ct_sec;
641 transmit_cyc = ct_cyc + 100;
643 transmit_sec += transmit_cyc/8000;
644 transmit_cyc %= 8000;
646 ts_off = ct_off;
647 ts_cyc = transmit_cyc + 3;
648 ts_cyc %= 8000;
650 f->assigned_timestamp = (ts_cyc&0xF) << 12;
652 /* now actually write the timestamp into the appropriate CIP headers */
653 if (f->cip_syt1) {
654 f->cip_syt1->b[6] = f->assigned_timestamp >> 8;
655 f->cip_syt1->b[7] = f->assigned_timestamp & 0xFF;
657 if (f->cip_syt2) {
658 f->cip_syt2->b[6] = f->assigned_timestamp >> 8;
659 f->cip_syt2->b[7] = f->assigned_timestamp & 0xFF;
662 /* --- start DMA --- */
664 /* clear all bits in ContextControl register */
666 reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, 0xFFFFFFFF);
667 wmb();
669 /* the OHCI card has the ability to start ISO transmission on a
670 particular cycle (start-on-cycle). This way we can ensure that
671 the first DV frame will have an accurate timestamp.
673 However, start-on-cycle only appears to work if the OHCI card
674 is cycle master! Since the consequences of messing up the first
675 timestamp are minimal*, just disable start-on-cycle for now.
677 * my DV deck drops the first few frames before it "locks in;"
678 so the first frame having an incorrect timestamp is inconsequential.
681 #if 0
682 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet,
683 (1 << 31) /* enable start-on-cycle */
684 | ( (transmit_sec & 0x3) << 29)
685 | (transmit_cyc << 16));
686 wmb();
687 #endif
689 video->dma_running = 1;
691 /* set the 'run' bit */
692 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, 0x8000);
693 flush_pci_write(video->ohci);
695 /* --- DMA should be running now --- */
697 debug_printk(" Cycle = %4u ContextControl = %08x CmdPtr = %08x\n",
698 (reg_read(video->ohci, OHCI1394_IsochronousCycleTimer) >> 12) & 0x1FFF,
699 reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
700 reg_read(video->ohci, video->ohci_IsoXmitCommandPtr));
702 debug_printk(" DMA start - current cycle %4u, transmit cycle %4u (%2u), assigning ts cycle %2u\n",
703 ct_cyc, transmit_cyc, transmit_cyc & 0xF, ts_cyc & 0xF);
705 #if DV1394_DEBUG_LEVEL >= 2
707 /* check if DMA is really running */
708 int i = 0;
709 while (i < 20) {
710 mb();
711 mdelay(1);
712 if (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & (1 << 10)) {
713 printk("DMA ACTIVE after %d msec\n", i);
714 break;
716 i++;
719 printk("set = %08x, cmdPtr = %08x\n",
720 reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
721 reg_read(video->ohci, video->ohci_IsoXmitCommandPtr)
724 if ( ! (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & (1 << 10)) ) {
725 printk("DMA did NOT go active after 20ms, event = %x\n",
726 reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & 0x1F);
727 } else
728 printk("DMA is RUNNING!\n");
730 #endif
735 spin_unlock_irqrestore(&video->spinlock, irq_flags);
740 /*** RECEIVE FUNCTIONS *****************************************************/
743 frame method put_packet
745 map and copy the packet data to its location in the frame
746 based upon DIF section and sequence
749 static void inline
750 frame_put_packet (struct frame *f, struct packet *p)
752 int section_type = p->data[0] >> 5; /* section type is in bits 5 - 7 */
753 int dif_sequence = p->data[1] >> 4; /* dif sequence number is in bits 4 - 7 */
754 int dif_block = p->data[2];
756 /* sanity check */
757 if (dif_sequence > 11 || dif_block > 149) return;
759 switch (section_type) {
760 case 0: /* 1 Header block */
761 memcpy( (void *) f->data + dif_sequence * 150 * 80, p->data, 480);
762 break;
764 case 1: /* 2 Subcode blocks */
765 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (1 + dif_block) * 80, p->data, 480);
766 break;
768 case 2: /* 3 VAUX blocks */
769 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (3 + dif_block) * 80, p->data, 480);
770 break;
772 case 3: /* 9 Audio blocks interleaved with video */
773 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (6 + dif_block * 16) * 80, p->data, 480);
774 break;
776 case 4: /* 135 Video blocks interleaved with audio */
777 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (7 + (dif_block / 15) + dif_block) * 80, p->data, 480);
778 break;
780 default: /* we can not handle any other data */
781 break;
786 static void start_dma_receive(struct video_card *video)
788 if (video->first_run == 1) {
789 video->first_run = 0;
791 /* start DMA once all of the frames are READY */
792 video->n_clear_frames = 0;
793 video->first_clear_frame = -1;
794 video->current_packet = 0;
795 video->active_frame = 0;
797 /* reset iso recv control register */
798 reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, 0xFFFFFFFF);
799 wmb();
801 /* clear bufferFill, set isochHeader and speed (0=100) */
802 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, 0x40000000);
804 /* match on all tags, listen on channel */
805 reg_write(video->ohci, video->ohci_IsoRcvContextMatch, 0xf0000000 | video->channel);
807 /* address and first descriptor block + Z=1 */
808 reg_write(video->ohci, video->ohci_IsoRcvCommandPtr,
809 video->frames[0]->descriptor_pool_dma | 1); /* Z=1 */
810 wmb();
812 video->dma_running = 1;
814 /* run */
815 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, 0x8000);
816 flush_pci_write(video->ohci);
818 debug_printk("dv1394: DMA started\n");
820 #if DV1394_DEBUG_LEVEL >= 2
822 int i;
824 for (i = 0; i < 1000; ++i) {
825 mdelay(1);
826 if (reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 10)) {
827 printk("DMA ACTIVE after %d msec\n", i);
828 break;
831 if ( reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 11) ) {
832 printk("DEAD, event = %x\n",
833 reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & 0x1F);
834 } else
835 printk("RUNNING!\n");
837 #endif
839 else if ( reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 11) ) {
840 debug_printk("DEAD, event = %x\n",
841 reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & 0x1F);
843 /* wake */
844 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
850 receive_packets() - build the DMA program for receiving
853 static void receive_packets(struct video_card *video)
855 struct DMA_descriptor_block *block = NULL;
856 dma_addr_t block_dma = 0;
857 struct packet *data = NULL;
858 dma_addr_t data_dma = 0;
859 u32 *last_branch_address = NULL;
860 unsigned long irq_flags;
861 int want_interrupt = 0;
862 struct frame *f = NULL;
863 int i, j;
865 spin_lock_irqsave(&video->spinlock, irq_flags);
867 for (j = 0; j < video->n_frames; j++) {
869 /* connect frames */
870 if (j > 0 && f != NULL && f->frame_end_branch != NULL)
871 *(f->frame_end_branch) = cpu_to_le32(video->frames[j]->descriptor_pool_dma | 1); /* set Z=1 */
873 f = video->frames[j];
875 for (i = 0; i < MAX_PACKETS; i++) {
876 /* locate a descriptor block and packet from the buffer */
877 block = &(f->descriptor_pool[i]);
878 block_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
880 data = ((struct packet*)video->packet_buf.kvirt) + f->frame_num * MAX_PACKETS + i;
881 data_dma = dma_region_offset_to_bus( &video->packet_buf,
882 ((unsigned long) data - (unsigned long) video->packet_buf.kvirt) );
884 /* setup DMA descriptor block */
885 want_interrupt = ((i % (MAX_PACKETS/2)) == 0 || i == (MAX_PACKETS-1));
886 fill_input_last( &(block->u.in.il), want_interrupt, 512, data_dma);
888 /* link descriptors */
889 last_branch_address = f->frame_end_branch;
891 if (last_branch_address != NULL)
892 *(last_branch_address) = cpu_to_le32(block_dma | 1); /* set Z=1 */
894 f->frame_end_branch = &(block->u.in.il.q[2]);
897 } /* next j */
899 spin_unlock_irqrestore(&video->spinlock, irq_flags);
905 /*** MANAGEMENT FUNCTIONS **************************************************/
907 static int do_dv1394_init(struct video_card *video, struct dv1394_init *init)
909 unsigned long flags, new_buf_size;
910 int i;
911 u64 chan_mask;
912 int retval = -EINVAL;
914 debug_printk("dv1394: initialising %d\n", video->id);
915 if (init->api_version != DV1394_API_VERSION)
916 return -EINVAL;
918 /* first sanitize all the parameters */
919 if ( (init->n_frames < 2) || (init->n_frames > DV1394_MAX_FRAMES) )
920 return -EINVAL;
922 if ( (init->format != DV1394_NTSC) && (init->format != DV1394_PAL) )
923 return -EINVAL;
925 if ( (init->syt_offset == 0) || (init->syt_offset > 50) )
926 /* default SYT offset is 3 cycles */
927 init->syt_offset = 3;
929 if ( (init->channel > 63) || (init->channel < 0) )
930 init->channel = 63;
932 chan_mask = (u64)1 << init->channel;
934 /* calculate what size DMA buffer is needed */
935 if (init->format == DV1394_NTSC)
936 new_buf_size = DV1394_NTSC_FRAME_SIZE * init->n_frames;
937 else
938 new_buf_size = DV1394_PAL_FRAME_SIZE * init->n_frames;
940 /* round up to PAGE_SIZE */
941 if (new_buf_size % PAGE_SIZE) new_buf_size += PAGE_SIZE - (new_buf_size % PAGE_SIZE);
943 /* don't allow the user to allocate the DMA buffer more than once */
944 if (video->dv_buf.kvirt && video->dv_buf_size != new_buf_size) {
945 printk("dv1394: re-sizing the DMA buffer is not allowed\n");
946 return -EINVAL;
949 /* shutdown the card if it's currently active */
950 /* (the card should not be reset if the parameters are screwy) */
952 do_dv1394_shutdown(video, 0);
954 /* try to claim the ISO channel */
955 spin_lock_irqsave(&video->ohci->IR_channel_lock, flags);
956 if (video->ohci->ISO_channel_usage & chan_mask) {
957 spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
958 retval = -EBUSY;
959 goto err;
961 video->ohci->ISO_channel_usage |= chan_mask;
962 spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
964 video->channel = init->channel;
966 /* initialize misc. fields of video */
967 video->n_frames = init->n_frames;
968 video->pal_or_ntsc = init->format;
970 video->cip_accum = 0;
971 video->continuity_counter = 0;
973 video->active_frame = -1;
974 video->first_clear_frame = 0;
975 video->n_clear_frames = video->n_frames;
976 video->dropped_frames = 0;
978 video->write_off = 0;
980 video->first_run = 1;
981 video->current_packet = -1;
982 video->first_frame = 0;
984 if (video->pal_or_ntsc == DV1394_NTSC) {
985 video->cip_n = init->cip_n != 0 ? init->cip_n : CIP_N_NTSC;
986 video->cip_d = init->cip_d != 0 ? init->cip_d : CIP_D_NTSC;
987 video->frame_size = DV1394_NTSC_FRAME_SIZE;
988 } else {
989 video->cip_n = init->cip_n != 0 ? init->cip_n : CIP_N_PAL;
990 video->cip_d = init->cip_d != 0 ? init->cip_d : CIP_D_PAL;
991 video->frame_size = DV1394_PAL_FRAME_SIZE;
994 video->syt_offset = init->syt_offset;
996 /* find and claim DMA contexts on the OHCI card */
998 if (video->ohci_it_ctx == -1) {
999 ohci1394_init_iso_tasklet(&video->it_tasklet, OHCI_ISO_TRANSMIT,
1000 it_tasklet_func, (unsigned long) video);
1002 if (ohci1394_register_iso_tasklet(video->ohci, &video->it_tasklet) < 0) {
1003 printk(KERN_ERR "dv1394: could not find an available IT DMA context\n");
1004 retval = -EBUSY;
1005 goto err;
1008 video->ohci_it_ctx = video->it_tasklet.context;
1009 debug_printk("dv1394: claimed IT DMA context %d\n", video->ohci_it_ctx);
1012 if (video->ohci_ir_ctx == -1) {
1013 ohci1394_init_iso_tasklet(&video->ir_tasklet, OHCI_ISO_RECEIVE,
1014 ir_tasklet_func, (unsigned long) video);
1016 if (ohci1394_register_iso_tasklet(video->ohci, &video->ir_tasklet) < 0) {
1017 printk(KERN_ERR "dv1394: could not find an available IR DMA context\n");
1018 retval = -EBUSY;
1019 goto err;
1021 video->ohci_ir_ctx = video->ir_tasklet.context;
1022 debug_printk("dv1394: claimed IR DMA context %d\n", video->ohci_ir_ctx);
1025 /* allocate struct frames */
1026 for (i = 0; i < init->n_frames; i++) {
1027 video->frames[i] = frame_new(i, video);
1029 if (!video->frames[i]) {
1030 printk(KERN_ERR "dv1394: Cannot allocate frame structs\n");
1031 retval = -ENOMEM;
1032 goto err;
1036 if (!video->dv_buf.kvirt) {
1037 /* allocate the ringbuffer */
1038 retval = dma_region_alloc(&video->dv_buf, new_buf_size, video->ohci->dev, PCI_DMA_TODEVICE);
1039 if (retval)
1040 goto err;
1042 video->dv_buf_size = new_buf_size;
1044 debug_printk("dv1394: Allocated %d frame buffers, total %u pages (%u DMA pages), %lu bytes\n",
1045 video->n_frames, video->dv_buf.n_pages,
1046 video->dv_buf.n_dma_pages, video->dv_buf_size);
1049 /* set up the frame->data pointers */
1050 for (i = 0; i < video->n_frames; i++)
1051 video->frames[i]->data = (unsigned long) video->dv_buf.kvirt + i * video->frame_size;
1053 if (!video->packet_buf.kvirt) {
1054 /* allocate packet buffer */
1055 video->packet_buf_size = sizeof(struct packet) * video->n_frames * MAX_PACKETS;
1056 if (video->packet_buf_size % PAGE_SIZE)
1057 video->packet_buf_size += PAGE_SIZE - (video->packet_buf_size % PAGE_SIZE);
1059 retval = dma_region_alloc(&video->packet_buf, video->packet_buf_size,
1060 video->ohci->dev, PCI_DMA_FROMDEVICE);
1061 if (retval)
1062 goto err;
1064 debug_printk("dv1394: Allocated %d packets in buffer, total %u pages (%u DMA pages), %lu bytes\n",
1065 video->n_frames*MAX_PACKETS, video->packet_buf.n_pages,
1066 video->packet_buf.n_dma_pages, video->packet_buf_size);
1069 /* set up register offsets for IT context */
1070 /* IT DMA context registers are spaced 16 bytes apart */
1071 video->ohci_IsoXmitContextControlSet = OHCI1394_IsoXmitContextControlSet+16*video->ohci_it_ctx;
1072 video->ohci_IsoXmitContextControlClear = OHCI1394_IsoXmitContextControlClear+16*video->ohci_it_ctx;
1073 video->ohci_IsoXmitCommandPtr = OHCI1394_IsoXmitCommandPtr+16*video->ohci_it_ctx;
1075 /* enable interrupts for IT context */
1076 reg_write(video->ohci, OHCI1394_IsoXmitIntMaskSet, (1 << video->ohci_it_ctx));
1077 debug_printk("dv1394: interrupts enabled for IT context %d\n", video->ohci_it_ctx);
1079 /* set up register offsets for IR context */
1080 /* IR DMA context registers are spaced 32 bytes apart */
1081 video->ohci_IsoRcvContextControlSet = OHCI1394_IsoRcvContextControlSet+32*video->ohci_ir_ctx;
1082 video->ohci_IsoRcvContextControlClear = OHCI1394_IsoRcvContextControlClear+32*video->ohci_ir_ctx;
1083 video->ohci_IsoRcvCommandPtr = OHCI1394_IsoRcvCommandPtr+32*video->ohci_ir_ctx;
1084 video->ohci_IsoRcvContextMatch = OHCI1394_IsoRcvContextMatch+32*video->ohci_ir_ctx;
1086 /* enable interrupts for IR context */
1087 reg_write(video->ohci, OHCI1394_IsoRecvIntMaskSet, (1 << video->ohci_ir_ctx) );
1088 debug_printk("dv1394: interrupts enabled for IR context %d\n", video->ohci_ir_ctx);
1090 return 0;
1092 err:
1093 do_dv1394_shutdown(video, 1);
1094 return retval;
1097 /* if the user doesn't bother to call ioctl(INIT) before starting
1098 mmap() or read()/write(), just give him some default values */
1100 static int do_dv1394_init_default(struct video_card *video)
1102 struct dv1394_init init;
1104 init.api_version = DV1394_API_VERSION;
1105 init.n_frames = DV1394_MAX_FRAMES / 4;
1106 /* the following are now set via proc_fs or devfs */
1107 init.channel = video->channel;
1108 init.format = video->pal_or_ntsc;
1109 init.cip_n = video->cip_n;
1110 init.cip_d = video->cip_d;
1111 init.syt_offset = video->syt_offset;
1113 return do_dv1394_init(video, &init);
1116 /* do NOT call from interrupt context */
1117 static void stop_dma(struct video_card *video)
1119 unsigned long flags;
1120 int i;
1122 /* no interrupts */
1123 spin_lock_irqsave(&video->spinlock, flags);
1125 video->dma_running = 0;
1127 if ( (video->ohci_it_ctx == -1) && (video->ohci_ir_ctx == -1) )
1128 goto out;
1130 /* stop DMA if in progress */
1131 if ( (video->active_frame != -1) ||
1132 (reg_read(video->ohci, video->ohci_IsoXmitContextControlClear) & (1 << 10)) ||
1133 (reg_read(video->ohci, video->ohci_IsoRcvContextControlClear) & (1 << 10)) ) {
1135 /* clear the .run bits */
1136 reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, (1 << 15));
1137 reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, (1 << 15));
1138 flush_pci_write(video->ohci);
1140 video->active_frame = -1;
1141 video->first_run = 1;
1143 /* wait until DMA really stops */
1144 i = 0;
1145 while (i < 1000) {
1147 /* wait 0.1 millisecond */
1148 udelay(100);
1150 if ( (reg_read(video->ohci, video->ohci_IsoXmitContextControlClear) & (1 << 10)) ||
1151 (reg_read(video->ohci, video->ohci_IsoRcvContextControlClear) & (1 << 10)) ) {
1152 /* still active */
1153 debug_printk("dv1394: stop_dma: DMA not stopped yet\n" );
1154 mb();
1155 } else {
1156 debug_printk("dv1394: stop_dma: DMA stopped safely after %d ms\n", i/10);
1157 break;
1160 i++;
1163 if (i == 1000) {
1164 printk(KERN_ERR "dv1394: stop_dma: DMA still going after %d ms!\n", i/10);
1167 else
1168 debug_printk("dv1394: stop_dma: already stopped.\n");
1170 out:
1171 spin_unlock_irqrestore(&video->spinlock, flags);
1176 static void do_dv1394_shutdown(struct video_card *video, int free_dv_buf)
1178 int i;
1180 debug_printk("dv1394: shutdown...\n");
1182 /* stop DMA if in progress */
1183 stop_dma(video);
1185 /* release the DMA contexts */
1186 if (video->ohci_it_ctx != -1) {
1187 video->ohci_IsoXmitContextControlSet = 0;
1188 video->ohci_IsoXmitContextControlClear = 0;
1189 video->ohci_IsoXmitCommandPtr = 0;
1191 /* disable interrupts for IT context */
1192 reg_write(video->ohci, OHCI1394_IsoXmitIntMaskClear, (1 << video->ohci_it_ctx));
1194 /* remove tasklet */
1195 ohci1394_unregister_iso_tasklet(video->ohci, &video->it_tasklet);
1196 debug_printk("dv1394: IT context %d released\n", video->ohci_it_ctx);
1197 video->ohci_it_ctx = -1;
1200 if (video->ohci_ir_ctx != -1) {
1201 video->ohci_IsoRcvContextControlSet = 0;
1202 video->ohci_IsoRcvContextControlClear = 0;
1203 video->ohci_IsoRcvCommandPtr = 0;
1204 video->ohci_IsoRcvContextMatch = 0;
1206 /* disable interrupts for IR context */
1207 reg_write(video->ohci, OHCI1394_IsoRecvIntMaskClear, (1 << video->ohci_ir_ctx));
1209 /* remove tasklet */
1210 ohci1394_unregister_iso_tasklet(video->ohci, &video->ir_tasklet);
1211 debug_printk("dv1394: IR context %d released\n", video->ohci_ir_ctx);
1212 video->ohci_ir_ctx = -1;
1215 /* release the ISO channel */
1216 if (video->channel != -1) {
1217 u64 chan_mask;
1218 unsigned long flags;
1220 chan_mask = (u64)1 << video->channel;
1222 spin_lock_irqsave(&video->ohci->IR_channel_lock, flags);
1223 video->ohci->ISO_channel_usage &= ~(chan_mask);
1224 spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
1226 video->channel = -1;
1229 /* free the frame structs */
1230 for (i = 0; i < DV1394_MAX_FRAMES; i++) {
1231 if (video->frames[i])
1232 frame_delete(video->frames[i]);
1233 video->frames[i] = NULL;
1236 video->n_frames = 0;
1238 /* we can't free the DMA buffer unless it is guaranteed that
1239 no more user-space mappings exist */
1241 if (free_dv_buf) {
1242 dma_region_free(&video->dv_buf);
1243 video->dv_buf_size = 0;
1246 /* free packet buffer */
1247 dma_region_free(&video->packet_buf);
1248 video->packet_buf_size = 0;
1250 debug_printk("dv1394: shutdown OK\n");
1254 **********************************
1255 *** MMAP() THEORY OF OPERATION ***
1256 **********************************
1258 The ringbuffer cannot be re-allocated or freed while
1259 a user program maintains a mapping of it. (note that a mapping
1260 can persist even after the device fd is closed!)
1262 So, only let the user process allocate the DMA buffer once.
1263 To resize or deallocate it, you must close the device file
1264 and open it again.
1266 Previously Dan M. hacked out a scheme that allowed the DMA
1267 buffer to change by forcefully unmapping it from the user's
1268 address space. It was prone to error because it's very hard to
1269 track all the places the buffer could have been mapped (we
1270 would have had to walk the vma list of every process in the
1271 system to be sure we found all the mappings!). Instead, we
1272 force the user to choose one buffer size and stick with
1273 it. This small sacrifice is worth the huge reduction in
1274 error-prone code in dv1394.
1277 int dv1394_mmap(struct file *file, struct vm_area_struct *vma)
1279 struct video_card *video = file_to_video_card(file);
1280 int retval = -EINVAL;
1282 /* serialize mmap */
1283 down(&video->sem);
1285 if ( ! video_card_initialized(video) ) {
1286 retval = do_dv1394_init_default(video);
1287 if (retval)
1288 goto out;
1291 retval = dma_region_mmap(&video->dv_buf, file, vma);
1292 out:
1293 up(&video->sem);
1294 return retval;
1297 /*** DEVICE FILE INTERFACE *************************************************/
1299 /* no need to serialize, multiple threads OK */
1300 static unsigned int dv1394_poll(struct file *file, struct poll_table_struct *wait)
1302 struct video_card *video = file_to_video_card(file);
1303 unsigned int mask = 0;
1304 unsigned long flags;
1306 poll_wait(file, &video->waitq, wait);
1308 spin_lock_irqsave(&video->spinlock, flags);
1309 if ( video->n_frames == 0 ) {
1311 } else if ( video->active_frame == -1 ) {
1312 /* nothing going on */
1313 mask |= POLLOUT;
1314 } else {
1315 /* any clear/ready buffers? */
1316 if (video->n_clear_frames >0)
1317 mask |= POLLOUT | POLLIN;
1319 spin_unlock_irqrestore(&video->spinlock, flags);
1321 return mask;
1324 static int dv1394_fasync(int fd, struct file *file, int on)
1326 /* I just copied this code verbatim from Alan Cox's mouse driver example
1327 (linux/Documentation/DocBook/) */
1329 struct video_card *video = file_to_video_card(file);
1331 int retval = fasync_helper(fd, file, on, &video->fasync);
1333 if (retval < 0)
1334 return retval;
1335 return 0;
1338 static ssize_t dv1394_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1340 struct video_card *video = file_to_video_card(file);
1341 DECLARE_WAITQUEUE(wait, current);
1342 ssize_t ret;
1343 size_t cnt;
1344 unsigned long flags;
1345 int target_frame;
1347 /* serialize this to prevent multi-threaded mayhem */
1348 if (file->f_flags & O_NONBLOCK) {
1349 if (down_trylock(&video->sem))
1350 return -EAGAIN;
1351 } else {
1352 if (down_interruptible(&video->sem))
1353 return -ERESTARTSYS;
1356 if ( !video_card_initialized(video) ) {
1357 ret = do_dv1394_init_default(video);
1358 if (ret) {
1359 up(&video->sem);
1360 return ret;
1364 ret = 0;
1365 add_wait_queue(&video->waitq, &wait);
1367 while (count > 0) {
1369 /* must set TASK_INTERRUPTIBLE *before* checking for free
1370 buffers; otherwise we could miss a wakeup if the interrupt
1371 fires between the check and the schedule() */
1373 set_current_state(TASK_INTERRUPTIBLE);
1375 spin_lock_irqsave(&video->spinlock, flags);
1377 target_frame = video->first_clear_frame;
1379 spin_unlock_irqrestore(&video->spinlock, flags);
1381 if (video->frames[target_frame]->state == FRAME_CLEAR) {
1383 /* how much room is left in the target frame buffer */
1384 cnt = video->frame_size - (video->write_off - target_frame * video->frame_size);
1386 } else {
1387 /* buffer is already used */
1388 cnt = 0;
1391 if (cnt > count)
1392 cnt = count;
1394 if (cnt <= 0) {
1395 /* no room left, gotta wait */
1396 if (file->f_flags & O_NONBLOCK) {
1397 if (!ret)
1398 ret = -EAGAIN;
1399 break;
1401 if (signal_pending(current)) {
1402 if (!ret)
1403 ret = -ERESTARTSYS;
1404 break;
1407 schedule();
1409 continue; /* start over from 'while(count > 0)...' */
1412 if (copy_from_user(video->dv_buf.kvirt + video->write_off, buffer, cnt)) {
1413 if (!ret)
1414 ret = -EFAULT;
1415 break;
1418 video->write_off = (video->write_off + cnt) % (video->n_frames * video->frame_size);
1420 count -= cnt;
1421 buffer += cnt;
1422 ret += cnt;
1424 if (video->write_off == video->frame_size * ((target_frame + 1) % video->n_frames))
1425 frame_prepare(video, target_frame);
1428 remove_wait_queue(&video->waitq, &wait);
1429 set_current_state(TASK_RUNNING);
1430 up(&video->sem);
1431 return ret;
1435 static ssize_t dv1394_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1437 struct video_card *video = file_to_video_card(file);
1438 DECLARE_WAITQUEUE(wait, current);
1439 ssize_t ret;
1440 size_t cnt;
1441 unsigned long flags;
1442 int target_frame;
1444 /* serialize this to prevent multi-threaded mayhem */
1445 if (file->f_flags & O_NONBLOCK) {
1446 if (down_trylock(&video->sem))
1447 return -EAGAIN;
1448 } else {
1449 if (down_interruptible(&video->sem))
1450 return -ERESTARTSYS;
1453 if ( !video_card_initialized(video) ) {
1454 ret = do_dv1394_init_default(video);
1455 if (ret) {
1456 up(&video->sem);
1457 return ret;
1459 video->continuity_counter = -1;
1461 receive_packets(video);
1463 start_dma_receive(video);
1466 ret = 0;
1467 add_wait_queue(&video->waitq, &wait);
1469 while (count > 0) {
1471 /* must set TASK_INTERRUPTIBLE *before* checking for free
1472 buffers; otherwise we could miss a wakeup if the interrupt
1473 fires between the check and the schedule() */
1475 set_current_state(TASK_INTERRUPTIBLE);
1477 spin_lock_irqsave(&video->spinlock, flags);
1479 target_frame = video->first_clear_frame;
1481 spin_unlock_irqrestore(&video->spinlock, flags);
1483 if (target_frame >= 0 &&
1484 video->n_clear_frames > 0 &&
1485 video->frames[target_frame]->state == FRAME_CLEAR) {
1487 /* how much room is left in the target frame buffer */
1488 cnt = video->frame_size - (video->write_off - target_frame * video->frame_size);
1490 } else {
1491 /* buffer is already used */
1492 cnt = 0;
1495 if (cnt > count)
1496 cnt = count;
1498 if (cnt <= 0) {
1499 /* no room left, gotta wait */
1500 if (file->f_flags & O_NONBLOCK) {
1501 if (!ret)
1502 ret = -EAGAIN;
1503 break;
1505 if (signal_pending(current)) {
1506 if (!ret)
1507 ret = -ERESTARTSYS;
1508 break;
1511 schedule();
1513 continue; /* start over from 'while(count > 0)...' */
1516 if (copy_to_user(buffer, video->dv_buf.kvirt + video->write_off, cnt)) {
1517 if (!ret)
1518 ret = -EFAULT;
1519 break;
1522 video->write_off = (video->write_off + cnt) % (video->n_frames * video->frame_size);
1524 count -= cnt;
1525 buffer += cnt;
1526 ret += cnt;
1528 if (video->write_off == video->frame_size * ((target_frame + 1) % video->n_frames)) {
1529 spin_lock_irqsave(&video->spinlock, flags);
1530 video->n_clear_frames--;
1531 video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
1532 spin_unlock_irqrestore(&video->spinlock, flags);
1536 remove_wait_queue(&video->waitq, &wait);
1537 set_current_state(TASK_RUNNING);
1538 up(&video->sem);
1539 return ret;
1543 /*** DEVICE IOCTL INTERFACE ************************************************/
1545 /* I *think* the VFS serializes ioctl() for us, so we don't have to worry
1546 about situations like having two threads in here at once... */
1548 static int dv1394_ioctl(struct inode *inode, struct file *file,
1549 unsigned int cmd, unsigned long arg)
1551 struct video_card *video = file_to_video_card(file);
1552 unsigned long flags;
1553 int ret = -EINVAL;
1555 DECLARE_WAITQUEUE(wait, current);
1557 /* serialize this to prevent multi-threaded mayhem */
1558 if (file->f_flags & O_NONBLOCK) {
1559 if (down_trylock(&video->sem))
1560 return -EAGAIN;
1561 } else {
1562 if (down_interruptible(&video->sem))
1563 return -ERESTARTSYS;
1566 switch(cmd)
1568 case DV1394_IOC_SUBMIT_FRAMES: {
1569 unsigned int n_submit;
1571 if ( !video_card_initialized(video) ) {
1572 ret = do_dv1394_init_default(video);
1573 if (ret)
1574 goto out;
1577 n_submit = (unsigned int) arg;
1579 if (n_submit > video->n_frames) {
1580 ret = -EINVAL;
1581 goto out;
1584 while (n_submit > 0) {
1586 add_wait_queue(&video->waitq, &wait);
1587 set_current_state(TASK_INTERRUPTIBLE);
1589 spin_lock_irqsave(&video->spinlock, flags);
1591 /* wait until video->first_clear_frame is really CLEAR */
1592 while (video->frames[video->first_clear_frame]->state != FRAME_CLEAR) {
1594 spin_unlock_irqrestore(&video->spinlock, flags);
1596 if (signal_pending(current)) {
1597 remove_wait_queue(&video->waitq, &wait);
1598 set_current_state(TASK_RUNNING);
1599 ret = -EINTR;
1600 goto out;
1603 schedule();
1604 set_current_state(TASK_INTERRUPTIBLE);
1606 spin_lock_irqsave(&video->spinlock, flags);
1608 spin_unlock_irqrestore(&video->spinlock, flags);
1610 remove_wait_queue(&video->waitq, &wait);
1611 set_current_state(TASK_RUNNING);
1613 frame_prepare(video, video->first_clear_frame);
1615 n_submit--;
1618 ret = 0;
1619 break;
1622 case DV1394_IOC_WAIT_FRAMES: {
1623 unsigned int n_wait;
1625 if ( !video_card_initialized(video) ) {
1626 ret = -EINVAL;
1627 goto out;
1630 n_wait = (unsigned int) arg;
1632 /* since we re-run the last frame on underflow, we will
1633 never actually have n_frames clear frames; at most only
1634 n_frames - 1 */
1636 if (n_wait > (video->n_frames-1) ) {
1637 ret = -EINVAL;
1638 goto out;
1641 add_wait_queue(&video->waitq, &wait);
1642 set_current_state(TASK_INTERRUPTIBLE);
1644 spin_lock_irqsave(&video->spinlock, flags);
1646 while (video->n_clear_frames < n_wait) {
1648 spin_unlock_irqrestore(&video->spinlock, flags);
1650 if (signal_pending(current)) {
1651 remove_wait_queue(&video->waitq, &wait);
1652 set_current_state(TASK_RUNNING);
1653 ret = -EINTR;
1654 goto out;
1657 schedule();
1658 set_current_state(TASK_INTERRUPTIBLE);
1660 spin_lock_irqsave(&video->spinlock, flags);
1663 spin_unlock_irqrestore(&video->spinlock, flags);
1665 remove_wait_queue(&video->waitq, &wait);
1666 set_current_state(TASK_RUNNING);
1667 ret = 0;
1668 break;
1671 case DV1394_IOC_RECEIVE_FRAMES: {
1672 unsigned int n_recv;
1674 if ( !video_card_initialized(video) ) {
1675 ret = -EINVAL;
1676 goto out;
1679 n_recv = (unsigned int) arg;
1681 /* at least one frame must be active */
1682 if (n_recv > (video->n_frames-1) ) {
1683 ret = -EINVAL;
1684 goto out;
1687 spin_lock_irqsave(&video->spinlock, flags);
1689 /* release the clear frames */
1690 video->n_clear_frames -= n_recv;
1692 /* advance the clear frame cursor */
1693 video->first_clear_frame = (video->first_clear_frame + n_recv) % video->n_frames;
1695 /* reset dropped_frames */
1696 video->dropped_frames = 0;
1698 spin_unlock_irqrestore(&video->spinlock, flags);
1700 ret = 0;
1701 break;
1704 case DV1394_IOC_START_RECEIVE: {
1705 if ( !video_card_initialized(video) ) {
1706 ret = do_dv1394_init_default(video);
1707 if (ret)
1708 goto out;
1711 video->continuity_counter = -1;
1713 receive_packets(video);
1715 start_dma_receive(video);
1717 ret = 0;
1718 break;
1721 case DV1394_IOC_INIT: {
1722 struct dv1394_init init;
1723 if (arg == (unsigned long) NULL) {
1724 ret = do_dv1394_init_default(video);
1725 } else {
1726 if (copy_from_user(&init, (void*)arg, sizeof(init))) {
1727 ret = -EFAULT;
1728 goto out;
1730 ret = do_dv1394_init(video, &init);
1732 break;
1735 case DV1394_IOC_SHUTDOWN:
1736 do_dv1394_shutdown(video, 0);
1737 ret = 0;
1738 break;
1741 case DV1394_IOC_GET_STATUS: {
1742 struct dv1394_status status;
1744 if ( !video_card_initialized(video) ) {
1745 ret = -EINVAL;
1746 goto out;
1749 status.init.api_version = DV1394_API_VERSION;
1750 status.init.channel = video->channel;
1751 status.init.n_frames = video->n_frames;
1752 status.init.format = video->pal_or_ntsc;
1753 status.init.cip_n = video->cip_n;
1754 status.init.cip_d = video->cip_d;
1755 status.init.syt_offset = video->syt_offset;
1757 status.first_clear_frame = video->first_clear_frame;
1759 /* the rest of the fields need to be locked against the interrupt */
1760 spin_lock_irqsave(&video->spinlock, flags);
1762 status.active_frame = video->active_frame;
1763 status.n_clear_frames = video->n_clear_frames;
1765 status.dropped_frames = video->dropped_frames;
1767 /* reset dropped_frames */
1768 video->dropped_frames = 0;
1770 spin_unlock_irqrestore(&video->spinlock, flags);
1772 if (copy_to_user((void*)arg, &status, sizeof(status))) {
1773 ret = -EFAULT;
1774 goto out;
1777 ret = 0;
1778 break;
1781 default:
1782 break;
1785 out:
1786 up(&video->sem);
1787 return ret;
1792 /*** DEVICE FILE INTERFACE CONTINUED ***************************************/
1794 static int dv1394_open(struct inode *inode, struct file *file)
1796 struct video_card *video = NULL;
1798 /* if the device was opened through devfs, then file->private_data
1799 has already been set to video by devfs */
1800 if (file->private_data) {
1801 video = (struct video_card*) file->private_data;
1803 } else {
1804 /* look up the card by ID */
1806 struct list_head *lh;
1807 unsigned long flags;
1809 spin_lock_irqsave(&dv1394_cards_lock, flags);
1810 if (!list_empty(&dv1394_cards)) {
1811 struct video_card *p;
1812 list_for_each(lh, &dv1394_cards) {
1813 p = list_entry(lh, struct video_card, list);
1814 if ((p->id) == ieee1394_file_to_instance(file)) {
1815 video = p;
1816 break;
1820 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
1822 if (!video) {
1823 debug_printk("dv1394: OHCI card %d not found", ieee1394_file_to_instance(file));
1824 return -ENODEV;
1827 file->private_data = (void*) video;
1830 #ifndef DV1394_ALLOW_MORE_THAN_ONE_OPEN
1832 if ( test_and_set_bit(0, &video->open) ) {
1833 /* video is already open by someone else */
1834 return -EBUSY;
1837 #endif
1839 return 0;
1843 static int dv1394_release(struct inode *inode, struct file *file)
1845 struct video_card *video = file_to_video_card(file);
1847 /* OK to free the DMA buffer, no more mappings can exist */
1848 do_dv1394_shutdown(video, 1);
1850 /* clean up async I/O users */
1851 dv1394_fasync(-1, file, 0);
1853 /* give someone else a turn */
1854 clear_bit(0, &video->open);
1856 return 0;
1860 /*** PROC_FS INTERFACE ******************************************************/
1861 #ifdef CONFIG_PROC_FS
1862 static LIST_HEAD(dv1394_procfs);
1863 struct dv1394_procfs_entry {
1864 struct list_head list;
1865 struct proc_dir_entry *procfs;
1866 char name[32];
1867 struct dv1394_procfs_entry *parent;
1869 static spinlock_t dv1394_procfs_lock = SPIN_LOCK_UNLOCKED;
1871 static int dv1394_procfs_read( char *page, char **start, off_t off,
1872 int count, int *eof, void *data)
1874 struct video_card *video = (struct video_card*) data;
1876 snprintf( page, count,
1878 format=%s\n\
1879 channel=%d\n\
1880 cip_n=%lu\n\
1881 cip_d=%lu\n\
1882 syt_offset=%u\n",
1883 (video->pal_or_ntsc == DV1394_NTSC ? "NTSC" : "PAL"),
1884 video->channel,
1885 video->cip_n, video->cip_d, video->syt_offset );
1886 return strlen(page);
1889 /* lifted from the stallion.c driver */
1890 #undef TOLOWER
1891 #define TOLOWER(x) ((((x) >= 'A') && ((x) <= 'Z')) ? ((x) + 0x20) : (x))
1892 static unsigned long atol(char *str)
1894 unsigned long val;
1895 int base, c;
1896 char *sp;
1898 val = 0;
1899 sp = str;
1900 if ((*sp == '0') && (*(sp+1) == 'x')) {
1901 base = 16;
1902 sp += 2;
1903 } else if (*sp == '0') {
1904 base = 8;
1905 sp++;
1906 } else {
1907 base = 10;
1910 for (; (*sp != 0); sp++) {
1911 c = (*sp > '9') ? (TOLOWER(*sp) - 'a' + 10) : (*sp - '0');
1912 if ((c < 0) || (c >= base)) {
1913 printk(KERN_ERR "dv1394: atol() invalid argument %s\n", str);
1914 val = 0;
1915 break;
1917 val = (val * base) + c;
1919 return(val);
1922 static int dv1394_procfs_write( struct file *file,
1923 const char *buffer, unsigned long count, void *data)
1925 int len = 0;
1926 char new_value[65];
1927 char *pos;
1928 struct video_card *video = (struct video_card*) data;
1930 if (count > 64)
1931 len = 64;
1932 else
1933 len = count;
1935 if (copy_from_user( new_value, buffer, len))
1936 return -EFAULT;
1938 new_value[len] = 0;
1939 pos = strchr(new_value, '=');
1940 if (pos != NULL) {
1941 int val_len = len - (pos-new_value) - 1;
1942 char buf[65];
1943 memset(buf, 0, 65);
1944 strncpy(buf, pos+1, val_len);
1945 if (buf[val_len-1] == '\n') buf[val_len-1] = 0;
1947 if (strnicmp( new_value, "format", (pos-new_value)) == 0) {
1948 if (strnicmp( buf, "NTSC", val_len) == 0)
1949 video->pal_or_ntsc = DV1394_NTSC;
1950 else if (strnicmp( buf, "PAL", val_len) == 0)
1951 video->pal_or_ntsc = DV1394_PAL;
1953 } else if (strnicmp( new_value, "cip_n", (pos-new_value)) == 0) {
1954 video->cip_n = atol(buf);
1955 } else if (strnicmp( new_value, "cip_d", (pos-new_value)) == 0) {
1956 video->cip_d = atol(buf);
1957 } else if (strnicmp( new_value, "syt_offset", (pos-new_value)) == 0) {
1958 video->syt_offset = atol(buf);
1959 } else if (strnicmp( new_value, "channel", (pos-new_value)) == 0) {
1960 video->channel = atol(buf);
1964 return len;
1967 struct dv1394_procfs_entry *
1968 dv1394_procfs_find( char *name)
1970 struct list_head *lh;
1971 struct dv1394_procfs_entry *p;
1973 spin_lock( &dv1394_procfs_lock);
1974 if (!list_empty(&dv1394_procfs)) {
1975 list_for_each(lh, &dv1394_procfs) {
1976 p = list_entry(lh, struct dv1394_procfs_entry, list);
1977 if (!strncmp(p->name, name, sizeof(p->name))) {
1978 spin_unlock( &dv1394_procfs_lock);
1979 return p;
1983 spin_unlock( &dv1394_procfs_lock);
1984 return NULL;
1987 static int dv1394_procfs_add_entry(struct video_card *video)
1989 char buf[32];
1990 struct dv1394_procfs_entry *p;
1991 struct dv1394_procfs_entry *parent;
1993 p = kmalloc(sizeof(struct dv1394_procfs_entry), GFP_KERNEL);
1994 if (!p) {
1995 printk(KERN_ERR "dv1394: cannot allocate dv1394_procfs_entry\n");
1996 goto err;
1998 memset(p, 0, sizeof(struct dv1394_procfs_entry));
2000 snprintf(buf, sizeof(buf), "dv/host%d/%s", (video->id>>2),
2001 (video->pal_or_ntsc == DV1394_NTSC ? "NTSC" : "PAL"));
2003 parent = dv1394_procfs_find(buf);
2004 if (parent == NULL) {
2005 printk(KERN_ERR "dv1394: unable to locate parent procfs of %s\n", buf);
2006 goto err_free;
2009 p->procfs = create_proc_entry(
2010 (video->mode == MODE_RECEIVE ? "in" : "out"),
2011 0666, parent->procfs);
2013 if (p->procfs == NULL) {
2014 printk(KERN_ERR "dv1394: unable to create /proc/bus/ieee1394/%s/%s\n",
2015 parent->name,
2016 (video->mode == MODE_RECEIVE ? "in" : "out"));
2017 goto err_free;
2020 p->procfs->owner = THIS_MODULE;
2021 p->procfs->data = video;
2022 p->procfs->read_proc = dv1394_procfs_read;
2023 p->procfs->write_proc = dv1394_procfs_write;
2025 spin_lock( &dv1394_procfs_lock);
2026 INIT_LIST_HEAD(&p->list);
2027 list_add_tail(&p->list, &dv1394_procfs);
2028 spin_unlock( &dv1394_procfs_lock);
2030 return 0;
2032 err_free:
2033 kfree(p);
2034 err:
2035 return -ENOMEM;
2038 static int
2039 dv1394_procfs_add_dir( char *name,
2040 struct dv1394_procfs_entry *parent,
2041 struct dv1394_procfs_entry **out)
2043 struct dv1394_procfs_entry *p;
2045 p = kmalloc(sizeof(struct dv1394_procfs_entry), GFP_KERNEL);
2046 if (!p) {
2047 printk(KERN_ERR "dv1394: cannot allocate dv1394_procfs_entry\n");
2048 goto err;
2050 memset(p, 0, sizeof(struct dv1394_procfs_entry));
2052 if (parent == NULL) {
2053 snprintf(p->name, sizeof(p->name), "%s", name);
2054 p->procfs = proc_mkdir( name, ieee1394_procfs_entry);
2055 } else {
2056 snprintf(p->name, sizeof(p->name), "%s/%s", parent->name, name);
2057 p->procfs = proc_mkdir( name, parent->procfs);
2059 if (p->procfs == NULL) {
2060 printk(KERN_ERR "dv1394: unable to create /proc/bus/ieee1394/%s\n", p->name);
2061 goto err_free;
2064 p->procfs->owner = THIS_MODULE;
2065 p->parent = parent;
2066 if (out != NULL) *out = p;
2068 spin_lock( &dv1394_procfs_lock);
2069 INIT_LIST_HEAD(&p->list);
2070 list_add_tail(&p->list, &dv1394_procfs);
2071 spin_unlock( &dv1394_procfs_lock);
2073 return 0;
2075 err_free:
2076 kfree(p);
2077 err:
2078 return -ENOMEM;
2081 void dv1394_procfs_del( char *name)
2083 struct dv1394_procfs_entry *p = dv1394_procfs_find(name);
2084 if (p != NULL) {
2085 if (p->parent == NULL)
2086 remove_proc_entry(p->name, ieee1394_procfs_entry);
2087 else
2088 remove_proc_entry(p->name, p->parent->procfs);
2090 spin_lock( &dv1394_procfs_lock);
2091 list_del(&p->list);
2092 spin_unlock( &dv1394_procfs_lock);
2093 kfree(p);
2096 #endif /* CONFIG_PROC_FS */
2098 /*** DEVICE DRIVER HANDLERS ************************************************/
2100 static void it_tasklet_func(unsigned long data)
2102 int wake = 0;
2103 struct video_card *video = (struct video_card*) data;
2105 spin_lock(&video->spinlock);
2107 if (!video->dma_running)
2108 goto out;
2110 irq_printk("ContextControl = %08x, CommandPtr = %08x\n",
2111 reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
2112 reg_read(video->ohci, video->ohci_IsoXmitCommandPtr)
2116 if ( (video->ohci_it_ctx != -1) &&
2117 (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & (1 << 10)) ) {
2119 struct frame *f;
2120 unsigned int frame, i;
2123 if (video->active_frame == -1)
2124 frame = 0;
2125 else
2126 frame = video->active_frame;
2128 /* check all the DMA-able frames */
2129 for (i = 0; i < video->n_frames; i++, frame = (frame+1) % video->n_frames) {
2131 irq_printk("IRQ checking frame %d...", frame);
2132 f = video->frames[frame];
2133 if (f->state != FRAME_READY) {
2134 irq_printk("clear, skipping\n");
2135 /* we don't own this frame */
2136 continue;
2139 irq_printk("DMA\n");
2141 /* check the frame begin semaphore to see if we can free the previous frame */
2142 if ( *(f->frame_begin_timestamp) ) {
2143 int prev_frame;
2144 struct frame *prev_f;
2148 /* don't reset, need this later *(f->frame_begin_timestamp) = 0; */
2149 irq_printk(" BEGIN\n");
2151 prev_frame = frame - 1;
2152 if (prev_frame == -1)
2153 prev_frame += video->n_frames;
2154 prev_f = video->frames[prev_frame];
2156 /* make sure we can actually garbage collect
2157 this frame */
2158 if ( (prev_f->state == FRAME_READY) &&
2159 prev_f->done && (!f->done) )
2161 frame_reset(prev_f);
2162 video->n_clear_frames++;
2163 wake = 1;
2164 video->active_frame = frame;
2166 irq_printk(" BEGIN - freeing previous frame %d, new active frame is %d\n", prev_frame, frame);
2167 } else {
2168 irq_printk(" BEGIN - can't free yet\n");
2171 f->done = 1;
2175 /* see if we need to set the timestamp for the next frame */
2176 if ( *(f->mid_frame_timestamp) ) {
2177 struct frame *next_frame;
2178 u32 begin_ts, ts_cyc, ts_off;
2180 *(f->mid_frame_timestamp) = 0;
2182 begin_ts = le32_to_cpu(*(f->frame_begin_timestamp));
2184 irq_printk(" MIDDLE - first packet was sent at cycle %4u (%2u), assigned timestamp was (%2u) %4u\n",
2185 begin_ts & 0x1FFF, begin_ts & 0xF,
2186 f->assigned_timestamp >> 12, f->assigned_timestamp & 0xFFF);
2188 /* prepare next frame and assign timestamp */
2189 next_frame = video->frames[ (frame+1) % video->n_frames ];
2191 if (next_frame->state == FRAME_READY) {
2192 irq_printk(" MIDDLE - next frame is ready, good\n");
2193 } else {
2194 debug_printk("dv1394: Underflow! At least one frame has been dropped.\n");
2195 next_frame = f;
2198 /* set the timestamp to the timestamp of the last frame sent,
2199 plus the length of the last frame sent, plus the syt latency */
2200 ts_cyc = begin_ts & 0xF;
2201 /* advance one frame, plus syt latency (typically 2-3) */
2202 ts_cyc += f->n_packets + video->syt_offset ;
2204 ts_off = 0;
2206 ts_cyc += ts_off/3072;
2207 ts_off %= 3072;
2209 next_frame->assigned_timestamp = ((ts_cyc&0xF) << 12) + ts_off;
2210 if (next_frame->cip_syt1) {
2211 next_frame->cip_syt1->b[6] = next_frame->assigned_timestamp >> 8;
2212 next_frame->cip_syt1->b[7] = next_frame->assigned_timestamp & 0xFF;
2214 if (next_frame->cip_syt2) {
2215 next_frame->cip_syt2->b[6] = next_frame->assigned_timestamp >> 8;
2216 next_frame->cip_syt2->b[7] = next_frame->assigned_timestamp & 0xFF;
2221 /* see if the frame looped */
2222 if ( *(f->frame_end_timestamp) ) {
2224 *(f->frame_end_timestamp) = 0;
2226 debug_printk(" END - the frame looped at least once\n");
2228 video->dropped_frames++;
2233 } /* for (each frame) */
2236 if (wake) {
2237 kill_fasync(&video->fasync, SIGIO, POLL_OUT);
2239 /* wake readers/writers/ioctl'ers */
2240 wake_up_interruptible(&video->waitq);
2243 out:
2244 spin_unlock(&video->spinlock);
2247 static void ir_tasklet_func(unsigned long data)
2249 int wake = 0;
2250 struct video_card *video = (struct video_card*) data;
2252 spin_lock(&video->spinlock);
2254 if (!video->dma_running)
2255 goto out;
2257 if ( (video->ohci_ir_ctx != -1) &&
2258 (reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 10)) )
2261 int sof=0; /* start-of-frame flag */
2262 struct frame *f;
2263 u16 packet_length, packet_time;
2264 int i, dbc=0;
2265 struct DMA_descriptor_block *block = NULL;
2266 u16 xferstatus;
2268 int next_i, prev_i;
2269 struct DMA_descriptor_block *next = NULL;
2270 dma_addr_t next_dma = 0;
2271 struct DMA_descriptor_block *prev = NULL;
2273 /* loop over all descriptors in all frames */
2274 for (i = 0; i < video->n_frames*MAX_PACKETS; i++) {
2275 struct packet *p = dma_region_i(&video->packet_buf, struct packet, video->current_packet);
2277 /* make sure we are seeing the latest changes to p */
2278 dma_region_sync(&video->packet_buf,
2279 (unsigned long) p - (unsigned long) video->packet_buf.kvirt,
2280 sizeof(struct packet));
2282 packet_length = le16_to_cpu(p->data_length);
2283 packet_time = le16_to_cpu(p->timestamp);
2285 irq_printk("received packet %02d, timestamp=%04x, length=%04x, sof=%02x%02x\n", video->current_packet,
2286 packet_time, packet_length,
2287 p->data[0], p->data[1]);
2289 /* get the descriptor based on packet_buffer cursor */
2290 f = video->frames[video->current_packet / MAX_PACKETS];
2291 block = &(f->descriptor_pool[video->current_packet % MAX_PACKETS]);
2292 xferstatus = le32_to_cpu(block->u.in.il.q[3]) >> 16;
2293 xferstatus &= 0x1F;
2294 irq_printk("ir_tasklet_func: xferStatus/resCount [%d] = 0x%08x\n", i, le32_to_cpu(block->u.in.il.q[3]) );
2296 /* get the current frame */
2297 f = video->frames[video->active_frame];
2299 /* exclude empty packet */
2300 if (packet_length > 8 && xferstatus == 0x11) {
2301 /* check for start of frame */
2302 /* DRD> Changed to check section type ([0]>>5==0)
2303 and dif sequence ([1]>>4==0) */
2304 sof = ( (p->data[0] >> 5) == 0 && (p->data[1] >> 4) == 0);
2306 dbc = (int) (p->cip_h1 >> 24);
2307 if ( video->continuity_counter != -1 && dbc > ((video->continuity_counter + 1) % 256) )
2309 printk(KERN_WARNING "dv1394: discontinuity detected, dropping all frames\n" );
2310 video->dropped_frames += video->n_clear_frames + 1;
2311 video->first_frame = 0;
2312 video->n_clear_frames = 0;
2313 video->first_clear_frame = -1;
2315 video->continuity_counter = dbc;
2317 if (!video->first_frame) {
2318 if (sof) {
2319 video->first_frame = 1;
2322 } else if (sof) {
2323 /* close current frame */
2324 frame_reset(f); /* f->state = STATE_CLEAR */
2325 video->n_clear_frames++;
2326 if (video->n_clear_frames > video->n_frames) {
2327 video->dropped_frames++;
2328 printk(KERN_WARNING "dv1394: dropped a frame during reception\n" );
2329 video->n_clear_frames = video->n_frames-1;
2330 video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
2332 if (video->first_clear_frame == -1)
2333 video->first_clear_frame = video->active_frame;
2335 /* get the next frame */
2336 video->active_frame = (video->active_frame + 1) % video->n_frames;
2337 f = video->frames[video->active_frame];
2338 irq_printk(" frame received, active_frame = %d, n_clear_frames = %d, first_clear_frame = %d\n",
2339 video->active_frame, video->n_clear_frames, video->first_clear_frame);
2341 if (video->first_frame) {
2342 if (sof) {
2343 /* open next frame */
2344 f->state = FRAME_READY;
2347 /* copy to buffer */
2348 if (f->n_packets > (video->frame_size / 480)) {
2349 printk(KERN_ERR "frame buffer overflow during receive\n");
2352 frame_put_packet(f, p);
2354 } /* first_frame */
2357 /* stop, end of ready packets */
2358 else if (xferstatus == 0) {
2359 break;
2362 /* reset xferStatus & resCount */
2363 block->u.in.il.q[3] = cpu_to_le32(512);
2365 /* terminate dma chain at this (next) packet */
2366 next_i = video->current_packet;
2367 f = video->frames[next_i / MAX_PACKETS];
2368 next = &(f->descriptor_pool[next_i % MAX_PACKETS]);
2369 next_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
2370 next->u.in.il.q[0] |= 3 << 20; /* enable interrupt */
2371 next->u.in.il.q[2] = 0; /* disable branch */
2373 /* link previous to next */
2374 prev_i = (next_i == 0) ? (MAX_PACKETS * video->n_frames - 1) : (next_i - 1);
2375 f = video->frames[prev_i / MAX_PACKETS];
2376 prev = &(f->descriptor_pool[prev_i % MAX_PACKETS]);
2377 if (prev_i % (MAX_PACKETS/2)) {
2378 prev->u.in.il.q[0] &= ~(3 << 20); /* no interrupt */
2379 } else {
2380 prev->u.in.il.q[0] |= 3 << 20; /* enable interrupt */
2382 prev->u.in.il.q[2] = cpu_to_le32(next_dma | 1); /* set Z=1 */
2383 wmb();
2385 /* wake up DMA in case it fell asleep */
2386 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
2388 /* advance packet_buffer cursor */
2389 video->current_packet = (video->current_packet + 1) % (MAX_PACKETS * video->n_frames);
2391 } /* for all packets */
2393 wake = 1; /* why the hell not? */
2395 } /* receive interrupt */
2397 if (wake) {
2398 kill_fasync(&video->fasync, SIGIO, POLL_IN);
2400 /* wake readers/writers/ioctl'ers */
2401 wake_up_interruptible(&video->waitq);
2404 out:
2405 spin_unlock(&video->spinlock);
2408 static struct file_operations dv1394_fops=
2410 .owner = THIS_MODULE,
2411 .poll = dv1394_poll,
2412 .ioctl = dv1394_ioctl,
2413 .mmap = dv1394_mmap,
2414 .open = dv1394_open,
2415 .write = dv1394_write,
2416 .read = dv1394_read,
2417 .release = dv1394_release,
2418 .fasync = dv1394_fasync,
2422 /*** HOTPLUG STUFF **********************************************************/
2424 * Export information about protocols/devices supported by this driver.
2426 static struct ieee1394_device_id dv1394_id_table[] = {
2428 .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
2429 .specifier_id = AVC_UNIT_SPEC_ID_ENTRY & 0xffffff,
2430 .version = AVC_SW_VERSION_ENTRY & 0xffffff
2435 MODULE_DEVICE_TABLE(ieee1394, dv1394_id_table);
2437 static struct hpsb_protocol_driver dv1394_driver = {
2438 .name = "DV/1394 Driver",
2439 .id_table = dv1394_id_table,
2440 .driver = {
2441 .name = "dv1394",
2442 .bus = &ieee1394_bus_type,
2447 /*** IEEE1394 HPSB CALLBACKS ***********************************************/
2449 static int dv1394_init(struct ti_ohci *ohci, enum pal_or_ntsc format, enum modes mode)
2451 struct video_card *video;
2452 unsigned long flags;
2453 int i;
2455 video = kmalloc(sizeof(struct video_card), GFP_KERNEL);
2456 if (!video) {
2457 printk(KERN_ERR "dv1394: cannot allocate video_card\n");
2458 goto err;
2461 memset(video, 0, sizeof(struct video_card));
2463 video->ohci = ohci;
2464 /* lower 2 bits of id indicate which of four "plugs"
2465 per host */
2466 video->id = ohci->id << 2;
2467 if (format == DV1394_NTSC)
2468 video->id |= mode;
2469 else
2470 video->id |= 2 + mode;
2472 video->ohci_it_ctx = -1;
2473 video->ohci_ir_ctx = -1;
2475 video->ohci_IsoXmitContextControlSet = 0;
2476 video->ohci_IsoXmitContextControlClear = 0;
2477 video->ohci_IsoXmitCommandPtr = 0;
2479 video->ohci_IsoRcvContextControlSet = 0;
2480 video->ohci_IsoRcvContextControlClear = 0;
2481 video->ohci_IsoRcvCommandPtr = 0;
2482 video->ohci_IsoRcvContextMatch = 0;
2484 video->n_frames = 0; /* flag that video is not initialized */
2485 video->channel = 63; /* default to broadcast channel */
2486 video->active_frame = -1;
2488 /* initialize the following for proc_fs */
2489 video->pal_or_ntsc = format;
2490 video->cip_n = 0; /* 0 = use builtin default */
2491 video->cip_d = 0;
2492 video->syt_offset = 0;
2493 video->mode = mode;
2495 #ifdef CONFIG_PROC_FS
2496 if ( dv1394_procfs_add_entry(video) < 0 )
2497 goto err_free;
2498 #endif
2500 for (i = 0; i < DV1394_MAX_FRAMES; i++)
2501 video->frames[i] = NULL;
2503 dma_region_init(&video->dv_buf);
2504 video->dv_buf_size = 0;
2505 dma_region_init(&video->packet_buf);
2506 video->packet_buf_size = 0;
2508 clear_bit(0, &video->open);
2509 spin_lock_init(&video->spinlock);
2510 video->dma_running = 0;
2511 init_MUTEX(&video->sem);
2512 init_waitqueue_head(&video->waitq);
2513 video->fasync = NULL;
2515 spin_lock_irqsave(&dv1394_cards_lock, flags);
2516 INIT_LIST_HEAD(&video->list);
2517 list_add_tail(&video->list, &dv1394_cards);
2518 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2520 if (devfs_mk_cdev(MKDEV(IEEE1394_MAJOR,
2521 IEEE1394_MINOR_BLOCK_DV1394*16 + video->id),
2522 S_IFCHR|S_IRUGO|S_IWUGO,
2523 "ieee1394/dv/host%d/%s/%s",
2524 (video->id>>2),
2525 (video->pal_or_ntsc == DV1394_NTSC ? "NTSC" : "PAL"),
2526 (video->mode == MODE_RECEIVE ? "in" : "out")) < 0)
2527 goto err_free;
2529 debug_printk("dv1394: dv1394_init() OK on ID %d\n", video->id);
2531 return 0;
2533 err_free:
2534 kfree(video);
2535 err:
2536 return -1;
2539 static void dv1394_un_init(struct video_card *video)
2541 char buf[32];
2543 /* obviously nobody has the driver open at this point */
2544 do_dv1394_shutdown(video, 1);
2545 snprintf(buf, sizeof(buf), "dv/host%d/%s/%s", (video->id >> 2),
2546 (video->pal_or_ntsc == DV1394_NTSC ? "NTSC" : "PAL"),
2547 (video->mode == MODE_RECEIVE ? "in" : "out")
2550 devfs_remove("ieee1394/%s", buf);
2551 #ifdef CONFIG_PROC_FS
2552 dv1394_procfs_del(buf);
2553 #endif
2554 list_del(&video->list);
2555 kfree(video);
2559 static void dv1394_remove_host (struct hpsb_host *host)
2561 struct ti_ohci *ohci;
2562 struct video_card *video = NULL;
2563 unsigned long flags;
2564 struct list_head *lh, *templh;
2565 char buf[32];
2566 int n;
2568 /* We only work with the OHCI-1394 driver */
2569 if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2570 return;
2572 ohci = (struct ti_ohci *)host->hostdata;
2575 /* find the corresponding video_cards */
2576 spin_lock_irqsave(&dv1394_cards_lock, flags);
2577 if (!list_empty(&dv1394_cards)) {
2578 list_for_each_safe(lh, templh, &dv1394_cards) {
2579 video = list_entry(lh, struct video_card, list);
2580 if ((video->id >> 2) == ohci->id)
2581 dv1394_un_init(video);
2584 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2586 n = (video->id >> 2);
2588 devfs_remove("ieee1394/dv/host%d/NTSC", n);
2589 devfs_remove("ieee1394/dv/host%d/PAL", n);
2590 devfs_remove("ieee1394/dv/host%d", n);
2592 #ifdef CONFIG_PROC_FS
2593 snprintf(buf, sizeof(buf), "dv/host%d/NTSC", n);
2594 dv1394_procfs_del(buf);
2595 snprintf(buf, sizeof(buf), "dv/host%d/PAL", n);
2596 dv1394_procfs_del(buf);
2597 snprintf(buf, sizeof(buf), "dv/host%d", n);
2598 dv1394_procfs_del(buf);
2599 #endif
2602 static void dv1394_add_host (struct hpsb_host *host)
2604 struct ti_ohci *ohci;
2605 char buf[16];
2607 /* We only work with the OHCI-1394 driver */
2608 if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2609 return;
2611 ohci = (struct ti_ohci *)host->hostdata;
2613 #ifdef CONFIG_PROC_FS
2615 struct dv1394_procfs_entry *p;
2616 p = dv1394_procfs_find("dv");
2617 if (p != NULL) {
2618 snprintf(buf, sizeof(buf), "host%d", ohci->id);
2619 dv1394_procfs_add_dir(buf, p, &p);
2620 dv1394_procfs_add_dir("NTSC", p, NULL);
2621 dv1394_procfs_add_dir("PAL", p, NULL);
2624 #endif
2626 devfs_mk_dir("ieee1394/dv/host%d", ohci->id);
2627 devfs_mk_dir("ieee1394/dv/host%d/NTSC", ohci->id);
2628 devfs_mk_dir("ieee1394/dv/host%d/PAL", ohci->id);
2630 dv1394_init(ohci, DV1394_NTSC, MODE_RECEIVE);
2631 dv1394_init(ohci, DV1394_NTSC, MODE_TRANSMIT);
2632 dv1394_init(ohci, DV1394_PAL, MODE_RECEIVE);
2633 dv1394_init(ohci, DV1394_PAL, MODE_TRANSMIT);
2637 /* Bus reset handler. In the event of a bus reset, we may need to
2638 re-start the DMA contexts - otherwise the user program would
2639 end up waiting forever.
2642 static void dv1394_host_reset(struct hpsb_host *host)
2644 struct ti_ohci *ohci;
2645 struct video_card *video = NULL;
2646 unsigned long flags;
2647 struct list_head *lh;
2649 /* We only work with the OHCI-1394 driver */
2650 if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2651 return;
2653 ohci = (struct ti_ohci *)host->hostdata;
2656 /* find the corresponding video_cards */
2657 spin_lock_irqsave(&dv1394_cards_lock, flags);
2658 if (!list_empty(&dv1394_cards)) {
2659 list_for_each(lh, &dv1394_cards) {
2660 video = list_entry(lh, struct video_card, list);
2661 if ((video->id >> 2) == ohci->id)
2662 break;
2665 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2667 if (!video)
2668 return;
2671 spin_lock_irqsave(&video->spinlock, flags);
2673 if (!video->dma_running)
2674 goto out;
2676 /* check IT context */
2677 if (video->ohci_it_ctx != -1) {
2678 u32 ctx;
2680 ctx = reg_read(video->ohci, video->ohci_IsoXmitContextControlSet);
2682 /* if (RUN but not ACTIVE) */
2683 if ( (ctx & (1<<15)) &&
2684 !(ctx & (1<<10)) ) {
2686 debug_printk("dv1394: IT context stopped due to bus reset; waking it up\n");
2688 /* to be safe, assume a frame has been dropped. User-space programs
2689 should handle this condition like an underflow. */
2690 video->dropped_frames++;
2692 /* for some reason you must clear, then re-set the RUN bit to restart DMA */
2694 /* clear RUN */
2695 reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, (1 << 15));
2696 flush_pci_write(video->ohci);
2698 /* set RUN */
2699 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, (1 << 15));
2700 flush_pci_write(video->ohci);
2702 /* set the WAKE bit (just in case; this isn't strictly necessary) */
2703 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, (1 << 12));
2704 flush_pci_write(video->ohci);
2706 irq_printk("dv1394: AFTER IT restart ctx 0x%08x ptr 0x%08x\n",
2707 reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
2708 reg_read(video->ohci, video->ohci_IsoXmitCommandPtr));
2712 /* check IR context */
2713 if (video->ohci_ir_ctx != -1) {
2714 u32 ctx;
2716 ctx = reg_read(video->ohci, video->ohci_IsoRcvContextControlSet);
2718 /* if (RUN but not ACTIVE) */
2719 if ( (ctx & (1<<15)) &&
2720 !(ctx & (1<<10)) ) {
2722 debug_printk("dv1394: IR context stopped due to bus reset; waking it up\n");
2724 /* to be safe, assume a frame has been dropped. User-space programs
2725 should handle this condition like an overflow. */
2726 video->dropped_frames++;
2728 /* for some reason you must clear, then re-set the RUN bit to restart DMA */
2729 /* XXX this doesn't work for me, I can't get IR DMA to restart :[ */
2731 /* clear RUN */
2732 reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, (1 << 15));
2733 flush_pci_write(video->ohci);
2735 /* set RUN */
2736 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 15));
2737 flush_pci_write(video->ohci);
2739 /* set the WAKE bit (just in case; this isn't strictly necessary) */
2740 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
2741 flush_pci_write(video->ohci);
2743 irq_printk("dv1394: AFTER IR restart ctx 0x%08x ptr 0x%08x\n",
2744 reg_read(video->ohci, video->ohci_IsoRcvContextControlSet),
2745 reg_read(video->ohci, video->ohci_IsoRcvCommandPtr));
2749 out:
2750 spin_unlock_irqrestore(&video->spinlock, flags);
2752 /* wake readers/writers/ioctl'ers */
2753 wake_up_interruptible(&video->waitq);
2756 static struct hpsb_highlevel dv1394_highlevel = {
2757 .name = "dv1394",
2758 .add_host = dv1394_add_host,
2759 .remove_host = dv1394_remove_host,
2760 .host_reset = dv1394_host_reset,
2763 #ifdef CONFIG_COMPAT
2765 #define DV1394_IOC32_INIT _IOW('#', 0x06, struct dv1394_init32)
2766 #define DV1394_IOC32_GET_STATUS _IOR('#', 0x0c, struct dv1394_status32)
2768 struct dv1394_init32 {
2769 u32 api_version;
2770 u32 channel;
2771 u32 n_frames;
2772 u32 format;
2773 u32 cip_n;
2774 u32 cip_d;
2775 u32 syt_offset;
2778 struct dv1394_status32 {
2779 struct dv1394_init32 init;
2780 s32 active_frame;
2781 u32 first_clear_frame;
2782 u32 n_clear_frames;
2783 u32 dropped_frames;
2786 static int handle_dv1394_init(unsigned int fd, unsigned int cmd, unsigned long arg,
2787 struct file *file)
2789 struct dv1394_init32 dv32;
2790 struct dv1394_init dv;
2791 mm_segment_t old_fs;
2792 int ret;
2794 if (file->f_op->ioctl != dv1394_ioctl)
2795 return -EFAULT;
2797 if (copy_from_user(&dv32, (void *)arg, sizeof(dv32)))
2798 return -EFAULT;
2800 dv.api_version = dv32.api_version;
2801 dv.channel = dv32.channel;
2802 dv.n_frames = dv32.n_frames;
2803 dv.format = dv32.format;
2804 dv.cip_n = (unsigned long)dv32.cip_n;
2805 dv.cip_d = (unsigned long)dv32.cip_d;
2806 dv.syt_offset = dv32.syt_offset;
2808 old_fs = get_fs();
2809 set_fs(KERNEL_DS);
2810 ret = dv1394_ioctl(file->f_dentry->d_inode, file,
2811 DV1394_IOC_INIT, (unsigned long)&dv);
2812 set_fs(old_fs);
2814 return ret;
2817 static int handle_dv1394_get_status(unsigned int fd, unsigned int cmd, unsigned long arg,
2818 struct file *file)
2820 struct dv1394_status32 dv32;
2821 struct dv1394_status dv;
2822 mm_segment_t old_fs;
2823 int ret;
2825 if (file->f_op->ioctl != dv1394_ioctl)
2826 return -EFAULT;
2828 old_fs = get_fs();
2829 set_fs(KERNEL_DS);
2830 ret = dv1394_ioctl(file->f_dentry->d_inode, file,
2831 DV1394_IOC_GET_STATUS, (unsigned long)&dv);
2832 set_fs(old_fs);
2834 if (!ret) {
2835 dv32.init.api_version = dv.init.api_version;
2836 dv32.init.channel = dv.init.channel;
2837 dv32.init.n_frames = dv.init.n_frames;
2838 dv32.init.format = dv.init.format;
2839 dv32.init.cip_n = (u32)dv.init.cip_n;
2840 dv32.init.cip_d = (u32)dv.init.cip_d;
2841 dv32.init.syt_offset = dv.init.syt_offset;
2842 dv32.active_frame = dv.active_frame;
2843 dv32.first_clear_frame = dv.first_clear_frame;
2844 dv32.n_clear_frames = dv.n_clear_frames;
2845 dv32.dropped_frames = dv.dropped_frames;
2847 if (copy_to_user((struct dv1394_status32 *)arg, &dv32, sizeof(dv32)))
2848 ret = -EFAULT;
2851 return ret;
2853 #endif /* CONFIG_COMPAT */
2856 /*** KERNEL MODULE HANDLERS ************************************************/
2858 MODULE_AUTHOR("Dan Maas <dmaas@dcine.com>, Dan Dennedy <dan@dennedy.org>");
2859 MODULE_DESCRIPTION("driver for DV input/output on OHCI board");
2860 MODULE_SUPPORTED_DEVICE("dv1394");
2861 MODULE_LICENSE("GPL");
2863 static void __exit dv1394_exit_module(void)
2865 #ifdef CONFIG_COMPAT
2866 int ret;
2868 ret = unregister_ioctl32_conversion(DV1394_IOC_SHUTDOWN);
2869 ret |= unregister_ioctl32_conversion(DV1394_IOC_SUBMIT_FRAMES);
2870 ret |= unregister_ioctl32_conversion(DV1394_IOC_WAIT_FRAMES);
2871 ret |= unregister_ioctl32_conversion(DV1394_IOC_RECEIVE_FRAMES);
2872 ret |= unregister_ioctl32_conversion(DV1394_IOC_START_RECEIVE);
2873 ret |= unregister_ioctl32_conversion(DV1394_IOC32_INIT);
2874 ret |= unregister_ioctl32_conversion(DV1394_IOC32_GET_STATUS);
2875 if (ret)
2876 printk(KERN_ERR "dv1394: Error unregistering ioctl32 translations\n");
2877 #endif
2879 hpsb_unregister_protocol(&dv1394_driver);
2881 hpsb_unregister_highlevel(&dv1394_highlevel);
2882 ieee1394_unregister_chardev(IEEE1394_MINOR_BLOCK_DV1394);
2883 devfs_remove("ieee1394/dv");
2884 #ifdef CONFIG_PROC_FS
2885 dv1394_procfs_del("dv");
2886 #endif
2889 static int __init dv1394_init_module(void)
2891 int ret;
2893 ret = ieee1394_register_chardev(IEEE1394_MINOR_BLOCK_DV1394,
2894 THIS_MODULE, &dv1394_fops);
2895 if (ret) {
2896 printk(KERN_ERR "dv1394: unable to register character device\n");
2897 return -EIO;
2900 devfs_mk_dir("ieee1394/dv");
2902 #ifdef CONFIG_PROC_FS
2903 ret = dv1394_procfs_add_dir("dv",NULL,NULL);
2904 if (ret < 0) {
2905 printk(KERN_ERR "dv1394: unable to create /proc/bus/ieee1394/dv\n");
2906 ieee1394_unregister_chardev(IEEE1394_MINOR_BLOCK_DV1394);
2907 devfs_remove("ieee1394/dv");
2908 return -ENOMEM;
2910 #endif
2912 hpsb_register_highlevel(&dv1394_highlevel);
2914 hpsb_register_protocol(&dv1394_driver);
2916 #ifdef CONFIG_COMPAT
2917 /* First compatible ones */
2918 ret = register_ioctl32_conversion(DV1394_IOC_SHUTDOWN, NULL);
2919 ret |= register_ioctl32_conversion(DV1394_IOC_SUBMIT_FRAMES, NULL);
2920 ret |= register_ioctl32_conversion(DV1394_IOC_WAIT_FRAMES, NULL);
2921 ret |= register_ioctl32_conversion(DV1394_IOC_RECEIVE_FRAMES, NULL);
2922 ret |= register_ioctl32_conversion(DV1394_IOC_START_RECEIVE, NULL);
2924 /* These need to be handled by translation */
2925 ret |= register_ioctl32_conversion(DV1394_IOC32_INIT, handle_dv1394_init);
2926 ret |= register_ioctl32_conversion(DV1394_IOC32_GET_STATUS, handle_dv1394_get_status);
2927 if (ret)
2928 printk(KERN_ERR "dv1394: Error registering ioctl32 translations\n");
2929 #endif
2931 return 0;
2934 module_init(dv1394_init_module);
2935 module_exit(dv1394_exit_module);