2 * linux/drivers/ide/pci/sc1200.c Version 0.91 28-Jan-2003
4 * Copyright (C) 2000-2002 Mark Lord <mlord@pobox.com>
5 * May be copied or modified under the terms of the GNU General Public License
7 * Development of this chipset driver was funded
8 * by the nice folks at National Semiconductor.
11 * Available from National Semiconductor
14 #include <linux/config.h>
15 #include <linux/module.h>
16 #include <linux/types.h>
17 #include <linux/kernel.h>
18 #include <linux/delay.h>
19 #include <linux/timer.h>
21 #include <linux/ioport.h>
22 #include <linux/blkdev.h>
23 #include <linux/hdreg.h>
24 #include <linux/interrupt.h>
25 #include <linux/pci.h>
26 #include <linux/init.h>
27 #include <linux/ide.h>
32 #include "ide_modes.h"
35 #define SC1200_REV_A 0x00
36 #define SC1200_REV_B1 0x01
37 #define SC1200_REV_B3 0x02
38 #define SC1200_REV_C1 0x03
39 #define SC1200_REV_D1 0x04
41 #define PCI_CLK_33 0x00
42 #define PCI_CLK_48 0x01
43 #define PCI_CLK_66 0x02
44 #define PCI_CLK_33A 0x03
46 static unsigned short sc1200_get_pci_clock (void)
48 unsigned char chip_id
, silicon_revision
;
49 unsigned int pci_clock
;
51 * Check the silicon revision, as not all versions of the chip
52 * have the register with the fast PCI bus timings.
54 chip_id
= inb (0x903c);
55 silicon_revision
= inb (0x903d);
57 // Read the fast pci clock frequency
58 if (chip_id
== 0x04 && silicon_revision
< SC1200_REV_B1
) {
59 pci_clock
= PCI_CLK_33
;
61 // check clock generator configuration (cfcc)
62 // the clock is in bits 8 and 9 of this word
64 pci_clock
= inw (0x901e);
67 if (pci_clock
== PCI_CLK_33A
)
68 pci_clock
= PCI_CLK_33
;
73 #define DISPLAY_SC1200_TIMINGS
75 #if defined(DISPLAY_SC1200_TIMINGS) && defined(CONFIG_PROC_FS)
76 #include <linux/stat.h>
77 #include <linux/proc_fs.h>
79 static int sc1200_get_info(char *, char **, off_t
, int);
80 extern int (*sc1200_display_info
)(char *, char **, off_t
, int); /* ide-proc.c */
81 extern char *ide_media_verbose(ide_drive_t
*);
82 static u8 sc1200_proc
= 0;
84 static struct pci_dev
*bmide_dev
;
86 static int sc1200_get_info (char *buffer
, char **addr
, off_t offset
, int count
)
89 unsigned long bibma
= pci_resource_start(bmide_dev
, 4);
94 * at that point bibma+0x2 et bibma+0xa are byte registers
98 c0
= inb_p(bibma
+ 0x02);
99 c1
= inb_p(bibma
+ 0x0a);
101 p
+= sprintf(p
, "\n National SCx200 Chipset.\n");
102 p
+= sprintf(p
, "--------------- Primary Channel ---------------- Secondary Channel -------------\n");
103 p
+= sprintf(p
, " %sabled %sabled\n",
104 (c0
&0x80) ? "dis" : " en",
105 (c1
&0x80) ? "dis" : " en");
106 p
+= sprintf(p
, "--------------- drive0 --------- drive1 -------- drive0 ---------- drive1 ------\n");
107 p
+= sprintf(p
, "DMA enabled: %s %s %s %s\n",
108 (c0
&0x20) ? "yes" : "no ", (c0
&0x40) ? "yes" : "no ",
109 (c1
&0x20) ? "yes" : "no ", (c1
&0x40) ? "yes" : "no " );
111 p
+= sprintf(p
, "UDMA\n");
112 p
+= sprintf(p
, "DMA\n");
113 p
+= sprintf(p
, "PIO\n");
115 len
= (p
- buffer
) - offset
;
116 *addr
= buffer
+ offset
;
118 return len
> count
? count
: len
;
120 #endif /* DISPLAY_SC1200_TIMINGS && CONFIG_PROC_FS */
122 extern char *ide_xfer_verbose (byte xfer_rate
);
125 * Set a new transfer mode at the drive
127 int sc1200_set_xfer_mode (ide_drive_t
*drive
, byte mode
)
129 printk("%s: sc1200_set_xfer_mode(%s)\n", drive
->name
, ide_xfer_verbose(mode
));
130 return ide_config_drive_speed(drive
, mode
);
134 * Here are the standard PIO mode 0-4 timings for each "format".
135 * Format-0 uses fast data reg timings, with slower command reg timings.
136 * Format-1 uses fast timings for all registers, but won't work with all drives.
138 static const unsigned int sc1200_pio_timings
[4][5] =
139 {{0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010}, // format0 33Mhz
140 {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}, // format1, 33Mhz
141 {0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021}, // format1, 48Mhz
142 {0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131}}; // format1, 66Mhz
145 * After chip reset, the PIO timings are set to 0x00009172, which is not valid.
147 //#define SC1200_BAD_PIO(timings) (((timings)&~0x80000000)==0x00009172)
149 static int sc1200_autoselect_dma_mode (ide_drive_t
*drive
)
151 int udma_ok
= 1, mode
= 0;
152 ide_hwif_t
*hwif
= HWIF(drive
);
153 int unit
= drive
->select
.b
.unit
;
154 ide_drive_t
*mate
= &hwif
->drives
[unit
^1];
155 struct hd_driveid
*id
= drive
->id
;
158 * The SC1200 specifies that two drives sharing a cable cannot
159 * mix UDMA/MDMA. It has to be one or the other, for the pair,
160 * though different timings can still be chosen for each drive.
161 * We could set the appropriate timing bits on the fly,
162 * but that might be a bit confusing. So, for now we statically
163 * handle this requirement by looking at our mate drive to see
164 * what it is capable of, before choosing a mode for our own drive.
167 struct hd_driveid
*mateid
= mate
->id
;
168 if (mateid
&& (mateid
->capability
& 1) && !hwif
->ide_dma_bad_drive(mate
)) {
169 if ((mateid
->field_valid
& 4) && (mateid
->dma_ultra
& 7))
171 else if ((mateid
->field_valid
& 2) && (mateid
->dma_mword
& 7))
178 * Now see what the current drive is capable of,
179 * selecting UDMA only if the mate said it was ok.
181 if (id
&& (id
->capability
& 1) && hwif
->autodma
&& !hwif
->ide_dma_bad_drive(drive
)) {
182 if (udma_ok
&& (id
->field_valid
& 4) && (id
->dma_ultra
& 7)) {
183 if (id
->dma_ultra
& 4)
185 else if (id
->dma_ultra
& 2)
187 else if (id
->dma_ultra
& 1)
190 if (!mode
&& (id
->field_valid
& 2) && (id
->dma_mword
& 7)) {
191 if (id
->dma_mword
& 4)
192 mode
= XFER_MW_DMA_2
;
193 else if (id
->dma_mword
& 2)
194 mode
= XFER_MW_DMA_1
;
195 else if (id
->dma_mword
& 1)
196 mode
= XFER_MW_DMA_0
;
203 * sc1200_config_dma2() handles selection/setting of DMA/UDMA modes
204 * for both the chipset and drive.
206 static int sc1200_config_dma2 (ide_drive_t
*drive
, int mode
)
208 ide_hwif_t
*hwif
= HWIF(drive
);
209 int unit
= drive
->select
.b
.unit
;
210 unsigned int reg
, timings
;
211 unsigned short pci_clock
;
212 unsigned int basereg
= hwif
->channel
? 0x50 : 0x40;
215 * Default to DMA-off in case we run into trouble here.
217 hwif
->ide_dma_off_quietly(drive
); /* turn off DMA while we fiddle */
218 outb(inb(hwif
->dma_base
+2)&~(unit
?0x40:0x20), hwif
->dma_base
+2); /* clear DMA_capable bit */
221 * Tell the drive to switch to the new mode; abort on failure.
223 if (!mode
|| sc1200_set_xfer_mode(drive
, mode
)) {
224 printk("SC1200: set xfer mode failure\n");
225 return 1; /* failure */
228 pci_clock
= sc1200_get_pci_clock();
231 * Now tune the chipset to match the drive:
233 * Note that each DMA mode has several timings associated with it.
234 * The correct timing depends on the fast PCI clock freq.
240 case PCI_CLK_33
: timings
= 0x00921250; break;
241 case PCI_CLK_48
: timings
= 0x00932470; break;
242 case PCI_CLK_66
: timings
= 0x009436a1; break;
247 case PCI_CLK_33
: timings
= 0x00911140; break;
248 case PCI_CLK_48
: timings
= 0x00922260; break;
249 case PCI_CLK_66
: timings
= 0x00933481; break;
254 case PCI_CLK_33
: timings
= 0x00911030; break;
255 case PCI_CLK_48
: timings
= 0x00922140; break;
256 case PCI_CLK_66
: timings
= 0x00923261; break;
261 case PCI_CLK_33
: timings
= 0x00077771; break;
262 case PCI_CLK_48
: timings
= 0x000bbbb2; break;
263 case PCI_CLK_66
: timings
= 0x000ffff3; break;
268 case PCI_CLK_33
: timings
= 0x00012121; break;
269 case PCI_CLK_48
: timings
= 0x00024241; break;
270 case PCI_CLK_66
: timings
= 0x00035352; break;
275 case PCI_CLK_33
: timings
= 0x00002020; break;
276 case PCI_CLK_48
: timings
= 0x00013131; break;
277 case PCI_CLK_66
: timings
= 0x00015151; break;
283 printk("%s: sc1200_config_dma: huh? mode=%02x clk=%x \n", drive
->name
, mode
, pci_clock
);
284 return 1; /* failure */
287 if (unit
== 0) { /* are we configuring drive0? */
288 pci_read_config_dword(hwif
->pci_dev
, basereg
+4, ®
);
289 timings
|= reg
& 0x80000000; /* preserve PIO format bit */
290 pci_write_config_dword(hwif
->pci_dev
, basereg
+4, timings
);
292 pci_write_config_dword(hwif
->pci_dev
, basereg
+12, timings
);
295 outb(inb(hwif
->dma_base
+2)|(unit
?0x40:0x20), hwif
->dma_base
+2); /* set DMA_capable bit */
298 * Finally, turn DMA on in software, and exit.
300 return hwif
->ide_dma_on(drive
); /* success */
304 * sc1200_config_dma() handles selection/setting of DMA/UDMA modes
305 * for both the chipset and drive.
307 static int sc1200_config_dma (ide_drive_t
*drive
)
309 return sc1200_config_dma2(drive
, sc1200_autoselect_dma_mode(drive
));
313 /* Replacement for the standard ide_dma_end action in
316 * returns 1 on error, 0 otherwise
318 int sc1200_ide_dma_end (ide_drive_t
*drive
)
320 ide_hwif_t
*hwif
= HWIF(drive
);
321 unsigned long dma_base
= hwif
->dma_base
;
324 dma_stat
= inb(dma_base
+2); /* get DMA status */
327 printk(" ide_dma_end dma_stat=%0x err=%x newerr=%x\n",
328 dma_stat
, ((dma_stat
&7)!=4), ((dma_stat
&2)==2));
330 outb(dma_stat
|0x1b, dma_base
+2); /* clear the INTR & ERROR bits */
331 outb(inb(dma_base
)&~1, dma_base
); /* !! DO THIS HERE !! stop DMA */
333 drive
->waiting_for_dma
= 0;
334 ide_destroy_dmatable(drive
); /* purge DMA mappings */
336 return (dma_stat
& 7) != 4; /* verify good DMA status */
340 * sc1200_tuneproc() handles selection/setting of PIO modes
341 * for both the chipset and drive.
343 * All existing BIOSs for this chipset guarantee that all drives
344 * will have valid default PIO timings set up before we get here.
346 static void sc1200_tuneproc (ide_drive_t
*drive
, byte pio
) /* mode=255 means "autotune" */
348 ide_hwif_t
*hwif
= HWIF(drive
);
350 static byte modes
[5] = {XFER_PIO_0
, XFER_PIO_1
, XFER_PIO_2
, XFER_PIO_3
, XFER_PIO_4
};
354 case 200: mode
= XFER_UDMA_0
; break;
355 case 201: mode
= XFER_UDMA_1
; break;
356 case 202: mode
= XFER_UDMA_2
; break;
357 case 100: mode
= XFER_MW_DMA_0
; break;
358 case 101: mode
= XFER_MW_DMA_1
; break;
359 case 102: mode
= XFER_MW_DMA_2
; break;
362 printk("SC1200: %s: changing (U)DMA mode\n", drive
->name
);
363 (void)sc1200_config_dma2(drive
, mode
);
367 pio
= ide_get_best_pio_mode(drive
, pio
, 4, NULL
);
368 printk("SC1200: %s: setting PIO mode%d\n", drive
->name
, pio
);
369 if (!sc1200_set_xfer_mode(drive
, modes
[pio
])) {
370 unsigned int basereg
= hwif
->channel
? 0x50 : 0x40;
371 pci_read_config_dword (hwif
->pci_dev
, basereg
+4, &format
);
372 format
= (format
>> 31) & 1;
374 format
+= sc1200_get_pci_clock();
375 pci_write_config_dword(hwif
->pci_dev
, basereg
+ (drive
->select
.b
.unit
<< 3), sc1200_pio_timings
[format
][pio
]);
379 static ide_hwif_t
*lookup_pci_dev (ide_hwif_t
*prev
, struct pci_dev
*dev
)
383 for (h
= 0; h
< MAX_HWIFS
; h
++) {
384 ide_hwif_t
*hwif
= &ide_hwifs
[h
];
387 prev
= NULL
; // found previous, now look for next match
389 if (hwif
&& hwif
->pci_dev
== dev
)
390 return hwif
; // found next match
393 return NULL
; // not found
396 typedef struct sc1200_saved_state_s
{
398 } sc1200_saved_state_t
;
400 static int sc1200_save_state (struct pci_dev
*dev
, u32 state
)
402 ide_hwif_t
*hwif
= NULL
;
404 printk("SC1200: save_state(%u)\n", state
);
406 return 0; // we only save state when going from full power to less
408 // Loop over all interfaces that are part of this PCI device:
410 while ((hwif
= lookup_pci_dev(hwif
, dev
)) != NULL
) {
411 sc1200_saved_state_t
*ss
;
412 unsigned int basereg
, r
;
414 // allocate a permanent save area, if not already allocated
416 ss
= (sc1200_saved_state_t
*)hwif
->config_data
;
418 ss
= kmalloc(sizeof(sc1200_saved_state_t
), GFP_KERNEL
);
421 (sc1200_saved_state_t
*)hwif
->config_data
= ss
;
423 ss
= (sc1200_saved_state_t
*)hwif
->config_data
;
425 // Save timing registers: this may be unnecessary if BIOS also does it
427 basereg
= hwif
->channel
? 0x50 : 0x40;
428 for (r
= 0; r
< 4; ++r
) {
429 pci_read_config_dword (hwif
->pci_dev
, basereg
+ (r
<<2), &ss
->regs
[r
]);
435 static int sc1200_suspend (struct pci_dev
*dev
, u32 state
)
437 printk("SC1200: suspend(%u)\n", state
);
438 /* You don't need to iterate over disks -- sysfs should have done that for you already */
440 pci_disable_device(dev
);
441 pci_set_power_state(dev
,state
);
442 dev
->current_state
= state
;
446 static int sc1200_resume (struct pci_dev
*dev
)
448 ide_hwif_t
*hwif
= NULL
;
450 printk("SC1200: resume\n");
451 pci_set_power_state(dev
,0); // bring chip back from sleep state
452 dev
->current_state
= 0;
453 pci_enable_device(dev
);
455 // loop over all interfaces that are part of this pci device:
457 while ((hwif
= lookup_pci_dev(hwif
, dev
)) != NULL
) {
458 unsigned int basereg
, r
, d
, format
;
459 sc1200_saved_state_t
*ss
= (sc1200_saved_state_t
*)hwif
->config_data
;
460 printk("%s: SC1200: resume\n", hwif
->name
);
463 // Restore timing registers: this may be unnecessary if BIOS also does it
465 basereg
= hwif
->channel
? 0x50 : 0x40;
467 for (r
= 0; r
< 4; ++r
) {
468 pci_write_config_dword(hwif
->pci_dev
, basereg
+ (r
<<2), ss
->regs
[r
]);
472 // Re-program drive PIO modes
474 pci_read_config_dword(hwif
->pci_dev
, basereg
+4, &format
);
475 format
= (format
>> 31) & 1;
477 format
+= sc1200_get_pci_clock();
478 for (d
= 0; d
< 2; ++d
) {
479 ide_drive_t
*drive
= &(hwif
->drives
[d
]);
480 if (drive
->present
) {
481 unsigned int pio
, timings
;
482 pci_read_config_dword(hwif
->pci_dev
, basereg
+(drive
->select
.b
.unit
<< 3), &timings
);
483 for (pio
= 0; pio
<= 4; ++pio
) {
484 if (sc1200_pio_timings
[format
][pio
] == timings
)
488 pio
= 255; /* autotune */
489 (void)sc1200_tuneproc(drive
, pio
);
493 // Re-program drive DMA modes
495 for (d
= 0; d
< MAX_DRIVES
; ++d
) {
496 ide_drive_t
*drive
= &(hwif
->drives
[d
]);
497 if (drive
->present
&& !hwif
->ide_dma_bad_drive(drive
)) {
498 int was_using_dma
= drive
->using_dma
;
499 hwif
->ide_dma_off_quietly(drive
);
500 sc1200_config_dma(drive
);
501 if (!was_using_dma
&& drive
->using_dma
) {
502 hwif
->ide_dma_off_quietly(drive
);
511 * Initialize the sc1200 bridge for reliable IDE DMA operation.
513 static unsigned int __init
init_chipset_sc1200 (struct pci_dev
*dev
, const char *name
)
515 #if defined(DISPLAY_SC1200_TIMINGS) && defined(CONFIG_PROC_FS)
519 ide_pci_register_host_proc(&sc1200_procs
[0]);
521 #endif /* DISPLAY_SC1200_TIMINGS && CONFIG_PROC_FS */
526 * This gets invoked by the IDE driver once for each channel,
527 * and performs channel-specific pre-initialization before drive probing.
529 static void __init
init_hwif_sc1200 (ide_hwif_t
*hwif
)
532 hwif
->serialized
= hwif
->mate
->serialized
= 1;
534 if (hwif
->dma_base
) {
535 hwif
->ide_dma_check
= &sc1200_config_dma
;
536 hwif
->ide_dma_end
= &sc1200_ide_dma_end
;
539 hwif
->tuneproc
= &sc1200_tuneproc
;
542 hwif
->ultra_mask
= 0x07;
543 hwif
->mwdma_mask
= 0x07;
545 hwif
->drives
[0].autodma
= hwif
->autodma
;
546 hwif
->drives
[1].autodma
= hwif
->autodma
;
549 static void __init
init_dma_sc1200 (ide_hwif_t
*hwif
, unsigned long dmabase
)
551 ide_setup_dma(hwif
, dmabase
, 8);
554 extern void ide_setup_pci_device(struct pci_dev
*, ide_pci_device_t
*);
557 static int __devinit
sc1200_init_one(struct pci_dev
*dev
, const struct pci_device_id
*id
)
559 ide_pci_device_t
*d
= &sc1200_chipsets
[id
->driver_data
];
560 if (dev
->device
!= d
->device
)
562 ide_setup_pci_device(dev
, d
);
567 static struct pci_device_id sc1200_pci_tbl
[] __devinitdata
= {
568 { PCI_VENDOR_ID_NS
, PCI_DEVICE_ID_NS_SCx200_IDE
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
572 static struct pci_driver driver
= {
573 .name
= "SC1200 IDE",
574 .id_table
= sc1200_pci_tbl
,
575 .probe
= sc1200_init_one
,
576 .save_state
= sc1200_save_state
,
577 .suspend
= sc1200_suspend
,
578 .resume
= sc1200_resume
,
581 static int sc1200_ide_init(void)
583 return ide_pci_register_driver(&driver
);
586 static void sc1200_ide_exit(void)
588 ide_pci_unregister_driver(&driver
);
591 module_init(sc1200_ide_init
);
592 module_exit(sc1200_ide_exit
);
594 MODULE_AUTHOR("Mark Lord");
595 MODULE_DESCRIPTION("PCI driver module for NS SC1200 IDE");
596 MODULE_LICENSE("GPL");