arch/i386/kernel/cpu/cpufreq/speedstep-lib.c

   1 /*
   2  * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
   3  *
   4  *  Licensed under the terms of the GNU GPL License version 2.
   5  *
   6  *  Library for common functions for Intel SpeedStep v.1 and v.2 support
   7  *
   8  *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/module.h>
  13 #include <linux/init.h>
  14 #include <linux/cpufreq.h>
  15 #include <linux/pci.h>
  16 #include <linux/slab.h>
  17
  18 #include <asm/msr.h>
  19 #include "speedstep-lib.h"
  20
  21
  22 /* DEBUG
  23  *   Define it if you want verbose debug output, e.g. for bug reporting
  24  */
  25 //#define SPEEDSTEP_DEBUG
  26
  27 #ifdef SPEEDSTEP_DEBUG
  28 #define dprintk(msg...) printk(msg)
  29 #else
  30 #define dprintk(msg...) do { } while(0)
  31 #endif
  32
  33 /*********************************************************************
  34  *                   GET PROCESSOR CORE SPEED IN KHZ                 *
  35  *********************************************************************/
  36
  37 static unsigned int pentium3_get_frequency (unsigned int processor)
  38 {
  39         /* See table 14 of p3_ds.pdf and table 22 of 29834003.pdf */
  40         struct {
  41                 unsigned int ratio;     /* Frequency Multiplier (x10) */
  42                 u8 bitmap;              /* power on configuration bits
  43                                            [27, 25:22] (in MSR 0x2a) */
  44         } msr_decode_mult [] = {
  45                 { 30, 0x01 },
  46                 { 35, 0x05 },
  47                 { 40, 0x02 },
  48                 { 45, 0x06 },
  49                 { 50, 0x00 },
  50                 { 55, 0x04 },
  51                 { 60, 0x0b },
  52                 { 65, 0x0f },
  53                 { 70, 0x09 },
  54                 { 75, 0x0d },
  55                 { 80, 0x0a },
  56                 { 85, 0x26 },
  57                 { 90, 0x20 },
  58                 { 100, 0x2b },
  59                 { 0, 0xff }     /* error or unknown value */
  60         };
  61
  62         /* PIII(-M) FSB settings: see table b1-b of 24547206.pdf */
  63         struct {
  64                 unsigned int value;     /* Front Side Bus speed in MHz */
  65                 u8 bitmap;              /* power on configuration bits [18: 19]
  66                                            (in MSR 0x2a) */
  67         } msr_decode_fsb [] = {
  68                 {  66, 0x0 },
  69                 { 100, 0x2 },
  70                 { 133, 0x1 },
  71                 {   0, 0xff}
  72         };
  73
  74         u32     msr_lo, msr_tmp;
  75         int     i = 0, j = 0;
  76
  77         /* read MSR 0x2a - we only need the low 32 bits */
  78         rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
  79         dprintk(KERN_DEBUG "speedstep-lib: P3 - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n", msr_lo, msr_tmp);
  80         msr_tmp = msr_lo;
  81
  82         /* decode the FSB */
  83         msr_tmp &= 0x00c0000;
  84         msr_tmp >>= 18;
  85         while (msr_tmp != msr_decode_fsb[i].bitmap) {
  86                 if (msr_decode_fsb[i].bitmap == 0xff)
  87                         return 0;
  88                 i++;
  89         }
  90
  91         /* decode the multiplier */
  92         if (processor == SPEEDSTEP_PROCESSOR_PIII_C_EARLY)
  93                 msr_lo &= 0x03c00000;
  94         else
  95                 msr_lo &= 0x0bc00000;
  96         msr_lo >>= 22;
  97         while (msr_lo != msr_decode_mult[j].bitmap) {
  98                 if (msr_decode_mult[j].bitmap == 0xff)
  99                         return 0;
 100                 j++;
 101         }
 102
 103         return (msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100);
 104 }
 105
 106
 107 static unsigned int pentium4_get_frequency(void)
 108 {
 109         u32 msr_lo, msr_hi;
 110
 111         rdmsr(0x2c, msr_lo, msr_hi);
 112
 113         dprintk(KERN_DEBUG "speedstep-lib: P4 - MSR_EBC_FREQUENCY_ID: 0x%x 0x%x\n", msr_lo, msr_hi);
 114
 115         msr_lo >>= 24;
 116         return (msr_lo * 100000);
 117 }
 118
 119
 120 unsigned int speedstep_get_processor_frequency(unsigned int processor)
 121 {
 122         switch (processor) {
 123         case SPEEDSTEP_PROCESSOR_P4M:
 124                 return pentium4_get_frequency();
 125         case SPEEDSTEP_PROCESSOR_PIII_T:
 126         case SPEEDSTEP_PROCESSOR_PIII_C:
 127         case SPEEDSTEP_PROCESSOR_PIII_C_EARLY:
 128                 return pentium3_get_frequency(processor);
 129         default:
 130                 return 0;
 131         };
 132         return 0;
 133 }
 134 EXPORT_SYMBOL_GPL(speedstep_get_processor_frequency);
 135
 136
 137 /*********************************************************************
 138  *                 DETECT SPEEDSTEP-CAPABLE PROCESSOR                *
 139  *********************************************************************/
 140
 141 unsigned int speedstep_detect_processor (void)
 142 {
 143         struct cpuinfo_x86 *c = cpu_data;
 144         u32                     ebx, msr_lo, msr_hi;
 145
 146         if ((c->x86_vendor != X86_VENDOR_INTEL) ||
 147             ((c->x86 != 6) && (c->x86 != 0xF)))
 148                 return 0;
 149
 150         if (c->x86 == 0xF) {
 151                 /* Intel Mobile Pentium 4-M
 152                  * or Intel Mobile Pentium 4 with 533 MHz FSB */
 153                 if (c->x86_model != 2)
 154                         return 0;
 155
 156                 if ((c->x86_mask != 4) && /* B-stepping [M-P4-M] */
 157                         (c->x86_mask != 7) && /* C-stepping [M-P4-M] */
 158                         (c->x86_mask != 9))   /* D-stepping [M-P4-M or M-P4/533] */
 159                         return 0;
 160
 161                 ebx = cpuid_ebx(0x00000001);
 162                 ebx &= 0x000000FF;
 163                 if ((ebx != 0x0e) && (ebx != 0x0f))
 164                         return 0;
 165
 166                 return SPEEDSTEP_PROCESSOR_P4M;
 167         }
 168
 169         switch (c->x86_model) {
 170         case 0x0B: /* Intel PIII [Tualatin] */
 171                 /* cpuid_ebx(1) is 0x04 for desktop PIII,
 172                                    0x06 for mobile PIII-M */
 173                 ebx = cpuid_ebx(0x00000001);
 174
 175                 ebx &= 0x000000FF;
 176                 if (ebx != 0x06)
 177                         return 0;
 178
 179                 /* So far all PIII-M processors support SpeedStep. See
 180                  * Intel's 24540640.pdf of June 2003
 181                  */
 182
 183                 return SPEEDSTEP_PROCESSOR_PIII_T;
 184
 185         case 0x08: /* Intel PIII [Coppermine] */
 186
 187                 /* all mobile PIII Coppermines have FSB 100 MHz
 188                  * ==> sort out a few desktop PIIIs. */
 189                 rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_hi);
 190                 dprintk(KERN_DEBUG "cpufreq: Coppermine: MSR_IA32_EBL_CR_POWERON is 0x%x, 0x%x\n", msr_lo, msr_hi);
 191                 msr_lo &= 0x00c0000;
 192                 if (msr_lo != 0x0080000)
 193                         return 0;
 194
 195                 /*
 196                  * If the processor is a mobile version,
 197                  * platform ID has bit 50 set
 198                  * it has SpeedStep technology if either
 199                  * bit 56 or 57 is set
 200                  */
 201                 rdmsr(MSR_IA32_PLATFORM_ID, msr_lo, msr_hi);
 202                 dprintk(KERN_DEBUG "cpufreq: Coppermine: MSR_IA32_PLATFORM ID is 0x%x, 0x%x\n", msr_lo, msr_hi);
 203                 if ((msr_hi & (1<<18)) && (msr_hi & (3<<24))) {
 204                         if (c->x86_mask == 0x01)
 205                                 return SPEEDSTEP_PROCESSOR_PIII_C_EARLY;
 206                         else
 207                                 return SPEEDSTEP_PROCESSOR_PIII_C;
 208                 }
 209
 210         default:
 211                 return 0;
 212         }
 213 }
 214 EXPORT_SYMBOL_GPL(speedstep_detect_processor);
 215
 216
 217 /*********************************************************************
 218  *                     DETECT SPEEDSTEP SPEEDS                       *
 219  *********************************************************************/
 220
 221 unsigned int speedstep_get_freqs(unsigned int processor,
 222                                   unsigned int *low_speed,
 223                                   unsigned int *high_speed,
 224                                   void (*set_state) (unsigned int state,
 225                                                      unsigned int notify)
 226                                  )
 227 {
 228         unsigned int prev_speed;
 229         unsigned int ret = 0;
 230         unsigned long flags;
 231
 232         if ((!processor) || (!low_speed) || (!high_speed) || (!set_state))
 233                 return EINVAL;
 234
 235         /* get current speed */
 236         prev_speed = speedstep_get_processor_frequency(processor);
 237         if (!prev_speed)
 238                 return EIO;
 239
 240         local_irq_save(flags);
 241
 242         /* switch to low state */
 243         set_state(SPEEDSTEP_LOW, 0);
 244         *low_speed = speedstep_get_processor_frequency(processor);
 245         if (!*low_speed) {
 246                 ret = EIO;
 247                 goto out;
 248         }
 249
 250         /* switch to high state */
 251         set_state(SPEEDSTEP_HIGH, 0);
 252         *high_speed = speedstep_get_processor_frequency(processor);
 253         if (!*high_speed) {
 254                 ret = EIO;
 255                 goto out;
 256         }
 257
 258         if (*low_speed == *high_speed) {
 259                 ret = ENODEV;
 260                 goto out;
 261         }
 262
 263         /* switch to previous state, if necessary */
 264         if (*high_speed != prev_speed)
 265                 set_state(SPEEDSTEP_LOW, 0);
 266
 267  out:
 268         local_irq_restore(flags);
 269         return (ret);
 270 }
 271 EXPORT_SYMBOL_GPL(speedstep_get_freqs);
 272
 273 MODULE_AUTHOR ("Dominik Brodowski <linux@brodo.de>");
 274 MODULE_DESCRIPTION ("Library for Intel SpeedStep 1 or 2 cpufreq drivers.");
 275 MODULE_LICENSE ("GPL");