Merge with Linux 2.5.74.
[linux-2.6/linux-mips.git] / arch / i386 / kernel / cpu / cpufreq / speedstep-centrino.c
blobf2a019dadc6383f4fc0e4902b9cb344afb7a5802
1 /*
2 * cpufreq driver for Enhanced SpeedStep, as found in Intel's Pentium
3 * M (part of the Centrino chipset).
5 * Despite the "SpeedStep" in the name, this is almost entirely unlike
6 * traditional SpeedStep.
8 * Modelled on speedstep.c
10 * Copyright (C) 2003 Jeremy Fitzhardinge <jeremy@goop.org>
12 * WARNING WARNING WARNING
14 * This driver manipulates the PERF_CTL MSR, which is only somewhat
15 * documented. While it seems to work on my laptop, it has not been
16 * tested anywhere else, and it may not work for you, do strange
17 * things or simply crash.
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/init.h>
23 #include <linux/cpufreq.h>
25 #include <asm/msr.h>
26 #include <asm/processor.h>
27 #include <asm/cpufeature.h>
29 #define PFX "speedstep-centrino: "
30 #define MAINTAINER "Jeremy Fitzhardinge <jeremy@goop.org>"
32 /*#define CENTRINO_DEBUG*/
34 #ifdef CENTRINO_DEBUG
35 #define dprintk(msg...) printk(msg)
36 #else
37 #define dprintk(msg...) do { } while(0)
38 #endif
40 struct cpu_model
42 const char *model_name;
43 unsigned max_freq; /* max clock in kHz */
45 struct cpufreq_frequency_table *op_points; /* clock/voltage pairs */
48 /* Operating points for current CPU */
49 static const struct cpu_model *centrino_model;
51 /* Computes the correct form for IA32_PERF_CTL MSR for a particular
52 frequency/voltage operating point; frequency in MHz, volts in mV.
53 This is stored as "index" in the structure. */
54 #define OP(mhz, mv) \
55 { \
56 .frequency = (mhz) * 1000, \
57 .index = (((mhz)/100) << 8) | ((mv - 700) / 16) \
60 /*
61 * These voltage tables were derived from the Intel Pentium M
62 * datasheet, document 25261202.pdf, Table 5. I have verified they
63 * are consistent with my IBM ThinkPad X31, which has a 1.3GHz Pentium
64 * M.
67 /* Ultra Low Voltage Intel Pentium M processor 900MHz */
68 static struct cpufreq_frequency_table op_900[] =
70 OP(600, 844),
71 OP(800, 988),
72 OP(900, 1004),
73 { .frequency = CPUFREQ_TABLE_END }
76 /* Low Voltage Intel Pentium M processor 1.10GHz */
77 static struct cpufreq_frequency_table op_1100[] =
79 OP( 600, 956),
80 OP( 800, 1020),
81 OP( 900, 1100),
82 OP(1000, 1164),
83 OP(1100, 1180),
84 { .frequency = CPUFREQ_TABLE_END }
88 /* Low Voltage Intel Pentium M processor 1.20GHz */
89 static struct cpufreq_frequency_table op_1200[] =
91 OP( 600, 956),
92 OP( 800, 1004),
93 OP( 900, 1020),
94 OP(1000, 1100),
95 OP(1100, 1164),
96 OP(1200, 1180),
97 { .frequency = CPUFREQ_TABLE_END }
100 /* Intel Pentium M processor 1.30GHz */
101 static struct cpufreq_frequency_table op_1300[] =
103 OP( 600, 956),
104 OP( 800, 1260),
105 OP(1000, 1292),
106 OP(1200, 1356),
107 OP(1300, 1388),
108 { .frequency = CPUFREQ_TABLE_END }
111 /* Intel Pentium M processor 1.40GHz */
112 static struct cpufreq_frequency_table op_1400[] =
114 OP( 600, 956),
115 OP( 800, 1180),
116 OP(1000, 1308),
117 OP(1200, 1436),
118 OP(1400, 1484),
119 { .frequency = CPUFREQ_TABLE_END }
122 /* Intel Pentium M processor 1.50GHz */
123 static struct cpufreq_frequency_table op_1500[] =
125 OP( 600, 956),
126 OP( 800, 1116),
127 OP(1000, 1228),
128 OP(1200, 1356),
129 OP(1400, 1452),
130 OP(1500, 1484),
131 { .frequency = CPUFREQ_TABLE_END }
134 /* Intel Pentium M processor 1.60GHz */
135 static struct cpufreq_frequency_table op_1600[] =
137 OP( 600, 956),
138 OP( 800, 1036),
139 OP(1000, 1164),
140 OP(1200, 1276),
141 OP(1400, 1420),
142 OP(1600, 1484),
143 { .frequency = CPUFREQ_TABLE_END }
146 /* Intel Pentium M processor 1.70GHz */
147 static struct cpufreq_frequency_table op_1700[] =
149 OP( 600, 956),
150 OP( 800, 1004),
151 OP(1000, 1116),
152 OP(1200, 1228),
153 OP(1400, 1308),
154 OP(1700, 1484),
155 { .frequency = CPUFREQ_TABLE_END }
157 #undef OP
159 #define CPU(max) \
160 { "Intel(R) Pentium(R) M processor " #max "MHz", (max)*1000, op_##max }
162 /* CPU models, their operating frequency range, and freq/voltage
163 operating points */
164 static const struct cpu_model models[] =
166 CPU( 900),
167 CPU(1100),
168 CPU(1200),
169 CPU(1300),
170 CPU(1400),
171 CPU(1500),
172 CPU(1600),
173 CPU(1700),
174 { 0, }
176 #undef CPU
178 /* Extract clock in kHz from PERF_CTL value */
179 static unsigned extract_clock(unsigned msr)
181 msr = (msr >> 8) & 0xff;
182 return msr * 100000;
185 /* Return the current CPU frequency in kHz */
186 static unsigned get_cur_freq(void)
188 unsigned l, h;
190 rdmsr(MSR_IA32_PERF_STATUS, l, h);
191 return extract_clock(l);
194 static int centrino_cpu_init(struct cpufreq_policy *policy)
196 unsigned freq;
198 if (policy->cpu != 0 || centrino_model == NULL)
199 return -ENODEV;
201 freq = get_cur_freq();
203 policy->policy = (freq == centrino_model->max_freq) ?
204 CPUFREQ_POLICY_PERFORMANCE :
205 CPUFREQ_POLICY_POWERSAVE;
206 policy->cpuinfo.transition_latency = 10; /* 10uS transition latency */
207 policy->cur = freq;
209 dprintk(KERN_INFO PFX "centrino_cpu_init: policy=%d cur=%dkHz\n",
210 policy->policy, policy->cur);
212 return cpufreq_frequency_table_cpuinfo(policy, centrino_model->op_points);
216 * centrino_verify - verifies a new CPUFreq policy
217 * @freq: new policy
219 * Limit must be within this model's frequency range at least one
220 * border included.
222 static int centrino_verify (struct cpufreq_policy *policy)
224 return cpufreq_frequency_table_verify(policy, centrino_model->op_points);
228 * centrino_setpolicy - set a new CPUFreq policy
229 * @policy: new policy
231 * Sets a new CPUFreq policy.
233 static int centrino_target (struct cpufreq_policy *policy,
234 unsigned int target_freq,
235 unsigned int relation)
237 unsigned int newstate = 0;
238 unsigned int msr, oldmsr, h;
239 struct cpufreq_freqs freqs;
241 if (centrino_model == NULL)
242 return -ENODEV;
244 if (cpufreq_frequency_table_target(policy, centrino_model->op_points, target_freq,
245 relation, &newstate))
246 return -EINVAL;
248 msr = centrino_model->op_points[newstate].index;
249 rdmsr(MSR_IA32_PERF_CTL, oldmsr, h);
251 if (msr == (oldmsr & 0xffff))
252 return 0;
254 /* Hm, old frequency can either be the last value we put in
255 PERF_CTL, or whatever it is now. The trouble is that TM2
256 can change it behind our back, which means we never get to
257 see the speed change. Reading back the current speed would
258 tell us something happened, but it may leave the things on
259 the notifier chain confused; we therefore stick to using
260 the last programmed speed rather than the current speed for
261 "old".
263 TODO: work out how the TCC interrupts work, and try to
264 catch the CPU changing things under us.
266 freqs.cpu = 0;
267 freqs.old = extract_clock(oldmsr);
268 freqs.new = extract_clock(msr);
270 dprintk(KERN_INFO PFX "target=%dkHz old=%d new=%d msr=%04x\n",
271 target_freq, freqs.old, freqs.new, msr);
273 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
275 /* all but 16 LSB are "reserved", so treat them with
276 care */
277 oldmsr &= ~0xffff;
278 msr &= 0xffff;
279 oldmsr |= msr;
281 wrmsr(MSR_IA32_PERF_CTL, oldmsr, h);
283 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
285 return 0;
288 static struct cpufreq_driver centrino_driver = {
289 .name = "centrino", /* should be speedstep-centrino,
290 but there's a 16 char limit */
291 .init = centrino_cpu_init,
292 .verify = centrino_verify,
293 .target = centrino_target,
294 .owner = THIS_MODULE,
299 * centrino_init - initializes the Enhanced SpeedStep CPUFreq driver
301 * Initializes the Enhanced SpeedStep support. Returns -ENODEV on
302 * unsupported devices, -ENOENT if there's no voltage table for this
303 * particular CPU model, -EINVAL on problems during initiatization,
304 * and zero on success.
306 * This is quite picky. Not only does the CPU have to advertise the
307 * "est" flag in the cpuid capability flags, we look for a specific
308 * CPU model and stepping, and we need to have the exact model name in
309 * our voltage tables. That is, be paranoid about not releasing
310 * someone's valuable magic smoke.
312 static int __init centrino_init(void)
314 struct cpuinfo_x86 *cpu = cpu_data;
315 const struct cpu_model *model;
316 unsigned l, h;
318 if (!cpu_has(cpu, X86_FEATURE_EST))
319 return -ENODEV;
321 /* Only Intel Pentium M stepping 5 for now - add new CPUs as
322 they appear after making sure they use PERF_CTL in the same
323 way. */
324 if (cpu->x86_vendor != X86_VENDOR_INTEL ||
325 cpu->x86 != 6 ||
326 cpu->x86_model != 9 ||
327 cpu->x86_mask != 5) {
328 printk(KERN_INFO PFX "found unsupported CPU with Enhanced SpeedStep: "
329 "send /proc/cpuinfo to " MAINTAINER "\n");
330 return -ENODEV;
333 /* Check to see if Enhanced SpeedStep is enabled, and try to
334 enable it if not. */
335 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
337 if (!(l & (1<<16))) {
338 l |= (1<<16);
339 wrmsr(MSR_IA32_MISC_ENABLE, l, h);
341 /* check to see if it stuck */
342 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
343 if (!(l & (1<<16))) {
344 printk(KERN_INFO PFX "couldn't enable Enhanced SpeedStep\n");
345 return -ENODEV;
349 for(model = models; model->model_name != NULL; model++)
350 if (strcmp(cpu->x86_model_id, model->model_name) == 0)
351 break;
352 if (model->model_name == NULL) {
353 printk(KERN_INFO PFX "no support for CPU model \"%s\": "
354 "send /proc/cpuinfo to " MAINTAINER "\n",
355 cpu->x86_model_id);
356 return -ENOENT;
359 centrino_model = model;
361 printk(KERN_INFO PFX "found \"%s\": max frequency: %dkHz\n",
362 model->model_name, model->max_freq);
364 return cpufreq_register_driver(&centrino_driver);
367 static void __exit centrino_exit(void)
369 cpufreq_unregister_driver(&centrino_driver);
372 MODULE_AUTHOR ("Jeremy Fitzhardinge <jeremy@goop.org>");
373 MODULE_DESCRIPTION ("Enhanced SpeedStep driver for Intel Pentium M processors.");
374 MODULE_LICENSE ("GPL");
376 module_init(centrino_init);
377 module_exit(centrino_exit);