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Merge with Linux 2.3.99-pre4.
[linux-2.6/linux-mips.git] / drivers / scsi / sym53c8xx.c
blob5c57cb275f240b2d1fe3a7d8df5b6802d815158c
1 /******************************************************************************
2 ** High Performance device driver for the Symbios 53C896 controller.
3 **
4 ** Copyright (C) 1998-2000 Gerard Roudier <groudier@club-internet.fr>
5 **
6 ** This driver also supports all the Symbios 53C8XX controller family,
7 ** except 53C810 revisions < 16, 53C825 revisions < 16 and all
8 ** revisions of 53C815 controllers.
9 **
10 ** This driver is based on the Linux port of the FreeBSD ncr driver.
11 **
12 ** Copyright (C) 1994 Wolfgang Stanglmeier
13 **
14 **-----------------------------------------------------------------------------
15 **
16 ** This program is free software; you can redistribute it and/or modify
17 ** it under the terms of the GNU General Public License as published by
18 ** the Free Software Foundation; either version 2 of the License, or
19 ** (at your option) any later version.
20 **
21 ** This program is distributed in the hope that it will be useful,
22 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
23 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 ** GNU General Public License for more details.
25 **
26 ** You should have received a copy of the GNU General Public License
27 ** along with this program; if not, write to the Free Software
28 ** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29 **
30 **-----------------------------------------------------------------------------
31 **
32 ** The Linux port of the FreeBSD ncr driver has been achieved in
33 ** november 1995 by:
34 **
35 ** Gerard Roudier <groudier@club-internet.fr>
36 **
37 ** Being given that this driver originates from the FreeBSD version, and
38 ** in order to keep synergy on both, any suggested enhancements and corrections
39 ** received on Linux are automatically a potential candidate for the FreeBSD
40 ** version.
41 **
42 ** The original driver has been written for 386bsd and FreeBSD by
43 ** Wolfgang Stanglmeier <wolf@cologne.de>
44 ** Stefan Esser <se@mi.Uni-Koeln.de>
45 **
46 **-----------------------------------------------------------------------------
47 **
48 ** Major contributions:
49 ** --------------------
50 **
51 ** NVRAM detection and reading.
52 ** Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
53 **
54 *******************************************************************************
55 */
56
57 /*
58 ** March 6 2000, sym53c8xx 1.5k
59 **
60 ** Supported SCSI features:
61 ** Synchronous data transfers
62 ** Wide16 SCSI BUS
63 ** Disconnection/Reselection
64 ** Tagged command queuing
65 ** SCSI Parity checking
66 **
67 ** Supported NCR/SYMBIOS chips:
68 ** 53C810A (8 bits, Fast 10, no rom BIOS)
69 ** 53C825A (Wide, Fast 10, on-board rom BIOS)
70 ** 53C860 (8 bits, Fast 20, no rom BIOS)
71 ** 53C875 (Wide, Fast 20, on-board rom BIOS)
72 ** 53C876 (Wide, Fast 20 Dual, on-board rom BIOS)
73 ** 53C895 (Wide, Fast 40, on-board rom BIOS)
74 ** 53C895A (Wide, Fast 40, on-board rom BIOS)
75 ** 53C896 (Wide, Fast 40 Dual, on-board rom BIOS)
76 ** 53C1510D (Wide, Fast 40 Dual, on-board rom BIOS)
77 **
78 ** Other features:
79 ** Memory mapped IO
80 ** Module
81 ** Shared IRQ
82 */
83
84 /*
85 ** Name and version of the driver
86 */
87 #define SCSI_NCR_DRIVER_NAME "sym53c8xx - version 1.5l"
88
89 /* #define DEBUG_896R1 */
90 #define SCSI_NCR_OPTIMIZE_896
91 /* #define SCSI_NCR_OPTIMIZE_896_1 */
92
93 #define SCSI_NCR_DEBUG_FLAGS (0)
94
95 #define NAME53C "sym53c"
96 #define NAME53C8XX "sym53c8xx"
97
98 /*==========================================================
99 **
100 ** Include files
101 **
102 **==========================================================
103 */
104
105 #define LinuxVersionCode(v, p, s) (((v)<<16)+((p)<<8)+(s))
106
107 #ifdef MODULE
108 #include <linux/module.h>
109 #endif
110
111 #include <asm/dma.h>
112 #include <asm/io.h>
113 #include <asm/system.h>
114 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,3,17)
115 #include <linux/spinlock.h>
116 #elif LINUX_VERSION_CODE >= LinuxVersionCode(2,1,93)
117 #include <asm/spinlock.h>
118 #endif
119 #include <linux/delay.h>
120 #include <linux/signal.h>
121 #include <linux/sched.h>
122 #include <linux/errno.h>
123 #include <linux/pci.h>
124 #include <linux/string.h>
125 #include <linux/malloc.h>
126 #include <linux/mm.h>
127 #include <linux/ioport.h>
128 #include <linux/time.h>
129 #include <linux/timer.h>
130 #include <linux/stat.h>
131
132 #include <linux/version.h>
133 #include <linux/blk.h>
134
135 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,35)
136 #include <linux/init.h>
137 #endif
138
139 #ifndef __init
140 #define __init
141 #endif
142 #ifndef __initdata
143 #define __initdata
144 #endif
145
146 #if LINUX_VERSION_CODE <= LinuxVersionCode(2,1,92)
147 #include <linux/bios32.h>
148 #endif
149
150 #include "scsi.h"
151 #include "hosts.h"
152 #include "constants.h"
153 #include "sd.h"
154
155 #include <linux/types.h>
156
157 /*
158 ** Define BITS_PER_LONG for earlier linux versions.
159 */
160 #ifndef BITS_PER_LONG
161 #if (~0UL) == 0xffffffffUL
162 #define BITS_PER_LONG 32
163 #else
164 #define BITS_PER_LONG 64
165 #endif
166 #endif
167
168 /*
169 ** Define the BSD style u_int32 and u_int64 type.
170 ** Are in fact u_int32_t and u_int64_t :-)
171 */
172 typedef u32 u_int32;
173 typedef u64 u_int64;
174
175 #include "sym53c8xx.h"
176
177 #define MIN(a,b) (((a) < (b)) ? (a) : (b))
178 #define MAX(a,b) (((a) > (b)) ? (a) : (b))
179
180 /*
181 ** Hmmm... What complex some PCI-HOST bridges actually are,
182 ** despite the fact that the PCI specifications are looking
183 ** so smart and simple! ;-)
184 */
185 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,3,47)
186 #define SCSI_NCR_DYNAMIC_DMA_MAPPING
187 #endif
188
189 /*==========================================================
190 **
191 ** A la VMS/CAM-3 queue management.
192 ** Implemented from linux list management.
193 **
194 **==========================================================
195 */
196
197 typedef struct xpt_quehead {
198 struct xpt_quehead *flink; /* Forward pointer */
199 struct xpt_quehead *blink; /* Backward pointer */
200 } XPT_QUEHEAD;
201
202 #define xpt_que_init(ptr) do { \
203 (ptr)->flink = (ptr); (ptr)->blink = (ptr); \
204 } while (0)
205
206 static inline void __xpt_que_add(struct xpt_quehead * new,
207 struct xpt_quehead * blink,
208 struct xpt_quehead * flink)
209 {
210 flink->blink = new;
211 new->flink = flink;
212 new->blink = blink;
213 blink->flink = new;
214 }
215
216 static inline void __xpt_que_del(struct xpt_quehead * blink,
217 struct xpt_quehead * flink)
218 {
219 flink->blink = blink;
220 blink->flink = flink;
221 }
222
223 static inline int xpt_que_empty(struct xpt_quehead *head)
224 {
225 return head->flink == head;
226 }
227
228 static inline void xpt_que_splice(struct xpt_quehead *list,
229 struct xpt_quehead *head)
230 {
231 struct xpt_quehead *first = list->flink;
232
233 if (first != list) {
234 struct xpt_quehead *last = list->blink;
235 struct xpt_quehead *at = head->flink;
236
237 first->blink = head;
238 head->flink = first;
239
240 last->flink = at;
241 at->blink = last;
242 }
243 }
244
245 #define xpt_que_entry(ptr, type, member) \
246 ((type *)((char *)(ptr)-(unsigned long)(&((type *)0)->member)))
247
248
249 #define xpt_insque(new, pos) __xpt_que_add(new, pos, (pos)->flink)
250
251 #define xpt_remque(el) __xpt_que_del((el)->blink, (el)->flink)
252
253 #define xpt_insque_head(new, head) __xpt_que_add(new, head, (head)->flink)
254
255 static inline struct xpt_quehead *xpt_remque_head(struct xpt_quehead *head)
256 {
257 struct xpt_quehead *elem = head->flink;
258
259 if (elem != head)
260 __xpt_que_del(head, elem->flink);
261 else
262 elem = 0;
263 return elem;
264 }
265
266 #define xpt_insque_tail(new, head) __xpt_que_add(new, (head)->blink, head)
267
268 static inline struct xpt_quehead *xpt_remque_tail(struct xpt_quehead *head)
269 {
270 struct xpt_quehead *elem = head->blink;
271
272 if (elem != head)
273 __xpt_que_del(elem->blink, head);
274 else
275 elem = 0;
276 return elem;
277 }
278
279 /*==========================================================
280 **
281 ** On x86 architecture, write buffers management does
282 ** not reorder writes to memory. So, using compiler
283 ** optimization barriers is enough to guarantee some
284 ** ordering when the CPU is writing data accessed by
285 ** the NCR.
286 ** On Alpha architecture, explicit memory barriers have
287 ** to be used.
288 ** Other architectures are defaulted to mb() macro if
289 ** defined, otherwise use compiler barrier.
290 **
291 **==========================================================
292 */
293
294 #if defined(__i386__)
295 #define MEMORY_BARRIER() barrier()
296 #elif defined(__alpha__)
297 #define MEMORY_BARRIER() mb()
298 #else
299 # ifdef mb
300 # define MEMORY_BARRIER() mb()
301 # else
302 # define MEMORY_BARRIER() barrier()
303 # endif
304 #endif
305
306 /*==========================================================
307 **
308 ** Configuration and Debugging
309 **
310 **==========================================================
311 */
312
313 /*
314 ** SCSI address of this device.
315 ** The boot routines should have set it.
316 ** If not, use this.
317 */
318
319 #ifndef SCSI_NCR_MYADDR
320 #define SCSI_NCR_MYADDR (7)
321 #endif
322
323 /*
324 ** The maximum number of tags per logic unit.
325 ** Used only for devices that support tags.
326 */
327
328 #ifndef SCSI_NCR_MAX_TAGS
329 #define SCSI_NCR_MAX_TAGS (8)
330 #endif
331
332 /*
333 ** TAGS are actually unlimited (256 tags/lun).
334 ** But Linux only supports 255. :)
335 */
336 #if SCSI_NCR_MAX_TAGS > 255
337 #define MAX_TAGS 255
338 #else
339 #define MAX_TAGS SCSI_NCR_MAX_TAGS
340 #endif
341
342 /*
343 ** Since the ncr chips only have a 8 bit ALU, we try to be clever
344 ** about offset calculation in the TASK TABLE per LUN that is an
345 ** array of DWORDS = 4 bytes.
346 */
347 #if MAX_TAGS > (512/4)
348 #define MAX_TASKS (1024/4)
349 #elif MAX_TAGS > (256/4)
350 #define MAX_TASKS (512/4)
351 #else
352 #define MAX_TASKS (256/4)
353 #endif
354
355 /*
356 ** This one means 'NO TAG for this job'
357 */
358 #define NO_TAG (256)
359
360 /*
361 ** Number of targets supported by the driver.
362 ** n permits target numbers 0..n-1.
363 ** Default is 16, meaning targets #0..#15.
364 ** #7 .. is myself.
365 */
366
367 #ifdef SCSI_NCR_MAX_TARGET
368 #define MAX_TARGET (SCSI_NCR_MAX_TARGET)
369 #else
370 #define MAX_TARGET (16)
371 #endif
372
373 /*
374 ** Number of logic units supported by the driver.
375 ** n enables logic unit numbers 0..n-1.
376 ** The common SCSI devices require only
377 ** one lun, so take 1 as the default.
378 */
379
380 #ifdef SCSI_NCR_MAX_LUN
381 #define MAX_LUN 64
382 #else
383 #define MAX_LUN (1)
384 #endif
385
386 /*
387 ** Asynchronous pre-scaler (ns). Shall be 40 for
388 ** the SCSI timings to be compliant.
389 */
390
391 #ifndef SCSI_NCR_MIN_ASYNC
392 #define SCSI_NCR_MIN_ASYNC (40)
393 #endif
394
395 /*
396 ** The maximum number of jobs scheduled for starting.
397 ** We allocate 4 entries more than the value we announce
398 ** to the SCSI upper layer. Guess why ! :-)
399 */
400
401 #ifdef SCSI_NCR_CAN_QUEUE
402 #define MAX_START (SCSI_NCR_CAN_QUEUE + 4)
403 #else
404 #define MAX_START (MAX_TARGET + 7 * MAX_TAGS)
405 #endif
406
407 /*
408 ** We donnot want to allocate more than 1 PAGE for the
409 ** the start queue and the done queue. We hard-code entry
410 ** size to 8 in order to let cpp do the checking.
411 ** Allows 512-4=508 pending IOs for i386 but Linux seems for
412 ** now not able to provide the driver with this amount of IOs.
413 */
414 #if MAX_START > PAGE_SIZE/8
415 #undef MAX_START
416 #define MAX_START (PAGE_SIZE/8)
417 #endif
418
419 /*
420 ** The maximum number of segments a transfer is split into.
421 ** We support up to 127 segments for both read and write.
422 */
423
424 #define MAX_SCATTER (SCSI_NCR_MAX_SCATTER)
425 #define SCR_SG_SIZE (2)
426
427 /*
428 ** Io mapped or memory mapped.
429 */
430
431 #if defined(SCSI_NCR_IOMAPPED) || defined(SCSI_NCR_PCI_MEM_NOT_SUPPORTED)
432 #define NCR_IOMAPPED
433 #endif
434
435 /*
436 ** other
437 */
438
439 #define NCR_SNOOP_TIMEOUT (1000000)
440
441 /*==========================================================
442 **
443 ** Miscallaneous BSDish defines.
444 **
445 **==========================================================
446 */
447
448 #define u_char unsigned char
449 #define u_short unsigned short
450 #define u_int unsigned int
451 #define u_long unsigned long
452
453 #ifndef bcopy
454 #define bcopy(s, d, n) memcpy((d), (s), (n))
455 #endif
456
457 #ifndef bzero
458 #define bzero(d, n) memset((d), 0, (n))
459 #endif
460
461 #ifndef offsetof
462 #define offsetof(t, m) ((size_t) (&((t *)0)->m))
463 #endif
464
465 /*
466 ** Simple Wrapper to kernel PCI bus interface.
467 **
468 ** This wrapper allows to get rid of old kernel PCI interface
469 ** and still allows to preserve linux-2.0 compatibilty.
470 ** In fact, it is mostly an incomplete emulation of the new
471 ** PCI code for pre-2.2 kernels. When kernel-2.0 support
472 ** will be dropped, we will just have to remove most of this
473 ** code.
474 */
475
476 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,2,0)
477
478 typedef struct pci_dev *pcidev_t;
479 #define PCIDEV_NULL (0)
480 #define PciBusNumber(d) (d)->bus->number
481 #define PciDeviceFn(d) (d)->devfn
482 #define PciVendorId(d) (d)->vendor
483 #define PciDeviceId(d) (d)->device
484 #define PciIrqLine(d) (d)->irq
485
486 #if LINUX_VERSION_CODE > LinuxVersionCode(2,3,12)
487
488 static int __init
489 pci_get_base_address(struct pci_dev *pdev, int index, u_long *base)
490 {
491 *base = pdev->resource[index].start;
492 if ((pdev->resource[index].flags & 0x7) == 0x4)
493 ++index;
494 return ++index;
495 }
496 #else
497 static int __init
498 pci_get_base_address(struct pci_dev *pdev, int index, u_long *base)
499 {
500 *base = pdev->base_address[index++];
501 if ((*base & 0x7) == 0x4) {
502 #if BITS_PER_LONG > 32
503 *base |= (((u_long)pdev->base_address[index]) << 32);
504 #endif
505 ++index;
506 }
507 return index;
508 }
509 #endif
510
511 #else /* Incomplete emulation of current PCI code for pre-2.2 kernels */
512
513 typedef unsigned int pcidev_t;
514 #define PCIDEV_NULL (~0u)
515 #define PciBusNumber(d) ((d)>>8)
516 #define PciDeviceFn(d) ((d)&0xff)
517 #define __PciDev(busn, devfn) (((busn)<<8)+(devfn))
518
519 #define pci_present pcibios_present
520
521 #define pci_read_config_byte(d, w, v) \
522 pcibios_read_config_byte(PciBusNumber(d), PciDeviceFn(d), w, v)
523 #define pci_read_config_word(d, w, v) \
524 pcibios_read_config_word(PciBusNumber(d), PciDeviceFn(d), w, v)
525 #define pci_read_config_dword(d, w, v) \
526 pcibios_read_config_dword(PciBusNumber(d), PciDeviceFn(d), w, v)
527
528 #define pci_write_config_byte(d, w, v) \
529 pcibios_write_config_byte(PciBusNumber(d), PciDeviceFn(d), w, v)
530 #define pci_write_config_word(d, w, v) \
531 pcibios_write_config_word(PciBusNumber(d), PciDeviceFn(d), w, v)
532 #define pci_write_config_dword(d, w, v) \
533 pcibios_write_config_dword(PciBusNumber(d), PciDeviceFn(d), w, v)
534
535 static pcidev_t __init
536 pci_find_device(unsigned int vendor, unsigned int device, pcidev_t prev)
537 {
538 static unsigned short pci_index;
539 int retv;
540 unsigned char bus_number, device_fn;
541
542 if (prev == PCIDEV_NULL)
543 pci_index = 0;
544 else
545 ++pci_index;
546 retv = pcibios_find_device (vendor, device, pci_index,
547 &bus_number, &device_fn);
548 return retv ? PCIDEV_NULL : __PciDev(bus_number, device_fn);
549 }
550
551 static u_short __init PciVendorId(pcidev_t dev)
552 {
553 u_short vendor_id;
554 pci_read_config_word(dev, PCI_VENDOR_ID, &vendor_id);
555 return vendor_id;
556 }
557
558 static u_short __init PciDeviceId(pcidev_t dev)
559 {
560 u_short device_id;
561 pci_read_config_word(dev, PCI_DEVICE_ID, &device_id);
562 return device_id;
563 }
564
565 static u_int __init PciIrqLine(pcidev_t dev)
566 {
567 u_char irq;
568 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
569 return irq;
570 }
571
572 static int __init
573 pci_get_base_address(pcidev_t dev, int offset, u_long *base)
574 {
575 u_int32 tmp;
576
577 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + offset, &tmp);
578 *base = tmp;
579 offset += sizeof(u_int32);
580 if ((tmp & 0x7) == 0x4) {
581 #if BITS_PER_LONG > 32
582 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + offset, &tmp);
583 *base |= (((u_long)tmp) << 32);
584 #endif
585 offset += sizeof(u_int32);
586 }
587 return offset;
588 }
589
590 #endif /* LINUX_VERSION_CODE >= LinuxVersionCode(2,2,0) */
591
592 /*==========================================================
593 **
594 ** Debugging tags
595 **
596 **==========================================================
597 */
598
599 #define DEBUG_ALLOC (0x0001)
600 #define DEBUG_PHASE (0x0002)
601 #define DEBUG_QUEUE (0x0008)
602 #define DEBUG_RESULT (0x0010)
603 #define DEBUG_POINTER (0x0020)
604 #define DEBUG_SCRIPT (0x0040)
605 #define DEBUG_TINY (0x0080)
606 #define DEBUG_TIMING (0x0100)
607 #define DEBUG_NEGO (0x0200)
608 #define DEBUG_TAGS (0x0400)
609
610 /*
611 ** Enable/Disable debug messages.
612 ** Can be changed at runtime too.
613 */
614
615 #ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
616 static int ncr_debug = SCSI_NCR_DEBUG_FLAGS;
617 #define DEBUG_FLAGS ncr_debug
618 #else
619 #define DEBUG_FLAGS SCSI_NCR_DEBUG_FLAGS
620 #endif
621
622 /*
623 ** SMP threading.
624 **
625 ** Assuming that SMP systems are generally high end systems and may
626 ** use several SCSI adapters, we are using one lock per controller
627 ** instead of some global one. For the moment (linux-2.1.95), driver's
628 ** entry points are called with the 'io_request_lock' lock held, so:
629 ** - We are uselessly loosing a couple of micro-seconds to lock the
630 ** controller data structure.
631 ** - But the driver is not broken by design for SMP and so can be
632 ** more resistant to bugs or bad changes in the IO sub-system code.
633 ** - A small advantage could be that the interrupt code is grained as
634 ** wished (e.g.: threaded by controller).
635 */
636
637 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,93)
638
639 spinlock_t sym53c8xx_lock = SPIN_LOCK_UNLOCKED;
640 #define NCR_LOCK_DRIVER(flags) spin_lock_irqsave(&sym53c8xx_lock, flags)
641 #define NCR_UNLOCK_DRIVER(flags) spin_unlock_irqrestore(&sym53c8xx_lock,flags)
642
643 #define NCR_INIT_LOCK_NCB(np) spin_lock_init(&np->smp_lock);
644 #define NCR_LOCK_NCB(np, flags) spin_lock_irqsave(&np->smp_lock, flags)
645 #define NCR_UNLOCK_NCB(np, flags) spin_unlock_irqrestore(&np->smp_lock, flags)
646
647 #define NCR_LOCK_SCSI_DONE(np, flags) \
648 spin_lock_irqsave(&io_request_lock, flags)
649 #define NCR_UNLOCK_SCSI_DONE(np, flags) \
650 spin_unlock_irqrestore(&io_request_lock, flags)
651
652 #else
653
654 #define NCR_LOCK_DRIVER(flags) do { save_flags(flags); cli(); } while (0)
655 #define NCR_UNLOCK_DRIVER(flags) do { restore_flags(flags); } while (0)
656
657 #define NCR_INIT_LOCK_NCB(np) do { } while (0)
658 #define NCR_LOCK_NCB(np, flags) do { save_flags(flags); cli(); } while (0)
659 #define NCR_UNLOCK_NCB(np, flags) do { restore_flags(flags); } while (0)
660
661 #define NCR_LOCK_SCSI_DONE(np, flags) do {;} while (0)
662 #define NCR_UNLOCK_SCSI_DONE(np, flags) do {;} while (0)
663
664 #endif
665
666 /*
667 ** Memory mapped IO
668 **
669 ** Since linux-2.1, we must use ioremap() to map the io memory space.
670 ** iounmap() to unmap it. That allows portability.
671 ** Linux 1.3.X and 2.0.X allow to remap physical pages addresses greater
672 ** than the highest physical memory address to kernel virtual pages with
673 ** vremap() / vfree(). That was not portable but worked with i386
674 ** architecture.
675 */
676
677 #if LINUX_VERSION_CODE < LinuxVersionCode(2,1,0)
678 #define ioremap vremap
679 #define iounmap vfree
680 #endif
681
682 #ifdef __sparc__
683 # include <asm/irq.h>
684 # define pcivtobus(p) bus_dvma_to_mem(p)
685 # define memcpy_to_pci(a, b, c) memcpy_toio((a), (b), (c))
686 #elif defined(__alpha__)
687 # define pcivtobus(p) ((p) & 0xfffffffful)
688 # define memcpy_to_pci(a, b, c) memcpy_toio((a), (b), (c))
689 #else /* others */
690 # define pcivtobus(p) (p)
691 # define memcpy_to_pci(a, b, c) memcpy_toio((a), (b), (c))
692 #endif
693
694 #ifndef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
695 static u_long __init remap_pci_mem(u_long base, u_long size)
696 {
697 u_long page_base = ((u_long) base) & PAGE_MASK;
698 u_long page_offs = ((u_long) base) - page_base;
699 u_long page_remapped = (u_long) ioremap(page_base, page_offs+size);
700
701 return page_remapped? (page_remapped + page_offs) : 0UL;
702 }
703
704 static void __init unmap_pci_mem(u_long vaddr, u_long size)
705 {
706 if (vaddr)
707 iounmap((void *) (vaddr & PAGE_MASK));
708 }
709
710 #endif /* not def SCSI_NCR_PCI_MEM_NOT_SUPPORTED */
711
712 /*
713 ** Insert a delay in micro-seconds and milli-seconds.
714 ** -------------------------------------------------
715 ** Under Linux, udelay() is restricted to delay < 1 milli-second.
716 ** In fact, it generally works for up to 1 second delay.
717 ** Since 2.1.105, the mdelay() function is provided for delays
718 ** in milli-seconds.
719 ** Under 2.0 kernels, udelay() is an inline function that is very
720 ** inaccurate on Pentium processors.
721 */
722
723 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,105)
724 #define UDELAY udelay
725 #define MDELAY mdelay
726 #else
727 static void UDELAY(long us) { udelay(us); }
728 static void MDELAY(long ms) { while (ms--) UDELAY(1000); }
729 #endif
730
731 /*
732 ** Simple power of two buddy-like allocator
733 ** ----------------------------------------
734 ** This simple code is not intended to be fast, but to provide
735 ** power of 2 aligned memory allocations.
736 ** Since the SCRIPTS processor only supplies 8 bit arithmetic,
737 ** this allocator allows simple and fast address calculations
738 ** from the SCRIPTS code. In addition, cache line alignment
739 ** is guaranteed for power of 2 cache line size.
740 ** Enhanced in linux-2.3.44 to provide a memory pool per pcidev
741 ** to support dynamic dma mapping. (I would have preferred a
742 ** real bus astraction, btw).
743 */
744
745 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,0)
746 #define __GetFreePages(flags, order) __get_free_pages(flags, order)
747 #else
748 #define __GetFreePages(flags, order) __get_free_pages(flags, order, 0)
749 #endif
750
751 #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */
752 #if PAGE_SIZE >= 8192
753 #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */
754 #else
755 #define MEMO_PAGE_ORDER 1 /* 2 PAGES maximum */
756 #endif
757 #define MEMO_FREE_UNUSED /* Free unused pages immediately */
758 #define MEMO_WARN 1
759 #define MEMO_GFP_FLAGS GFP_ATOMIC
760 #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER)
761 #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT)
762 #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1)
763
764 typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */
765 typedef pcidev_t m_bush_t; /* Something that addresses DMAable */
766
767 typedef struct m_link { /* Link between free memory chunks */
768 struct m_link *next;
769 } m_link_s;
770
771 #ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
772 typedef struct m_vtob { /* Virtual to Bus address translation */
773 struct m_vtob *next;
774 m_addr_t vaddr;
775 m_addr_t baddr;
776 } m_vtob_s;
777 #define VTOB_HASH_SHIFT 5
778 #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
779 #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
780 #define VTOB_HASH_CODE(m) \
781 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
782 #endif
783
784 typedef struct m_pool { /* Memory pool of a given kind */
785 #ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
786 m_bush_t bush;
787 m_addr_t (*getp)(struct m_pool *);
788 void (*freep)(struct m_pool *, m_addr_t);
789 #define M_GETP() mp->getp(mp)
790 #define M_FREEP(p) mp->freep(mp, p)
791 #define GetPages() __GetFreePages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER)
792 #define FreePages(p) free_pages(p, MEMO_PAGE_ORDER)
793 int nump;
794 m_vtob_s *(vtob[VTOB_HASH_SIZE]);
795 struct m_pool *next;
796 #else
797 #define M_GETP() __GetFreePages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER)
798 #define M_FREEP(p) free_pages(p, MEMO_PAGE_ORDER)
799 #endif /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
800 struct m_link h[PAGE_SHIFT-MEMO_SHIFT+MEMO_PAGE_ORDER+1];
801 } m_pool_s;
802
803 static void *___m_alloc(m_pool_s *mp, int size)
804 {
805 int i = 0;
806 int s = (1 << MEMO_SHIFT);
807 int j;
808 m_addr_t a;
809 m_link_s *h = mp->h;
810
811 if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
812 return 0;
813
814 while (size > s) {
815 s <<= 1;
816 ++i;
817 }
818
819 j = i;
820 while (!h[j].next) {
821 if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
822 h[j].next = (m_link_s *) M_GETP();
823 if (h[j].next)
824 h[j].next->next = 0;
825 break;
826 }
827 ++j;
828 s <<= 1;
829 }
830 a = (m_addr_t) h[j].next;
831 if (a) {
832 h[j].next = h[j].next->next;
833 while (j > i) {
834 j -= 1;
835 s >>= 1;
836 h[j].next = (m_link_s *) (a+s);
837 h[j].next->next = 0;
838 }
839 }
840 #ifdef DEBUG
841 printk("___m_alloc(%d) = %p\n", size, (void *) a);
842 #endif
843 return (void *) a;
844 }
845
846 static void ___m_free(m_pool_s *mp, void *ptr, int size)
847 {
848 int i = 0;
849 int s = (1 << MEMO_SHIFT);
850 m_link_s *q;
851 m_addr_t a, b;
852 m_link_s *h = mp->h;
853
854 #ifdef DEBUG
855 printk("___m_free(%p, %d)\n", ptr, size);
856 #endif
857
858 if (size > (PAGE_SIZE << MEMO_PAGE_ORDER))
859 return;
860
861 while (size > s) {
862 s <<= 1;
863 ++i;
864 }
865
866 a = (m_addr_t) ptr;
867
868 while (1) {
869 #ifdef MEMO_FREE_UNUSED
870 if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) {
871 M_FREEP(a);
872 break;
873 }
874 #endif
875 b = a ^ s;
876 q = &h[i];
877 while (q->next && q->next != (m_link_s *) b) {
878 q = q->next;
879 }
880 if (!q->next) {
881 ((m_link_s *) a)->next = h[i].next;
882 h[i].next = (m_link_s *) a;
883 break;
884 }
885 q->next = q->next->next;
886 a = a & b;
887 s <<= 1;
888 ++i;
889 }
890 }
891
892 static void *__m_calloc2(m_pool_s *mp, int size, char *name, int uflags)
893 {
894 void *p;
895
896 p = ___m_alloc(mp, size);
897
898 if (DEBUG_FLAGS & DEBUG_ALLOC)
899 printk ("new %-10s[%4d] @%p.\n", name, size, p);
900
901 if (p)
902 bzero(p, size);
903 else if (uflags & MEMO_WARN)
904 printk (NAME53C8XX ": failed to allocate %s[%d]\n", name, size);
905
906 return p;
907 }
908
909 #define __m_calloc(mp, s, n) __m_calloc2(mp, s, n, MEMO_WARN)
910
911 static void __m_free(m_pool_s *mp, void *ptr, int size, char *name)
912 {
913 if (DEBUG_FLAGS & DEBUG_ALLOC)
914 printk ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
915
916 ___m_free(mp, ptr, size);
917
918 }
919
920 /*
921 * With pci bus iommu support, we use a default pool of unmapped memory
922 * for memory we donnot need to DMA from/to and one pool per pcidev for
923 * memory accessed by the PCI chip. `mp0' is the default not DMAable pool.
924 */
925
926 #ifndef SCSI_NCR_DYNAMIC_DMA_MAPPING
927
928 static m_pool_s mp0;
929
930 #else
931
932 static m_addr_t ___mp0_getp(m_pool_s *mp)
933 {
934 m_addr_t m = GetPages();
935 if (m)
936 ++mp->nump;
937 return m;
938 }
939
940 static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
941 {
942 FreePages(m);
943 --mp->nump;
944 }
945
946 static m_pool_s mp0 = {0, ___mp0_getp, ___mp0_freep};
947
948 #endif /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
949
950 static void *m_calloc(int size, char *name)
951 {
952 u_long flags;
953 void *m;
954 NCR_LOCK_DRIVER(flags);
955 m = __m_calloc(&mp0, size, name);
956 NCR_UNLOCK_DRIVER(flags);
957 return m;
958 }
959
960 static void m_free(void *ptr, int size, char *name)
961 {
962 u_long flags;
963 NCR_LOCK_DRIVER(flags);
964 __m_free(&mp0, ptr, size, name);
965 NCR_UNLOCK_DRIVER(flags);
966 }
967
968 /*
969 * DMAable pools.
970 */
971
972 #ifndef SCSI_NCR_DYNAMIC_DMA_MAPPING
973
974 /* Without pci bus iommu support, all the memory is assumed DMAable */
975
976 #define __m_calloc_dma(b, s, n) m_calloc(s, n)
977 #define __m_free_dma(b, p, s, n) m_free(p, s, n)
978 #define __vtobus(b, p) virt_to_bus(p)
979
980 #else
981
982 /*
983 * With pci bus iommu support, we maintain one pool per pcidev and a
984 * hashed reverse table for virtual to bus physical address translations.
985 */
986 static m_addr_t ___dma_getp(m_pool_s *mp)
987 {
988 m_addr_t vp;
989 m_vtob_s *vbp;
990
991 vbp = __m_calloc(&mp0, sizeof(*vbp), "VTOB");
992 if (vbp) {
993 dma_addr_t daddr;
994 vp = (m_addr_t) pci_alloc_consistent(mp->bush,
995 PAGE_SIZE<<MEMO_PAGE_ORDER,
996 &daddr);
997 if (vp) {
998 int hc = VTOB_HASH_CODE(vp);
999 vbp->vaddr = vp;
1000 vbp->baddr = daddr;
1001 vbp->next = mp->vtob[hc];
1002 mp->vtob[hc] = vbp;
1003 ++mp->nump;
1004 return vp;
1005 }
1006 else
1007 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
1008 }
1009 return 0;
1010 }
1011
1012 static void ___dma_freep(m_pool_s *mp, m_addr_t m)
1013 {
1014 m_vtob_s **vbpp, *vbp;
1015 int hc = VTOB_HASH_CODE(m);
1016
1017 vbpp = &mp->vtob[hc];
1018 while (*vbpp && (*vbpp)->vaddr != m)
1019 vbpp = &(*vbpp)->next;
1020 if (*vbpp) {
1021 vbp = *vbpp;
1022 *vbpp = (*vbpp)->next;
1023 pci_free_consistent(mp->bush, PAGE_SIZE<<MEMO_PAGE_ORDER,
1024 (void *)vbp->vaddr, (dma_addr_t)vbp->baddr);
1025 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB");
1026 --mp->nump;
1027 }
1028 }
1029
1030 static inline m_pool_s *___get_dma_pool(m_bush_t bush)
1031 {
1032 m_pool_s *mp;
1033 for (mp = mp0.next; mp && mp->bush != bush; mp = mp->next);
1034 return mp;
1035 }
1036
1037 static m_pool_s *___cre_dma_pool(m_bush_t bush)
1038 {
1039 m_pool_s *mp;
1040 mp = __m_calloc(&mp0, sizeof(*mp), "MPOOL");
1041 if (mp) {
1042 bzero(mp, sizeof(*mp));
1043 mp->bush = bush;
1044 mp->getp = ___dma_getp;
1045 mp->freep = ___dma_freep;
1046 mp->next = mp0.next;
1047 mp0.next = mp;
1048 }
1049 return mp;
1050 }
1051
1052 static void ___del_dma_pool(m_pool_s *p)
1053 {
1054 struct m_pool **pp = &mp0.next;
1055
1056 while (*pp && *pp != p)
1057 pp = &(*pp)->next;
1058 if (*pp) {
1059 *pp = (*pp)->next;
1060 __m_free(&mp0, p, sizeof(*p), "MPOOL");
1061 }
1062 }
1063
1064 static void *__m_calloc_dma(m_bush_t bush, int size, char *name)
1065 {
1066 u_long flags;
1067 struct m_pool *mp;
1068 void *m = 0;
1069
1070 NCR_LOCK_DRIVER(flags);
1071 mp = ___get_dma_pool(bush);
1072 if (!mp)
1073 mp = ___cre_dma_pool(bush);
1074 if (mp)
1075 m = __m_calloc(mp, size, name);
1076 if (mp && !mp->nump)
1077 ___del_dma_pool(mp);
1078 NCR_UNLOCK_DRIVER(flags);
1079
1080 return m;
1081 }
1082
1083 static void __m_free_dma(m_bush_t bush, void *m, int size, char *name)
1084 {
1085 u_long flags;
1086 struct m_pool *mp;
1087
1088 NCR_LOCK_DRIVER(flags);
1089 mp = ___get_dma_pool(bush);
1090 if (mp)
1091 __m_free(mp, m, size, name);
1092 if (mp && !mp->nump)
1093 ___del_dma_pool(mp);
1094 NCR_UNLOCK_DRIVER(flags);
1095 }
1096
1097 static m_addr_t __vtobus(m_bush_t bush, void *m)
1098 {
1099 u_long flags;
1100 m_pool_s *mp;
1101 int hc = VTOB_HASH_CODE(m);
1102 m_vtob_s *vp = 0;
1103 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
1104
1105 NCR_LOCK_DRIVER(flags);
1106 mp = ___get_dma_pool(bush);
1107 if (mp) {
1108 vp = mp->vtob[hc];
1109 while (vp && (m_addr_t) vp->vaddr != a)
1110 vp = vp->next;
1111 }
1112 NCR_UNLOCK_DRIVER(flags);
1113 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
1114 }
1115
1116 #endif /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
1117
1118 #define _m_calloc_dma(np, s, n) __m_calloc_dma(np->pdev, s, n)
1119 #define _m_free_dma(np, p, s, n) __m_free_dma(np->pdev, p, s, n)
1120 #define m_calloc_dma(s, n) _m_calloc_dma(np, s, n)
1121 #define m_free_dma(p, s, n) _m_free_dma(np, p, s, n)
1122 #define _vtobus(np, p) __vtobus(np->pdev, p)
1123 #define vtobus(p) _vtobus(np, p)
1124
1125 /*
1126 * Deal with DMA mapping/unmapping.
1127 */
1128
1129 #ifndef SCSI_NCR_DYNAMIC_DMA_MAPPING
1130
1131 /* Linux versions prior to pci bus iommu kernel interface */
1132
1133 #define __unmap_scsi_data(pdev, cmd) do {; } while (0)
1134 #define __map_scsi_single_data(pdev, cmd) (__vtobus(pdev,(cmd)->request_buffer))
1135 #define __map_scsi_sg_data(pdev, cmd) ((cmd)->use_sg)
1136 #define __sync_scsi_data(pdev, cmd) do {; } while (0)
1137
1138 #define scsi_sg_dma_address(sc) vtobus((sc)->address)
1139 #define scsi_sg_dma_len(sc) ((sc)->length)
1140
1141 #else
1142
1143 /* Linux version with pci bus iommu kernel interface */
1144
1145 /* To keep track of the dma mapping (sg/single) that has been set */
1146 #define __data_mapped SCp.phase
1147 #define __data_mapping SCp.have_data_in
1148
1149 static void __unmap_scsi_data(pcidev_t pdev, Scsi_Cmnd *cmd)
1150 {
1151 int dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
1152
1153 switch(cmd->__data_mapped) {
1154 case 2:
1155 pci_unmap_sg(pdev, cmd->buffer, cmd->use_sg, dma_dir);
1156 break;
1157 case 1:
1158 pci_unmap_single(pdev, cmd->__data_mapping,
1159 cmd->request_bufflen, dma_dir);
1160 break;
1161 }
1162 cmd->__data_mapped = 0;
1163 }
1164
1165 static u_long __map_scsi_single_data(pcidev_t pdev, Scsi_Cmnd *cmd)
1166 {
1167 dma_addr_t mapping;
1168 int dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
1169
1170 if (cmd->request_bufflen == 0)
1171 return 0;
1172
1173 mapping = pci_map_single(pdev, cmd->request_buffer,
1174 cmd->request_bufflen, dma_dir);
1175 cmd->__data_mapped = 1;
1176 cmd->__data_mapping = mapping;
1177
1178 return mapping;
1179 }
1180
1181 static int __map_scsi_sg_data(pcidev_t pdev, Scsi_Cmnd *cmd)
1182 {
1183 int use_sg;
1184 int dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
1185
1186 if (cmd->use_sg == 0)
1187 return 0;
1188
1189 use_sg = pci_map_sg(pdev, cmd->buffer, cmd->use_sg, dma_dir);
1190 cmd->__data_mapped = 2;
1191 cmd->__data_mapping = use_sg;
1192
1193 return use_sg;
1194 }
1195
1196 static void __sync_scsi_data(pcidev_t pdev, Scsi_Cmnd *cmd)
1197 {
1198 int dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
1199
1200 switch(cmd->__data_mapped) {
1201 case 2:
1202 pci_dma_sync_sg(pdev, cmd->buffer, cmd->use_sg, dma_dir);
1203 break;
1204 case 1:
1205 pci_dma_sync_single(pdev, cmd->__data_mapping,
1206 cmd->request_bufflen, dma_dir);
1207 break;
1208 }
1209 }
1210
1211 #define scsi_sg_dma_address(sc) sg_dma_address(sc)
1212 #define scsi_sg_dma_len(sc) sg_dma_len(sc)
1213
1214 #endif /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
1215
1216 #define unmap_scsi_data(np, cmd) __unmap_scsi_data(np->pdev, cmd)
1217 #define map_scsi_single_data(np, cmd) __map_scsi_single_data(np->pdev, cmd)
1218 #define map_scsi_sg_data(np, cmd) __map_scsi_sg_data(np->pdev, cmd)
1219 #define sync_scsi_data(np, cmd) __sync_scsi_data(np->pdev, cmd)
1220
1221
1222 /*
1223 * Print out some buffer.
1224 */
1225 static void ncr_print_hex(u_char *p, int n)
1226 {
1227 while (n-- > 0)
1228 printk (" %x", *p++);
1229 }
1230
1231 static void ncr_printl_hex(char *label, u_char *p, int n)
1232 {
1233 printk("%s", label);
1234 ncr_print_hex(p, n);
1235 printk (".\n");
1236 }
1237
1238 /*
1239 ** Transfer direction
1240 **
1241 ** Until some linux kernel version near 2.3.40, low-level scsi
1242 ** drivers were not told about data transfer direction.
1243 ** We check the existence of this feature that has been expected
1244 ** for a _long_ time by all SCSI driver developers by just
1245 ** testing against the definition of SCSI_DATA_UNKNOWN. Indeed
1246 ** this is a hack, but testing against a kernel version would
1247 ** have been a shame. ;-)
1248 */
1249 #ifdef SCSI_DATA_UNKNOWN
1250
1251 #define scsi_data_direction(cmd) (cmd->sc_data_direction)
1252
1253 #else
1254
1255 #define SCSI_DATA_UNKNOWN 0
1256 #define SCSI_DATA_WRITE 1
1257 #define SCSI_DATA_READ 2
1258 #define SCSI_DATA_NONE 3
1259
1260 static __inline__ int scsi_data_direction(Scsi_Cmnd *cmd)
1261 {
1262 int direction;
1263
1264 switch((int) cmd->cmnd[0]) {
1265 case 0x08: /* READ(6) 08 */
1266 case 0x28: /* READ(10) 28 */
1267 case 0xA8: /* READ(12) A8 */
1268 direction = SCSI_DATA_READ;
1269 break;
1270 case 0x0A: /* WRITE(6) 0A */
1271 case 0x2A: /* WRITE(10) 2A */
1272 case 0xAA: /* WRITE(12) AA */
1273 direction = SCSI_DATA_WRITE;
1274 break;
1275 default:
1276 direction = SCSI_DATA_UNKNOWN;
1277 break;
1278 }
1279
1280 return direction;
1281 }
1282
1283 #endif /* SCSI_DATA_UNKNOWN */
1284
1285 /*
1286 ** Head of list of NCR boards
1287 **
1288 ** For kernel version < 1.3.70, host is retrieved by its irq level.
1289 ** For later kernels, the internal host control block address
1290 ** (struct ncb) is used as device id parameter of the irq stuff.
1291 */
1292
1293 static struct Scsi_Host *first_host = NULL;
1294
1295
1296 /*
1297 ** /proc directory entry and proc_info function
1298 */
1299 #if LINUX_VERSION_CODE < LinuxVersionCode(2,3,27)
1300 static struct proc_dir_entry proc_scsi_sym53c8xx = {
1301 PROC_SCSI_SYM53C8XX, 9, NAME53C8XX,
1302 S_IFDIR | S_IRUGO | S_IXUGO, 2
1303 };
1304 #endif
1305 #ifdef SCSI_NCR_PROC_INFO_SUPPORT
1306 static int sym53c8xx_proc_info(char *buffer, char **start, off_t offset,
1307 int length, int hostno, int func);
1308 #endif
1309
1310 /*
1311 ** Driver setup.
1312 **
1313 ** This structure is initialized from linux config options.
1314 ** It can be overridden at boot-up by the boot command line.
1315 */
1316 static struct ncr_driver_setup
1317 driver_setup = SCSI_NCR_DRIVER_SETUP;
1318
1319 #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
1320 static struct ncr_driver_setup
1321 driver_safe_setup __initdata = SCSI_NCR_DRIVER_SAFE_SETUP;
1322 # ifdef MODULE
1323 char *sym53c8xx = 0; /* command line passed by insmod */
1324 # if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,30)
1325 MODULE_PARM(sym53c8xx, "s");
1326 # endif
1327 # endif
1328 #endif
1329
1330 /*
1331 ** Other Linux definitions
1332 */
1333 #define SetScsiResult(cmd, h_sts, s_sts) \
1334 cmd->result = (((h_sts) << 16) + ((s_sts) & 0x7f))
1335
1336 /* We may have to remind our amnesiac SCSI layer of the reason of the abort */
1337 #if 0
1338 #define SetScsiAbortResult(cmd) \
1339 SetScsiResult( \
1340 cmd, \
1341 (cmd)->abort_reason == DID_TIME_OUT ? DID_TIME_OUT : DID_ABORT, \
1342 0xff)
1343 #else
1344 #define SetScsiAbortResult(cmd) SetScsiResult(cmd, DID_ABORT, 0xff)
1345 #endif
1346
1347 static void sym53c8xx_select_queue_depths(
1348 struct Scsi_Host *host, struct scsi_device *devlist);
1349 static void sym53c8xx_intr(int irq, void *dev_id, struct pt_regs * regs);
1350 static void sym53c8xx_timeout(unsigned long np);
1351
1352 #define initverbose (driver_setup.verbose)
1353 #define bootverbose (np->verbose)
1354
1355 #ifdef SCSI_NCR_NVRAM_SUPPORT
1356 static u_char Tekram_sync[16] __initdata =
1357 {25,31,37,43, 50,62,75,125, 12,15,18,21, 6,7,9,10};
1358 #endif /* SCSI_NCR_NVRAM_SUPPORT */
1359
1360 /*
1361 ** Structures used by sym53c8xx_detect/sym53c8xx_pci_init to
1362 ** transmit device configuration to the ncr_attach() function.
1363 */
1364 typedef struct {
1365 int bus;
1366 u_char device_fn;
1367 u_long base;
1368 u_long base_2;
1369 u_long io_port;
1370 int irq;
1371 /* port and reg fields to use INB, OUTB macros */
1372 u_long base_io;
1373 volatile struct ncr_reg *reg;
1374 } ncr_slot;
1375
1376 typedef struct {
1377 int type;
1378 #define SCSI_NCR_SYMBIOS_NVRAM (1)
1379 #define SCSI_NCR_TEKRAM_NVRAM (2)
1380 #ifdef SCSI_NCR_NVRAM_SUPPORT
1381 union {
1382 Symbios_nvram Symbios;
1383 Tekram_nvram Tekram;
1384 } data;
1385 #endif
1386 } ncr_nvram;
1387
1388 /*
1389 ** Structure used by sym53c8xx_detect/sym53c8xx_pci_init
1390 ** to save data on each detected board for ncr_attach().
1391 */
1392 typedef struct {
1393 pcidev_t pdev;
1394 ncr_slot slot;
1395 ncr_chip chip;
1396 ncr_nvram *nvram;
1397 u_char host_id;
1398 #ifdef SCSI_NCR_PQS_PDS_SUPPORT
1399 u_char pqs_pds;
1400 #endif
1401 int attach_done;
1402 } ncr_device;
1403
1404 /*==========================================================
1405 **
1406 ** assert ()
1407 **
1408 **==========================================================
1409 **
1410 ** modified copy from 386bsd:/usr/include/sys/assert.h
1411 **
1412 **----------------------------------------------------------
1413 */
1414
1415 #define assert(expression) { \
1416 if (!(expression)) { \
1417 (void)panic( \
1418 "assertion \"%s\" failed: file \"%s\", line %d\n", \
1419 #expression, \
1420 __FILE__, __LINE__); \
1421 } \
1422 }
1423
1424 /*==========================================================
1425 **
1426 ** Big/Little endian support.
1427 **
1428 **==========================================================
1429 */
1430
1431 /*
1432 ** If the NCR uses big endian addressing mode over the
1433 ** PCI, actual io register addresses for byte and word
1434 ** accesses must be changed according to lane routing.
1435 ** Btw, ncr_offb() and ncr_offw() macros only apply to
1436 ** constants and so donnot generate bloated code.
1437 */
1438
1439 #if defined(SCSI_NCR_BIG_ENDIAN)
1440
1441 #define ncr_offb(o) (((o)&~3)+((~((o)&3))&3))
1442 #define ncr_offw(o) (((o)&~3)+((~((o)&3))&2))
1443
1444 #else
1445
1446 #define ncr_offb(o) (o)
1447 #define ncr_offw(o) (o)
1448
1449 #endif
1450
1451 /*
1452 ** If the CPU and the NCR use same endian-ness adressing,
1453 ** no byte reordering is needed for script patching.
1454 ** Macro cpu_to_scr() is to be used for script patching.
1455 ** Macro scr_to_cpu() is to be used for getting a DWORD
1456 ** from the script.
1457 */
1458
1459 #if defined(__BIG_ENDIAN) && !defined(SCSI_NCR_BIG_ENDIAN)
1460
1461 #define cpu_to_scr(dw) cpu_to_le32(dw)
1462 #define scr_to_cpu(dw) le32_to_cpu(dw)
1463
1464 #elif defined(__LITTLE_ENDIAN) && defined(SCSI_NCR_BIG_ENDIAN)
1465
1466 #define cpu_to_scr(dw) cpu_to_be32(dw)
1467 #define scr_to_cpu(dw) be32_to_cpu(dw)
1468
1469 #else
1470
1471 #define cpu_to_scr(dw) (dw)
1472 #define scr_to_cpu(dw) (dw)
1473
1474 #endif
1475
1476 /*==========================================================
1477 **
1478 ** Access to the controller chip.
1479 **
1480 ** If NCR_IOMAPPED is defined, the driver will use
1481 ** normal IOs instead of the MEMORY MAPPED IO method
1482 ** recommended by PCI specifications.
1483 ** If all PCI bridges, host brigdes and architectures
1484 ** would have been correctly designed for PCI, this
1485 ** option would be useless.
1486 **
1487 **==========================================================
1488 */
1489
1490 /*
1491 ** If the CPU and the NCR use same endian-ness adressing,
1492 ** no byte reordering is needed for accessing chip io
1493 ** registers. Functions suffixed by '_raw' are assumed
1494 ** to access the chip over the PCI without doing byte
1495 ** reordering. Functions suffixed by '_l2b' are
1496 ** assumed to perform little-endian to big-endian byte
1497 ** reordering, those suffixed by '_b2l' blah, blah,
1498 ** blah, ...
1499 */
1500
1501 #if defined(NCR_IOMAPPED)
1502
1503 /*
1504 ** IO mapped only input / ouput
1505 */
1506
1507 #define INB_OFF(o) inb (np->base_io + ncr_offb(o))
1508 #define OUTB_OFF(o, val) outb ((val), np->base_io + ncr_offb(o))
1509
1510 #if defined(__BIG_ENDIAN) && !defined(SCSI_NCR_BIG_ENDIAN)
1511
1512 #define INW_OFF(o) inw_l2b (np->base_io + ncr_offw(o))
1513 #define INL_OFF(o) inl_l2b (np->base_io + (o))
1514
1515 #define OUTW_OFF(o, val) outw_b2l ((val), np->base_io + ncr_offw(o))
1516 #define OUTL_OFF(o, val) outl_b2l ((val), np->base_io + (o))
1517
1518 #elif defined(__LITTLE_ENDIAN) && defined(SCSI_NCR_BIG_ENDIAN)
1519
1520 #define INW_OFF(o) inw_b2l (np->base_io + ncr_offw(o))
1521 #define INL_OFF(o) inl_b2l (np->base_io + (o))
1522
1523 #define OUTW_OFF(o, val) outw_l2b ((val), np->base_io + ncr_offw(o))
1524 #define OUTL_OFF(o, val) outl_l2b ((val), np->base_io + (o))
1525
1526 #else
1527
1528 #define INW_OFF(o) inw_raw (np->base_io + ncr_offw(o))
1529 #define INL_OFF(o) inl_raw (np->base_io + (o))
1530
1531 #define OUTW_OFF(o, val) outw_raw ((val), np->base_io + ncr_offw(o))
1532 #define OUTL_OFF(o, val) outl_raw ((val), np->base_io + (o))
1533
1534 #endif /* ENDIANs */
1535
1536 #else /* defined NCR_IOMAPPED */
1537
1538 /*
1539 ** MEMORY mapped IO input / output
1540 */
1541
1542 #define INB_OFF(o) readb((char *)np->reg + ncr_offb(o))
1543 #define OUTB_OFF(o, val) writeb((val), (char *)np->reg + ncr_offb(o))
1544
1545 #if defined(__BIG_ENDIAN) && !defined(SCSI_NCR_BIG_ENDIAN)
1546
1547 #define INW_OFF(o) readw_l2b((char *)np->reg + ncr_offw(o))
1548 #define INL_OFF(o) readl_l2b((char *)np->reg + (o))
1549
1550 #define OUTW_OFF(o, val) writew_b2l((val), (char *)np->reg + ncr_offw(o))
1551 #define OUTL_OFF(o, val) writel_b2l((val), (char *)np->reg + (o))
1552
1553 #elif defined(__LITTLE_ENDIAN) && defined(SCSI_NCR_BIG_ENDIAN)
1554
1555 #define INW_OFF(o) readw_b2l((char *)np->reg + ncr_offw(o))
1556 #define INL_OFF(o) readl_b2l((char *)np->reg + (o))
1557
1558 #define OUTW_OFF(o, val) writew_l2b((val), (char *)np->reg + ncr_offw(o))
1559 #define OUTL_OFF(o, val) writel_l2b((val), (char *)np->reg + (o))
1560
1561 #else
1562
1563 #define INW_OFF(o) readw_raw((char *)np->reg + ncr_offw(o))
1564 #define INL_OFF(o) readl_raw((char *)np->reg + (o))
1565
1566 #define OUTW_OFF(o, val) writew_raw((val), (char *)np->reg + ncr_offw(o))
1567 #define OUTL_OFF(o, val) writel_raw((val), (char *)np->reg + (o))
1568
1569 #endif
1570
1571 #endif /* defined NCR_IOMAPPED */
1572
1573 #define INB(r) INB_OFF (offsetof(struct ncr_reg,r))
1574 #define INW(r) INW_OFF (offsetof(struct ncr_reg,r))
1575 #define INL(r) INL_OFF (offsetof(struct ncr_reg,r))
1576
1577 #define OUTB(r, val) OUTB_OFF (offsetof(struct ncr_reg,r), (val))
1578 #define OUTW(r, val) OUTW_OFF (offsetof(struct ncr_reg,r), (val))
1579 #define OUTL(r, val) OUTL_OFF (offsetof(struct ncr_reg,r), (val))
1580
1581 /*
1582 ** Set bit field ON, OFF
1583 */
1584
1585 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
1586 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
1587 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
1588 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
1589 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
1590 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
1591
1592
1593 /*==========================================================
1594 **
1595 ** Command control block states.
1596 **
1597 **==========================================================
1598 */
1599
1600 #define HS_IDLE (0)
1601 #define HS_BUSY (1)
1602 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
1603 #define HS_DISCONNECT (3) /* Disconnected by target */
1604
1605 #define HS_DONEMASK (0x80)
1606 #define HS_COMPLETE (4|HS_DONEMASK)
1607 #define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */
1608 #define HS_RESET (6|HS_DONEMASK) /* SCSI reset */
1609 #define HS_ABORTED (7|HS_DONEMASK) /* Transfer aborted */
1610 #define HS_TIMEOUT (8|HS_DONEMASK) /* Software timeout */
1611 #define HS_FAIL (9|HS_DONEMASK) /* SCSI or PCI bus errors */
1612 #define HS_UNEXPECTED (10|HS_DONEMASK)/* Unexpected disconnect */
1613
1614 #define DSA_INVALID 0xffffffff
1615
1616 /*==========================================================
1617 **
1618 ** Software Interrupt Codes
1619 **
1620 **==========================================================
1621 */
1622
1623 #define SIR_BAD_STATUS (1)
1624 #define SIR_SEL_ATN_NO_MSG_OUT (2)
1625 #define SIR_MSG_RECEIVED (3)
1626 #define SIR_MSG_WEIRD (4)
1627 #define SIR_NEGO_FAILED (5)
1628 #define SIR_NEGO_PROTO (6)
1629 #define SIR_SCRIPT_STOPPED (7)
1630 #define SIR_REJECT_TO_SEND (8)
1631 #define SIR_SWIDE_OVERRUN (9)
1632 #define SIR_SODL_UNDERRUN (10)
1633 #define SIR_RESEL_NO_MSG_IN (11)
1634 #define SIR_RESEL_NO_IDENTIFY (12)
1635 #define SIR_RESEL_BAD_LUN (13)
1636 #define SIR_TARGET_SELECTED (14)
1637 #define SIR_RESEL_BAD_I_T_L (15)
1638 #define SIR_RESEL_BAD_I_T_L_Q (16)
1639 #define SIR_ABORT_SENT (17)
1640 #define SIR_RESEL_ABORTED (18)
1641 #define SIR_MSG_OUT_DONE (19)
1642 #define SIR_AUTO_SENSE_DONE (20)
1643 #define SIR_DUMMY_INTERRUPT (21)
1644 #define SIR_MAX (21)
1645
1646 /*==========================================================
1647 **
1648 ** Extended error bits.
1649 ** xerr_status field of struct ccb.
1650 **
1651 **==========================================================
1652 */
1653
1654 #define XE_EXTRA_DATA (1) /* unexpected data phase */
1655 #define XE_BAD_PHASE (2) /* illegal phase (4/5) */
1656 #define XE_PARITY_ERR (4) /* unrecovered SCSI parity error */
1657
1658 /*==========================================================
1659 **
1660 ** Negotiation status.
1661 ** nego_status field of struct ccb.
1662 **
1663 **==========================================================
1664 */
1665
1666 #define NS_SYNC (1)
1667 #define NS_WIDE (2)
1668
1669 /*==========================================================
1670 **
1671 ** "Special features" of targets.
1672 ** quirks field of struct tcb.
1673 ** actualquirks field of struct ccb.
1674 **
1675 **==========================================================
1676 */
1677
1678 #define QUIRK_AUTOSAVE (0x01)
1679
1680 /*==========================================================
1681 **
1682 ** Capability bits in Inquire response byte 7.
1683 **
1684 **==========================================================
1685 */
1686
1687 #define INQ7_QUEUE (0x02)
1688 #define INQ7_SYNC (0x10)
1689 #define INQ7_WIDE16 (0x20)
1690
1691 /*==========================================================
1692 **
1693 ** A CCB hashed table is used to retrieve CCB address
1694 ** from DSA value.
1695 **
1696 **==========================================================
1697 */
1698
1699 #define CCB_HASH_SHIFT 8
1700 #define CCB_HASH_SIZE (1UL << CCB_HASH_SHIFT)
1701 #define CCB_HASH_MASK (CCB_HASH_SIZE-1)
1702 #define CCB_HASH_CODE(dsa) (((dsa) >> 11) & CCB_HASH_MASK)
1703
1704 /*==========================================================
1705 **
1706 ** Declaration of structs.
1707 **
1708 **==========================================================
1709 */
1710
1711 struct tcb;
1712 struct lcb;
1713 struct ccb;
1714 struct ncb;
1715 struct script;
1716
1717 typedef struct ncb * ncb_p;
1718 typedef struct tcb * tcb_p;
1719 typedef struct lcb * lcb_p;
1720 typedef struct ccb * ccb_p;
1721
1722 struct link {
1723 ncrcmd l_cmd;
1724 ncrcmd l_paddr;
1725 };
1726
1727 struct usrcmd {
1728 u_long target;
1729 u_long lun;
1730 u_long data;
1731 u_long cmd;
1732 };
1733
1734 #define UC_SETSYNC 10
1735 #define UC_SETTAGS 11
1736 #define UC_SETDEBUG 12
1737 #define UC_SETORDER 13
1738 #define UC_SETWIDE 14
1739 #define UC_SETFLAG 15
1740 #define UC_CLEARPROF 16
1741 #define UC_SETVERBOSE 17
1742 #define UC_RESETDEV 18
1743 #define UC_CLEARDEV 19
1744
1745 #define UF_TRACE (0x01)
1746 #define UF_NODISC (0x02)
1747 #define UF_NOSCAN (0x04)
1748
1749 #ifdef SCSI_NCR_PROFILE_SUPPORT
1750 /*
1751 ** profiling data (per host)
1752 */
1753
1754 struct profile {
1755 u_long num_trans;
1756 u_long num_disc;
1757 u_long num_disc0;
1758 u_long num_break;
1759 u_long num_int;
1760 u_long num_fly;
1761 u_long num_kbytes;
1762 #if 000
1763 u_long num_br1k;
1764 u_long num_br2k;
1765 u_long num_br4k;
1766 u_long num_br8k;
1767 u_long num_brnk;
1768 #endif
1769 };
1770 #endif
1771
1772 /*========================================================================
1773 **
1774 ** Declaration of structs: target control block
1775 **
1776 **========================================================================
1777 */
1778 struct tcb {
1779 /*----------------------------------------------------------------
1780 ** LUN tables.
1781 ** An array of bus addresses is used on reselection by
1782 ** the SCRIPT.
1783 **----------------------------------------------------------------
1784 */
1785 u_int32 *luntbl; /* lcbs bus address table */
1786 u_int32 b_luntbl; /* bus address of this table */
1787 u_int32 b_lun0; /* bus address of lun0 */
1788 lcb_p l0p; /* lcb of LUN #0 (normal case) */
1789 #if MAX_LUN > 1
1790 lcb_p *lmp; /* Other lcb's [1..MAX_LUN] */
1791 #endif
1792 /*----------------------------------------------------------------
1793 ** Target capabilities.
1794 **----------------------------------------------------------------
1795 */
1796 u_char inq_done; /* Target capabilities received */
1797 u_char inq_byte7; /* Contains these capabilities */
1798
1799 /*----------------------------------------------------------------
1800 ** Some flags.
1801 **----------------------------------------------------------------
1802 */
1803 u_char to_reset; /* This target is to be reset */
1804
1805 /*----------------------------------------------------------------
1806 ** Pointer to the ccb used for negotiation.
1807 ** Prevent from starting a negotiation for all queued commands
1808 ** when tagged command queuing is enabled.
1809 **----------------------------------------------------------------
1810 */
1811 ccb_p nego_cp;
1812
1813 /*----------------------------------------------------------------
1814 ** statistical data
1815 **----------------------------------------------------------------
1816 */
1817 u_long transfers;
1818 u_long bytes;
1819
1820 /*----------------------------------------------------------------
1821 ** negotiation of wide and synch transfer and device quirks.
1822 ** sval and wval are read from SCRIPTS and so have alignment
1823 ** constraints.
1824 **----------------------------------------------------------------
1825 */
1826 /*0*/ u_char minsync;
1827 /*1*/ u_char sval;
1828 /*2*/ u_short period;
1829 /*0*/ u_char maxoffs;
1830 /*1*/ u_char quirks;
1831 /*2*/ u_char widedone;
1832 /*3*/ u_char wval;
1833
1834 /*----------------------------------------------------------------
1835 ** User settable limits and options.
1836 ** These limits are read from the NVRAM if present.
1837 **----------------------------------------------------------------
1838 */
1839 u_char usrsync;
1840 u_char usrwide;
1841 u_char usrflag;
1842 u_short usrtags;
1843 };
1844
1845 /*========================================================================
1846 **
1847 ** Declaration of structs: lun control block
1848 **
1849 **========================================================================
1850 */
1851 struct lcb {
1852 /*----------------------------------------------------------------
1853 ** On reselection, SCRIPTS use this value as a JUMP address
1854 ** after the IDENTIFY has been successfully received.
1855 ** This field is set to 'resel_tag' if TCQ is enabled and
1856 ** to 'resel_notag' if TCQ is disabled.
1857 ** (Must be at zero due to bad lun handling on reselection)
1858 **----------------------------------------------------------------
1859 */
1860 /*0*/ u_int32 resel_task;
1861
1862 /*----------------------------------------------------------------
1863 ** Task table used by the script processor to retrieve the
1864 ** task corresponding to a reselected nexus. The TAG is used
1865 ** as offset to determine the corresponding entry.
1866 ** Each entry contains the associated CCB bus address.
1867 **----------------------------------------------------------------
1868 */
1869 u_int32 tasktbl_0; /* Used if TCQ not enabled */
1870 u_int32 *tasktbl;
1871 u_int32 b_tasktbl;
1872
1873 /*----------------------------------------------------------------
1874 ** CCB queue management.
1875 **----------------------------------------------------------------
1876 */
1877 XPT_QUEHEAD busy_ccbq; /* Queue of busy CCBs */
1878 XPT_QUEHEAD wait_ccbq; /* Queue of waiting for IO CCBs */
1879 u_short busyccbs; /* CCBs busy for this lun */
1880 u_short queuedccbs; /* CCBs queued to the controller*/
1881 u_short queuedepth; /* Queue depth for this lun */
1882 u_short scdev_depth; /* SCSI device queue depth */
1883 u_short maxnxs; /* Max possible nexuses */
1884
1885 /*----------------------------------------------------------------
1886 ** Control of tagged command queuing.
1887 ** Tags allocation is performed using a circular buffer.
1888 ** This avoids using a loop for tag allocation.
1889 **----------------------------------------------------------------
1890 */
1891 u_short ia_tag; /* Tag allocation index */
1892 u_short if_tag; /* Tag release index */
1893 u_char *cb_tags; /* Circular tags buffer */
1894 u_char inq_byte7; /* Store unit CmdQ capability */
1895 u_char usetags; /* Command queuing is active */
1896 u_char to_clear; /* User wants to clear all tasks*/
1897 u_short maxtags; /* Max NR of tags asked by user */
1898 u_short numtags; /* Current number of tags */
1899
1900 /*----------------------------------------------------------------
1901 ** QUEUE FULL and ORDERED tag control.
1902 **----------------------------------------------------------------
1903 */
1904 u_short num_good; /* Nr of GOOD since QUEUE FULL */
1905 u_short tags_sum[2]; /* Tags sum counters */
1906 u_char tags_si; /* Current index to tags sum */
1907 u_long tags_stime; /* Last time we switch tags_sum */
1908 };
1909
1910 /*========================================================================
1911 **
1912 ** Declaration of structs: actions for a task.
1913 **
1914 **========================================================================
1915 **
1916 ** It is part of the CCB and is called by the scripts processor to
1917 ** start or restart the data structure (nexus).
1918 **
1919 **------------------------------------------------------------------------
1920 */
1921 struct action {
1922 u_int32 start;
1923 u_int32 restart;
1924 };
1925
1926 /*========================================================================
1927 **
1928 ** Declaration of structs: Phase mismatch context.
1929 **
1930 **========================================================================
1931 **
1932 ** It is part of the CCB and is used as parameters for the DATA
1933 ** pointer. We need two contexts to handle correctly the SAVED
1934 ** DATA POINTER.
1935 **
1936 **------------------------------------------------------------------------
1937 */
1938 struct pm_ctx {
1939 struct scr_tblmove sg; /* Updated interrupted SG block */
1940 u_int32 ret; /* SCRIPT return address */
1941 };
1942
1943 /*========================================================================
1944 **
1945 ** Declaration of structs: global HEADER.
1946 **
1947 **========================================================================
1948 **
1949 ** In earlier driver versions, this substructure was copied from the
1950 ** ccb to a global address after selection (or reselection) and copied
1951 ** back before disconnect. Since we are now using LOAD/STORE DSA
1952 ** RELATIVE instructions, the script is able to access directly these
1953 ** fields, and so, this header is no more copied.
1954 **
1955 **------------------------------------------------------------------------
1956 */
1957
1958 struct head {
1959 /*----------------------------------------------------------------
1960 ** Start and restart SCRIPTS addresses (must be at 0).
1961 **----------------------------------------------------------------
1962 */
1963 struct action go;
1964
1965 /*----------------------------------------------------------------
1966 ** Saved data pointer.
1967 ** Points to the position in the script responsible for the
1968 ** actual transfer of data.
1969 ** It's written after reception of a SAVE_DATA_POINTER message.
1970 ** The goalpointer points after the last transfer command.
1971 **----------------------------------------------------------------
1972 */
1973 u_int32 savep;
1974 u_int32 lastp;
1975 u_int32 goalp;
1976
1977 /*----------------------------------------------------------------
1978 ** Alternate data pointer.
1979 ** They are copied back to savep/lastp/goalp by the SCRIPTS
1980 ** when the direction is unknown and the device claims data out.
1981 **----------------------------------------------------------------
1982 */
1983 u_int32 wlastp;
1984 u_int32 wgoalp;
1985
1986 /*----------------------------------------------------------------
1987 ** Status fields.
1988 **----------------------------------------------------------------
1989 */
1990 u_char scr_st[4]; /* script status */
1991 u_char status[4]; /* host status */
1992 };
1993
1994 /*
1995 ** LUN control block lookup.
1996 ** We use a direct pointer for LUN #0, and a table of pointers
1997 ** which is only allocated for devices that support LUN(s) > 0.
1998 */
1999 #if MAX_LUN <= 1
2000 #define ncr_lp(np, tp, lun) (!lun) ? (tp)->l0p : 0
2001 #else
2002 #define ncr_lp(np, tp, lun) \
2003 (!lun) ? (tp)->l0p : (tp)->lmp ? (tp)->lmp[(lun)] : 0
2004 #endif
2005
2006 /*
2007 ** The status bytes are used by the host and the script processor.
2008 **
2009 ** The last four bytes (status[4]) are copied to the scratchb register
2010 ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect,
2011 ** and copied back just after disconnecting.
2012 ** Inside the script the XX_REG are used.
2013 **
2014 ** The first four bytes (scr_st[4]) are used inside the script by
2015 ** "LOAD/STORE" commands.
2016 ** Because source and destination must have the same alignment
2017 ** in a DWORD, the fields HAVE to be at the choosen offsets.
2018 ** xerr_st 0 (0x34) scratcha
2019 ** sync_st 1 (0x05) sxfer
2020 ** wide_st 3 (0x03) scntl3
2021 */
2022
2023 /*
2024 ** Last four bytes (script)
2025 */
2026 #define QU_REG scr0
2027 #define HS_REG scr1
2028 #define HS_PRT nc_scr1
2029 #define SS_REG scr2
2030 #define SS_PRT nc_scr2
2031 #define HF_REG scr3
2032 #define HF_PRT nc_scr3
2033
2034 /*
2035 ** Last four bytes (host)
2036 */
2037 #define actualquirks phys.header.status[0]
2038 #define host_status phys.header.status[1]
2039 #define scsi_status phys.header.status[2]
2040 #define host_flags phys.header.status[3]
2041
2042 /*
2043 ** Host flags
2044 */
2045 #define HF_IN_PM0 1u
2046 #define HF_IN_PM1 (1u<<1)
2047 #define HF_ACT_PM (1u<<2)
2048 #define HF_DP_SAVED (1u<<3)
2049 #define HF_AUTO_SENSE (1u<<4)
2050 #define HF_DATA_IN (1u<<5)
2051 #define HF_PM_TO_C (1u<<6)
2052
2053 #ifdef SCSI_NCR_IARB_SUPPORT
2054 #define HF_HINT_IARB (1u<<7)
2055 #endif
2056
2057 /*
2058 ** This one is stolen from QU_REG.:)
2059 */
2060 #define HF_DATA_ST (1u<<7)
2061
2062 /*
2063 ** First four bytes (script)
2064 */
2065 #define xerr_st header.scr_st[0]
2066 #define sync_st header.scr_st[1]
2067 #define nego_st header.scr_st[2]
2068 #define wide_st header.scr_st[3]
2069
2070 /*
2071 ** First four bytes (host)
2072 */
2073 #define xerr_status phys.xerr_st
2074 #define nego_status phys.nego_st
2075
2076 /*==========================================================
2077 **
2078 ** Declaration of structs: Data structure block
2079 **
2080 **==========================================================
2081 **
2082 ** During execution of a ccb by the script processor,
2083 ** the DSA (data structure address) register points
2084 ** to this substructure of the ccb.
2085 ** This substructure contains the header with
2086 ** the script-processor-changable data and
2087 ** data blocks for the indirect move commands.
2088 **
2089 **----------------------------------------------------------
2090 */
2091
2092 struct dsb {
2093
2094 /*
2095 ** Header.
2096 */
2097
2098 struct head header;
2099
2100 /*
2101 ** Table data for Script
2102 */
2103
2104 struct scr_tblsel select;
2105 struct scr_tblmove smsg ;
2106 struct scr_tblmove smsg_ext ;
2107 struct scr_tblmove cmd ;
2108 struct scr_tblmove sense ;
2109 struct scr_tblmove data [MAX_SCATTER];
2110
2111 /*
2112 ** Phase mismatch contexts.
2113 ** We need two to handle correctly the
2114 ** SAVED DATA POINTER.
2115 */
2116
2117 struct pm_ctx pm0;
2118 struct pm_ctx pm1;
2119
2120 /*
2121 ** Extra bytes count transferred
2122 ** in case of data overrun.
2123 */
2124 u_int32 extra_bytes;
2125
2126 #ifdef SCSI_NCR_PROFILE_SUPPORT
2127 /*
2128 ** Disconnection counter
2129 */
2130 u_int32 num_disc;
2131 #endif
2132 };
2133
2134
2135 /*========================================================================
2136 **
2137 ** Declaration of structs: Command control block.
2138 **
2139 **========================================================================
2140 */
2141 struct ccb {
2142 /*----------------------------------------------------------------
2143 ** This is the data structure which is pointed by the DSA
2144 ** register when it is executed by the script processor.
2145 ** It must be the first entry.
2146 **----------------------------------------------------------------
2147 */
2148 struct dsb phys;
2149
2150 /*----------------------------------------------------------------
2151 ** The general SCSI driver provides a
2152 ** pointer to a control block.
2153 **----------------------------------------------------------------
2154 */
2155 Scsi_Cmnd *cmd; /* SCSI command */
2156 u_char cdb_buf[16]; /* Copy of CDB */
2157 u_char sense_buf[64];
2158 int data_len; /* Total data length */
2159 int segments; /* Number of SG segments */
2160
2161 /*----------------------------------------------------------------
2162 ** Message areas.
2163 ** We prepare a message to be sent after selection.
2164 ** We may use a second one if the command is rescheduled
2165 ** due to CHECK_CONDITION or QUEUE FULL status.
2166 ** Contents are IDENTIFY and SIMPLE_TAG.
2167 ** While negotiating sync or wide transfer,
2168 ** a SDTR or WDTR message is appended.
2169 **----------------------------------------------------------------
2170 */
2171 u_char scsi_smsg [8];
2172 u_char scsi_smsg2[8];
2173
2174 /*----------------------------------------------------------------
2175 ** Saved info for auto-sense
2176 **----------------------------------------------------------------
2177 */
2178 u_char sv_scsi_status;
2179 u_char sv_xerr_status;
2180
2181 /*----------------------------------------------------------------
2182 ** Other fields.
2183 **----------------------------------------------------------------
2184 */
2185 u_long p_ccb; /* BUS address of this CCB */
2186 u_char sensecmd[6]; /* Sense command */
2187 u_char to_abort; /* This CCB is to be aborted */
2188 u_short tag; /* Tag for this transfer */
2189 /* NO_TAG means no tag */
2190 u_char tags_si; /* Lun tags sum index (0,1) */
2191
2192 u_char target;
2193 u_char lun;
2194 u_short queued;
2195 ccb_p link_ccb; /* Host adapter CCB chain */
2196 ccb_p link_ccbh; /* Host adapter CCB hash chain */
2197 XPT_QUEHEAD link_ccbq; /* Link to unit CCB queue */
2198 u_int32 startp; /* Initial data pointer */
2199 u_int32 lastp0; /* Initial 'lastp' */
2200 int ext_sg; /* Extreme data pointer, used */
2201 int ext_ofs; /* to calculate the residual. */
2202 int resid;
2203 };
2204
2205 #define CCB_PHYS(cp,lbl) (cp->p_ccb + offsetof(struct ccb, lbl))
2206
2207
2208 /*========================================================================
2209 **
2210 ** Declaration of structs: NCR device descriptor
2211 **
2212 **========================================================================
2213 */
2214 struct ncb {
2215 /*----------------------------------------------------------------
2216 ** Idle task and invalid task actions and their bus
2217 ** addresses.
2218 **----------------------------------------------------------------
2219 */
2220 struct action idletask;
2221 struct action notask;
2222 struct action bad_i_t_l;
2223 struct action bad_i_t_l_q;
2224 u_long p_idletask;
2225 u_long p_notask;
2226 u_long p_bad_i_t_l;
2227 u_long p_bad_i_t_l_q;
2228
2229 /*----------------------------------------------------------------
2230 ** Dummy lun table to protect us against target returning bad
2231 ** lun number on reselection.
2232 **----------------------------------------------------------------
2233 */
2234 u_int32 *badluntbl; /* Table physical address */
2235 u_int32 resel_badlun; /* SCRIPT handler BUS address */
2236
2237 /*----------------------------------------------------------------
2238 ** Bit 32-63 of the on-chip RAM bus address in LE format.
2239 ** The START_RAM64 script loads the MMRS and MMWS from this
2240 ** field.
2241 **----------------------------------------------------------------
2242 */
2243 u_int32 scr_ram_seg;
2244
2245 /*----------------------------------------------------------------
2246 ** CCBs management queues.
2247 **----------------------------------------------------------------
2248 */
2249 Scsi_Cmnd *waiting_list; /* Commands waiting for a CCB */
2250 /* when lcb is not allocated. */
2251 Scsi_Cmnd *done_list; /* Commands waiting for done() */
2252 /* callback to be invoked. */
2253 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,93)
2254 spinlock_t smp_lock; /* Lock for SMP threading */
2255 #endif
2256
2257 /*----------------------------------------------------------------
2258 ** Chip and controller indentification.
2259 **----------------------------------------------------------------
2260 */
2261 int unit; /* Unit number */
2262 char chip_name[8]; /* Chip name */
2263 char inst_name[16]; /* ncb instance name */
2264
2265 /*----------------------------------------------------------------
2266 ** Initial value of some IO register bits.
2267 ** These values are assumed to have been set by BIOS, and may
2268 ** be used for probing adapter implementation differences.
2269 **----------------------------------------------------------------
2270 */
2271 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest3, sv_ctest4,
2272 sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4, sv_stest1;
2273
2274 /*----------------------------------------------------------------
2275 ** Actual initial value of IO register bits used by the
2276 ** driver. They are loaded at initialisation according to
2277 ** features that are to be enabled.
2278 **----------------------------------------------------------------
2279 */
2280 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4,
2281 rv_ctest5, rv_stest2, rv_ccntl0, rv_ccntl1;
2282
2283 /*----------------------------------------------------------------
2284 ** Target data.
2285 ** Target control block bus address array used by the SCRIPT
2286 ** on reselection.
2287 **----------------------------------------------------------------
2288 */
2289 struct tcb target[MAX_TARGET];
2290 u_int32 *targtbl;
2291
2292 /*----------------------------------------------------------------
2293 ** Virtual and physical bus addresses of the chip.
2294 **----------------------------------------------------------------
2295 */
2296 #ifndef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
2297 u_long base_va; /* MMIO base virtual address */
2298 u_long base2_va; /* On-chip RAM virtual address */
2299 #endif
2300 u_long base_ba; /* MMIO base bus address */
2301 u_long base_io; /* IO space base address */
2302 u_long base_ws; /* (MM)IO window size */
2303 u_long base2_ba; /* On-chip RAM bus address */
2304 u_long base2_ws; /* On-chip RAM window size */
2305 u_int irq; /* IRQ number */
2306 volatile /* Pointer to volatile for */
2307 struct ncr_reg *reg; /* memory mapped IO. */
2308
2309 /*----------------------------------------------------------------
2310 ** SCRIPTS virtual and physical bus addresses.
2311 ** 'script' is loaded in the on-chip RAM if present.
2312 ** 'scripth' stays in main memory for all chips except the
2313 ** 53C895A and 53C896 that provide 8K on-chip RAM.
2314 **----------------------------------------------------------------
2315 */
2316 struct script *script0; /* Copies of script and scripth */
2317 struct scripth *scripth0; /* relocated for this ncb. */
2318 u_long p_script; /* Actual script and scripth */
2319 u_long p_scripth; /* bus addresses. */
2320 u_long p_scripth0;
2321
2322 /*----------------------------------------------------------------
2323 ** General controller parameters and configuration.
2324 **----------------------------------------------------------------
2325 */
2326 pcidev_t pdev;
2327 u_short device_id; /* PCI device id */
2328 u_char revision_id; /* PCI device revision id */
2329 u_char bus; /* PCI BUS number */
2330 u_char device_fn; /* PCI BUS device and function */
2331 u_char myaddr; /* SCSI id of the adapter */
2332 u_char maxburst; /* log base 2 of dwords burst */
2333 u_char maxwide; /* Maximum transfer width */
2334 u_char minsync; /* Minimum sync period factor */
2335 u_char maxsync; /* Maximum sync period factor */
2336 u_char maxoffs; /* Max scsi offset */
2337 u_char multiplier; /* Clock multiplier (1,2,4) */
2338 u_char clock_divn; /* Number of clock divisors */
2339 u_long clock_khz; /* SCSI clock frequency in KHz */
2340 u_int features; /* Chip features map */
2341
2342 /*----------------------------------------------------------------
2343 ** Range for the PCI clock frequency measurement result
2344 ** that ensures the algorithm used by the driver can be
2345 ** trusted for the SCSI clock frequency measurement.
2346 ** (Assuming a PCI clock frequency of 33 MHz).
2347 **----------------------------------------------------------------
2348 */
2349 u_int pciclock_min;
2350 u_int pciclock_max;
2351
2352 /*----------------------------------------------------------------
2353 ** Start queue management.
2354 ** It is filled up by the host processor and accessed by the
2355 ** SCRIPTS processor in order to start SCSI commands.
2356 **----------------------------------------------------------------
2357 */
2358 u_long p_squeue; /* Start queue BUS address */
2359 u_int32 *squeue; /* Start queue virtual address */
2360 u_short squeueput; /* Next free slot of the queue */
2361 u_short actccbs; /* Number of allocated CCBs */
2362 u_short queuedepth; /* Start queue depth */
2363
2364 /*----------------------------------------------------------------
2365 ** Command completion queue.
2366 ** It is the same size as the start queue to avoid overflow.
2367 **----------------------------------------------------------------
2368 */
2369 u_short dqueueget; /* Next position to scan */
2370 u_int32 *dqueue; /* Completion (done) queue */
2371
2372 /*----------------------------------------------------------------
2373 ** Timeout handler.
2374 **----------------------------------------------------------------
2375 */
2376 struct timer_list timer; /* Timer handler link header */
2377 u_long lasttime;
2378 u_long settle_time; /* Resetting the SCSI BUS */
2379
2380 /*----------------------------------------------------------------
2381 ** Debugging and profiling.
2382 **----------------------------------------------------------------
2383 */
2384 struct ncr_reg regdump; /* Register dump */
2385 u_long regtime; /* Time it has been done */
2386 #ifdef SCSI_NCR_PROFILE_SUPPORT
2387 struct profile profile; /* Profiling data */
2388 #endif
2389
2390 /*----------------------------------------------------------------
2391 ** Miscellaneous buffers accessed by the scripts-processor.
2392 ** They shall be DWORD aligned, because they may be read or
2393 ** written with a script command.
2394 **----------------------------------------------------------------
2395 */
2396 u_char msgout[8]; /* Buffer for MESSAGE OUT */
2397 u_char msgin [8]; /* Buffer for MESSAGE IN */
2398 u_int32 lastmsg; /* Last SCSI message sent */
2399 u_char scratch; /* Scratch for SCSI receive */
2400
2401 /*----------------------------------------------------------------
2402 ** Miscellaneous configuration and status parameters.
2403 **----------------------------------------------------------------
2404 */
2405 u_char scsi_mode; /* Current SCSI BUS mode */
2406 u_char order; /* Tag order to use */
2407 u_char verbose; /* Verbosity for this controller*/
2408 u_int32 ncr_cache; /* Used for cache test at init. */
2409 u_long p_ncb; /* BUS address of this NCB */
2410
2411 /*----------------------------------------------------------------
2412 ** CCB lists and queue.
2413 **----------------------------------------------------------------
2414 */
2415 ccb_p ccbh[CCB_HASH_SIZE]; /* CCB hashed by DSA value */
2416 struct ccb *ccbc; /* CCB chain */
2417 XPT_QUEHEAD free_ccbq; /* Queue of available CCBs */
2418
2419 /*----------------------------------------------------------------
2420 ** IMMEDIATE ARBITRATION (IARB) control.
2421 ** We keep track in 'last_cp' of the last CCB that has been
2422 ** queued to the SCRIPTS processor and clear 'last_cp' when
2423 ** this CCB completes. If last_cp is not zero at the moment
2424 ** we queue a new CCB, we set a flag in 'last_cp' that is
2425 ** used by the SCRIPTS as a hint for setting IARB.
2426 ** We donnot set more than 'iarb_max' consecutive hints for
2427 ** IARB in order to leave devices a chance to reselect.
2428 ** By the way, any non zero value of 'iarb_max' is unfair. :)
2429 **----------------------------------------------------------------
2430 */
2431 #ifdef SCSI_NCR_IARB_SUPPORT
2432 struct ccb *last_cp; /* Last queud CCB used for IARB */
2433 u_short iarb_max; /* Max. # consecutive IARB hints*/
2434 u_short iarb_count; /* Actual # of these hints */
2435 #endif
2436
2437 /*----------------------------------------------------------------
2438 ** We need the LCB in order to handle disconnections and
2439 ** to count active CCBs for task management. So, we use
2440 ** a unique CCB for LUNs we donnot have the LCB yet.
2441 ** This queue normally should have at most 1 element.
2442 **----------------------------------------------------------------
2443 */
2444 XPT_QUEHEAD b0_ccbq;
2445
2446 /*----------------------------------------------------------------
2447 ** We use a different scatter function for 896 rev 1.
2448 **----------------------------------------------------------------
2449 */
2450 int (*scatter) (ncb_p, ccb_p, Scsi_Cmnd *);
2451
2452 /*----------------------------------------------------------------
2453 ** Command abort handling.
2454 ** We need to synchronize tightly with the SCRIPTS
2455 ** processor in order to handle things correctly.
2456 **----------------------------------------------------------------
2457 */
2458 u_char abrt_msg[4]; /* Message to send buffer */
2459 struct scr_tblmove abrt_tbl; /* Table for the MOV of it */
2460 struct scr_tblsel abrt_sel; /* Sync params for selection */
2461 u_char istat_sem; /* Tells the chip to stop (SEM) */
2462
2463 /*----------------------------------------------------------------
2464 ** Fields that should be removed or changed.
2465 **----------------------------------------------------------------
2466 */
2467 struct usrcmd user; /* Command from user */
2468 u_char release_stage; /* Synchronisation stage on release */
2469 };
2470
2471 #define NCB_PHYS(np, lbl) (np->p_ncb + offsetof(struct ncb, lbl))
2472 #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl))
2473 #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl))
2474 #define NCB_SCRIPTH0_PHYS(np,lbl) (np->p_scripth0+offsetof (struct scripth,lbl))
2475
2476 /*==========================================================
2477 **
2478 **
2479 ** Script for NCR-Processor.
2480 **
2481 ** Use ncr_script_fill() to create the variable parts.
2482 ** Use ncr_script_copy_and_bind() to make a copy and
2483 ** bind to physical addresses.
2484 **
2485 **
2486 **==========================================================
2487 **
2488 ** We have to know the offsets of all labels before
2489 ** we reach them (for forward jumps).
2490 ** Therefore we declare a struct here.
2491 ** If you make changes inside the script,
2492 ** DONT FORGET TO CHANGE THE LENGTHS HERE!
2493 **
2494 **----------------------------------------------------------
2495 */
2496
2497 /*
2498 ** Script fragments which are loaded into the on-chip RAM
2499 ** of 825A, 875, 876, 895, 895A and 896 chips.
2500 */
2501 struct script {
2502 ncrcmd start [ 14];
2503 ncrcmd getjob_begin [ 4];
2504 ncrcmd getjob_end [ 4];
2505 ncrcmd select [ 8];
2506 ncrcmd wf_sel_done [ 2];
2507 ncrcmd send_ident [ 2];
2508 #ifdef SCSI_NCR_IARB_SUPPORT
2509 ncrcmd select2 [ 8];
2510 #else
2511 ncrcmd select2 [ 2];
2512 #endif
2513 ncrcmd command [ 2];
2514 ncrcmd dispatch [ 28];
2515 ncrcmd sel_no_cmd [ 10];
2516 ncrcmd init [ 6];
2517 ncrcmd clrack [ 4];
2518 ncrcmd disp_msg_in [ 2];
2519 ncrcmd disp_status [ 4];
2520 ncrcmd datai_done [ 16];
2521 ncrcmd datao_done [ 10];
2522 ncrcmd ign_i_w_r_msg [ 4];
2523 #ifdef SCSI_NCR_PROFILE_SUPPORT
2524 ncrcmd dataphase [ 4];
2525 #else
2526 ncrcmd dataphase [ 2];
2527 #endif
2528 ncrcmd msg_in [ 2];
2529 ncrcmd msg_in2 [ 10];
2530 #ifdef SCSI_NCR_IARB_SUPPORT
2531 ncrcmd status [ 14];
2532 #else
2533 ncrcmd status [ 10];
2534 #endif
2535 ncrcmd complete [ 8];
2536 #ifdef SCSI_NCR_PCIQ_MAY_REORDER_WRITES
2537 ncrcmd complete2 [ 12];
2538 #else
2539 ncrcmd complete2 [ 10];
2540 #endif
2541 #ifdef SCSI_NCR_PCIQ_SYNC_ON_INTR
2542 ncrcmd done [ 18];
2543 #else
2544 ncrcmd done [ 14];
2545 #endif
2546 ncrcmd done_end [ 2];
2547 ncrcmd save_dp [ 8];
2548 ncrcmd restore_dp [ 4];
2549 #ifdef SCSI_NCR_PROFILE_SUPPORT
2550 ncrcmd disconnect [ 32];
2551 #else
2552 ncrcmd disconnect [ 20];
2553 #endif
2554 #ifdef SCSI_NCR_IARB_SUPPORT
2555 ncrcmd idle [ 4];
2556 #else
2557 ncrcmd idle [ 2];
2558 #endif
2559 #ifdef SCSI_NCR_IARB_SUPPORT
2560 ncrcmd ungetjob [ 6];
2561 #else
2562 ncrcmd ungetjob [ 4];
2563 #endif
2564 ncrcmd reselect [ 4];
2565 ncrcmd reselected [ 48];
2566 #if MAX_TASKS*4 > 512
2567 ncrcmd resel_tag [ 16];
2568 #elif MAX_TASKS*4 > 256
2569 ncrcmd resel_tag [ 10];
2570 #else
2571 ncrcmd resel_tag [ 6];
2572 #endif
2573 ncrcmd resel_go [ 6];
2574 ncrcmd resel_notag [ 4];
2575 ncrcmd resel_dsa [ 8];
2576 ncrcmd data_in [MAX_SCATTER * SCR_SG_SIZE];
2577 ncrcmd data_in2 [ 4];
2578 ncrcmd data_out [MAX_SCATTER * SCR_SG_SIZE];
2579 ncrcmd data_out2 [ 4];
2580 ncrcmd pm0_data [ 12];
2581 ncrcmd pm0_data_out [ 6];
2582 ncrcmd pm0_data_end [ 6];
2583 ncrcmd pm1_data [ 12];
2584 ncrcmd pm1_data_out [ 6];
2585 ncrcmd pm1_data_end [ 6];
2586 };
2587
2588 /*
2589 ** Script fragments which stay in main memory for all chips
2590 ** except for the 895A and 896 that support 8K on-chip RAM.
2591 */
2592 struct scripth {
2593 ncrcmd start64 [ 2];
2594 ncrcmd sel_for_abort [ 18];
2595 ncrcmd sel_for_abort_1 [ 2];
2596 ncrcmd select_no_atn [ 8];
2597 ncrcmd wf_sel_done_no_atn [ 4];
2598
2599 ncrcmd msg_in_etc [ 14];
2600 ncrcmd msg_received [ 4];
2601 ncrcmd msg_weird_seen [ 4];
2602 ncrcmd msg_extended [ 20];
2603 ncrcmd msg_bad [ 6];
2604 ncrcmd msg_weird [ 4];
2605 ncrcmd msg_weird1 [ 8];
2606
2607 ncrcmd wdtr_resp [ 6];
2608 ncrcmd send_wdtr [ 4];
2609 ncrcmd sdtr_resp [ 6];
2610 ncrcmd send_sdtr [ 4];
2611 ncrcmd nego_bad_phase [ 4];
2612 ncrcmd msg_out_abort [ 12];
2613 ncrcmd msg_out [ 6];
2614 ncrcmd msg_out_done [ 4];
2615 ncrcmd no_data [ 28];
2616 ncrcmd abort_resel [ 16];
2617 ncrcmd resend_ident [ 4];
2618 ncrcmd ident_break [ 4];
2619 ncrcmd ident_break_atn [ 4];
2620 ncrcmd sdata_in [ 6];
2621 ncrcmd data_io [ 2];
2622 ncrcmd data_io_com [ 8];
2623 ncrcmd data_io_out [ 12];
2624 ncrcmd bad_identify [ 12];
2625 ncrcmd bad_i_t_l [ 4];
2626 ncrcmd bad_i_t_l_q [ 4];
2627 ncrcmd bad_status [ 6];
2628 ncrcmd tweak_pmj [ 12];
2629 ncrcmd pm_handle [ 20];
2630 ncrcmd pm_handle1 [ 4];
2631 ncrcmd pm_save [ 4];
2632 ncrcmd pm0_save [ 14];
2633 ncrcmd pm1_save [ 14];
2634
2635 /* SWIDE handling */
2636 ncrcmd swide_ma_32 [ 4];
2637 ncrcmd swide_ma_64 [ 6];
2638 ncrcmd swide_scr_64 [ 26];
2639 ncrcmd swide_scr_64_1 [ 12];
2640 ncrcmd swide_com_64 [ 6];
2641 ncrcmd swide_common [ 10];
2642 ncrcmd swide_fin_32 [ 24];
2643
2644 /* Data area */
2645 ncrcmd zero [ 1];
2646 ncrcmd scratch [ 1];
2647 ncrcmd scratch1 [ 1];
2648 ncrcmd pm0_data_addr [ 1];
2649 ncrcmd pm1_data_addr [ 1];
2650 ncrcmd saved_dsa [ 1];
2651 ncrcmd saved_drs [ 1];
2652 ncrcmd done_pos [ 1];
2653 ncrcmd startpos [ 1];
2654 ncrcmd targtbl [ 1];
2655 /* End of data area */
2656
2657 #ifdef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
2658 ncrcmd start_ram [ 1];
2659 ncrcmd script0_ba [ 4];
2660 ncrcmd start_ram64 [ 3];
2661 ncrcmd script0_ba64 [ 3];
2662 ncrcmd scripth0_ba64 [ 6];
2663 ncrcmd ram_seg64 [ 1];
2664 #endif
2665 ncrcmd snooptest [ 6];
2666 ncrcmd snoopend [ 2];
2667 };
2668
2669 /*==========================================================
2670 **
2671 **
2672 ** Function headers.
2673 **
2674 **
2675 **==========================================================
2676 */
2677
2678 static ccb_p ncr_alloc_ccb (ncb_p np);
2679 static void ncr_complete (ncb_p np, ccb_p cp);
2680 static void ncr_exception (ncb_p np);
2681 static void ncr_free_ccb (ncb_p np, ccb_p cp);
2682 static ccb_p ncr_ccb_from_dsa(ncb_p np, u_long dsa);
2683 static void ncr_init_tcb (ncb_p np, u_char tn);
2684 static lcb_p ncr_alloc_lcb (ncb_p np, u_char tn, u_char ln);
2685 static lcb_p ncr_setup_lcb (ncb_p np, u_char tn, u_char ln,
2686 u_char *inq_data);
2687 static void ncr_getclock (ncb_p np, int mult);
2688 static u_int ncr_getpciclock (ncb_p np);
2689 static void ncr_selectclock (ncb_p np, u_char scntl3);
2690 static ccb_p ncr_get_ccb (ncb_p np, u_char tn, u_char ln);
2691 static void ncr_init (ncb_p np, int reset, char * msg, u_long code);
2692 static void ncr_int_sbmc (ncb_p np);
2693 static void ncr_int_par (ncb_p np, u_short sist);
2694 static void ncr_int_ma (ncb_p np);
2695 static void ncr_int_sir (ncb_p np);
2696 static void ncr_int_sto (ncb_p np);
2697 static void ncr_int_udc (ncb_p np);
2698 static void ncr_negotiate (ncb_p np, tcb_p tp);
2699 static int ncr_prepare_nego(ncb_p np, ccb_p cp, u_char *msgptr);
2700 #ifdef SCSI_NCR_PROFILE_SUPPORT
2701 static void ncb_profile (ncb_p np, ccb_p cp);
2702 #endif
2703 static void ncr_script_copy_and_bind
2704 (ncb_p np, ncrcmd *src, ncrcmd *dst, int len);
2705 static void ncr_script_fill (struct script * scr, struct scripth * scripth);
2706 static int ncr_scatter_896R1 (ncb_p np, ccb_p cp, Scsi_Cmnd *cmd);
2707 static int ncr_scatter (ncb_p np, ccb_p cp, Scsi_Cmnd *cmd);
2708 static void ncr_getsync (ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p);
2709 static void ncr_setsync (ncb_p np, ccb_p cp, u_char scntl3, u_char sxfer);
2710 static void ncr_setup_tags (ncb_p np, u_char tn, u_char ln);
2711 static void ncr_setwide (ncb_p np, ccb_p cp, u_char wide, u_char ack);
2712 static int ncr_show_msg (u_char * msg);
2713 static void ncr_print_msg (ccb_p cp, char *label, u_char * msg);
2714 static int ncr_snooptest (ncb_p np);
2715 static void ncr_timeout (ncb_p np);
2716 static void ncr_wakeup (ncb_p np, u_long code);
2717 static int ncr_wakeup_done (ncb_p np);
2718 static void ncr_start_next_ccb (ncb_p np, lcb_p lp, int maxn);
2719 static void ncr_put_start_queue(ncb_p np, ccb_p cp);
2720 static void ncr_chip_reset (ncb_p np);
2721 static void ncr_soft_reset (ncb_p np);
2722 static void ncr_start_reset (ncb_p np);
2723 static int ncr_reset_scsi_bus (ncb_p np, int enab_int, int settle_delay);
2724 static int ncr_compute_residual (ncb_p np, ccb_p cp);
2725
2726 #ifdef SCSI_NCR_USER_COMMAND_SUPPORT
2727 static void ncr_usercmd (ncb_p np);
2728 #endif
2729
2730 static int ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device);
2731 static void ncr_free_resources(ncb_p np);
2732
2733 static void insert_into_waiting_list(ncb_p np, Scsi_Cmnd *cmd);
2734 static Scsi_Cmnd *retrieve_from_waiting_list(int to_remove, ncb_p np, Scsi_Cmnd *cmd);
2735 static void process_waiting_list(ncb_p np, int sts);
2736
2737 #define remove_from_waiting_list(np, cmd) \
2738 retrieve_from_waiting_list(1, (np), (cmd))
2739 #define requeue_waiting_list(np) process_waiting_list((np), DID_OK)
2740 #define reset_waiting_list(np) process_waiting_list((np), DID_RESET)
2741
2742 #ifdef SCSI_NCR_NVRAM_SUPPORT
2743 static void ncr_get_nvram (ncr_device *devp, ncr_nvram *nvp);
2744 static int sym_read_Tekram_nvram (ncr_slot *np, u_short device_id,
2745 Tekram_nvram *nvram);
2746 static int sym_read_Symbios_nvram (ncr_slot *np, Symbios_nvram *nvram);
2747 #endif
2748
2749 /*==========================================================
2750 **
2751 **
2752 ** Global static data.
2753 **
2754 **
2755 **==========================================================
2756 */
2757
2758 static inline char *ncr_name (ncb_p np)
2759 {
2760 return np->inst_name;
2761 }
2762
2763
2764 /*==========================================================
2765 **
2766 **
2767 ** Scripts for NCR-Processor.
2768 **
2769 ** Use ncr_script_bind for binding to physical addresses.
2770 **
2771 **
2772 **==========================================================
2773 **
2774 ** NADDR generates a reference to a field of the controller data.
2775 ** PADDR generates a reference to another part of the script.
2776 ** RADDR generates a reference to a script processor register.
2777 ** FADDR generates a reference to a script processor register
2778 ** with offset.
2779 **
2780 **----------------------------------------------------------
2781 */
2782
2783 #define RELOC_SOFTC 0x40000000
2784 #define RELOC_LABEL 0x50000000
2785 #define RELOC_REGISTER 0x60000000
2786 #if 0
2787 #define RELOC_KVAR 0x70000000
2788 #endif
2789 #define RELOC_LABELH 0x80000000
2790 #define RELOC_MASK 0xf0000000
2791
2792 #define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label))
2793 #define PADDR(label) (RELOC_LABEL | offsetof(struct script, label))
2794 #define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label))
2795 #define RADDR(label) (RELOC_REGISTER | REG(label))
2796 #define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs)))
2797 #define KVAR(which) (RELOC_KVAR | (which))
2798
2799 #define SCR_DATA_ZERO 0xf00ff00f
2800
2801 #ifdef RELOC_KVAR
2802 #define SCRIPT_KVAR_JIFFIES (0)
2803 #define SCRIPT_KVAR_FIRST SCRIPT_KVAR_JIFFIES
2804 #define SCRIPT_KVAR_LAST SCRIPT_KVAR_JIFFIES
2805 /*
2806 * Kernel variables referenced in the scripts.
2807 * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY.
2808 */
2809 static void *script_kvars[] __initdata =
2810 { (void *)&jiffies };
2811 #endif
2812
2813 static struct script script0 __initdata = {
2814 /*--------------------------< START >-----------------------*/ {
2815 /*
2816 ** This NOP will be patched with LED ON
2817 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2818 */
2819 SCR_NO_OP,
2820 0,
2821 /*
2822 ** Clear SIGP.
2823 */
2824 SCR_FROM_REG (ctest2),
2825 0,
2826
2827 /*
2828 ** Stop here if the C code wants to perform
2829 ** some error recovery procedure manually.
2830 ** (Indicate this by setting SEM in ISTAT)
2831 */
2832 SCR_FROM_REG (istat),
2833 0,
2834 /*
2835 ** Report to the C code the next position in
2836 ** the start queue the SCRIPTS will schedule.
2837 ** The C code must not change SCRATCHA.
2838 */
2839 SCR_LOAD_ABS (scratcha, 4),
2840 PADDRH (startpos),
2841 SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
2842 SIR_SCRIPT_STOPPED,
2843
2844 /*
2845 ** Start the next job.
2846 **
2847 ** @DSA = start point for this job.
2848 ** SCRATCHA = address of this job in the start queue.
2849 **
2850 ** We will restore startpos with SCRATCHA if we fails the
2851 ** arbitration or if it is the idle job.
2852 **
2853 ** The below GETJOB_BEGIN to GETJOB_END section of SCRIPTS
2854 ** is a critical path. If it is partially executed, it then
2855 ** may happen that the job address is not yet in the DSA
2856 ** and the the next queue position points to the next JOB.
2857 */
2858 SCR_LOAD_ABS (dsa, 4),
2859 PADDRH (startpos),
2860 SCR_LOAD_REL (temp, 4),
2861 4,
2862 }/*-------------------------< GETJOB_BEGIN >------------------*/,{
2863 SCR_STORE_ABS (temp, 4),
2864 PADDRH (startpos),
2865 SCR_LOAD_REL (dsa, 4),
2866 0,
2867 }/*-------------------------< GETJOB_END >--------------------*/,{
2868 SCR_LOAD_REL (temp, 4),
2869 0,
2870 SCR_RETURN,
2871 0,
2872
2873 }/*-------------------------< SELECT >----------------------*/,{
2874 /*
2875 ** DSA contains the address of a scheduled
2876 ** data structure.
2877 **
2878 ** SCRATCHA contains the address of the start queue
2879 ** entry which points to the next job.
2880 **
2881 ** Set Initiator mode.
2882 **
2883 ** (Target mode is left as an exercise for the reader)
2884 */
2885
2886 SCR_CLR (SCR_TRG),
2887 0,
2888 /*
2889 ** And try to select this target.
2890 */
2891 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
2892 PADDR (ungetjob),
2893 /*
2894 ** Now there are 4 possibilities:
2895 **
2896 ** (1) The ncr looses arbitration.
2897 ** This is ok, because it will try again,
2898 ** when the bus becomes idle.
2899 ** (But beware of the timeout function!)
2900 **
2901 ** (2) The ncr is reselected.
2902 ** Then the script processor takes the jump
2903 ** to the RESELECT label.
2904 **
2905 ** (3) The ncr wins arbitration.
2906 ** Then it will execute SCRIPTS instruction until
2907 ** the next instruction that checks SCSI phase.
2908 ** Then will stop and wait for selection to be
2909 ** complete or selection time-out to occur.
2910 **
2911 ** After having won arbitration, the ncr SCRIPTS
2912 ** processor is able to execute instructions while
2913 ** the SCSI core is performing SCSI selection. But
2914 ** some script instruction that is not waiting for
2915 ** a valid phase (or selection timeout) to occur
2916 ** breaks the selection procedure, by probably
2917 ** affecting timing requirements.
2918 ** So we have to wait immediately for the next phase
2919 ** or the selection to complete or time-out.
2920 */
2921
2922 /*
2923 ** load the savep (saved pointer) into
2924 ** the actual data pointer.
2925 */
2926 SCR_LOAD_REL (temp, 4),
2927 offsetof (struct ccb, phys.header.savep),
2928 /*
2929 ** Initialize the status registers
2930 */
2931 SCR_LOAD_REL (scr0, 4),
2932 offsetof (struct ccb, phys.header.status),
2933
2934 }/*-------------------------< WF_SEL_DONE >----------------------*/,{
2935 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2936 SIR_SEL_ATN_NO_MSG_OUT,
2937 }/*-------------------------< SEND_IDENT >----------------------*/,{
2938 /*
2939 ** Selection complete.
2940 ** Send the IDENTIFY and SIMPLE_TAG messages
2941 ** (and the M_X_SYNC_REQ / M_X_WIDE_REQ message)
2942 */
2943 SCR_MOVE_TBL ^ SCR_MSG_OUT,
2944 offsetof (struct dsb, smsg),
2945 }/*-------------------------< SELECT2 >----------------------*/,{
2946 #ifdef SCSI_NCR_IARB_SUPPORT
2947 /*
2948 ** Set IMMEDIATE ARBITRATION if we have been given
2949 ** a hint to do so. (Some job to do after this one).
2950 */
2951 SCR_FROM_REG (HF_REG),
2952 0,
2953 SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),
2954 8,
2955 SCR_REG_REG (scntl1, SCR_OR, IARB),
2956 0,
2957 #endif
2958 /*
2959 ** Anticipate the COMMAND phase.
2960 ** This is the PHASE we expect at this point.
2961 */
2962 SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)),
2963 PADDR (sel_no_cmd),
2964
2965 }/*-------------------------< COMMAND >--------------------*/,{
2966 /*
2967 ** ... and send the command
2968 */
2969 SCR_MOVE_TBL ^ SCR_COMMAND,
2970 offsetof (struct dsb, cmd),
2971
2972 }/*-----------------------< DISPATCH >----------------------*/,{
2973 /*
2974 ** MSG_IN is the only phase that shall be
2975 ** entered at least once for each (re)selection.
2976 ** So we test it first.
2977 */
2978 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
2979 PADDR (msg_in),
2980 SCR_JUMP ^ IFTRUE (IF (SCR_DATA_OUT)),
2981 PADDR (dataphase),
2982 SCR_JUMP ^ IFTRUE (IF (SCR_DATA_IN)),
2983 PADDR (dataphase),
2984 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
2985 PADDR (status),
2986 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
2987 PADDR (command),
2988 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
2989 PADDRH (msg_out),
2990 /*
2991 ** Discard one illegal phase byte, if required.
2992 */
2993 SCR_LOAD_REL (scratcha, 1),
2994 offsetof (struct ccb, xerr_status),
2995 SCR_REG_REG (scratcha, SCR_OR, XE_BAD_PHASE),
2996 0,
2997 SCR_STORE_REL (scratcha, 1),
2998 offsetof (struct ccb, xerr_status),
2999 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)),
3000 8,
3001 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
3002 NADDR (scratch),
3003 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)),
3004 8,
3005 SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
3006 NADDR (scratch),
3007 SCR_JUMP,
3008 PADDR (dispatch),
3009
3010 }/*---------------------< SEL_NO_CMD >----------------------*/,{
3011 /*
3012 ** The target does not switch to command
3013 ** phase after IDENTIFY has been sent.
3014 **
3015 ** If it stays in MSG OUT phase send it
3016 ** the IDENTIFY again.
3017 */
3018 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
3019 PADDRH (resend_ident),
3020 /*
3021 ** If target does not switch to MSG IN phase
3022 ** and we sent a negotiation, assert the
3023 ** failure immediately.
3024 */
3025 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
3026 PADDR (dispatch),
3027 SCR_FROM_REG (HS_REG),
3028 0,
3029 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
3030 SIR_NEGO_FAILED,
3031 /*
3032 ** Jump to dispatcher.
3033 */
3034 SCR_JUMP,
3035 PADDR (dispatch),
3036
3037 }/*-------------------------< INIT >------------------------*/,{
3038 /*
3039 ** Wait for the SCSI RESET signal to be
3040 ** inactive before restarting operations,
3041 ** since the chip may hang on SEL_ATN
3042 ** if SCSI RESET is active.
3043 */
3044 SCR_FROM_REG (sstat0),
3045 0,
3046 SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
3047 -16,
3048 SCR_JUMP,
3049 PADDR (start),
3050 }/*-------------------------< CLRACK >----------------------*/,{
3051 /*
3052 ** Terminate possible pending message phase.
3053 */
3054 SCR_CLR (SCR_ACK),
3055 0,
3056 SCR_JUMP,
3057 PADDR (dispatch),
3058
3059 }/*-------------------------< DISP_MSG_IN >----------------------*/,{
3060 /*
3061 ** Anticipate MSG_IN phase then STATUS phase.
3062 **
3063 ** May spare 2 SCRIPTS instructions when we have
3064 ** completed the OUTPUT of the data and the device
3065 ** goes directly to STATUS phase.
3066 */
3067 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
3068 PADDR (msg_in),
3069
3070 }/*-------------------------< DISP_STATUS >----------------------*/,{
3071 /*
3072 ** Anticipate STATUS phase.
3073 **
3074 ** Does spare 3 SCRIPTS instructions when we have
3075 ** completed the INPUT of the data.
3076 */
3077 SCR_JUMP ^ IFTRUE (WHEN (SCR_STATUS)),
3078 PADDR (status),
3079 SCR_JUMP,
3080 PADDR (dispatch),
3081
3082 }/*-------------------------< DATAI_DONE >-------------------*/,{
3083 /*
3084 ** If the SWIDE is not full, jump to dispatcher.
3085 ** We anticipate a STATUS phase.
3086 ** If we get later an IGNORE WIDE RESIDUE, we
3087 ** will alias it as a MODIFY DP (-1).
3088 */
3089 SCR_FROM_REG (scntl2),
3090 0,
3091 SCR_JUMP ^ IFFALSE (MASK (WSR, WSR)),
3092 PADDR (disp_status),
3093 /*
3094 ** The SWIDE is full.
3095 ** Clear this condition.
3096 */
3097 SCR_REG_REG (scntl2, SCR_OR, WSR),
3098 0,
3099 /*
3100 ** Since the device is required to send any
3101 ** IGNORE WIDE RESIDUE message prior to any
3102 ** other information, we just snoop the SCSI
3103 ** BUS to check for such a message.
3104 */
3105 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
3106 PADDR (disp_status),
3107 SCR_FROM_REG (sbdl),
3108 0,
3109 SCR_JUMP ^ IFFALSE (DATA (M_IGN_RESIDUE)),
3110 PADDR (disp_status),
3111 /*
3112 ** We have been ODD at the end of the transfer,
3113 ** but the device hasn't be so.
3114 ** Signal a DATA OVERRUN condition to the C code.
3115 */
3116 SCR_INT,
3117 SIR_SWIDE_OVERRUN,
3118 SCR_JUMP,
3119 PADDR (dispatch),
3120
3121 }/*-------------------------< DATAO_DONE >-------------------*/,{
3122 /*
3123 ** If the SODL is not full jump to dispatcher.
3124 ** We anticipate a MSG IN phase or a STATUS phase.
3125 */
3126 SCR_FROM_REG (scntl2),
3127 0,
3128 SCR_JUMP ^ IFFALSE (MASK (WSS, WSS)),
3129 PADDR (disp_msg_in),
3130 /*
3131 ** The SODL is full, clear this condition.
3132 */
3133 SCR_REG_REG (scntl2, SCR_OR, WSS),
3134 0,
3135 /*
3136 ** And signal a DATA UNDERRUN condition
3137 ** to the C code.
3138 */
3139 SCR_INT,
3140 SIR_SODL_UNDERRUN,
3141 SCR_JUMP,
3142 PADDR (dispatch),
3143
3144 }/*-------------------------< IGN_I_W_R_MSG >--------------*/,{
3145 /*
3146 ** We jump here from the phase mismatch interrupt,
3147 ** When we have a SWIDE and the device has presented
3148 ** a IGNORE WIDE RESIDUE message on the BUS.
3149 ** We just have to throw away this message and then
3150 ** to jump to dispatcher.
3151 */
3152 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
3153 NADDR (scratch),
3154 /*
3155 ** Clear ACK and jump to dispatcher.
3156 */
3157 SCR_JUMP,
3158 PADDR (clrack),
3159
3160 }/*-------------------------< DATAPHASE >------------------*/,{
3161 #ifdef SCSI_NCR_PROFILE_SUPPORT
3162 SCR_REG_REG (QU_REG, SCR_OR, HF_DATA_ST),
3163 0,
3164 #endif
3165 SCR_RETURN,
3166 0,
3167 }/*-------------------------< MSG_IN >--------------------*/,{
3168 /*
3169 ** Get the first byte of the message.
3170 **
3171 ** The script processor doesn't negate the
3172 ** ACK signal after this transfer.
3173 */
3174 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3175 NADDR (msgin[0]),
3176 }/*-------------------------< MSG_IN2 >--------------------*/,{
3177 /*
3178 ** Check first against 1 byte messages
3179 ** that we handle from SCRIPTS.
3180 */
3181 SCR_JUMP ^ IFTRUE (DATA (M_COMPLETE)),
3182 PADDR (complete),
3183 SCR_JUMP ^ IFTRUE (DATA (M_DISCONNECT)),
3184 PADDR (disconnect),
3185 SCR_JUMP ^ IFTRUE (DATA (M_SAVE_DP)),
3186 PADDR (save_dp),
3187 SCR_JUMP ^ IFTRUE (DATA (M_RESTORE_DP)),
3188 PADDR (restore_dp),
3189 /*
3190 ** We handle all other messages from the
3191 ** C code, so no need to waste on-chip RAM
3192 ** for those ones.
3193 */
3194 SCR_JUMP,
3195 PADDRH (msg_in_etc),
3196
3197 }/*-------------------------< STATUS >--------------------*/,{
3198 /*
3199 ** get the status
3200 */
3201 SCR_MOVE_ABS (1) ^ SCR_STATUS,
3202 NADDR (scratch),
3203 #ifdef SCSI_NCR_IARB_SUPPORT
3204 /*
3205 ** If STATUS is not GOOD, clear IMMEDIATE ARBITRATION,
3206 ** since we may have to tamper the start queue from
3207 ** the C code.
3208 */
3209 SCR_JUMPR ^ IFTRUE (DATA (S_GOOD)),
3210 8,
3211 SCR_REG_REG (scntl1, SCR_AND, ~IARB),
3212 0,
3213 #endif
3214 /*
3215 ** save status to scsi_status.
3216 ** mark as complete.
3217 */
3218 SCR_TO_REG (SS_REG),
3219 0,
3220 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
3221 0,
3222 /*
3223 ** Anticipate the MESSAGE PHASE for
3224 ** the TASK COMPLETE message.
3225 */
3226 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
3227 PADDR (msg_in),
3228 SCR_JUMP,
3229 PADDR (dispatch),
3230
3231 }/*-------------------------< COMPLETE >-----------------*/,{
3232 /*
3233 ** Complete message.
3234 **
3235 ** Copy the data pointer to LASTP in header.
3236 */
3237 SCR_STORE_REL (temp, 4),
3238 offsetof (struct ccb, phys.header.lastp),
3239 /*
3240 ** When we terminate the cycle by clearing ACK,
3241 ** the target may disconnect immediately.
3242 **
3243 ** We don't want to be told of an
3244 ** "unexpected disconnect",
3245 ** so we disable this feature.
3246 */
3247 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
3248 0,
3249 /*
3250 ** Terminate cycle ...
3251 */
3252 SCR_CLR (SCR_ACK|SCR_ATN),
3253 0,
3254 /*
3255 ** ... and wait for the disconnect.
3256 */
3257 SCR_WAIT_DISC,
3258 0,
3259 }/*-------------------------< COMPLETE2 >-----------------*/,{
3260 /*
3261 ** Save host status to header.
3262 */
3263 SCR_STORE_REL (scr0, 4),
3264 offsetof (struct ccb, phys.header.status),
3265
3266 #ifdef SCSI_NCR_PCIQ_MAY_REORDER_WRITES
3267 /*
3268 ** Some bridges may reorder DMA writes to memory.
3269 ** We donnot want the CPU to deal with completions
3270 ** without all the posted write having been flushed
3271 ** to memory. This DUMMY READ should flush posted
3272 ** buffers prior to the CPU having to deal with
3273 ** completions.
3274 */
3275 SCR_LOAD_REL (scr0, 4), /* DUMMY READ */
3276 offsetof (struct ccb, phys.header.status),
3277 #endif
3278 /*
3279 ** If command resulted in not GOOD status,
3280 ** call the C code if needed.
3281 */
3282 SCR_FROM_REG (SS_REG),
3283 0,
3284 SCR_CALL ^ IFFALSE (DATA (S_GOOD)),
3285 PADDRH (bad_status),
3286
3287 /*
3288 ** If we performed an auto-sense, call
3289 ** the C code to synchronyze task aborts
3290 ** with UNIT ATTENTION conditions.
3291 */
3292 SCR_FROM_REG (HF_REG),
3293 0,
3294 SCR_INT ^ IFTRUE (MASK (HF_AUTO_SENSE, HF_AUTO_SENSE)),
3295 SIR_AUTO_SENSE_DONE,
3296
3297 }/*------------------------< DONE >-----------------*/,{
3298 #ifdef SCSI_NCR_PCIQ_SYNC_ON_INTR
3299 /*
3300 ** It seems that some bridges flush everything
3301 ** when the INTR line is raised. For these ones,
3302 ** we can just ensure that the INTR line will be
3303 ** raised before each completion. So, if it happens
3304 ** that we have been faster that the CPU, we just
3305 ** have to synchronize with it. A dummy programmed
3306 ** interrupt will do the trick.
3307 ** Note that we overlap at most 1 IO with the CPU
3308 ** in this situation and that the IRQ line must not
3309 ** be shared.
3310 */
3311 SCR_FROM_REG (istat),
3312 0,
3313 SCR_INT ^ IFTRUE (MASK (INTF, INTF)),
3314 SIR_DUMMY_INTERRUPT,
3315 #endif
3316 /*
3317 ** Copy the DSA to the DONE QUEUE and
3318 ** signal completion to the host.
3319 ** If we are interrupted between DONE
3320 ** and DONE_END, we must reset, otherwise
3321 ** the completed CCB will be lost.
3322 */
3323 SCR_STORE_ABS (dsa, 4),
3324 PADDRH (saved_dsa),
3325 SCR_LOAD_ABS (dsa, 4),
3326 PADDRH (done_pos),
3327 SCR_LOAD_ABS (scratcha, 4),
3328 PADDRH (saved_dsa),
3329 SCR_STORE_REL (scratcha, 4),
3330 0,
3331 /*
3332 ** The instruction below reads the DONE QUEUE next
3333 ** free position from memory.
3334 ** In addition it ensures that all PCI posted writes
3335 ** are flushed and so the DSA value of the done
3336 ** CCB is visible by the CPU before INTFLY is raised.
3337 */
3338 SCR_LOAD_REL (temp, 4),
3339 4,
3340 SCR_INT_FLY,
3341 0,
3342 SCR_STORE_ABS (temp, 4),
3343 PADDRH (done_pos),
3344 }/*------------------------< DONE_END >-----------------*/,{
3345 SCR_JUMP,
3346 PADDR (start),
3347
3348 }/*-------------------------< SAVE_DP >------------------*/,{
3349 /*
3350 ** Clear ACK immediately.
3351 ** No need to delay it.
3352 */
3353 SCR_CLR (SCR_ACK),
3354 0,
3355 /*
3356 ** Keep track we received a SAVE DP, so
3357 ** we will switch to the other PM context
3358 ** on the next PM since the DP may point
3359 ** to the current PM context.
3360 */
3361 SCR_REG_REG (HF_REG, SCR_OR, HF_DP_SAVED),
3362 0,
3363 /*
3364 ** SAVE_DP message:
3365 ** Copy the data pointer to SAVEP in header.
3366 */
3367 SCR_STORE_REL (temp, 4),
3368 offsetof (struct ccb, phys.header.savep),
3369 SCR_JUMP,
3370 PADDR (dispatch),
3371 }/*-------------------------< RESTORE_DP >---------------*/,{
3372 /*
3373 ** RESTORE_DP message:
3374 ** Copy SAVEP in header to actual data pointer.
3375 */
3376 SCR_LOAD_REL (temp, 4),
3377 offsetof (struct ccb, phys.header.savep),
3378 SCR_JUMP,
3379 PADDR (clrack),
3380
3381 }/*-------------------------< DISCONNECT >---------------*/,{
3382 /*
3383 ** DISCONNECTing ...
3384 **
3385 ** disable the "unexpected disconnect" feature,
3386 ** and remove the ACK signal.
3387 */
3388 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
3389 0,
3390 SCR_CLR (SCR_ACK|SCR_ATN),
3391 0,
3392 /*
3393 ** Wait for the disconnect.
3394 */
3395 SCR_WAIT_DISC,
3396 0,
3397 #ifdef SCSI_NCR_PROFILE_SUPPORT
3398 /*
3399 ** Count the disconnects.
3400 ** Disconnect without DATA PHASE having been
3401 ** entered are counted in bits 8..15.
3402 */
3403 SCR_LOAD_REL (scratcha, 4),
3404 offsetof (struct ccb, phys.num_disc),
3405 SCR_FROM_REG (QU_REG),
3406 0,
3407 SCR_JUMPR ^ IFTRUE (MASK (HF_DATA_ST, HF_DATA_ST)),
3408 8,
3409 SCR_REG_REG (scratcha1, SCR_ADD, 0x01),
3410 0,
3411 SCR_REG_REG (scratcha, SCR_ADD, 0x01),
3412 0,
3413 SCR_STORE_REL (scratcha, 4),
3414 offsetof (struct ccb, phys.num_disc),
3415 #endif
3416 /*
3417 ** Status is: DISCONNECTED.
3418 */
3419 SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
3420 0,
3421 /*
3422 ** Save host status to header.
3423 */
3424 SCR_STORE_REL (scr0, 4),
3425 offsetof (struct ccb, phys.header.status),
3426 /*
3427 ** If QUIRK_AUTOSAVE is set,
3428 ** do an "save pointer" operation.
3429 */
3430 SCR_FROM_REG (QU_REG),
3431 0,
3432 SCR_JUMP ^ IFFALSE (MASK (QUIRK_AUTOSAVE, QUIRK_AUTOSAVE)),
3433 PADDR (start),
3434 /*
3435 ** like SAVE_DP message:
3436 ** Remember we saved the data pointer.
3437 ** Copy data pointer to SAVEP in header.
3438 */
3439 SCR_REG_REG (HF_REG, SCR_OR, HF_DP_SAVED),
3440 0,
3441 SCR_STORE_REL (temp, 4),
3442 offsetof (struct ccb, phys.header.savep),
3443 SCR_JUMP,
3444 PADDR (start),
3445
3446 }/*-------------------------< IDLE >------------------------*/,{
3447 /*
3448 ** Nothing to do?
3449 ** Wait for reselect.
3450 ** This NOP will be patched with LED OFF
3451 ** SCR_REG_REG (gpreg, SCR_OR, 0x01)
3452 */
3453 SCR_NO_OP,
3454 0,
3455 #ifdef SCSI_NCR_IARB_SUPPORT
3456 SCR_JUMPR,
3457 8,
3458 #endif
3459 }/*-------------------------< UNGETJOB >-----------------*/,{
3460 #ifdef SCSI_NCR_IARB_SUPPORT
3461 /*
3462 ** Set IMMEDIATE ARBITRATION, for the next time.
3463 ** This will give us better chance to win arbitration
3464 ** for the job we just wanted to do.
3465 */
3466 SCR_REG_REG (scntl1, SCR_OR, IARB),
3467 0,
3468 #endif
3469 /*
3470 ** We are not able to restart the SCRIPTS if we are
3471 ** interrupted and these instruction haven't been
3472 ** all executed. BTW, this is very unlikely to
3473 ** happen, but we check that from the C code.
3474 */
3475 SCR_LOAD_REG (dsa, 0xff),
3476 0,
3477 SCR_STORE_ABS (scratcha, 4),
3478 PADDRH (startpos),
3479 }/*-------------------------< RESELECT >--------------------*/,{
3480 /*
3481 ** make the host status invalid.
3482 */
3483 SCR_CLR (SCR_TRG),
3484 0,
3485 /*
3486 ** Sleep waiting for a reselection.
3487 ** If SIGP is set, special treatment.
3488 **
3489 ** Zu allem bereit ..
3490 */
3491 SCR_WAIT_RESEL,
3492 PADDR(start),
3493 }/*-------------------------< RESELECTED >------------------*/,{
3494 /*
3495 ** This NOP will be patched with LED ON
3496 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
3497 */
3498 SCR_NO_OP,
3499 0,
3500 /*
3501 ** load the target id into the sdid
3502 */
3503 SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
3504 0,
3505 SCR_TO_REG (sdid),
3506 0,
3507 /*
3508 ** load the target control block address
3509 */
3510 SCR_LOAD_ABS (dsa, 4),
3511 PADDRH (targtbl),
3512 SCR_SFBR_REG (dsa, SCR_SHL, 0),
3513 0,
3514 SCR_REG_REG (dsa, SCR_SHL, 0),
3515 0,
3516 SCR_REG_REG (dsa, SCR_AND, 0x3c),
3517 0,
3518 SCR_LOAD_REL (dsa, 4),
3519 0,
3520 /*
3521 ** Load the synchronous transfer registers.
3522 */
3523 SCR_LOAD_REL (scntl3, 1),
3524 offsetof(struct tcb, wval),
3525 SCR_LOAD_REL (sxfer, 1),
3526 offsetof(struct tcb, sval),
3527 /*
3528 ** If MESSAGE IN phase as expected,
3529 ** read the data directly from the BUS DATA lines.
3530 ** This helps to support very old SCSI devices that
3531 ** may reselect without sending an IDENTIFY.
3532 */
3533 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
3534 SIR_RESEL_NO_MSG_IN,
3535 SCR_FROM_REG (sbdl),
3536 0,
3537 /*
3538 ** If message phase but not an IDENTIFY,
3539 ** get some help from the C code.
3540 ** Old SCSI device may behave so.
3541 */
3542 SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
3543 SIR_RESEL_NO_IDENTIFY,
3544 /*
3545 ** It is an IDENTIFY message,
3546 ** Load the LUN control block address.
3547 ** If LUN 0, avoid a PCI BUS ownership by loading
3548 ** directly 'b_lun0' from the TCB.
3549 */
3550 SCR_JUMPR ^ IFTRUE (MASK (0x0, 0x3f)),
3551 48,
3552 SCR_LOAD_REL (dsa, 4),
3553 offsetof(struct tcb, b_luntbl),
3554 SCR_SFBR_REG (dsa, SCR_SHL, 0),
3555 0,
3556 SCR_REG_REG (dsa, SCR_SHL, 0),
3557 0,
3558 SCR_REG_REG (dsa, SCR_AND, 0xfc),
3559 0,
3560 SCR_LOAD_REL (dsa, 4),
3561 0,
3562 SCR_JUMPR,
3563 8,
3564 /*
3565 ** LUN 0 special case (but usual one :))
3566 */
3567 SCR_LOAD_REL (dsa, 4),
3568 offsetof(struct tcb, b_lun0),
3569
3570 /*
3571 ** Load the reselect task action for this LUN.
3572 ** Load the tasks DSA array for this LUN.
3573 ** Call the action.
3574 */
3575 SCR_LOAD_REL (temp, 4),
3576 offsetof(struct lcb, resel_task),
3577 SCR_LOAD_REL (dsa, 4),
3578 offsetof(struct lcb, b_tasktbl),
3579 SCR_RETURN,
3580 0,
3581
3582 }/*-------------------------< RESEL_TAG >-------------------*/,{
3583 /*
3584 ** Read IDENTIFY + SIMPLE + TAG using a single MOVE.
3585 ** Agressive optimization, is'nt it?
3586 ** No need to test the SIMPLE TAG message, since the
3587 ** driver only supports conformant devices for tags. ;-)
3588 */
3589 SCR_MOVE_ABS (3) ^ SCR_MSG_IN,
3590 NADDR (msgin),
3591 /*
3592 ** Read the TAG from the SIDL.
3593 ** Still an aggressive optimization. ;-)
3594 ** Compute the CCB indirect jump address which
3595 ** is (#TAG*2 & 0xfc) due to tag numbering using
3596 ** 1,3,5..MAXTAGS*2+1 actual values.
3597 */
3598 SCR_REG_SFBR (sidl, SCR_SHL, 0),
3599 0,
3600 #if MAX_TASKS*4 > 512
3601 SCR_JUMPR ^ IFFALSE (CARRYSET),
3602 8,
3603 SCR_REG_REG (dsa1, SCR_OR, 2),
3604 0,
3605 SCR_REG_REG (sfbr, SCR_SHL, 0),
3606 0,
3607 SCR_JUMPR ^ IFFALSE (CARRYSET),
3608 8,
3609 SCR_REG_REG (dsa1, SCR_OR, 1),
3610 0,
3611 #elif MAX_TASKS*4 > 256
3612 SCR_JUMPR ^ IFFALSE (CARRYSET),
3613 8,
3614 SCR_REG_REG (dsa1, SCR_OR, 1),
3615 0,
3616 #endif
3617 /*
3618 ** Retrieve the DSA of this task.
3619 ** JUMP indirectly to the restart point of the CCB.
3620 */
3621 SCR_SFBR_REG (dsa, SCR_AND, 0xfc),
3622 0,
3623 }/*-------------------------< RESEL_GO >-------------------*/,{
3624 SCR_LOAD_REL (dsa, 4),
3625 0,
3626 SCR_LOAD_REL (temp, 4),
3627 offsetof(struct ccb, phys.header.go.restart),
3628 SCR_RETURN,
3629 0,
3630 }/*-------------------------< RESEL_NOTAG >-------------------*/,{
3631 /*
3632 ** No tag expected.
3633 ** Read an throw away the IDENTIFY.
3634 */
3635 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3636 NADDR (msgin),
3637 /*
3638 ** JUMP indirectly to the restart point of the CCB.
3639 */
3640 SCR_JUMP,
3641 PADDR (resel_go),
3642
3643 }/*-------------------------< RESEL_DSA >-------------------*/,{
3644 /*
3645 ** Ack the IDENTIFY or TAG previously received.
3646 */
3647 SCR_CLR (SCR_ACK),
3648 0,
3649 /*
3650 ** load the savep (saved pointer) into
3651 ** the actual data pointer.
3652 */
3653 SCR_LOAD_REL (temp, 4),
3654 offsetof (struct ccb, phys.header.savep),
3655 /*
3656 ** Initialize the status registers
3657 */
3658 SCR_LOAD_REL (scr0, 4),
3659 offsetof (struct ccb, phys.header.status),
3660 /*
3661 ** Jump to dispatcher.
3662 */
3663 SCR_JUMP,
3664 PADDR (dispatch),
3665
3666 }/*-------------------------< DATA_IN >--------------------*/,{
3667 /*
3668 ** Because the size depends on the
3669 ** #define MAX_SCATTER parameter,
3670 ** it is filled in at runtime.
3671 **
3672 ** ##===========< i=0; i<MAX_SCATTER >=========
3673 ** || SCR_CHMOV_TBL ^ SCR_DATA_IN,
3674 ** || offsetof (struct dsb, data[ i]),
3675 ** ##==========================================
3676 **
3677 **---------------------------------------------------------
3678 */
3679 0
3680 }/*-------------------------< DATA_IN2 >-------------------*/,{
3681 SCR_CALL,
3682 PADDR (datai_done),
3683 SCR_JUMP,
3684 PADDRH (no_data),
3685 }/*-------------------------< DATA_OUT >--------------------*/,{
3686 /*
3687 ** Because the size depends on the
3688 ** #define MAX_SCATTER parameter,
3689 ** it is filled in at runtime.
3690 **
3691 ** ##===========< i=0; i<MAX_SCATTER >=========
3692 ** || SCR_CHMOV_TBL ^ SCR_DATA_OUT,
3693 ** || offsetof (struct dsb, data[ i]),
3694 ** ##==========================================
3695 **
3696 **---------------------------------------------------------
3697 */
3698 0
3699 }/*-------------------------< DATA_OUT2 >-------------------*/,{
3700 SCR_CALL,
3701 PADDR (datao_done),
3702 SCR_JUMP,
3703 PADDRH (no_data),
3704
3705 }/*-------------------------< PM0_DATA >--------------------*/,{
3706 /*
3707 ** Read our host flags to SFBR, so we will be able
3708 ** to check against the data direction we expect.
3709 */
3710 SCR_FROM_REG (HF_REG),
3711 0,
3712 /*
3713 ** Check against actual DATA PHASE.
3714 */
3715 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
3716 PADDR (pm0_data_out),
3717 /*
3718 ** Actual phase is DATA IN.
3719 ** Check against expected direction.
3720 */
3721 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
3722 PADDRH (no_data),
3723 /*
3724 ** Keep track we are moving data from the
3725 ** PM0 DATA mini-script.
3726 */
3727 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM0),
3728 0,
3729 /*
3730 ** Move the data to memory.
3731 */
3732 SCR_CHMOV_TBL ^ SCR_DATA_IN,
3733 offsetof (struct ccb, phys.pm0.sg),
3734 SCR_JUMP,
3735 PADDR (pm0_data_end),
3736 }/*-------------------------< PM0_DATA_OUT >----------------*/,{
3737 /*
3738 ** Actual phase is DATA OUT.
3739 ** Check against expected direction.
3740 */
3741 SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
3742 PADDRH (no_data),
3743 /*
3744 ** Keep track we are moving data from the
3745 ** PM0 DATA mini-script.
3746 */
3747 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM0),
3748 0,
3749 /*
3750 ** Move the data from memory.
3751 */
3752 SCR_CHMOV_TBL ^ SCR_DATA_OUT,
3753 offsetof (struct ccb, phys.pm0.sg),
3754 }/*-------------------------< PM0_DATA_END >----------------*/,{
3755 /*
3756 ** Clear the flag that told we were moving
3757 ** data from the PM0 DATA mini-script.
3758 */
3759 SCR_REG_REG (HF_REG, SCR_AND, (~HF_IN_PM0)),
3760 0,
3761 /*
3762 ** Return to the previous DATA script which
3763 ** is guaranteed by design (if no bug) to be
3764 ** the main DATA script for this transfer.
3765 */
3766 SCR_LOAD_REL (temp, 4),
3767 offsetof (struct ccb, phys.pm0.ret),
3768 SCR_RETURN,
3769 0,
3770 }/*-------------------------< PM1_DATA >--------------------*/,{
3771 /*
3772 ** Read our host flags to SFBR, so we will be able
3773 ** to check against the data direction we expect.
3774 */
3775 SCR_FROM_REG (HF_REG),
3776 0,
3777 /*
3778 ** Check against actual DATA PHASE.
3779 */
3780 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
3781 PADDR (pm1_data_out),
3782 /*
3783 ** Actual phase is DATA IN.
3784 ** Check against expected direction.
3785 */
3786 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
3787 PADDRH (no_data),
3788 /*
3789 ** Keep track we are moving data from the
3790 ** PM1 DATA mini-script.
3791 */
3792 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM1),
3793 0,
3794 /*
3795 ** Move the data to memory.
3796 */
3797 SCR_CHMOV_TBL ^ SCR_DATA_IN,
3798 offsetof (struct ccb, phys.pm1.sg),
3799 SCR_JUMP,
3800 PADDR (pm1_data_end),
3801 }/*-------------------------< PM1_DATA_OUT >----------------*/,{
3802 /*
3803 ** Actual phase is DATA OUT.
3804 ** Check against expected direction.
3805 */
3806 SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
3807 PADDRH (no_data),
3808 /*
3809 ** Keep track we are moving data from the
3810 ** PM1 DATA mini-script.
3811 */
3812 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM1),
3813 0,
3814 /*
3815 ** Move the data from memory.
3816 */
3817 SCR_CHMOV_TBL ^ SCR_DATA_OUT,
3818 offsetof (struct ccb, phys.pm1.sg),
3819 }/*-------------------------< PM1_DATA_END >----------------*/,{
3820 /*
3821 ** Clear the flag that told we were moving
3822 ** data from the PM1 DATA mini-script.
3823 */
3824 SCR_REG_REG (HF_REG, SCR_AND, (~HF_IN_PM1)),
3825 0,
3826 /*
3827 ** Return to the previous DATA script which
3828 ** is guaranteed by design (if no bug) to be
3829 ** the main DATA script for this transfer.
3830 */
3831 SCR_LOAD_REL (temp, 4),
3832 offsetof (struct ccb, phys.pm1.ret),
3833 SCR_RETURN,
3834 0,
3835 }/*---------------------------------------------------------*/
3836 };
3837
3838 static struct scripth scripth0 __initdata = {
3839 /*------------------------< START64 >-----------------------*/{
3840 /*
3841 ** SCRIPT entry point for the 895A and the 896.
3842 ** For now, there is no specific stuff for that
3843 ** chip at this point, but this may come.
3844 */
3845 SCR_JUMP,
3846 PADDR (init),
3847
3848 }/*-----------------------< SEL_FOR_ABORT >------------------*/,{
3849 /*
3850 ** We are jumped here by the C code, if we have
3851 ** some target to reset or some disconnected
3852 ** job to abort. Since error recovery is a serious
3853 ** busyness, we will really reset the SCSI BUS, if
3854 ** case of a SCSI interrupt occuring in this path.
3855 */
3856
3857 /*
3858 ** Set initiator mode.
3859 */
3860 SCR_CLR (SCR_TRG),
3861 0,
3862 /*
3863 ** And try to select this target.
3864 */
3865 SCR_SEL_TBL_ATN ^ offsetof (struct ncb, abrt_sel),
3866 PADDR (reselect),
3867
3868 /*
3869 ** Wait for the selection to complete or
3870 ** the selection to time out.
3871 */
3872 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3873 -8,
3874 /*
3875 ** Call the C code.
3876 */
3877 SCR_INT,
3878 SIR_TARGET_SELECTED,
3879 /*
3880 ** The C code should let us continue here.
3881 ** Send the 'kiss of death' message.
3882 ** We expect an immediate disconnect once
3883 ** the target has eaten the message.
3884 */
3885 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
3886 0,
3887 SCR_MOVE_TBL ^ SCR_MSG_OUT,
3888 offsetof (struct ncb, abrt_tbl),
3889 SCR_CLR (SCR_ACK|SCR_ATN),
3890 0,
3891 SCR_WAIT_DISC,
3892 0,
3893 /*
3894 ** Tell the C code that we are done.
3895 */
3896 SCR_INT,
3897 SIR_ABORT_SENT,
3898 }/*-----------------------< SEL_FOR_ABORT_1 >--------------*/,{
3899 /*
3900 ** Jump at scheduler.
3901 */
3902 SCR_JUMP,
3903 PADDR (start),
3904
3905 }/*------------------------< SELECT_NO_ATN >-----------------*/,{
3906 /*
3907 ** Set Initiator mode.
3908 ** And try to select this target without ATN.
3909 */
3910
3911 SCR_CLR (SCR_TRG),
3912 0,
3913 SCR_SEL_TBL ^ offsetof (struct dsb, select),
3914 PADDR (ungetjob),
3915 /*
3916 ** load the savep (saved pointer) into
3917 ** the actual data pointer.
3918 */
3919 SCR_LOAD_REL (temp, 4),
3920 offsetof (struct ccb, phys.header.savep),
3921 /*
3922 ** Initialize the status registers
3923 */
3924 SCR_LOAD_REL (scr0, 4),
3925 offsetof (struct ccb, phys.header.status),
3926
3927 }/*------------------------< WF_SEL_DONE_NO_ATN >-----------------*/,{
3928 /*
3929 ** Wait immediately for the next phase or
3930 ** the selection to complete or time-out.
3931 */
3932 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)),
3933 0,
3934 SCR_JUMP,
3935 PADDR (select2),
3936
3937 }/*-------------------------< MSG_IN_ETC >--------------------*/,{
3938 /*
3939 ** If it is an EXTENDED (variable size message)
3940 ** Handle it.
3941 */
3942 SCR_JUMP ^ IFTRUE (DATA (M_EXTENDED)),
3943 PADDRH (msg_extended),
3944 /*
3945 ** Let the C code handle any other
3946 ** 1 byte message.
3947 */
3948 SCR_JUMP ^ IFTRUE (MASK (0x00, 0xf0)),
3949 PADDRH (msg_received),
3950 SCR_JUMP ^ IFTRUE (MASK (0x10, 0xf0)),
3951 PADDRH (msg_received),
3952 /*
3953 ** We donnot handle 2 bytes messages from SCRIPTS.
3954 ** So, let the C code deal with these ones too.
3955 */
3956 SCR_JUMP ^ IFFALSE (MASK (0x20, 0xf0)),
3957 PADDRH (msg_weird_seen),
3958 SCR_CLR (SCR_ACK),
3959 0,
3960 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3961 NADDR (msgin[1]),
3962 SCR_JUMP,
3963 PADDRH (msg_received),
3964
3965 }/*-------------------------< MSG_RECEIVED >--------------------*/,{
3966 SCR_LOAD_REL (scratcha, 4), /* DUMMY READ */
3967 0,
3968 SCR_INT,
3969 SIR_MSG_RECEIVED,
3970
3971 }/*-------------------------< MSG_WEIRD_SEEN >------------------*/,{
3972 SCR_LOAD_REL (scratcha1, 4), /* DUMMY READ */
3973 0,
3974 SCR_INT,
3975 SIR_MSG_WEIRD,
3976
3977 }/*-------------------------< MSG_EXTENDED >--------------------*/,{
3978 /*
3979 ** Clear ACK and get the next byte
3980 ** assumed to be the message length.
3981 */
3982 SCR_CLR (SCR_ACK),
3983 0,
3984 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
3985 NADDR (msgin[1]),
3986 /*
3987 ** Try to catch some unlikely situations as 0 length
3988 ** or too large the length.
3989 */
3990 SCR_JUMP ^ IFTRUE (DATA (0)),
3991 PADDRH (msg_weird_seen),
3992 SCR_TO_REG (scratcha),
3993 0,
3994 SCR_REG_REG (sfbr, SCR_ADD, (256-8)),
3995 0,
3996 SCR_JUMP ^ IFTRUE (CARRYSET),
3997 PADDRH (msg_weird_seen),
3998 /*
3999 ** We donnot handle extended messages from SCRIPTS.
4000 ** Read the amount of data correponding to the
4001 ** message length and call the C code.
4002 */
4003 SCR_STORE_REL (scratcha, 1),
4004 offsetof (struct dsb, smsg_ext.size),
4005 SCR_CLR (SCR_ACK),
4006 0,
4007 SCR_MOVE_TBL ^ SCR_MSG_IN,
4008 offsetof (struct dsb, smsg_ext),
4009 SCR_JUMP,
4010 PADDRH (msg_received),
4011
4012 }/*-------------------------< MSG_BAD >------------------*/,{
4013 /*
4014 ** unimplemented message - reject it.
4015 */
4016 SCR_INT,
4017 SIR_REJECT_TO_SEND,
4018 SCR_SET (SCR_ATN),
4019 0,
4020 SCR_JUMP,
4021 PADDR (clrack),
4022
4023 }/*-------------------------< MSG_WEIRD >--------------------*/,{
4024 /*
4025 ** weird message received
4026 ** ignore all MSG IN phases and reject it.
4027 */
4028 SCR_INT,
4029 SIR_REJECT_TO_SEND,
4030 SCR_SET (SCR_ATN),
4031 0,
4032 }/*-------------------------< MSG_WEIRD1 >--------------------*/,{
4033 SCR_CLR (SCR_ACK),
4034 0,
4035 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
4036 PADDR (dispatch),
4037 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
4038 NADDR (scratch),
4039 SCR_JUMP,
4040 PADDRH (msg_weird1),
4041 }/*-------------------------< WDTR_RESP >----------------*/,{
4042 /*
4043 ** let the target fetch our answer.
4044 */
4045 SCR_SET (SCR_ATN),
4046 0,
4047 SCR_CLR (SCR_ACK),
4048 0,
4049 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
4050 PADDRH (nego_bad_phase),
4051
4052 }/*-------------------------< SEND_WDTR >----------------*/,{
4053 /*
4054 ** Send the M_X_WIDE_REQ
4055 */
4056 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
4057 NADDR (msgout),
4058 SCR_JUMP,
4059 PADDRH (msg_out_done),
4060
4061 }/*-------------------------< SDTR_RESP >-------------*/,{
4062 /*
4063 ** let the target fetch our answer.
4064 */
4065 SCR_SET (SCR_ATN),
4066 0,
4067 SCR_CLR (SCR_ACK),
4068 0,
4069 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
4070 PADDRH (nego_bad_phase),
4071
4072 }/*-------------------------< SEND_SDTR >-------------*/,{
4073 /*
4074 ** Send the M_X_SYNC_REQ
4075 */
4076 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
4077 NADDR (msgout),
4078 SCR_JUMP,
4079 PADDRH (msg_out_done),
4080
4081 }/*-------------------------< NEGO_BAD_PHASE >------------*/,{
4082 SCR_INT,
4083 SIR_NEGO_PROTO,
4084 SCR_JUMP,
4085 PADDR (dispatch),
4086
4087 }/*-------------------------< MSG_OUT_ABORT >-------------*/,{
4088 /*
4089 ** After ABORT message,
4090 **
4091 ** expect an immediate disconnect, ...
4092 */
4093 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
4094 0,
4095 SCR_CLR (SCR_ACK|SCR_ATN),
4096 0,
4097 SCR_WAIT_DISC,
4098 0,
4099 SCR_INT,
4100 SIR_MSG_OUT_DONE,
4101 /*
4102 ** ... and set the status to "ABORTED"
4103 */
4104 SCR_LOAD_REG (HS_REG, HS_ABORTED),
4105 0,
4106 SCR_JUMP,
4107 PADDR (complete2),
4108
4109 }/*-------------------------< MSG_OUT >-------------------*/,{
4110 /*
4111 ** The target requests a message.
4112 */
4113 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
4114 NADDR (msgout),
4115 /*
4116 ** If it was no ABORT message ...
4117 */
4118 SCR_JUMP ^ IFTRUE (DATA (M_ABORT)),
4119 PADDRH (msg_out_abort),
4120 /*
4121 ** ... wait for the next phase
4122 ** if it's a message out, send it again, ...
4123 */
4124 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
4125 PADDRH (msg_out),
4126 }/*-------------------------< MSG_OUT_DONE >--------------*/,{
4127 /*
4128 ** ... else clear the message ...
4129 */
4130 SCR_INT,
4131 SIR_MSG_OUT_DONE,
4132 /*
4133 ** ... and process the next phase
4134 */
4135 SCR_JUMP,
4136 PADDR (dispatch),
4137
4138 }/*-------------------------< NO_DATA >--------------------*/,{
4139 /*
4140 ** The target wants to tranfer too much data
4141 ** or in the wrong direction.
4142 ** Remember that in extended error.
4143 */
4144 SCR_LOAD_REL (scratcha, 1),
4145 offsetof (struct ccb, xerr_status),
4146 SCR_REG_REG (scratcha, SCR_OR, XE_EXTRA_DATA),
4147 0,
4148 SCR_STORE_REL (scratcha, 1),
4149 offsetof (struct ccb, xerr_status),
4150 /*
4151 ** Discard one data byte, if required.
4152 */
4153 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
4154 8,
4155 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT,
4156 NADDR (scratch),
4157 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
4158 8,
4159 SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
4160 NADDR (scratch),
4161 /*
4162 ** Count this byte.
4163 ** This will allow to return a positive
4164 ** residual to user.
4165 */
4166 SCR_LOAD_REL (scratcha, 4),
4167 offsetof (struct ccb, phys.extra_bytes),
4168 SCR_REG_REG (scratcha, SCR_ADD, 0x01),
4169 0,
4170 SCR_REG_REG (scratcha1, SCR_ADDC, 0),
4171 0,
4172 SCR_REG_REG (scratcha2, SCR_ADDC, 0),
4173 0,
4174 SCR_STORE_REL (scratcha, 4),
4175 offsetof (struct ccb, phys.extra_bytes),
4176 /*
4177 ** .. and repeat as required.
4178 */
4179 SCR_CALL,
4180 PADDR (dispatch),
4181 SCR_JUMP,
4182 PADDRH (no_data),
4183
4184 }/*-------------------------< ABORT_RESEL >----------------*/,{
4185 SCR_SET (SCR_ATN),
4186 0,
4187 SCR_CLR (SCR_ACK),
4188 0,
4189 /*
4190 ** send the abort/abortag/reset message
4191 ** we expect an immediate disconnect
4192 */
4193 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
4194 0,
4195 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
4196 NADDR (msgout),
4197 SCR_CLR (SCR_ACK|SCR_ATN),
4198 0,
4199 SCR_WAIT_DISC,
4200 0,
4201 SCR_INT,
4202 SIR_RESEL_ABORTED,
4203 SCR_JUMP,
4204 PADDR (start),
4205 }/*-------------------------< RESEND_IDENT >-------------------*/,{
4206 /*
4207 ** The target stays in MSG OUT phase after having acked
4208 ** Identify [+ Tag [+ Extended message ]]. Targets shall
4209 ** behave this way on parity error.
4210 ** We must send it again all the messages.
4211 */
4212 SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the */
4213 0, /* 1rst ACK = 90 ns. Hope the NCR is'nt too fast */
4214 SCR_JUMP,
4215 PADDR (send_ident),
4216 }/*-------------------------< IDENT_BREAK >-------------------*/,{
4217 SCR_CLR (SCR_ATN),
4218 0,
4219 SCR_JUMP,
4220 PADDR (select2),
4221 }/*-------------------------< IDENT_BREAK_ATN >----------------*/,{
4222 SCR_SET (SCR_ATN),
4223 0,
4224 SCR_JUMP,
4225 PADDR (select2),
4226 }/*-------------------------< SDATA_IN >-------------------*/,{
4227 SCR_CHMOV_TBL ^ SCR_DATA_IN,
4228 offsetof (struct dsb, sense),
4229 SCR_CALL,
4230 PADDR (dispatch),
4231 SCR_JUMP,
4232 PADDRH (no_data),
4233
4234 }/*-------------------------< DATA_IO >--------------------*/,{
4235 /*
4236 ** We jump here if the data direction was unknown at the
4237 ** time we had to queue the command to the scripts processor.
4238 ** Pointers had been set as follow in this situation:
4239 ** savep --> DATA_IO
4240 ** lastp --> start pointer when DATA_IN
4241 ** goalp --> goal pointer when DATA_IN
4242 ** wlastp --> start pointer when DATA_OUT
4243 ** wgoalp --> goal pointer when DATA_OUT
4244 ** This script sets savep/lastp/goalp according to the
4245 ** direction chosen by the target.
4246 */
4247 SCR_JUMP ^ IFTRUE (WHEN (SCR_DATA_OUT)),
4248 PADDRH(data_io_out),
4249 }/*-------------------------< DATA_IO_COM >-----------------*/,{
4250 /*
4251 ** Direction is DATA IN.
4252 ** Warning: we jump here, even when phase is DATA OUT.
4253 */
4254 SCR_LOAD_REL (scratcha, 4),
4255 offsetof (struct ccb, phys.header.lastp),
4256 SCR_STORE_REL (scratcha, 4),
4257 offsetof (struct ccb, phys.header.savep),
4258
4259 /*
4260 ** Jump to the SCRIPTS according to actual direction.
4261 */
4262 SCR_LOAD_REL (temp, 4),
4263 offsetof (struct ccb, phys.header.savep),
4264 SCR_RETURN,
4265 0,
4266 }/*-------------------------< DATA_IO_OUT >-----------------*/,{
4267 /*
4268 ** Direction is DATA OUT.
4269 */
4270 SCR_REG_REG (HF_REG, SCR_AND, (~HF_DATA_IN)),
4271 0,
4272 SCR_LOAD_REL (scratcha, 4),
4273 offsetof (struct ccb, phys.header.wlastp),
4274 SCR_STORE_REL (scratcha, 4),
4275 offsetof (struct ccb, phys.header.lastp),
4276 SCR_LOAD_REL (scratcha, 4),
4277 offsetof (struct ccb, phys.header.wgoalp),
4278 SCR_STORE_REL (scratcha, 4),
4279 offsetof (struct ccb, phys.header.goalp),
4280 SCR_JUMP,
4281 PADDRH(data_io_com),
4282
4283 }/*-------------------------< BAD_IDENTIFY >---------------*/,{
4284 /*
4285 ** If message phase but not an IDENTIFY,
4286 ** get some help from the C code.
4287 ** Old SCSI device may behave so.
4288 */
4289 SCR_JUMPR ^ IFTRUE (MASK (0x80, 0x80)),
4290 16,
4291 SCR_INT,
4292 SIR_RESEL_NO_IDENTIFY,
4293 SCR_JUMP,
4294 PADDRH (abort_resel),
4295 /*
4296 ** Message is an IDENTIFY, but lun is unknown.
4297 ** Read the message, since we got it directly
4298 ** from the SCSI BUS data lines.
4299 ** Signal problem to C code for logging the event.
4300 ** Send a M_ABORT to clear all pending tasks.
4301 */
4302 SCR_INT,
4303 SIR_RESEL_BAD_LUN,
4304 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
4305 NADDR (msgin),
4306 SCR_JUMP,
4307 PADDRH (abort_resel),
4308 }/*-------------------------< BAD_I_T_L >------------------*/,{
4309 /*
4310 ** We donnot have a task for that I_T_L.
4311 ** Signal problem to C code for logging the event.
4312 ** Send a M_ABORT message.
4313 */
4314 SCR_INT,
4315 SIR_RESEL_BAD_I_T_L,
4316 SCR_JUMP,
4317 PADDRH (abort_resel),
4318 }/*-------------------------< BAD_I_T_L_Q >----------------*/,{
4319 /*
4320 ** We donnot have a task that matches the tag.
4321 ** Signal problem to C code for logging the event.
4322 ** Send a M_ABORTTAG message.
4323 */
4324 SCR_INT,
4325 SIR_RESEL_BAD_I_T_L_Q,
4326 SCR_JUMP,
4327 PADDRH (abort_resel),
4328 }/*-------------------------< BAD_STATUS >-----------------*/,{
4329 /*
4330 ** Anything different from INTERMEDIATE
4331 ** CONDITION MET should be a bad SCSI status,
4332 ** given that GOOD status has already been tested.
4333 ** Call the C code.
4334 */
4335 SCR_LOAD_ABS (scratcha, 4),
4336 PADDRH (startpos),
4337 SCR_INT ^ IFFALSE (DATA (S_COND_MET)),
4338 SIR_BAD_STATUS,
4339 SCR_RETURN,
4340 0,
4341
4342 }/*-------------------------< TWEAK_PMJ >------------------*/,{
4343 /*
4344 ** Disable PM handling from SCRIPTS for the data phase
4345 ** and so force PM to be handled from C code if HF_PM_TO_C
4346 ** flag is set.
4347 */
4348 SCR_FROM_REG(HF_REG),
4349 0,
4350 SCR_JUMPR ^ IFTRUE (MASK (HF_PM_TO_C, HF_PM_TO_C)),
4351 16,
4352 SCR_REG_REG (ccntl0, SCR_OR, ENPMJ),
4353 0,
4354 SCR_RETURN,
4355 0,
4356 SCR_REG_REG (ccntl0, SCR_AND, (~ENPMJ)),
4357 0,
4358 SCR_RETURN,
4359 0,
4360
4361 }/*-------------------------< PM_HANDLE >------------------*/,{
4362 /*
4363 ** Phase mismatch handling.
4364 **
4365 ** Since we have to deal with 2 SCSI data pointers
4366 ** (current and saved), we need at least 2 contexts.
4367 ** Each context (pm0 and pm1) has a saved area, a
4368 ** SAVE mini-script and a DATA phase mini-script.
4369 */
4370 /*
4371 ** Get the PM handling flags.
4372 */
4373 SCR_FROM_REG (HF_REG),
4374 0,
4375 /*
4376 ** If no flags (1rst PM for example), avoid
4377 ** all the below heavy flags testing.
4378 ** This makes the normal case a bit faster.
4379 */
4380 SCR_JUMP ^ IFTRUE (MASK (0, (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED))),
4381 PADDRH (pm_handle1),
4382 /*
4383 ** If we received a SAVE DP, switch to the
4384 ** other PM context since the savep may point
4385 ** to the current PM context.
4386 */
4387 SCR_JUMPR ^ IFFALSE (MASK (HF_DP_SAVED, HF_DP_SAVED)),
4388 8,
4389 SCR_REG_REG (sfbr, SCR_XOR, HF_ACT_PM),
4390 0,
4391 /*
4392 ** If we have been interrupt in a PM DATA mini-script,
4393 ** we take the return address from the corresponding
4394 ** saved area.
4395 ** This ensure the return address always points to the
4396 ** main DATA script for this transfer.
4397 */
4398 SCR_JUMP ^ IFTRUE (MASK (0, (HF_IN_PM0 | HF_IN_PM1))),
4399 PADDRH (pm_handle1),
4400 SCR_JUMPR ^ IFFALSE (MASK (HF_IN_PM0, HF_IN_PM0)),
4401 16,
4402 SCR_LOAD_REL (ia, 4),
4403 offsetof(struct ccb, phys.pm0.ret),
4404 SCR_JUMP,
4405 PADDRH (pm_save),
4406 SCR_LOAD_REL (ia, 4),
4407 offsetof(struct ccb, phys.pm1.ret),
4408 SCR_JUMP,
4409 PADDRH (pm_save),
4410 }/*-------------------------< PM_HANDLE1 >-----------------*/,{
4411 /*
4412 ** Normal case.
4413 ** Update the return address so that it
4414 ** will point after the interrupted MOVE.
4415 */
4416 SCR_REG_REG (ia, SCR_ADD, 8),
4417 0,
4418 SCR_REG_REG (ia1, SCR_ADDC, 0),
4419 0,
4420 }/*-------------------------< PM_SAVE >--------------------*/,{
4421 /*
4422 ** Clear all the flags that told us if we were
4423 ** interrupted in a PM DATA mini-script and/or
4424 ** we received a SAVE DP.
4425 */
4426 SCR_SFBR_REG (HF_REG, SCR_AND, (~(HF_IN_PM0|HF_IN_PM1|HF_DP_SAVED))),
4427 0,
4428 /*
4429 ** Choose the current PM context.
4430 */
4431 SCR_JUMP ^ IFTRUE (MASK (HF_ACT_PM, HF_ACT_PM)),
4432 PADDRH (pm1_save),
4433 }/*-------------------------< PM0_SAVE >-------------------*/,{
4434 SCR_STORE_REL (ia, 4),
4435 offsetof(struct ccb, phys.pm0.ret),
4436 /*
4437 ** If WSR bit is set, either UA and RBC may
4438 ** have to be changed whatever the device wants
4439 ** to ignore this residue ot not.
4440 */
4441 SCR_FROM_REG (scntl2),
4442 0,
4443 SCR_CALL ^ IFTRUE (MASK (WSR, WSR)),
4444 PADDRH (swide_scr_64),
4445 /*
4446 ** Save the remaining byte count, the updated
4447 ** address and the return address.
4448 */
4449 SCR_STORE_REL (rbc, 4),
4450 offsetof(struct ccb, phys.pm0.sg.size),
4451 SCR_STORE_REL (ua, 4),
4452 offsetof(struct ccb, phys.pm0.sg.addr),
4453 /*
4454 ** Set the current pointer at the PM0 DATA mini-script.
4455 */
4456 SCR_LOAD_ABS (temp, 4),
4457 PADDRH (pm0_data_addr),
4458 SCR_JUMP,
4459 PADDR (dispatch),
4460 }/*-------------------------< PM1_SAVE >-------------------*/,{
4461 SCR_STORE_REL (ia, 4),
4462 offsetof(struct ccb, phys.pm1.ret),
4463 /*
4464 ** If WSR bit is set, either UA and RBC may
4465 ** have been changed whatever the device wants
4466 ** to ignore this residue or not.
4467 */
4468 SCR_FROM_REG (scntl2),
4469 0,
4470 SCR_CALL ^ IFTRUE (MASK (WSR, WSR)),
4471 PADDRH (swide_scr_64),
4472 /*
4473 ** Save the remaining byte count, the updated
4474 ** address and the return address.
4475 */
4476 SCR_STORE_REL (rbc, 4),
4477 offsetof(struct ccb, phys.pm1.sg.size),
4478 SCR_STORE_REL (ua, 4),
4479 offsetof(struct ccb, phys.pm1.sg.addr),
4480 /*
4481 ** Set the current pointer at the PM1 DATA mini-script.
4482 */
4483 SCR_LOAD_ABS (temp, 4),
4484 PADDRH (pm1_data_addr),
4485 SCR_JUMP,
4486 PADDR (dispatch),
4487
4488 }/*--------------------------< SWIDE_MA_32 >-----------------------*/,{
4489 /*
4490 ** Handling of the SWIDE for 32 bit chips.
4491 **
4492 ** We jump here from the C code with SCRATCHA
4493 ** containing the address to write the SWIDE.
4494 ** - Save 32 bit address in <scratch>.
4495 */
4496 SCR_STORE_ABS (scratcha, 4),
4497 PADDRH (scratch),
4498 SCR_JUMP,
4499 PADDRH (swide_common),
4500 }/*--------------------------< SWIDE_MA_64 >-----------------------*/,{
4501 /*
4502 ** Handling of the SWIDE for 64 bit chips when the
4503 ** hardware handling of phase mismatch is disabled.
4504 **
4505 ** We jump here from the C code with SCRATCHA
4506 ** containing the address to write the SWIDE and
4507 ** SBR containing bit 32..39 of this address.
4508 ** - Save 32 bit address in <scratch>.
4509 ** - Move address bit 32..39 to SFBR.
4510 */
4511 SCR_STORE_ABS (scratcha, 4),
4512 PADDRH (scratch),
4513 SCR_FROM_REG (sbr),
4514 0,
4515 SCR_JUMP,
4516 PADDRH (swide_com_64),
4517 }/*--------------------------< SWIDE_SCR_64 >-----------------------*/,{
4518 /*
4519 ** Handling of the SWIDE for 64 bit chips when
4520 ** hardware phase mismatch is enabled.
4521 ** We are entered with a SCR_CALL from PMO_SAVE
4522 ** and PM1_SAVE sub-scripts.
4523 **
4524 ** Snoop the SCSI BUS in case of the device
4525 ** willing to ignore this residue.
4526 ** If it does, we must only increment the RBC,
4527 ** since this register does reflect all bytes
4528 ** received from the SCSI BUS including the SWIDE.
4529 */
4530 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
4531 PADDRH (swide_scr_64_1),
4532 SCR_FROM_REG (sbdl),
4533 0,
4534 SCR_JUMP ^ IFFALSE (DATA (M_IGN_RESIDUE)),
4535 PADDRH (swide_scr_64_1),
4536 SCR_REG_REG (rbc, SCR_ADD, 1),
4537 0,
4538 SCR_REG_REG (rbc1, SCR_ADDC, 0),
4539 0,
4540 SCR_REG_REG (rbc2, SCR_ADDC, 0),
4541 0,
4542 /*
4543 ** Save UA and RBC, since the PM0/1_SAVE
4544 ** sub-scripts haven't moved them to the
4545 ** context yet and the below MOV may just
4546 ** change their value.
4547 */
4548 SCR_STORE_ABS (ua, 4),
4549 PADDRH (scratch),
4550 SCR_STORE_ABS (rbc, 4),
4551 PADDRH (scratch1),
4552 /*
4553 ** Throw away the IGNORE WIDE RESIDUE message.
4554 ** since we just did take care of it.
4555 */
4556 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
4557 NADDR (scratch),
4558 SCR_CLR (SCR_ACK),
4559 0,
4560 /*
4561 ** Restore UA and RBC registers and return.
4562 */
4563 SCR_LOAD_ABS (ua, 4),
4564 PADDRH (scratch),
4565 SCR_LOAD_ABS (rbc, 4),
4566 PADDRH (scratch1),
4567 SCR_RETURN,
4568 0,
4569 }/*--------------------------< SWIDE_SCR_64_1 >---------------------*/,{
4570 /*
4571 ** We must grab the SWIDE and move it to
4572 ** memory.
4573 **
4574 ** - Save UA (32 bit address) in <scratch>.
4575 ** - Move address bit 32..39 to SFBR.
4576 ** - Increment UA (updated address).
4577 */
4578 SCR_STORE_ABS (ua, 4),
4579 PADDRH (scratch),
4580 SCR_FROM_REG (rbc3),
4581 0,
4582 SCR_REG_REG (ua, SCR_ADD, 1),
4583 0,
4584 SCR_REG_REG (ua1, SCR_ADDC, 0),
4585 0,
4586 SCR_REG_REG (ua2, SCR_ADDC, 0),
4587 0,
4588 SCR_REG_REG (ua3, SCR_ADDC, 0),
4589 0,
4590 }/*--------------------------< SWIDE_COM_64 >-----------------------*/,{
4591 /*
4592 ** - Save DRS.
4593 ** - Load DRS with address bit 32..39 of the
4594 ** location to write the SWIDE.
4595 ** SFBR has been loaded with these bits.
4596 ** (Look above).
4597 */
4598 SCR_STORE_ABS (drs, 4),
4599 PADDRH (saved_drs),
4600 SCR_LOAD_ABS (drs, 4),
4601 PADDRH (zero),
4602 SCR_TO_REG (drs),
4603 0,
4604 }/*--------------------------< SWIDE_COMMON >-----------------------*/,{
4605 /*
4606 ** - Save current DSA
4607 ** - Load DSA with bit 0..31 of the memory
4608 ** location to write the SWIDE.
4609 */
4610 SCR_STORE_ABS (dsa, 4),
4611 PADDRH (saved_dsa),
4612 SCR_LOAD_ABS (dsa, 4),
4613 PADDRH (scratch),
4614 /*
4615 ** Move the SWIDE to memory.
4616 ** Clear the WSR bit.
4617 */
4618 SCR_STORE_REL (swide, 1),
4619 0,
4620 SCR_REG_REG (scntl2, SCR_OR, WSR),
4621 0,
4622 /*
4623 ** Restore the original DSA.
4624 */
4625 SCR_LOAD_ABS (dsa, 4),
4626 PADDRH (saved_dsa),
4627 }/*--------------------------< SWIDE_FIN_32 >-----------------------*/,{
4628 /*
4629 ** For 32 bit chip, the following SCRIPTS
4630 ** instruction is patched with a JUMP to dispatcher.
4631 ** (Look into the C code).
4632 */
4633 SCR_LOAD_ABS (drs, 4),
4634 PADDRH (saved_drs),
4635 /*
4636 ** 64 bit chip only.
4637 ** If PM handling from SCRIPTS, we are just
4638 ** a helper for the C code, so jump to
4639 ** dispatcher now.
4640 */
4641 SCR_FROM_REG (ccntl0),
4642 0,
4643 SCR_JUMP ^ IFFALSE (MASK (ENPMJ, ENPMJ)),
4644 PADDR (dispatch),
4645 /*
4646 ** 64 bit chip with hardware PM handling enabled.
4647 **
4648 ** Since we are paranoid:), we donnot want
4649 ** a SWIDE followed by a CHMOV(1) to lead to
4650 ** a CHMOV(0) in our PM context.
4651 ** We check against such a condition.
4652 ** Also does the C code.
4653 */
4654 SCR_FROM_REG (rbc),
4655 0,
4656 SCR_RETURN ^ IFFALSE (DATA (0)),
4657 0,
4658 SCR_FROM_REG (rbc1),
4659 0,
4660 SCR_RETURN ^ IFFALSE (DATA (0)),
4661 0,
4662 SCR_FROM_REG (rbc2),
4663 0,
4664 SCR_RETURN ^ IFFALSE (DATA (0)),
4665 0,
4666 /*
4667 ** If we are there, RBC(0..23) is zero,
4668 ** and we just have to load the current
4669 ** DATA SCRIPTS address (register TEMP)
4670 ** with the IA and go to dispatch.
4671 ** No PM context is needed.
4672 */
4673 SCR_STORE_ABS (ia, 4),
4674 PADDRH (scratch),
4675 SCR_LOAD_ABS (temp, 4),
4676 PADDRH (scratch),
4677 SCR_JUMP,
4678 PADDR (dispatch),
4679
4680 }/*-------------------------< ZERO >------------------------*/,{
4681 SCR_DATA_ZERO,
4682 }/*-------------------------< SCRATCH >---------------------*/,{
4683 SCR_DATA_ZERO,
4684 }/*-------------------------< SCRATCH1 >--------------------*/,{
4685 SCR_DATA_ZERO,
4686 }/*-------------------------< PM0_DATA_ADDR >---------------*/,{
4687 SCR_DATA_ZERO,
4688 }/*-------------------------< PM1_DATA_ADDR >---------------*/,{
4689 SCR_DATA_ZERO,
4690 }/*-------------------------< SAVED_DSA >-------------------*/,{
4691 SCR_DATA_ZERO,
4692 }/*-------------------------< SAVED_DRS >-------------------*/,{
4693 SCR_DATA_ZERO,
4694 }/*-------------------------< DONE_POS >--------------------*/,{
4695 SCR_DATA_ZERO,
4696 }/*-------------------------< STARTPOS >--------------------*/,{
4697 SCR_DATA_ZERO,
4698 }/*-------------------------< TARGTBL >---------------------*/,{
4699 SCR_DATA_ZERO,
4700
4701
4702 /*
4703 ** We may use MEMORY MOVE instructions to load the on chip-RAM,
4704 ** if it happens that mapping PCI memory is not possible.
4705 ** But writing the RAM from the CPU is the preferred method,
4706 ** since PCI 2.2 seems to disallow PCI self-mastering.
4707 */
4708
4709 #ifdef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
4710
4711 }/*-------------------------< START_RAM >-------------------*/,{
4712 /*
4713 ** Load the script into on-chip RAM,
4714 ** and jump to start point.
4715 */
4716 SCR_COPY (sizeof (struct script)),
4717 }/*-------------------------< SCRIPT0_BA >--------------------*/,{
4718 0,
4719 PADDR (start),
4720 SCR_JUMP,
4721 PADDR (init),
4722
4723 }/*-------------------------< START_RAM64 >--------------------*/,{
4724 /*
4725 ** Load the RAM and start for 64 bit PCI (895A,896).
4726 ** Both scripts (script and scripth) are loaded into
4727 ** the RAM which is 8K (4K for 825A/875/895).
4728 ** We also need to load some 32-63 bit segments
4729 ** address of the SCRIPTS processor.
4730 ** LOAD/STORE ABSOLUTE always refers to on-chip RAM
4731 ** in our implementation. The main memory is
4732 ** accessed using LOAD/STORE DSA RELATIVE.
4733 */
4734 SCR_LOAD_REL (mmws, 4),
4735 offsetof (struct ncb, scr_ram_seg),
4736 SCR_COPY (sizeof(struct script)),
4737 }/*-------------------------< SCRIPT0_BA64 >--------------------*/,{
4738 0,
4739 PADDR (start),
4740 SCR_COPY (sizeof(struct scripth)),
4741 }/*-------------------------< SCRIPTH0_BA64 >--------------------*/,{
4742 0,
4743 PADDRH (start64),
4744 SCR_LOAD_REL (mmrs, 4),
4745 offsetof (struct ncb, scr_ram_seg),
4746 SCR_JUMP64,
4747 PADDRH (start64),
4748 }/*-------------------------< RAM_SEG64 >--------------------*/,{
4749 0,
4750
4751 #endif /* SCSI_NCR_PCI_MEM_NOT_SUPPORTED */
4752
4753 }/*-------------------------< SNOOPTEST >-------------------*/,{
4754 /*
4755 ** Read the variable.
4756 */
4757 SCR_LOAD_REL (scratcha, 4),
4758 offsetof(struct ncb, ncr_cache),
4759 SCR_STORE_REL (temp, 4),
4760 offsetof(struct ncb, ncr_cache),
4761 SCR_LOAD_REL (temp, 4),
4762 offsetof(struct ncb, ncr_cache),
4763 }/*-------------------------< SNOOPEND >-------------------*/,{
4764 /*
4765 ** And stop.
4766 */
4767 SCR_INT,
4768 99,
4769 }/*--------------------------------------------------------*/
4770 };
4771
4772 /*==========================================================
4773 **
4774 **
4775 ** Fill in #define dependent parts of the script
4776 **
4777 **
4778 **==========================================================
4779 */
4780
4781 void __init ncr_script_fill (struct script * scr, struct scripth * scrh)
4782 {
4783 int i;
4784 ncrcmd *p;
4785
4786 p = scr->data_in;
4787 for (i=0; i<MAX_SCATTER; i++) {
4788 *p++ =SCR_CHMOV_TBL ^ SCR_DATA_IN;
4789 *p++ =offsetof (struct dsb, data[i]);
4790 };
4791
4792 assert ((u_long)p == (u_long)&scr->data_in + sizeof (scr->data_in));
4793
4794 p = scr->data_out;
4795 for (i=0; i<MAX_SCATTER; i++) {
4796 *p++ =SCR_CHMOV_TBL ^ SCR_DATA_OUT;
4797 *p++ =offsetof (struct dsb, data[i]);
4798 };
4799
4800 assert ((u_long)p == (u_long)&scr->data_out + sizeof (scr->data_out));
4801 }
4802
4803 /*==========================================================
4804 **
4805 **
4806 ** Copy and rebind a script.
4807 **
4808 **
4809 **==========================================================
4810 */
4811
4812 static void __init
4813 ncr_script_copy_and_bind (ncb_p np,ncrcmd *src,ncrcmd *dst,int len)
4814 {
4815 ncrcmd opcode, new, old, tmp1, tmp2;
4816 ncrcmd *start, *end;
4817 int relocs;
4818 int opchanged = 0;
4819
4820 start = src;
4821 end = src + len/4;
4822
4823 while (src < end) {
4824
4825 opcode = *src++;
4826 *dst++ = cpu_to_scr(opcode);
4827
4828 /*
4829 ** If we forget to change the length
4830 ** in struct script, a field will be
4831 ** padded with 0. This is an illegal
4832 ** command.
4833 */
4834
4835 if (opcode == 0) {
4836 printk (KERN_INFO "%s: ERROR0 IN SCRIPT at %d.\n",
4837 ncr_name(np), (int) (src-start-1));
4838 MDELAY (10000);
4839 continue;
4840 };
4841
4842 /*
4843 ** We use the bogus value 0xf00ff00f ;-)
4844 ** to reserve data area in SCRIPTS.
4845 */
4846 if (opcode == SCR_DATA_ZERO) {
4847 dst[-1] = 0;
4848 continue;
4849 }
4850
4851 if (DEBUG_FLAGS & DEBUG_SCRIPT)
4852 printk (KERN_INFO "%p: <%x>\n",
4853 (src-1), (unsigned)opcode);
4854
4855 /*
4856 ** We don't have to decode ALL commands
4857 */
4858 switch (opcode >> 28) {
4859
4860 case 0xf:
4861 /*
4862 ** LOAD / STORE DSA relative, don't relocate.
4863 */
4864 relocs = 0;
4865 break;
4866 case 0xe:
4867 /*
4868 ** LOAD / STORE absolute.
4869 */
4870 relocs = 1;
4871 break;
4872 case 0xc:
4873 /*
4874 ** COPY has TWO arguments.
4875 */
4876 relocs = 2;
4877 tmp1 = src[0];
4878 tmp2 = src[1];
4879 #ifdef RELOC_KVAR
4880 if ((tmp1 & RELOC_MASK) == RELOC_KVAR)
4881 tmp1 = 0;
4882 if ((tmp2 & RELOC_MASK) == RELOC_KVAR)
4883 tmp2 = 0;
4884 #endif
4885 if ((tmp1 ^ tmp2) & 3) {
4886 printk (KERN_ERR"%s: ERROR1 IN SCRIPT at %d.\n",
4887 ncr_name(np), (int) (src-start-1));
4888 MDELAY (1000);
4889 }
4890 /*
4891 ** If PREFETCH feature not enabled, remove
4892 ** the NO FLUSH bit if present.
4893 */
4894 if ((opcode & SCR_NO_FLUSH) &&
4895 !(np->features & FE_PFEN)) {
4896 dst[-1] = cpu_to_scr(opcode & ~SCR_NO_FLUSH);
4897 ++opchanged;
4898 }
4899 break;
4900
4901 case 0x0:
4902 /*
4903 ** MOVE/CHMOV (absolute address)
4904 */
4905 if (!(np->features & FE_WIDE))
4906 dst[-1] = cpu_to_scr(opcode | OPC_MOVE);
4907 relocs = 1;
4908 break;
4909
4910 case 0x1:
4911 /*
4912 ** MOVE/CHMOV (table indirect)
4913 */
4914 if (!(np->features & FE_WIDE))
4915 dst[-1] = cpu_to_scr(opcode | OPC_MOVE);
4916 relocs = 0;
4917 break;
4918
4919 case 0x8:
4920 /*
4921 ** JUMP / CALL
4922 ** dont't relocate if relative :-)
4923 */
4924 if (opcode & 0x00800000)
4925 relocs = 0;
4926 else if ((opcode & 0xf8400000) == 0x80400000)/*JUMP64*/
4927 relocs = 2;
4928 else
4929 relocs = 1;
4930 break;
4931
4932 case 0x4:
4933 case 0x5:
4934 case 0x6:
4935 case 0x7:
4936 relocs = 1;
4937 break;
4938
4939 default:
4940 relocs = 0;
4941 break;
4942 };
4943
4944 if (!relocs) {
4945 *dst++ = cpu_to_scr(*src++);
4946 continue;
4947 }
4948 while (relocs--) {
4949 old = *src++;
4950
4951 switch (old & RELOC_MASK) {
4952 case RELOC_REGISTER:
4953 new = (old & ~RELOC_MASK) + pcivtobus(np->base_ba);
4954 break;
4955 case RELOC_LABEL:
4956 new = (old & ~RELOC_MASK) + np->p_script;
4957 break;
4958 case RELOC_LABELH:
4959 new = (old & ~RELOC_MASK) + np->p_scripth;
4960 break;
4961 case RELOC_SOFTC:
4962 new = (old & ~RELOC_MASK) + np->p_ncb;
4963 break;
4964 #ifdef RELOC_KVAR
4965 case RELOC_KVAR:
4966 if (((old & ~RELOC_MASK) < SCRIPT_KVAR_FIRST) ||
4967 ((old & ~RELOC_MASK) > SCRIPT_KVAR_LAST))
4968 panic("ncr KVAR out of range");
4969 new = vtobus(script_kvars[old & ~RELOC_MASK]);
4970 #endif
4971 break;
4972 case 0:
4973 /* Don't relocate a 0 address. */
4974 if (old == 0) {
4975 new = old;
4976 break;
4977 }
4978 /* fall through */
4979 default:
4980 new = 0; /* For 'cc' not to complain */
4981 panic("ncr_script_copy_and_bind: "
4982 "weird relocation %x\n", old);
4983 break;
4984 }
4985
4986 *dst++ = cpu_to_scr(new);
4987 }
4988 };
4989 }
4990
4991 /*==========================================================
4992 **
4993 **
4994 ** Auto configuration: attach and init a host adapter.
4995 **
4996 **
4997 **==========================================================
4998 */
4999
5000 /*
5001 ** Linux host data structure.
5002 */
5003
5004 struct host_data {
5005 struct ncb *ncb;
5006 };
5007
5008 /*
5009 ** Print something which allows to retrieve the controler type, unit,
5010 ** target, lun concerned by a kernel message.
5011 */
5012
5013 static void PRINT_TARGET(ncb_p np, int target)
5014 {
5015 printk(KERN_INFO "%s-<%d,*>: ", ncr_name(np), target);
5016 }
5017
5018 static void PRINT_LUN(ncb_p np, int target, int lun)
5019 {
5020 printk(KERN_INFO "%s-<%d,%d>: ", ncr_name(np), target, lun);
5021 }
5022
5023 static void PRINT_ADDR(Scsi_Cmnd *cmd)
5024 {
5025 struct host_data *host_data = (struct host_data *) cmd->host->hostdata;
5026 PRINT_LUN(host_data->ncb, cmd->target, cmd->lun);
5027 }
5028
5029 /*==========================================================
5030 **
5031 ** NCR chip clock divisor table.
5032 ** Divisors are multiplied by 10,000,000 in order to make
5033 ** calculations more simple.
5034 **
5035 **==========================================================
5036 */
5037
5038 #define _5M 5000000
5039 static u_long div_10M[] =
5040 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
5041
5042
5043 /*===============================================================
5044 **
5045 ** Prepare io register values used by ncr_init() according
5046 ** to selected and supported features.
5047 **
5048 ** NCR/SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
5049 ** 128 transfers. All chips support at least 16 transfers bursts.
5050 ** The 825A, 875 and 895 chips support bursts of up to 128
5051 ** transfers and the 895A and 896 support bursts of up to 64
5052 ** transfers. All other chips support up to 16 transfers bursts.
5053 **
5054 ** For PCI 32 bit data transfers each transfer is a DWORD (4 bytes).
5055 ** It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
5056 ** Only the 896 is able to perform 64 bit data transfers.
5057 **
5058 ** We use log base 2 (burst length) as internal code, with
5059 ** value 0 meaning "burst disabled".
5060 **
5061 **===============================================================
5062 */
5063
5064 /*
5065 * Burst length from burst code.
5066 */
5067 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
5068
5069 /*
5070 * Burst code from io register bits.
5071 */
5072 #define burst_code(dmode, ctest4, ctest5) \
5073 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
5074
5075 /*
5076 * Set initial io register bits from burst code.
5077 */
5078 static inline void ncr_init_burst(ncb_p np, u_char bc)
5079 {
5080 np->rv_ctest4 &= ~0x80;
5081 np->rv_dmode &= ~(0x3 << 6);
5082 np->rv_ctest5 &= ~0x4;
5083
5084 if (!bc) {
5085 np->rv_ctest4 |= 0x80;
5086 }
5087 else {
5088 --bc;
5089 np->rv_dmode |= ((bc & 0x3) << 6);
5090 np->rv_ctest5 |= (bc & 0x4);
5091 }
5092 }
5093
5094 #ifdef SCSI_NCR_NVRAM_SUPPORT
5095
5096 /*
5097 ** Get target set-up from Symbios format NVRAM.
5098 */
5099
5100 static void __init
5101 ncr_Symbios_setup_target(ncb_p np, int target, Symbios_nvram *nvram)
5102 {
5103 tcb_p tp = &np->target[target];
5104 Symbios_target *tn = &nvram->target[target];
5105
5106 tp->usrsync = tn->sync_period ? (tn->sync_period + 3) / 4 : 255;
5107 tp->usrwide = tn->bus_width == 0x10 ? 1 : 0;
5108 tp->usrtags =
5109 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? MAX_TAGS : 0;
5110
5111 if (!(tn->flags & SYMBIOS_DISCONNECT_ENABLE))
5112 tp->usrflag |= UF_NODISC;
5113 if (!(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME))
5114 tp->usrflag |= UF_NOSCAN;
5115 }
5116
5117 /*
5118 ** Get target set-up from Tekram format NVRAM.
5119 */
5120
5121 static void __init
5122 ncr_Tekram_setup_target(ncb_p np, int target, Tekram_nvram *nvram)
5123 {
5124 tcb_p tp = &np->target[target];
5125 struct Tekram_target *tn = &nvram->target[target];
5126 int i;
5127
5128 if (tn->flags & TEKRAM_SYNC_NEGO) {
5129 i = tn->sync_index & 0xf;
5130 tp->usrsync = Tekram_sync[i];
5131 }
5132
5133 tp->usrwide = (tn->flags & TEKRAM_WIDE_NEGO) ? 1 : 0;
5134
5135 if (tn->flags & TEKRAM_TAGGED_COMMANDS) {
5136 tp->usrtags = 2 << nvram->max_tags_index;
5137 }
5138
5139 if (!(tn->flags & TEKRAM_DISCONNECT_ENABLE))
5140 tp->usrflag = UF_NODISC;
5141
5142 /* If any device does not support parity, we will not use this option */
5143 if (!(tn->flags & TEKRAM_PARITY_CHECK))
5144 np->rv_scntl0 &= ~0x0a; /* SCSI parity checking disabled */
5145 }
5146 #endif /* SCSI_NCR_NVRAM_SUPPORT */
5147
5148 /*
5149 ** Save initial settings of some IO registers.
5150 ** Assumed to have been set by BIOS.
5151 */
5152 static void __init ncr_save_initial_setting(ncb_p np)
5153 {
5154 np->sv_scntl0 = INB(nc_scntl0) & 0x0a;
5155 np->sv_scntl3 = INB(nc_scntl3) & 0x07;
5156 np->sv_dmode = INB(nc_dmode) & 0xce;
5157 np->sv_dcntl = INB(nc_dcntl) & 0xa8;
5158 np->sv_ctest3 = INB(nc_ctest3) & 0x01;
5159 np->sv_ctest4 = INB(nc_ctest4) & 0x80;
5160 np->sv_ctest5 = INB(nc_ctest5) & 0x24;
5161 np->sv_gpcntl = INB(nc_gpcntl);
5162 np->sv_stest2 = INB(nc_stest2) & 0x20;
5163 np->sv_stest4 = INB(nc_stest4);
5164 np->sv_stest1 = INB(nc_stest1);
5165 }
5166
5167 /*
5168 ** Prepare io register values used by ncr_init()
5169 ** according to selected and supported features.
5170 */
5171 static int __init ncr_prepare_setting(ncb_p np, ncr_nvram *nvram)
5172 {
5173 u_char burst_max;
5174 u_long period;
5175 int i;
5176
5177 /*
5178 ** Wide ?
5179 */
5180
5181 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
5182
5183 /*
5184 ** Get the frequency of the chip's clock.
5185 ** Find the right value for scntl3.
5186 */
5187
5188 if (np->features & FE_QUAD)
5189 np->multiplier = 4;
5190 else if (np->features & FE_DBLR)
5191 np->multiplier = 2;
5192 else
5193 np->multiplier = 1;
5194
5195 np->clock_khz = (np->features & FE_CLK80)? 80000 : 40000;
5196 np->clock_khz *= np->multiplier;
5197
5198 if (np->clock_khz != 40000)
5199 ncr_getclock(np, np->multiplier);
5200
5201 /*
5202 * Divisor to be used for async (timer pre-scaler).
5203 */
5204 i = np->clock_divn - 1;
5205 while (--i >= 0) {
5206 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) {
5207 ++i;
5208 break;
5209 }
5210 }
5211 np->rv_scntl3 = i+1;
5212
5213 /*
5214 * Minimum synchronous period factor supported by the chip.
5215 * Btw, 'period' is in tenths of nanoseconds.
5216 */
5217
5218 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
5219 if (period <= 250) np->minsync = 10;
5220 else if (period <= 303) np->minsync = 11;
5221 else if (period <= 500) np->minsync = 12;
5222 else np->minsync = (period + 40 - 1) / 40;
5223
5224 /*
5225 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
5226 */
5227
5228 if (np->minsync < 25 && !(np->features & (FE_ULTRA|FE_ULTRA2)))
5229 np->minsync = 25;
5230 else if (np->minsync < 12 && !(np->features & FE_ULTRA2))
5231 np->minsync = 12;
5232
5233 /*
5234 * Maximum synchronous period factor supported by the chip.
5235 */
5236
5237 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
5238 np->maxsync = period > 2540 ? 254 : period / 10;
5239
5240 /*
5241 ** 64 bit (53C895A or 53C896) ?
5242 */
5243 if (np->features & FE_64BIT)
5244 #if BITS_PER_LONG > 32
5245 np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
5246 #else
5247 np->rv_ccntl1 |= (DDAC);
5248 #endif
5249
5250 /*
5251 ** Phase mismatch handled by SCRIPTS (53C895A or 53C896) ?
5252 */
5253 if (np->features & FE_NOPM)
5254 np->rv_ccntl0 |= (ENPMJ);
5255
5256 /*
5257 ** Prepare initial value of other IO registers
5258 */
5259 #if defined SCSI_NCR_TRUST_BIOS_SETTING
5260 np->rv_scntl0 = np->sv_scntl0;
5261 np->rv_dmode = np->sv_dmode;
5262 np->rv_dcntl = np->sv_dcntl;
5263 np->rv_ctest3 = np->sv_ctest3;
5264 np->rv_ctest4 = np->sv_ctest4;
5265 np->rv_ctest5 = np->sv_ctest5;
5266 burst_max = burst_code(np->sv_dmode, np->sv_ctest4, np->sv_ctest5);
5267 #else
5268
5269 /*
5270 ** Select burst length (dwords)
5271 */
5272 burst_max = driver_setup.burst_max;
5273 if (burst_max == 255)
5274 burst_max = burst_code(np->sv_dmode, np->sv_ctest4, np->sv_ctest5);
5275 if (burst_max > 7)
5276 burst_max = 7;
5277 if (burst_max > np->maxburst)
5278 burst_max = np->maxburst;
5279
5280 /*
5281 ** DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
5282 ** This chip and the 860 Rev 1 may wrongly use PCI cache line
5283 ** based transactions on LOAD/STORE instructions. So we have
5284 ** to prevent these chips from using such PCI transactions in
5285 ** this driver. The generic sym53c8xx driver that does not use
5286 ** LOAD/STORE instructions does not need this work-around.
5287 */
5288 if ((np->device_id == PCI_DEVICE_ID_NCR_53C810 &&
5289 np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
5290 (np->device_id == PCI_DEVICE_ID_NCR_53C860 &&
5291 np->revision_id <= 0x1))
5292 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
5293
5294 /*
5295 ** Select all supported special features.
5296 ** If we are using on-board RAM for scripts, prefetch (PFEN)
5297 ** does not help, but burst op fetch (BOF) does.
5298 ** Disabling PFEN makes sure BOF will be used.
5299 */
5300 if (np->features & FE_ERL)
5301 np->rv_dmode |= ERL; /* Enable Read Line */
5302 if (np->features & FE_BOF)
5303 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
5304 if (np->features & FE_ERMP)
5305 np->rv_dmode |= ERMP; /* Enable Read Multiple */
5306 #ifdef SCSI_NCR_OPTIMIZE_896
5307 if ((np->features & FE_PFEN) && !np->base2_ba)
5308 #else
5309 if (np->features & FE_PFEN)
5310 #endif
5311 np->rv_dcntl |= PFEN; /* Prefetch Enable */
5312 if (np->features & FE_CLSE)
5313 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
5314 if (np->features & FE_WRIE)
5315 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
5316 if (np->features & FE_DFS)
5317 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
5318
5319 /*
5320 ** Select some other
5321 */
5322 if (driver_setup.master_parity)
5323 np->rv_ctest4 |= MPEE; /* Master parity checking */
5324 if (driver_setup.scsi_parity)
5325 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
5326
5327 #ifdef SCSI_NCR_NVRAM_SUPPORT
5328 /*
5329 ** Get parity checking, host ID and verbose mode from NVRAM
5330 **/
5331 if (nvram) {
5332 switch(nvram->type) {
5333 case SCSI_NCR_TEKRAM_NVRAM:
5334 np->myaddr = nvram->data.Tekram.host_id & 0x0f;
5335 break;
5336 case SCSI_NCR_SYMBIOS_NVRAM:
5337 if (!(nvram->data.Symbios.flags & SYMBIOS_PARITY_ENABLE))
5338 np->rv_scntl0 &= ~0x0a;
5339 np->myaddr = nvram->data.Symbios.host_id & 0x0f;
5340 if (nvram->data.Symbios.flags & SYMBIOS_VERBOSE_MSGS)
5341 np->verbose += 1;
5342 break;
5343 }
5344 }
5345 #endif
5346 /*
5347 ** Get SCSI addr of host adapter (set by bios?).
5348 */
5349 if (np->myaddr == 255) {
5350 np->myaddr = INB(nc_scid) & 0x07;
5351 if (!np->myaddr)
5352 np->myaddr = SCSI_NCR_MYADDR;
5353 }
5354
5355 #endif /* SCSI_NCR_TRUST_BIOS_SETTING */
5356
5357 /*
5358 * Prepare initial io register bits for burst length
5359 */
5360 ncr_init_burst(np, burst_max);
5361
5362 /*
5363 ** Set SCSI BUS mode.
5364 **
5365 ** - ULTRA2 chips (895/895A/896) report the current
5366 ** BUS mode through the STEST4 IO register.
5367 ** - For previous generation chips (825/825A/875),
5368 ** user has to tell us how to check against HVD,
5369 ** since a 100% safe algorithm is not possible.
5370 */
5371 np->scsi_mode = SMODE_SE;
5372 if (np->features & FE_ULTRA2)
5373 np->scsi_mode = (np->sv_stest4 & SMODE);
5374 else if (np->features & FE_DIFF) {
5375 switch(driver_setup.diff_support) {
5376 case 4: /* Trust previous settings if present, then GPIO3 */
5377 if (np->sv_scntl3) {
5378 if (np->sv_stest2 & 0x20)
5379 np->scsi_mode = SMODE_HVD;
5380 break;
5381 }
5382 case 3: /* SYMBIOS controllers report HVD through GPIO3 */
5383 if (nvram && nvram->type != SCSI_NCR_SYMBIOS_NVRAM)
5384 break;
5385 if (INB(nc_gpreg) & 0x08)
5386 break;
5387 case 2: /* Set HVD unconditionally */
5388 np->scsi_mode = SMODE_HVD;
5389 case 1: /* Trust previous settings for HVD */
5390 if (np->sv_stest2 & 0x20)
5391 np->scsi_mode = SMODE_HVD;
5392 break;
5393 default:/* Don't care about HVD */
5394 break;
5395 }
5396 }
5397 if (np->scsi_mode == SMODE_HVD)
5398 np->rv_stest2 |= 0x20;
5399
5400 /*
5401 ** Set LED support from SCRIPTS.
5402 ** Ignore this feature for boards known to use a
5403 ** specific GPIO wiring and for the 895A or 896
5404 ** that drive the LED directly.
5405 ** Also probe initial setting of GPIO0 as output.
5406 */
5407 if ((driver_setup.led_pin ||
5408 (nvram && nvram->type == SCSI_NCR_SYMBIOS_NVRAM)) &&
5409 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
5410 np->features |= FE_LED0;
5411
5412 /*
5413 ** Set irq mode.
5414 */
5415 switch(driver_setup.irqm & 3) {
5416 case 2:
5417 np->rv_dcntl |= IRQM;
5418 break;
5419 case 1:
5420 np->rv_dcntl |= (np->sv_dcntl & IRQM);
5421 break;
5422 default:
5423 break;
5424 }
5425
5426 /*
5427 ** Configure targets according to driver setup.
5428 ** If NVRAM present get targets setup from NVRAM.
5429 ** Allow to override sync, wide and NOSCAN from
5430 ** boot command line.
5431 */
5432 for (i = 0 ; i < MAX_TARGET ; i++) {
5433 tcb_p tp = &np->target[i];
5434
5435 tp->usrsync = 255;
5436 #ifdef SCSI_NCR_NVRAM_SUPPORT
5437 if (nvram) {
5438 switch(nvram->type) {
5439 case SCSI_NCR_TEKRAM_NVRAM:
5440 ncr_Tekram_setup_target(np, i, &nvram->data.Tekram);
5441 break;
5442 case SCSI_NCR_SYMBIOS_NVRAM:
5443 ncr_Symbios_setup_target(np, i, &nvram->data.Symbios);
5444 break;
5445 }
5446 if (driver_setup.use_nvram & 0x2)
5447 tp->usrsync = driver_setup.default_sync;
5448 if (driver_setup.use_nvram & 0x4)
5449 tp->usrwide = driver_setup.max_wide;
5450 if (driver_setup.use_nvram & 0x8)
5451 tp->usrflag &= ~UF_NOSCAN;
5452 }
5453 else {
5454 #else
5455 if (1) {
5456 #endif
5457 tp->usrsync = driver_setup.default_sync;
5458 tp->usrwide = driver_setup.max_wide;
5459 tp->usrtags = MAX_TAGS;
5460 if (!driver_setup.disconnection)
5461 np->target[i].usrflag = UF_NODISC;
5462 }
5463 }
5464
5465 /*
5466 ** Announce all that stuff to user.
5467 */
5468
5469 i = nvram ? nvram->type : 0;
5470 printk(KERN_INFO "%s: %sID %d, Fast-%d%s%s\n", ncr_name(np),
5471 i == SCSI_NCR_SYMBIOS_NVRAM ? "Symbios format NVRAM, " :
5472 (i == SCSI_NCR_TEKRAM_NVRAM ? "Tekram format NVRAM, " : ""),
5473 np->myaddr,
5474 np->minsync < 12 ? 40 : (np->minsync < 25 ? 20 : 10),
5475 (np->rv_scntl0 & 0xa) ? ", Parity Checking" : ", NO Parity",
5476 (np->rv_stest2 & 0x20) ? ", Differential" : "");
5477
5478 if (bootverbose > 1) {
5479 printk (KERN_INFO "%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
5480 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
5481 ncr_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
5482 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
5483
5484 printk (KERN_INFO "%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
5485 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
5486 ncr_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
5487 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
5488 }
5489
5490 if (bootverbose && np->base2_ba)
5491 printk (KERN_INFO "%s: on-chip RAM at 0x%lx\n",
5492 ncr_name(np), np->base2_ba);
5493
5494 return 0;
5495 }
5496
5497
5498 #ifdef SCSI_NCR_DEBUG_NVRAM
5499
5500 void __init ncr_display_Symbios_nvram(ncb_p np, Symbios_nvram *nvram)
5501 {
5502 int i;
5503
5504 /* display Symbios nvram host data */
5505 printk(KERN_DEBUG "%s: HOST ID=%d%s%s%s%s%s\n",
5506 ncr_name(np), nvram->host_id & 0x0f,
5507 (nvram->flags & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
5508 (nvram->flags & SYMBIOS_PARITY_ENABLE) ? " PARITY" :"",
5509 (nvram->flags & SYMBIOS_VERBOSE_MSGS) ? " VERBOSE" :"",
5510 (nvram->flags & SYMBIOS_CHS_MAPPING) ? " CHS_ALT" :"",
5511 (nvram->flags1 & SYMBIOS_SCAN_HI_LO) ? " HI_LO" :"");
5512
5513 /* display Symbios nvram drive data */
5514 for (i = 0 ; i < 15 ; i++) {
5515 struct Symbios_target *tn = &nvram->target[i];
5516 printk(KERN_DEBUG "%s-%d:%s%s%s%s WIDTH=%d SYNC=%d TMO=%d\n",
5517 ncr_name(np), i,
5518 (tn->flags & SYMBIOS_DISCONNECT_ENABLE) ? " DISC" : "",
5519 (tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME) ? " SCAN_BOOT" : "",
5520 (tn->flags & SYMBIOS_SCAN_LUNS) ? " SCAN_LUNS" : "",
5521 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? " TCQ" : "",
5522 tn->bus_width,
5523 tn->sync_period / 4,
5524 tn->timeout);
5525 }
5526 }
5527
5528 static u_char Tekram_boot_delay[7] __initdata = {3, 5, 10, 20, 30, 60, 120};
5529
5530 void __init ncr_display_Tekram_nvram(ncb_p np, Tekram_nvram *nvram)
5531 {
5532 int i, tags, boot_delay;
5533 char *rem;
5534
5535 /* display Tekram nvram host data */
5536 tags = 2 << nvram->max_tags_index;
5537 boot_delay = 0;
5538 if (nvram->boot_delay_index < 6)
5539 boot_delay = Tekram_boot_delay[nvram->boot_delay_index];
5540 switch((nvram->flags & TEKRAM_REMOVABLE_FLAGS) >> 6) {
5541 default:
5542 case 0: rem = ""; break;
5543 case 1: rem = " REMOVABLE=boot device"; break;
5544 case 2: rem = " REMOVABLE=all"; break;
5545 }
5546
5547 printk(KERN_DEBUG
5548 "%s: HOST ID=%d%s%s%s%s%s%s%s%s%s BOOT DELAY=%d tags=%d\n",
5549 ncr_name(np), nvram->host_id & 0x0f,
5550 (nvram->flags1 & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
5551 (nvram->flags & TEKRAM_MORE_THAN_2_DRIVES) ? " >2DRIVES" :"",
5552 (nvram->flags & TEKRAM_DRIVES_SUP_1GB) ? " >1GB" :"",
5553 (nvram->flags & TEKRAM_RESET_ON_POWER_ON) ? " RESET" :"",
5554 (nvram->flags & TEKRAM_ACTIVE_NEGATION) ? " ACT_NEG" :"",
5555 (nvram->flags & TEKRAM_IMMEDIATE_SEEK) ? " IMM_SEEK" :"",
5556 (nvram->flags & TEKRAM_SCAN_LUNS) ? " SCAN_LUNS" :"",
5557 (nvram->flags1 & TEKRAM_F2_F6_ENABLED) ? " F2_F6" :"",
5558 rem, boot_delay, tags);
5559
5560 /* display Tekram nvram drive data */
5561 for (i = 0; i <= 15; i++) {
5562 int sync, j;
5563 struct Tekram_target *tn = &nvram->target[i];
5564 j = tn->sync_index & 0xf;
5565 sync = Tekram_sync[j];
5566 printk(KERN_DEBUG "%s-%d:%s%s%s%s%s%s PERIOD=%d\n",
5567 ncr_name(np), i,
5568 (tn->flags & TEKRAM_PARITY_CHECK) ? " PARITY" : "",
5569 (tn->flags & TEKRAM_SYNC_NEGO) ? " SYNC" : "",
5570 (tn->flags & TEKRAM_DISCONNECT_ENABLE) ? " DISC" : "",
5571 (tn->flags & TEKRAM_START_CMD) ? " START" : "",
5572 (tn->flags & TEKRAM_TAGGED_COMMANDS) ? " TCQ" : "",
5573 (tn->flags & TEKRAM_WIDE_NEGO) ? " WIDE" : "",
5574 sync);
5575 }
5576 }
5577 #endif /* SCSI_NCR_DEBUG_NVRAM */
5578
5579 /*
5580 ** Host attach and initialisations.
5581 **
5582 ** Allocate host data and ncb structure.
5583 ** Request IO region and remap MMIO region.
5584 ** Do chip initialization.
5585 ** If all is OK, install interrupt handling and
5586 ** start the timer daemon.
5587 */
5588
5589 static int __init
5590 ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device)
5591 {
5592 struct host_data *host_data;
5593 ncb_p np = 0;
5594 struct Scsi_Host *instance = 0;
5595 u_long flags = 0;
5596 ncr_nvram *nvram = device->nvram;
5597 int i;
5598
5599 printk(KERN_INFO NAME53C "%s-%d: rev 0x%x on pci bus %d device %d function %d "
5600 #ifdef __sparc__
5601 "irq %s\n",
5602 #else
5603 "irq %d\n",
5604 #endif
5605 device->chip.name, unit, device->chip.revision_id,
5606 device->slot.bus, (device->slot.device_fn & 0xf8) >> 3,
5607 device->slot.device_fn & 7,
5608 #ifdef __sparc__
5609 __irq_itoa(device->slot.irq));
5610 #else
5611 device->slot.irq);
5612 #endif
5613
5614 /*
5615 ** Allocate host_data structure
5616 */
5617 if (!(instance = scsi_register(tpnt, sizeof(*host_data))))
5618 goto attach_error;
5619 host_data = (struct host_data *) instance->hostdata;
5620
5621 /*
5622 ** Allocate the host control block.
5623 */
5624 np = __m_calloc_dma(device->pdev, sizeof(struct ncb), "NCB");
5625 if (!np)
5626 goto attach_error;
5627 NCR_INIT_LOCK_NCB(np);
5628 np->pdev = device->pdev;
5629 np->p_ncb = vtobus(np);
5630 host_data->ncb = np;
5631
5632 /*
5633 ** Store input informations in the host data structure.
5634 */
5635 strncpy(np->chip_name, device->chip.name, sizeof(np->chip_name) - 1);
5636 np->unit = unit;
5637 np->verbose = driver_setup.verbose;
5638 sprintf(np->inst_name, NAME53C "%s-%d", np->chip_name, np->unit);
5639 np->device_id = device->chip.device_id;
5640 np->revision_id = device->chip.revision_id;
5641 np->bus = device->slot.bus;
5642 np->device_fn = device->slot.device_fn;
5643 np->features = device->chip.features;
5644 np->clock_divn = device->chip.nr_divisor;
5645 np->maxoffs = device->chip.offset_max;
5646 np->maxburst = device->chip.burst_max;
5647 np->myaddr = device->host_id;
5648
5649 /*
5650 ** Allocate the start queue.
5651 */
5652 np->squeue = (ncrcmd *)
5653 m_calloc_dma(sizeof(ncrcmd)*(MAX_START*2), "SQUEUE");
5654 if (!np->squeue)
5655 goto attach_error;
5656 np->p_squeue = vtobus(np->squeue);
5657
5658 /*
5659 ** Allocate the done queue.
5660 */
5661 np->dqueue = (ncrcmd *)
5662 m_calloc_dma(sizeof(ncrcmd)*(MAX_START*2), "DQUEUE");
5663 if (!np->dqueue)
5664 goto attach_error;
5665
5666 /*
5667 ** Allocate the target bus address array.
5668 */
5669 np->targtbl = (u_int32 *) m_calloc_dma(256, "TARGTBL");
5670 if (!np->targtbl)
5671 goto attach_error;
5672
5673 /*
5674 ** Allocate SCRIPTS areas
5675 */
5676 np->script0 = (struct script *)
5677 m_calloc_dma(sizeof(struct script), "SCRIPT");
5678 if (!np->script0)
5679 goto attach_error;
5680 np->scripth0 = (struct scripth *)
5681 m_calloc_dma(sizeof(struct scripth), "SCRIPTH");
5682 if (!np->scripth0)
5683 goto attach_error;
5684
5685 /*
5686 ** Initialyze the CCB free queue and,
5687 ** allocate some CCB. We need at least ONE.
5688 */
5689 xpt_que_init(&np->free_ccbq);
5690 xpt_que_init(&np->b0_ccbq);
5691 if (!ncr_alloc_ccb(np))
5692 goto attach_error;
5693
5694 /*
5695 ** Initialize timer structure
5696 **
5697 */
5698 init_timer(&np->timer);
5699 np->timer.data = (unsigned long) np;
5700 np->timer.function = sym53c8xx_timeout;
5701
5702 /*
5703 ** Try to map the controller chip to
5704 ** virtual and physical memory.
5705 */
5706
5707 np->base_ba = device->slot.base;
5708 np->base_ws = (np->features & FE_IO256)? 256 : 128;
5709 np->base2_ba = (np->features & FE_RAM)? device->slot.base_2 : 0;
5710
5711 #ifndef NCR_IOMAPPED
5712 np->base_va = remap_pci_mem(np->base_ba, np->base_ws);
5713 if (!np->base_va) {
5714 printk(KERN_ERR "%s: can't map PCI MMIO region\n",ncr_name(np));
5715 goto attach_error;
5716 }
5717 else if (bootverbose > 1)
5718 printk(KERN_INFO "%s: using memory mapped IO\n", ncr_name(np));
5719
5720 /*
5721 ** Make the controller's registers available.
5722 ** Now the INB INW INL OUTB OUTW OUTL macros
5723 ** can be used safely.
5724 */
5725
5726 np->reg = (struct ncr_reg *) np->base_va;
5727
5728 #endif /* !defined NCR_IOMAPPED */
5729
5730 /*
5731 ** If on-chip RAM is used, make sure SCRIPTS isn't too large.
5732 */
5733 if (np->base2_ba && sizeof(struct script) > 4096) {
5734 printk(KERN_ERR "%s: script too large.\n", ncr_name(np));
5735 goto attach_error;
5736 }
5737
5738 /*
5739 ** Try to map the controller chip into iospace.
5740 */
5741
5742 if (device->slot.io_port) {
5743 request_region(device->slot.io_port, np->base_ws, NAME53C8XX);
5744 np->base_io = device->slot.io_port;
5745 }
5746
5747 #ifdef SCSI_NCR_NVRAM_SUPPORT
5748 if (nvram) {
5749 switch(nvram->type) {
5750 case SCSI_NCR_SYMBIOS_NVRAM:
5751 #ifdef SCSI_NCR_DEBUG_NVRAM
5752 ncr_display_Symbios_nvram(np, &nvram->data.Symbios);
5753 #endif
5754 break;
5755 case SCSI_NCR_TEKRAM_NVRAM:
5756 #ifdef SCSI_NCR_DEBUG_NVRAM
5757 ncr_display_Tekram_nvram(np, &nvram->data.Tekram);
5758 #endif
5759 break;
5760 default:
5761 nvram = 0;
5762 #ifdef SCSI_NCR_DEBUG_NVRAM
5763 printk(KERN_DEBUG "%s: NVRAM: None or invalid data.\n", ncr_name(np));
5764 #endif
5765 }
5766 }
5767 #endif
5768
5769 /*
5770 ** Save setting of some IO registers, so we will
5771 ** be able to probe specific implementations.
5772 */
5773 ncr_save_initial_setting (np);
5774
5775 /*
5776 ** Reset the chip now, since it has been reported
5777 ** that SCSI clock calibration may not work properly
5778 ** if the chip is currently active.
5779 */
5780 ncr_chip_reset (np);
5781
5782 /*
5783 ** Do chip dependent initialization.
5784 */
5785 (void) ncr_prepare_setting(np, nvram);
5786
5787 /*
5788 ** Check the PCI clock frequency if needed.
5789 **
5790 ** Must be done after ncr_prepare_setting since it destroys
5791 ** STEST1 that is used to probe for the clock multiplier.
5792 **
5793 ** The range is currently [22688 - 45375 Khz], given
5794 ** the values used by ncr_getclock().
5795 ** This calibration of the frequecy measurement
5796 ** algorithm against the PCI clock frequency is only
5797 ** performed if the driver has had to measure the SCSI
5798 ** clock due to other heuristics not having been enough
5799 ** to deduce the SCSI clock frequency.
5800 **
5801 ** When the chip has been initialized correctly by the
5802 ** SCSI BIOS, the driver deduces the presence of the
5803 ** clock multiplier and the value of the SCSI clock from
5804 ** initial values of IO registers, and therefore no
5805 ** clock measurement is performed.
5806 ** Normally the driver should never have to measure any
5807 ** clock, unless the controller may use a 80 MHz clock
5808 ** or has a clock multiplier and any of the following
5809 ** condition is met:
5810 **
5811 ** - No SCSI BIOS is present.
5812 ** - SCSI BIOS did'nt enable the multiplier for some reason.
5813 ** - User has disabled the controller from the SCSI BIOS.
5814 ** - User booted the O/S from another O/S that did'nt enable
5815 ** the multiplier for some reason.
5816 **
5817 ** As a result, the driver may only have to measure some
5818 ** frequency in very unusual situations.
5819 **
5820 ** For this reality test against the PCI clock to really
5821 ** protect against flaws in the udelay() calibration or
5822 ** driver problem that affect the clock measurement
5823 ** algorithm, the actual PCI clock frequency must be 33 MHz.
5824 */
5825 i = np->pciclock_max ? ncr_getpciclock(np) : 0;
5826 if (i && (i < np->pciclock_min || i > np->pciclock_max)) {
5827 printk(KERN_ERR "%s: PCI clock (%u KHz) is out of range "
5828 "[%u KHz - %u KHz].\n",
5829 ncr_name(np), i, np->pciclock_min, np->pciclock_max);
5830 goto attach_error;
5831 }
5832
5833 /*
5834 ** Patch script to physical addresses
5835 */
5836 ncr_script_fill (&script0, &scripth0);
5837
5838 np->p_script = vtobus(np->script0);
5839 np->p_scripth = vtobus(np->scripth0);
5840 np->p_scripth0 = np->p_scripth;
5841
5842 if (np->base2_ba) {
5843 np->p_script = pcivtobus(np->base2_ba);
5844 if (np->features & FE_RAM8K) {
5845 np->base2_ws = 8192;
5846 np->p_scripth = np->p_script + 4096;
5847 #if BITS_PER_LONG > 32
5848 np->scr_ram_seg = cpu_to_scr(np->base2_ba >> 32);
5849 #endif
5850 }
5851 else
5852 np->base2_ws = 4096;
5853 #ifndef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
5854 np->base2_va = remap_pci_mem(np->base2_ba, np->base2_ws);
5855 if (!np->base2_va) {
5856 printk(KERN_ERR "%s: can't map PCI MEMORY region\n",
5857 ncr_name(np));
5858 goto attach_error;
5859 }
5860 #endif
5861 }
5862
5863 ncr_script_copy_and_bind (np, (ncrcmd *) &script0, (ncrcmd *) np->script0, sizeof(struct script));
5864 ncr_script_copy_and_bind (np, (ncrcmd *) &scripth0, (ncrcmd *) np->scripth0, sizeof(struct scripth));
5865
5866 /*
5867 ** If not 64 bit chip, patch some places in SCRIPTS.
5868 */
5869 if (!(np->features & FE_64BIT)) {
5870 np->scripth0->swide_fin_32[0] = cpu_to_scr(SCR_JUMP);
5871 np->scripth0->swide_fin_32[1] =
5872 cpu_to_scr(NCB_SCRIPT_PHYS(np, dispatch));
5873 }
5874 /*
5875 ** Patch some variables in SCRIPTS
5876 */
5877 np->scripth0->pm0_data_addr[0] =
5878 cpu_to_scr(NCB_SCRIPT_PHYS(np, pm0_data));
5879 np->scripth0->pm1_data_addr[0] =
5880 cpu_to_scr(NCB_SCRIPT_PHYS(np, pm1_data));
5881
5882 #ifdef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
5883 np->scripth0->script0_ba[0] = cpu_to_scr(vtobus(np->script0));
5884 np->scripth0->script0_ba64[0] = cpu_to_scr(vtobus(np->script0));
5885 np->scripth0->scripth0_ba64[0] = cpu_to_scr(vtobus(np->scripth0));
5886 np->scripth0->ram_seg64[0] = np->scr_ram_seg;
5887 #endif
5888 /*
5889 ** Prepare the idle and invalid task actions.
5890 */
5891 np->idletask.start = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
5892 np->idletask.restart = cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l));
5893 np->p_idletask = NCB_PHYS(np, idletask);
5894
5895 np->notask.start = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
5896 np->notask.restart = cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l));
5897 np->p_notask = NCB_PHYS(np, notask);
5898
5899 np->bad_i_t_l.start = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
5900 np->bad_i_t_l.restart = cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l));
5901 np->p_bad_i_t_l = NCB_PHYS(np, bad_i_t_l);
5902
5903 np->bad_i_t_l_q.start = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
5904 np->bad_i_t_l_q.restart = cpu_to_scr(NCB_SCRIPTH_PHYS (np,bad_i_t_l_q));
5905 np->p_bad_i_t_l_q = NCB_PHYS(np, bad_i_t_l_q);
5906
5907 /*
5908 ** Allocate and prepare the bad lun table.
5909 */
5910 np->badluntbl = m_calloc_dma(256, "BADLUNTBL");
5911 if (!np->badluntbl)
5912 goto attach_error;
5913
5914 assert (offsetof(struct lcb, resel_task) == 0);
5915 np->resel_badlun = cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_identify));
5916
5917 for (i = 0 ; i < 64 ; i++)
5918 np->badluntbl[i] = cpu_to_scr(NCB_PHYS(np, resel_badlun));
5919
5920 /*
5921 ** Prepare the target bus address array.
5922 */
5923 np->scripth0->targtbl[0] = cpu_to_scr(vtobus(np->targtbl));
5924 for (i = 0 ; i < MAX_TARGET ; i++) {
5925 np->targtbl[i] = cpu_to_scr(NCB_PHYS(np, target[i]));
5926 np->target[i].b_luntbl = cpu_to_scr(vtobus(np->badluntbl));
5927 np->target[i].b_lun0 = cpu_to_scr(NCB_PHYS(np, resel_badlun));
5928 }
5929
5930 /*
5931 ** Patch the script for LED support.
5932 */
5933
5934 if (np->features & FE_LED0) {
5935 np->script0->idle[0] =
5936 cpu_to_scr(SCR_REG_REG(gpreg, SCR_OR, 0x01));
5937 np->script0->reselected[0] =
5938 cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
5939 np->script0->start[0] =
5940 cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
5941 }
5942
5943 #ifdef SCSI_NCR_IARB_SUPPORT
5944 /*
5945 ** If user does not want to use IMMEDIATE ARBITRATION
5946 ** when we are reselected while attempting to arbitrate,
5947 ** patch the SCRIPTS accordingly with a SCRIPT NO_OP.
5948 */
5949 if (!(driver_setup.iarb & 1))
5950 np->script0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
5951 /*
5952 ** If user wants IARB to be set when we win arbitration
5953 ** and have other jobs, compute the max number of consecutive
5954 ** settings of IARB hint before we leave devices a chance to
5955 ** arbitrate for reselection.
5956 */
5957 np->iarb_max = (driver_setup.iarb >> 4);
5958 #endif
5959
5960 /*
5961 ** DEL 472 - 53C896 Rev 1 - Part Number 609-0393055 - ITEM 5.
5962 */
5963 if (np->device_id == PCI_DEVICE_ID_NCR_53C896 &&
5964 np->revision_id <= 0x1 && (np->features & FE_NOPM)) {
5965 np->scatter = ncr_scatter_896R1;
5966 #ifndef SCSI_NCR_PROFILE_SUPPORT
5967 #define XXX 0
5968 #else
5969 #define XXX 2
5970 #endif
5971 np->script0->dataphase[XXX] = cpu_to_scr(SCR_JUMP);
5972 np->script0->dataphase[XXX+1] =
5973 cpu_to_scr(NCB_SCRIPTH_PHYS (np, tweak_pmj));
5974 #undef XXX
5975 }
5976 else
5977 #ifdef DEBUG_896R1
5978 np->scatter = ncr_scatter_896R1;
5979 #else
5980 np->scatter = ncr_scatter;
5981 #endif
5982
5983 /*
5984 ** Reset chip.
5985 ** We should use ncr_soft_reset(), but we donnot want to do
5986 ** so, since we may not be safe if ABRT interrupt occurs due
5987 ** to the BIOS or previous O/S having enable this interrupt.
5988 */
5989 ncr_chip_reset(np);
5990
5991 /*
5992 ** Now check the cache handling of the pci chipset.
5993 */
5994
5995 if (ncr_snooptest (np)) {
5996 printk (KERN_ERR "CACHE INCORRECTLY CONFIGURED.\n");
5997 goto attach_error;
5998 };
5999
6000 /*
6001 ** Install the interrupt handler.
6002 ** If we synchonize the C code with SCRIPTS on interrupt,
6003 ** we donnot want to share the INTR line at all.
6004 */
6005 if (request_irq(device->slot.irq, sym53c8xx_intr,
6006 #ifdef SCSI_NCR_PCIQ_SYNC_ON_INTR
6007 ((driver_setup.irqm & 0x20) ? 0 : SA_INTERRUPT),
6008 #else
6009 ((driver_setup.irqm & 0x10) ? 0 : SA_SHIRQ) |
6010 #if LINUX_VERSION_CODE < LinuxVersionCode(2,2,0)
6011 ((driver_setup.irqm & 0x20) ? 0 : SA_INTERRUPT),
6012 #else
6013 0,
6014 #endif
6015 #endif
6016 NAME53C8XX, np)) {
6017 printk(KERN_ERR "%s: request irq %d failure\n",
6018 ncr_name(np), device->slot.irq);
6019 goto attach_error;
6020 }
6021 np->irq = device->slot.irq;
6022
6023 /*
6024 ** After SCSI devices have been opened, we cannot
6025 ** reset the bus safely, so we do it here.
6026 ** Interrupt handler does the real work.
6027 ** Process the reset exception,
6028 ** if interrupts are not enabled yet.
6029 ** Then enable disconnects.
6030 */
6031 NCR_LOCK_NCB(np, flags);
6032 if (ncr_reset_scsi_bus(np, 0, driver_setup.settle_delay) != 0) {
6033 printk(KERN_ERR "%s: FATAL ERROR: CHECK SCSI BUS - CABLES, TERMINATION, DEVICE POWER etc.!\n", ncr_name(np));
6034
6035 NCR_UNLOCK_NCB(np, flags);
6036 goto attach_error;
6037 }
6038 ncr_exception (np);
6039
6040 /*
6041 ** The middle-level SCSI driver does not
6042 ** wait for devices to settle.
6043 ** Wait synchronously if more than 2 seconds.
6044 */
6045 if (driver_setup.settle_delay > 2) {
6046 printk(KERN_INFO "%s: waiting %d seconds for scsi devices to settle...\n",
6047 ncr_name(np), driver_setup.settle_delay);
6048 MDELAY (1000 * driver_setup.settle_delay);
6049 }
6050
6051 /*
6052 ** start the timeout daemon
6053 */
6054 np->lasttime=0;
6055 ncr_timeout (np);
6056
6057 /*
6058 ** use SIMPLE TAG messages by default
6059 */
6060 #ifdef SCSI_NCR_ALWAYS_SIMPLE_TAG
6061 np->order = M_SIMPLE_TAG;
6062 #endif
6063
6064 /*
6065 ** Done.
6066 */
6067 if (!first_host)
6068 first_host = instance;
6069
6070 /*
6071 ** Fill Linux host instance structure
6072 ** and return success.
6073 */
6074 instance->max_channel = 0;
6075 instance->this_id = np->myaddr;
6076 instance->max_id = np->maxwide ? 16 : 8;
6077 instance->max_lun = MAX_LUN;
6078 #ifndef NCR_IOMAPPED
6079 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,3,29)
6080 instance->base = (unsigned long) np->reg;
6081 #else
6082 instance->base = (char *) np->reg;
6083 #endif
6084 #endif
6085 instance->irq = np->irq;
6086 instance->unique_id = np->base_io;
6087 instance->io_port = np->base_io;
6088 instance->n_io_port = np->base_ws;
6089 instance->dma_channel = 0;
6090 instance->cmd_per_lun = MAX_TAGS;
6091 instance->can_queue = (MAX_START-4);
6092
6093 instance->select_queue_depths = sym53c8xx_select_queue_depths;
6094
6095 NCR_UNLOCK_NCB(np, flags);
6096
6097 /*
6098 ** Now let the generic SCSI driver
6099 ** look for the SCSI devices on the bus ..
6100 */
6101 return 0;
6102
6103 attach_error:
6104 if (!instance) return -1;
6105 printk(KERN_INFO "%s: giving up ...\n", ncr_name(np));
6106 if (np)
6107 ncr_free_resources(np);
6108 scsi_unregister(instance);
6109
6110 return -1;
6111 }
6112
6113
6114 /*
6115 ** Free controller resources.
6116 */
6117 static void ncr_free_resources(ncb_p np)
6118 {
6119 ccb_p cp;
6120 tcb_p tp;
6121 lcb_p lp;
6122 int target, lun;
6123
6124 if (np->irq)
6125 free_irq(np->irq, np);
6126 if (np->base_io)
6127 release_region(np->base_io, np->base_ws);
6128 #ifndef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
6129 if (np->base_va)
6130 unmap_pci_mem(np->base_va, np->base_ws);
6131 if (np->base2_va)
6132 unmap_pci_mem(np->base2_va, np->base2_ws);
6133 #endif
6134 if (np->scripth0)
6135 m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH");
6136 if (np->script0)
6137 m_free_dma(np->script0, sizeof(struct script), "SCRIPT");
6138 if (np->squeue)
6139 m_free_dma(np->squeue, sizeof(ncrcmd)*(MAX_START*2), "SQUEUE");
6140 if (np->dqueue)
6141 m_free_dma(np->dqueue, sizeof(ncrcmd)*(MAX_START*2),"DQUEUE");
6142
6143 while ((cp = np->ccbc) != NULL) {
6144 np->ccbc = cp->link_ccb;
6145 m_free_dma(cp, sizeof(*cp), "CCB");
6146 }
6147
6148 if (np->badluntbl)
6149 m_free_dma(np->badluntbl, 256,"BADLUNTBL");
6150
6151 for (target = 0; target < MAX_TARGET ; target++) {
6152 tp = &np->target[target];
6153 for (lun = 0 ; lun < MAX_LUN ; lun++) {
6154 lp = ncr_lp(np, tp, lun);
6155 if (!lp)
6156 continue;
6157 if (lp->tasktbl != &lp->tasktbl_0)
6158 m_free_dma(lp->tasktbl, MAX_TASKS*4, "TASKTBL");
6159 if (lp->cb_tags)
6160 m_free(lp->cb_tags, MAX_TAGS, "CB_TAGS");
6161 m_free_dma(lp, sizeof(*lp), "LCB");
6162 }
6163 #if MAX_LUN > 1
6164 if (tp->lmp)
6165 m_free(tp->lmp, MAX_LUN * sizeof(lcb_p), "LMP");
6166 if (tp->luntbl)
6167 m_free_dma(tp->luntbl, 256, "LUNTBL");
6168 #endif
6169 }
6170
6171 if (np->targtbl)
6172 m_free_dma(np->targtbl, 256, "TARGTBL");
6173
6174 m_free_dma(np, sizeof(*np), "NCB");
6175 }
6176
6177
6178 /*==========================================================
6179 **
6180 **
6181 ** Done SCSI commands list management.
6182 **
6183 ** We donnot enter the scsi_done() callback immediately
6184 ** after a command has been seen as completed but we
6185 ** insert it into a list which is flushed outside any kind
6186 ** of driver critical section.
6187 ** This allows to do minimal stuff under interrupt and
6188 ** inside critical sections and to also avoid locking up
6189 ** on recursive calls to driver entry points under SMP.
6190 ** In fact, the only kernel point which is entered by the
6191 ** driver with a driver lock set is get_free_pages(GFP_ATOMIC...)
6192 ** that shall not reenter the driver under any circumstance.
6193 **
6194 **==========================================================
6195 */
6196 static inline void ncr_queue_done_cmd(ncb_p np, Scsi_Cmnd *cmd)
6197 {
6198 unmap_scsi_data(np, cmd);
6199 cmd->host_scribble = (char *) np->done_list;
6200 np->done_list = cmd;
6201 }
6202
6203 static inline void ncr_flush_done_cmds(Scsi_Cmnd *lcmd)
6204 {
6205 Scsi_Cmnd *cmd;
6206
6207 while (lcmd) {
6208 cmd = lcmd;
6209 lcmd = (Scsi_Cmnd *) cmd->host_scribble;
6210 cmd->scsi_done(cmd);
6211 }
6212 }
6213
6214 /*==========================================================
6215 **
6216 **
6217 ** Prepare the next negotiation message if needed.
6218 **
6219 ** Fill in the part of message buffer that contains the
6220 ** negotiation and the nego_status field of the CCB.
6221 ** Returns the size of the message in bytes.
6222 **
6223 **
6224 **==========================================================
6225 */
6226
6227 static int ncr_prepare_nego(ncb_p np, ccb_p cp, u_char *msgptr)
6228 {
6229 tcb_p tp = &np->target[cp->target];
6230 int msglen = 0;
6231 int nego = 0;
6232
6233 if (tp->inq_done) {
6234
6235 /*
6236 ** negotiate wide transfers ?
6237 */
6238
6239 if (!tp->widedone) {
6240 if (tp->inq_byte7 & INQ7_WIDE16) {
6241 nego = NS_WIDE;
6242 } else
6243 tp->widedone=1;
6244 };
6245
6246 /*
6247 ** negotiate synchronous transfers?
6248 */
6249
6250 if (!nego && !tp->period) {
6251 if (tp->inq_byte7 & INQ7_SYNC) {
6252 nego = NS_SYNC;
6253 } else {
6254 tp->period =0xffff;
6255 PRINT_TARGET(np, cp->target);
6256 printk ("target did not report SYNC.\n");
6257 };
6258 };
6259 };
6260
6261 switch (nego) {
6262 case NS_SYNC:
6263 msgptr[msglen++] = M_EXTENDED;
6264 msgptr[msglen++] = 3;
6265 msgptr[msglen++] = M_X_SYNC_REQ;
6266 msgptr[msglen++] = tp->maxoffs ? tp->minsync : 0;
6267 msgptr[msglen++] = tp->maxoffs;
6268 break;
6269 case NS_WIDE:
6270 msgptr[msglen++] = M_EXTENDED;
6271 msgptr[msglen++] = 2;
6272 msgptr[msglen++] = M_X_WIDE_REQ;
6273 msgptr[msglen++] = tp->usrwide;
6274 break;
6275 };
6276
6277 cp->nego_status = nego;
6278
6279 if (nego) {
6280 tp->nego_cp = cp;
6281 if (DEBUG_FLAGS & DEBUG_NEGO) {
6282 ncr_print_msg(cp, nego == NS_WIDE ?
6283 "wide msgout":"sync_msgout", msgptr);
6284 };
6285 };
6286
6287 return msglen;
6288 }
6289
6290 /*==========================================================
6291 **
6292 **
6293 ** Start execution of a SCSI command.
6294 ** This is called from the generic SCSI driver.
6295 **
6296 **
6297 **==========================================================
6298 */
6299 static int ncr_queue_command (ncb_p np, Scsi_Cmnd *cmd)
6300 {
6301 /* Scsi_Device *device = cmd->device; */
6302 tcb_p tp = &np->target[cmd->target];
6303 lcb_p lp = ncr_lp(np, tp, cmd->lun);
6304 ccb_p cp;
6305
6306 u_char idmsg, *msgptr;
6307 u_int msglen;
6308 int direction;
6309 u_int32 lastp, goalp;
6310
6311 /*---------------------------------------------
6312 **
6313 ** Some shortcuts ...
6314 **
6315 **---------------------------------------------
6316 */
6317 if ((cmd->target == np->myaddr ) ||
6318 (cmd->target >= MAX_TARGET) ||
6319 (cmd->lun >= MAX_LUN )) {
6320 return(DID_BAD_TARGET);
6321 }
6322
6323 /*---------------------------------------------
6324 **
6325 ** Complete the 1st TEST UNIT READY command
6326 ** with error condition if the device is
6327 ** flagged NOSCAN, in order to speed up
6328 ** the boot.
6329 **
6330 **---------------------------------------------
6331 */
6332 if (cmd->cmnd[0] == 0 && (tp->usrflag & UF_NOSCAN)) {
6333 tp->usrflag &= ~UF_NOSCAN;
6334 return DID_BAD_TARGET;
6335 }
6336
6337 if (DEBUG_FLAGS & DEBUG_TINY) {
6338 PRINT_ADDR(cmd);
6339 printk ("CMD=%x ", cmd->cmnd[0]);
6340 }
6341
6342 /*---------------------------------------------------
6343 **
6344 ** Assign a ccb / bind cmd.
6345 ** If resetting, shorten settle_time if necessary
6346 ** in order to avoid spurious timeouts.
6347 ** If resetting or no free ccb,
6348 ** insert cmd into the waiting list.
6349 **
6350 **----------------------------------------------------
6351 */
6352 if (np->settle_time && cmd->timeout_per_command >= HZ) {
6353 u_long tlimit = ktime_get(cmd->timeout_per_command - HZ);
6354 if (ktime_dif(np->settle_time, tlimit) > 0)
6355 np->settle_time = tlimit;
6356 }
6357
6358 if (np->settle_time || !(cp=ncr_get_ccb (np, cmd->target, cmd->lun))) {
6359 insert_into_waiting_list(np, cmd);
6360 return(DID_OK);
6361 }
6362 cp->cmd = cmd;
6363
6364 /*---------------------------------------------------
6365 **
6366 ** Enable tagged queue if asked by scsi ioctl
6367 **
6368 **----------------------------------------------------
6369 */
6370 #if 0 /* This stuff was only usefull for linux-1.2.13 */
6371 if (lp && !lp->numtags && cmd->device && cmd->device->tagged_queue) {
6372 lp->numtags = tp->usrtags;
6373 ncr_setup_tags (np, cp->target, cp->lun);
6374 }
6375 #endif
6376
6377 #ifdef SCSI_NCR_PROFILE_SUPPORT
6378 cp->phys.num_disc = 0;
6379 #endif
6380
6381 /*----------------------------------------------------
6382 **
6383 ** Build the identify / tag / sdtr message
6384 **
6385 **----------------------------------------------------
6386 */
6387
6388 idmsg = M_IDENTIFY | cp->lun;
6389
6390 if (cp ->tag != NO_TAG || (lp && !(tp->usrflag & UF_NODISC)))
6391 idmsg |= 0x40;
6392
6393 msgptr = cp->scsi_smsg;
6394 msglen = 0;
6395 msgptr[msglen++] = idmsg;
6396
6397 if (cp->tag != NO_TAG) {
6398 char order = np->order;
6399
6400 /*
6401 ** Force ordered tag if necessary to avoid timeouts
6402 ** and to preserve interactivity.
6403 */
6404 if (lp && ktime_exp(lp->tags_stime)) {
6405 lp->tags_si = !(lp->tags_si);
6406 if (lp->tags_sum[lp->tags_si]) {
6407 order = M_ORDERED_TAG;
6408 if ((DEBUG_FLAGS & DEBUG_TAGS)||bootverbose>0){
6409 PRINT_ADDR(cmd);
6410 printk("ordered tag forced.\n");
6411 }
6412 }
6413 lp->tags_stime = ktime_get(3*HZ);
6414 }
6415
6416 if (order == 0) {
6417 /*
6418 ** Ordered write ops, unordered read ops.
6419 */
6420 switch (cmd->cmnd[0]) {
6421 case 0x08: /* READ_SMALL (6) */
6422 case 0x28: /* READ_BIG (10) */
6423 case 0xa8: /* READ_HUGE (12) */
6424 order = M_SIMPLE_TAG;
6425 break;
6426 default:
6427 order = M_ORDERED_TAG;
6428 }
6429 }
6430 msgptr[msglen++] = order;
6431 /*
6432 ** For less than 128 tags, actual tags are numbered
6433 ** 1,3,5,..2*MAXTAGS+1,since we may have to deal
6434 ** with devices that have problems with #TAG 0 or too
6435 ** great #TAG numbers. For more tags (up to 256),
6436 ** we use directly our tag number.
6437 */
6438 #if MAX_TASKS > (512/4)
6439 msgptr[msglen++] = cp->tag;
6440 #else
6441 msgptr[msglen++] = (cp->tag << 1) + 1;
6442 #endif
6443 }
6444
6445 cp->host_flags = 0;
6446
6447 /*----------------------------------------------------
6448 **
6449 ** Build the data descriptors
6450 **
6451 **----------------------------------------------------
6452 */
6453
6454 direction = scsi_data_direction(cmd);
6455 if (direction != SCSI_DATA_NONE) {
6456 cp->segments = np->scatter (np, cp, cp->cmd);
6457 if (cp->segments < 0) {
6458 ncr_free_ccb(np, cp);
6459 return(DID_ERROR);
6460 }
6461 }
6462 else {
6463 cp->data_len = 0;
6464 cp->segments = 0;
6465 }
6466
6467 /*----------------------------------------------------
6468 **
6469 ** Determine xfer direction.
6470 **
6471 **----------------------------------------------------
6472 */
6473 if (!cp->data_len)
6474 direction = SCSI_DATA_NONE;
6475
6476 /*
6477 ** If data direction is UNKNOWN, speculate DATA_READ
6478 ** but prepare alternate pointers for WRITE in case
6479 ** of our speculation will be just wrong.
6480 ** SCRIPTS will swap values if needed.
6481 */
6482 switch(direction) {
6483 case SCSI_DATA_UNKNOWN:
6484 case SCSI_DATA_WRITE:
6485 goalp = NCB_SCRIPT_PHYS (np, data_out2) + 8;
6486 lastp = goalp - 8 - (cp->segments * (SCR_SG_SIZE*4));
6487 if (direction != SCSI_DATA_UNKNOWN)
6488 break;
6489 cp->phys.header.wgoalp = cpu_to_scr(goalp);
6490 cp->phys.header.wlastp = cpu_to_scr(lastp);
6491 /* fall through */
6492 case SCSI_DATA_READ:
6493 cp->host_flags |= HF_DATA_IN;
6494 goalp = NCB_SCRIPT_PHYS (np, data_in2) + 8;
6495 lastp = goalp - 8 - (cp->segments * (SCR_SG_SIZE*4));
6496 break;
6497 default:
6498 case SCSI_DATA_NONE:
6499 lastp = goalp = NCB_SCRIPTH_PHYS (np, no_data);
6500 break;
6501 }
6502
6503 /*
6504 ** Set all pointers values needed by SCRIPTS.
6505 ** If direction is unknown, start at data_io.
6506 */
6507 cp->phys.header.lastp = cpu_to_scr(lastp);
6508 cp->phys.header.goalp = cpu_to_scr(goalp);
6509
6510 if (direction == SCSI_DATA_UNKNOWN)
6511 cp->phys.header.savep =
6512 cpu_to_scr(NCB_SCRIPTH_PHYS (np, data_io));
6513 else
6514 cp->phys.header.savep= cpu_to_scr(lastp);
6515
6516 /*
6517 ** Save the initial data pointer in order to be able
6518 ** to redo the command.
6519 ** We also have to save the initial lastp, since it
6520 ** will be changed to DATA_IO if we don't know the data
6521 ** direction and the device completes the command with
6522 ** QUEUE FULL status (without entering the data phase).
6523 */
6524 cp->startp = cp->phys.header.savep;
6525 cp->lastp0 = cp->phys.header.lastp;
6526
6527 /*---------------------------------------------------
6528 **
6529 ** negotiation required?
6530 **
6531 ** (nego_status is filled by ncr_prepare_nego())
6532 **
6533 **---------------------------------------------------
6534 */
6535
6536 cp->nego_status = 0;
6537 if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp)
6538 msglen += ncr_prepare_nego (np, cp, msgptr + msglen);
6539
6540 /*----------------------------------------------------
6541 **
6542 ** fill in ccb
6543 **
6544 **----------------------------------------------------
6545 **
6546 **
6547 ** physical -> virtual backlink
6548 ** Generic SCSI command
6549 */
6550
6551 /*
6552 ** Startqueue
6553 */
6554 cp->phys.header.go.start = cpu_to_scr(NCB_SCRIPT_PHYS (np,select));
6555 cp->phys.header.go.restart = cpu_to_scr(NCB_SCRIPT_PHYS (np,resel_dsa));
6556 /*
6557 ** select
6558 */
6559 cp->phys.select.sel_id = cp->target;
6560 cp->phys.select.sel_scntl3 = tp->wval;
6561 cp->phys.select.sel_sxfer = tp->sval;
6562 /*
6563 ** message
6564 */
6565 cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg));
6566 cp->phys.smsg.size = cpu_to_scr(msglen);
6567
6568 /*
6569 ** command
6570 */
6571 memcpy(cp->cdb_buf, cmd->cmnd, MIN(cmd->cmd_len, sizeof(cp->cdb_buf)));
6572 cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, cdb_buf[0]));
6573 cp->phys.cmd.size = cpu_to_scr(cmd->cmd_len);
6574
6575 /*
6576 ** status
6577 */
6578 cp->actualquirks = tp->quirks;
6579 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
6580 cp->scsi_status = S_ILLEGAL;
6581 cp->xerr_status = 0;
6582 cp->phys.extra_bytes = 0;
6583
6584 /*
6585 ** extreme data pointer.
6586 ** shall be positive, so -1 is lower than lowest.:)
6587 */
6588 cp->ext_sg = -1;
6589 cp->ext_ofs = 0;
6590
6591 /*----------------------------------------------------
6592 **
6593 ** Critical region: start this job.
6594 **
6595 **----------------------------------------------------
6596 */
6597
6598 /*
6599 ** activate this job.
6600 */
6601
6602 /*
6603 ** insert next CCBs into start queue.
6604 ** 2 max at a time is enough to flush the CCB wait queue.
6605 */
6606 if (lp)
6607 ncr_start_next_ccb(np, lp, 2);
6608 else
6609 ncr_put_start_queue(np, cp);
6610
6611 /*
6612 ** Command is successfully queued.
6613 */
6614
6615 return(DID_OK);
6616 }
6617
6618
6619 /*==========================================================
6620 **
6621 **
6622 ** Insert a CCB into the start queue and wake up the
6623 ** SCRIPTS processor.
6624 **
6625 **
6626 **==========================================================
6627 */
6628
6629 static void ncr_start_next_ccb(ncb_p np, lcb_p lp, int maxn)
6630 {
6631 XPT_QUEHEAD *qp;
6632 ccb_p cp;
6633
6634 while (maxn-- && lp->queuedccbs < lp->queuedepth) {
6635 qp = xpt_remque_head(&lp->wait_ccbq);
6636 if (!qp)
6637 break;
6638 ++lp->queuedccbs;
6639 cp = xpt_que_entry(qp, struct ccb, link_ccbq);
6640 xpt_insque_tail(qp, &lp->busy_ccbq);
6641 lp->tasktbl[cp->tag == NO_TAG ? 0 : cp->tag] =
6642 cpu_to_scr(cp->p_ccb);
6643 ncr_put_start_queue(np, cp);
6644 }
6645 }
6646
6647 static void ncr_put_start_queue(ncb_p np, ccb_p cp)
6648 {
6649 u_short qidx;
6650
6651 #ifdef SCSI_NCR_IARB_SUPPORT
6652 /*
6653 ** If the previously queued CCB is not yet done,
6654 ** set the IARB hint. The SCRIPTS will go with IARB
6655 ** for this job when starting the previous one.
6656 ** We leave devices a chance to win arbitration by
6657 ** not using more than 'iarb_max' consecutive
6658 ** immediate arbitrations.
6659 */
6660 if (np->last_cp && np->iarb_count < np->iarb_max) {
6661 np->last_cp->host_flags |= HF_HINT_IARB;
6662 ++np->iarb_count;
6663 }
6664 else
6665 np->iarb_count = 0;
6666 np->last_cp = cp;
6667 #endif
6668
6669 /*
6670 ** insert into start queue.
6671 */
6672 qidx = np->squeueput + 2;
6673 if (qidx >= MAX_START*2) qidx = 0;
6674
6675 np->squeue [qidx] = cpu_to_scr(np->p_idletask);
6676 MEMORY_BARRIER();
6677 np->squeue [np->squeueput] = cpu_to_scr(cp->p_ccb);
6678
6679 np->squeueput = qidx;
6680 cp->queued = 1;
6681
6682 if (DEBUG_FLAGS & DEBUG_QUEUE)
6683 printk ("%s: queuepos=%d.\n", ncr_name (np), np->squeueput);
6684
6685 /*
6686 ** Script processor may be waiting for reselect.
6687 ** Wake it up.
6688 */
6689 MEMORY_BARRIER();
6690 OUTB (nc_istat, SIGP|np->istat_sem);
6691 }
6692
6693
6694 /*==========================================================
6695 **
6696 ** Soft reset the chip.
6697 **
6698 ** Some 896 and 876 chip revisions may hang-up if we set
6699 ** the SRST (soft reset) bit at the wrong time when SCRIPTS
6700 ** are running.
6701 ** So, we need to abort the current operation prior to
6702 ** soft resetting the chip.
6703 **
6704 **==========================================================
6705 */
6706
6707 static void ncr_chip_reset (ncb_p np)
6708 {
6709 OUTB (nc_istat, SRST);
6710 UDELAY (10);
6711 OUTB (nc_istat, 0);
6712 }
6713
6714 static void ncr_soft_reset(ncb_p np)
6715 {
6716 u_char istat;
6717 int i;
6718
6719 OUTB (nc_istat, CABRT);
6720 for (i = 1000000 ; i ; --i) {
6721 istat = INB (nc_istat);
6722 if (istat & SIP) {
6723 INW (nc_sist);
6724 continue;
6725 }
6726 if (istat & DIP) {
6727 OUTB (nc_istat, 0);
6728 INB (nc_dstat);
6729 break;
6730 }
6731 }
6732 if (!i)
6733 printk("%s: unable to abort current chip operation.\n",
6734 ncr_name(np));
6735 ncr_chip_reset(np);
6736 }
6737
6738 /*==========================================================
6739 **
6740 **
6741 ** Start reset process.
6742 ** The interrupt handler will reinitialize the chip.
6743 ** The timeout handler will wait for settle_time before
6744 ** clearing it and so resuming command processing.
6745 **
6746 **
6747 **==========================================================
6748 */
6749 static void ncr_start_reset(ncb_p np)
6750 {
6751 (void) ncr_reset_scsi_bus(np, 1, driver_setup.settle_delay);
6752 }
6753
6754 static int ncr_reset_scsi_bus(ncb_p np, int enab_int, int settle_delay)
6755 {
6756 u_int32 term;
6757 int retv = 0;
6758
6759 np->settle_time = ktime_get(settle_delay * HZ);
6760
6761 if (bootverbose > 1)
6762 printk("%s: resetting, "
6763 "command processing suspended for %d seconds\n",
6764 ncr_name(np), settle_delay);
6765
6766 ncr_soft_reset(np); /* Soft reset the chip */
6767 UDELAY (2000); /* The 895/6 need time for the bus mode to settle */
6768 if (enab_int)
6769 OUTW (nc_sien, RST);
6770 /*
6771 ** Enable Tolerant, reset IRQD if present and
6772 ** properly set IRQ mode, prior to resetting the bus.
6773 */
6774 OUTB (nc_stest3, TE);
6775 OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
6776 OUTB (nc_scntl1, CRST);
6777 UDELAY (200);
6778
6779 if (!driver_setup.bus_check)
6780 goto out;
6781 /*
6782 ** Check for no terminators or SCSI bus shorts to ground.
6783 ** Read SCSI data bus, data parity bits and control signals.
6784 ** We are expecting RESET to be TRUE and other signals to be
6785 ** FALSE.
6786 */
6787 term = INB(nc_sstat0);
6788 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
6789 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */
6790 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */
6791 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */
6792 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */
6793
6794 if (!(np->features & FE_WIDE))
6795 term &= 0x3ffff;
6796
6797 if (term != (2<<7)) {
6798 printk("%s: suspicious SCSI data while resetting the BUS.\n",
6799 ncr_name(np));
6800 printk("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
6801 "0x%lx, expecting 0x%lx\n",
6802 ncr_name(np),
6803 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
6804 (u_long)term, (u_long)(2<<7));
6805 if (driver_setup.bus_check == 1)
6806 retv = 1;
6807 }
6808 out:
6809 OUTB (nc_scntl1, 0);
6810 return retv;
6811 }
6812
6813 /*==========================================================
6814 **
6815 **
6816 ** Reset the SCSI BUS.
6817 ** This is called from the generic SCSI driver.
6818 **
6819 **
6820 **==========================================================
6821 */
6822 static int ncr_reset_bus (ncb_p np, Scsi_Cmnd *cmd, int sync_reset)
6823 {
6824 /* Scsi_Device *device = cmd->device; */
6825 ccb_p cp;
6826 int found;
6827
6828 /*
6829 * Return immediately if reset is in progress.
6830 */
6831 if (np->settle_time) {
6832 return SCSI_RESET_PUNT;
6833 }
6834 /*
6835 * Start the reset process.
6836 * The script processor is then assumed to be stopped.
6837 * Commands will now be queued in the waiting list until a settle
6838 * delay of 2 seconds will be completed.
6839 */
6840 ncr_start_reset(np);
6841 /*
6842 * First, look in the wakeup list
6843 */
6844 for (found=0, cp=np->ccbc; cp; cp=cp->link_ccb) {
6845 /*
6846 ** look for the ccb of this command.
6847 */
6848 if (cp->host_status == HS_IDLE) continue;
6849 if (cp->cmd == cmd) {
6850 found = 1;
6851 break;
6852 }
6853 }
6854 /*
6855 * Then, look in the waiting list
6856 */
6857 if (!found && retrieve_from_waiting_list(0, np, cmd))
6858 found = 1;
6859 /*
6860 * Wake-up all awaiting commands with DID_RESET.
6861 */
6862 reset_waiting_list(np);
6863 /*
6864 * Wake-up all pending commands with HS_RESET -> DID_RESET.
6865 */
6866 ncr_wakeup(np, HS_RESET);
6867 /*
6868 * If the involved command was not in a driver queue, and the
6869 * scsi driver told us reset is synchronous, and the command is not
6870 * currently in the waiting list, complete it with DID_RESET status,
6871 * in order to keep it alive.
6872 */
6873 if (!found && sync_reset && !retrieve_from_waiting_list(0, np, cmd)) {
6874 SetScsiResult(cmd, DID_RESET, 0);
6875 ncr_queue_done_cmd(np, cmd);
6876 }
6877
6878 return SCSI_RESET_SUCCESS;
6879 }
6880
6881 /*==========================================================
6882 **
6883 **
6884 ** Abort an SCSI command.
6885 ** This is called from the generic SCSI driver.
6886 **
6887 **
6888 **==========================================================
6889 */
6890 static int ncr_abort_command (ncb_p np, Scsi_Cmnd *cmd)
6891 {
6892 /* Scsi_Device *device = cmd->device; */
6893 ccb_p cp;
6894
6895 /*
6896 * First, look for the scsi command in the waiting list
6897 */
6898 if (remove_from_waiting_list(np, cmd)) {
6899 SetScsiAbortResult(cmd);
6900 ncr_queue_done_cmd(np, cmd);
6901 return SCSI_ABORT_SUCCESS;
6902 }
6903
6904 /*
6905 * Then, look in the wakeup list
6906 */
6907 for (cp=np->ccbc; cp; cp=cp->link_ccb) {
6908 /*
6909 ** look for the ccb of this command.
6910 */
6911 if (cp->host_status == HS_IDLE) continue;
6912 if (cp->cmd == cmd)
6913 break;
6914 }
6915
6916 if (!cp) {
6917 return SCSI_ABORT_NOT_RUNNING;
6918 }
6919
6920 /*
6921 ** Keep track we have to abort this job.
6922 */
6923 cp->to_abort = 1;
6924
6925 /*
6926 ** Tell the SCRIPTS processor to stop
6927 ** and synchronize with us.
6928 */
6929 np->istat_sem = SEM;
6930
6931 /*
6932 ** If there are no requests, the script
6933 ** processor will sleep on SEL_WAIT_RESEL.
6934 ** Let's wake it up, since it may have to work.
6935 */
6936 OUTB (nc_istat, SIGP|SEM);
6937
6938 /*
6939 ** Tell user we are working for him.
6940 */
6941 return SCSI_ABORT_PENDING;
6942 }
6943
6944 /*==========================================================
6945 **
6946 ** Linux release module stuff.
6947 **
6948 ** Called before unloading the module
6949 ** Detach the host.
6950 ** We have to free resources and halt the NCR chip
6951 **
6952 **==========================================================
6953 */
6954
6955 #ifdef MODULE
6956 static int ncr_detach(ncb_p np)
6957 {
6958 int i;
6959
6960 printk("%s: detaching ...\n", ncr_name(np));
6961
6962 /*
6963 ** Stop the ncr_timeout process
6964 ** Set release_stage to 1 and wait that ncr_timeout() set it to 2.
6965 */
6966 np->release_stage = 1;
6967 for (i = 50 ; i && np->release_stage != 2 ; i--) MDELAY (100);
6968 if (np->release_stage != 2)
6969 printk("%s: the timer seems to be already stopped\n",
6970 ncr_name(np));
6971 else np->release_stage = 2;
6972
6973 /*
6974 ** Reset NCR chip.
6975 ** We should use ncr_soft_reset(), but we donnot want to do
6976 ** so, since we may not be safe if interrupts occur.
6977 */
6978
6979 printk("%s: resetting chip\n", ncr_name(np));
6980 ncr_chip_reset(np);
6981
6982 /*
6983 ** Restore bios setting for automatic clock detection.
6984 */
6985 OUTB(nc_dmode, np->sv_dmode);
6986 OUTB(nc_dcntl, np->sv_dcntl);
6987 OUTB(nc_ctest3, np->sv_ctest3);
6988 OUTB(nc_ctest4, np->sv_ctest4);
6989 OUTB(nc_ctest5, np->sv_ctest5);
6990 OUTB(nc_gpcntl, np->sv_gpcntl);
6991 OUTB(nc_stest2, np->sv_stest2);
6992
6993 ncr_selectclock(np, np->sv_scntl3);
6994 /*
6995 ** Free host resources
6996 */
6997 ncr_free_resources(np);
6998
6999 return 1;
7000 }
7001 #endif
7002
7003 /*==========================================================
7004 **
7005 **
7006 ** Complete execution of a SCSI command.
7007 ** Signal completion to the generic SCSI driver.
7008 **
7009 **
7010 **==========================================================
7011 */
7012
7013 void ncr_complete (ncb_p np, ccb_p cp)
7014 {
7015 Scsi_Cmnd *cmd;
7016 tcb_p tp;
7017 lcb_p lp;
7018
7019 /*
7020 ** Sanity check
7021 */
7022 if (!cp || !cp->cmd)
7023 return;
7024
7025 /*
7026 ** Gather profiling data
7027 */
7028 #ifdef SCSI_NCR_PROFILE_SUPPORT
7029 ncb_profile (np, cp);
7030 #endif
7031
7032 if (DEBUG_FLAGS & DEBUG_TINY)
7033 printk ("CCB=%lx STAT=%x/%x\n", (unsigned long)cp,
7034 cp->host_status,cp->scsi_status);
7035
7036 /*
7037 ** Get command, target and lun pointers.
7038 */
7039
7040 cmd = cp->cmd;
7041 cp->cmd = NULL;
7042 tp = &np->target[cp->target];
7043 lp = ncr_lp(np, tp, cp->lun);
7044
7045 /*
7046 ** We donnot queue more than 1 ccb per target
7047 ** with negotiation at any time. If this ccb was
7048 ** used for negotiation, clear this info in the tcb.
7049 */
7050
7051 if (cp == tp->nego_cp)
7052 tp->nego_cp = 0;
7053
7054 #ifdef SCSI_NCR_IARB_SUPPORT
7055 /*
7056 ** We just complete the last queued CCB.
7057 ** Clear this info that is no more relevant.
7058 */
7059 if (cp == np->last_cp)
7060 np->last_cp = 0;
7061 #endif
7062
7063 /*
7064 ** If auto-sense performed, change scsi status,
7065 ** Otherwise, compute the residual.
7066 */
7067 if (cp->host_flags & HF_AUTO_SENSE) {
7068 cp->scsi_status = cp->sv_scsi_status;
7069 cp->xerr_status = cp->sv_xerr_status;
7070 }
7071 else {
7072 cp->resid = 0;
7073 if (cp->phys.header.lastp != cp->phys.header.goalp)
7074 cp->resid = ncr_compute_residual(np, cp);
7075 }
7076
7077 /*
7078 ** Check for extended errors.
7079 */
7080
7081 if (cp->xerr_status) {
7082 if (cp->xerr_status & XE_PARITY_ERR) {
7083 PRINT_ADDR(cmd);
7084 printk ("unrecovered SCSI parity error.\n");
7085 }
7086 if (cp->xerr_status & XE_EXTRA_DATA) {
7087 PRINT_ADDR(cmd);
7088 printk ("extraneous data discarded.\n");
7089 }
7090 if (cp->xerr_status & XE_BAD_PHASE) {
7091 PRINT_ADDR(cmd);
7092 printk ("illegal scsi phase (4/5).\n");
7093 }
7094
7095 if (cp->host_status==HS_COMPLETE)
7096 cp->host_status = HS_FAIL;
7097 }
7098
7099 /*
7100 ** Print out any error for debugging purpose.
7101 */
7102 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) {
7103 if (cp->host_status!=HS_COMPLETE || cp->scsi_status!=S_GOOD ||
7104 cp->resid) {
7105 PRINT_ADDR(cmd);
7106 printk ("ERROR: cmd=%x host_status=%x scsi_status=%x "
7107 "data_len=%d residual=%d\n",
7108 cmd->cmnd[0], cp->host_status, cp->scsi_status,
7109 cp->data_len, -cp->resid);
7110 }
7111 }
7112
7113 /*
7114 ** Check the status.
7115 */
7116 if ( (cp->host_status == HS_COMPLETE)
7117 && (cp->scsi_status == S_GOOD ||
7118 cp->scsi_status == S_COND_MET)) {
7119 /*
7120 ** All went well (GOOD status).
7121 ** CONDITION MET status is returned on
7122 ** `Pre-Fetch' or `Search data' success.
7123 */
7124 SetScsiResult(cmd, DID_OK, cp->scsi_status);
7125
7126 /*
7127 ** Allocate the lcb if not yet.
7128 */
7129 if (!lp)
7130 ncr_alloc_lcb (np, cp->target, cp->lun);
7131
7132 /*
7133 ** On standard INQUIRY response (EVPD and CmDt
7134 ** not set), setup logical unit according to
7135 ** announced capabilities (we need the 1rst 7 bytes).
7136 */
7137 if (cmd->cmnd[0] == 0x12 && !(cmd->cmnd[1] & 0x3) &&
7138 cmd->cmnd[4] >= 7 && !cmd->use_sg) {
7139 sync_scsi_data(np, cmd); /* SYNC the data */
7140 ncr_setup_lcb (np, cp->target, cp->lun,
7141 (char *) cmd->request_buffer);
7142 }
7143
7144 tp->bytes += cp->data_len;
7145 tp->transfers ++;
7146
7147 /*
7148 ** If tags was reduced due to queue full,
7149 ** increase tags if 1000 good status received.
7150 */
7151 if (lp && lp->usetags && lp->numtags < lp->maxtags) {
7152 ++lp->num_good;
7153 if (lp->num_good >= 1000) {
7154 lp->num_good = 0;
7155 ++lp->numtags;
7156 ncr_setup_tags (np, cp->target, cp->lun);
7157 }
7158 }
7159 } else if ((cp->host_status == HS_COMPLETE)
7160 && (cp->scsi_status == S_CHECK_COND)) {
7161 /*
7162 ** Check condition code
7163 */
7164 SetScsiResult(cmd, DID_OK, S_CHECK_COND);
7165
7166 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) {
7167 PRINT_ADDR(cmd);
7168 ncr_printl_hex("sense data:", cmd->sense_buffer, 14);
7169 }
7170
7171 } else if ((cp->host_status == HS_COMPLETE)
7172 && (cp->scsi_status == S_BUSY ||
7173 cp->scsi_status == S_QUEUE_FULL)) {
7174
7175 /*
7176 ** Target is busy.
7177 */
7178 SetScsiResult(cmd, DID_OK, cp->scsi_status);
7179
7180 } else if ((cp->host_status == HS_SEL_TIMEOUT)
7181 || (cp->host_status == HS_TIMEOUT)) {
7182
7183 /*
7184 ** No response
7185 */
7186 SetScsiResult(cmd, DID_TIME_OUT, cp->scsi_status);
7187
7188 } else if (cp->host_status == HS_RESET) {
7189
7190 /*
7191 ** SCSI bus reset
7192 */
7193 SetScsiResult(cmd, DID_RESET, cp->scsi_status);
7194
7195 } else if (cp->host_status == HS_ABORTED) {
7196
7197 /*
7198 ** Transfer aborted
7199 */
7200 SetScsiAbortResult(cmd);
7201
7202 } else {
7203 int did_status;
7204
7205 /*
7206 ** Other protocol messes
7207 */
7208 PRINT_ADDR(cmd);
7209 printk ("COMMAND FAILED (%x %x) @%p.\n",
7210 cp->host_status, cp->scsi_status, cp);
7211
7212 did_status = DID_ERROR;
7213 if (cp->xerr_status & XE_PARITY_ERR)
7214 did_status = DID_PARITY;
7215
7216 SetScsiResult(cmd, did_status, cp->scsi_status);
7217 }
7218
7219 /*
7220 ** trace output
7221 */
7222
7223 if (tp->usrflag & UF_TRACE) {
7224 PRINT_ADDR(cmd);
7225 printk (" CMD:");
7226 ncr_print_hex(cmd->cmnd, cmd->cmd_len);
7227
7228 if (cp->host_status==HS_COMPLETE) {
7229 switch (cp->scsi_status) {
7230 case S_GOOD:
7231 printk (" GOOD");
7232 break;
7233 case S_CHECK_COND:
7234 printk (" SENSE:");
7235 ncr_print_hex(cmd->sense_buffer, 14);
7236 break;
7237 default:
7238 printk (" STAT: %x\n", cp->scsi_status);
7239 break;
7240 }
7241 } else printk (" HOSTERROR: %x", cp->host_status);
7242 printk ("\n");
7243 }
7244
7245 /*
7246 ** Free this ccb
7247 */
7248 ncr_free_ccb (np, cp);
7249
7250 /*
7251 ** requeue awaiting scsi commands for this lun.
7252 */
7253 if (lp && lp->queuedccbs < lp->queuedepth &&
7254 !xpt_que_empty(&lp->wait_ccbq))
7255 ncr_start_next_ccb(np, lp, 2);
7256
7257 /*
7258 ** requeue awaiting scsi commands for this controller.
7259 */
7260 if (np->waiting_list)
7261 requeue_waiting_list(np);
7262
7263 /*
7264 ** signal completion to generic driver.
7265 */
7266 ncr_queue_done_cmd(np, cmd);
7267 }
7268
7269 /*==========================================================
7270 **
7271 **
7272 ** Signal all (or one) control block done.
7273 **
7274 **
7275 **==========================================================
7276 */
7277
7278 /*
7279 ** The NCR has completed CCBs.
7280 ** Look at the DONE QUEUE.
7281 */
7282 int ncr_wakeup_done (ncb_p np)
7283 {
7284 ccb_p cp;
7285 int i, n;
7286 u_long dsa;
7287
7288 n = 0;
7289 i = np->dqueueget;
7290 while (1) {
7291 dsa = scr_to_cpu(np->dqueue[i]);
7292 if (!dsa)
7293 break;
7294 np->dqueue[i] = 0;
7295 if ((i = i+2) >= MAX_START*2)
7296 i = 0;
7297
7298 cp = ncr_ccb_from_dsa(np, dsa);
7299 if (cp) {
7300 ncr_complete (np, cp);
7301 ++n;
7302 }
7303 else
7304 printk (KERN_ERR "%s: bad DSA (%lx) in done queue.\n",
7305 ncr_name(np), dsa);
7306 }
7307 np->dqueueget = i;
7308
7309 return n;
7310 }
7311
7312 /*
7313 ** Complete all active CCBs.
7314 */
7315 void ncr_wakeup (ncb_p np, u_long code)
7316 {
7317 ccb_p cp = np->ccbc;
7318
7319 while (cp) {
7320 if (cp->host_status != HS_IDLE) {
7321 cp->host_status = code;
7322 ncr_complete (np, cp);
7323 }
7324 cp = cp->link_ccb;
7325 }
7326 }
7327
7328 /*==========================================================
7329 **
7330 **
7331 ** Start NCR chip.
7332 **
7333 **
7334 **==========================================================
7335 */
7336
7337 void ncr_init (ncb_p np, int reset, char * msg, u_long code)
7338 {
7339 int i;
7340 u_long phys;
7341
7342 /*
7343 ** Reset chip if asked, otherwise just clear fifos.
7344 */
7345
7346 if (reset)
7347 ncr_soft_reset(np);
7348 else {
7349 OUTB (nc_stest3, TE|CSF);
7350 OUTONB (nc_ctest3, CLF);
7351 }
7352
7353 /*
7354 ** Message.
7355 */
7356
7357 if (msg) printk (KERN_INFO "%s: restart (%s).\n", ncr_name (np), msg);
7358
7359 /*
7360 ** Clear Start Queue
7361 */
7362 phys = np->p_squeue;
7363 np->queuedepth = MAX_START - 1; /* 1 entry needed as end marker */
7364 for (i = 0; i < MAX_START*2; i += 2) {
7365 np->squeue[i] = cpu_to_scr(np->p_idletask);
7366 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
7367 }
7368 np->squeue[MAX_START*2-1] = cpu_to_scr(phys);
7369
7370
7371 /*
7372 ** Start at first entry.
7373 */
7374 np->squeueput = 0;
7375 np->scripth0->startpos[0] = cpu_to_scr(phys);
7376
7377 /*
7378 ** Clear Done Queue
7379 */
7380 phys = vtobus(np->dqueue);
7381 for (i = 0; i < MAX_START*2; i += 2) {
7382 np->dqueue[i] = 0;
7383 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
7384 }
7385 np->dqueue[MAX_START*2-1] = cpu_to_scr(phys);
7386
7387 /*
7388 ** Start at first entry.
7389 */
7390 np->scripth0->done_pos[0] = cpu_to_scr(phys);
7391 np->dqueueget = 0;
7392
7393 /*
7394 ** Wakeup all pending jobs.
7395 */
7396 ncr_wakeup (np, code);
7397
7398 /*
7399 ** Init chip.
7400 */
7401
7402 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort */
7403 UDELAY (2000); /* The 895 needs time for the bus mode to settle */
7404
7405 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
7406 /* full arb., ena parity, par->ATN */
7407 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
7408
7409 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
7410
7411 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
7412 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */
7413 OUTB (nc_istat , SIGP ); /* Signal Process */
7414 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */
7415 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
7416
7417 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
7418 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
7419 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
7420
7421 OUTB (nc_stest2, EXT|np->rv_stest2); /* Extended Sreq/Sack filtering */
7422 OUTB (nc_stest3, TE); /* TolerANT enable */
7423 OUTB (nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
7424
7425 /*
7426 ** DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
7427 ** Disable overlapped arbitration for all dual-function
7428 ** devices, regardless revision id.
7429 ** We may consider it is a post-chip-design feature. ;-)
7430 */
7431 if (np->device_id == PCI_DEVICE_ID_NCR_53C875)
7432 OUTB (nc_ctest0, (1<<5));
7433 else if (np->device_id == PCI_DEVICE_ID_NCR_53C896)
7434 np->rv_ccntl0 |= DPR;
7435
7436 /*
7437 ** If 64 bit (895A/896/1010) write the CCNTL1 register to
7438 ** enable 40 bit address table indirect addressing for MOVE.
7439 ** Also write CCNTL0 if 64 bit chip, since this register seems
7440 ** to only be used by 64 bit cores.
7441 */
7442 if (np->features & FE_64BIT) {
7443 OUTB (nc_ccntl0, np->rv_ccntl0);
7444 OUTB (nc_ccntl1, np->rv_ccntl1);
7445 }
7446
7447 /*
7448 ** If phase mismatch handled by scripts (53C895A or 53C896),
7449 ** set PM jump addresses.
7450 */
7451
7452 if (np->features & FE_NOPM) {
7453 printk(KERN_INFO "%s: handling phase mismatch from SCRIPTS.\n",
7454 ncr_name(np));
7455 OUTL (nc_pmjad1, NCB_SCRIPTH_PHYS (np, pm_handle));
7456 OUTL (nc_pmjad2, NCB_SCRIPTH_PHYS (np, pm_handle));
7457 }
7458
7459 /*
7460 ** Enable GPIO0 pin for writing if LED support from SCRIPTS.
7461 ** Also set GPIO5 and clear GPIO6 if hardware LED control.
7462 */
7463
7464 if (np->features & FE_LED0)
7465 OUTB(nc_gpcntl, INB(nc_gpcntl) & ~0x01);
7466 else if (np->features & FE_LEDC)
7467 OUTB(nc_gpcntl, (INB(nc_gpcntl) & ~0x41) | 0x20);
7468
7469
7470 /*
7471 ** enable ints
7472 */
7473
7474 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
7475 OUTB (nc_dien , MDPE|BF|SSI|SIR|IID);
7476
7477 /*
7478 ** For 895/6 enable SBMC interrupt and save current SCSI bus mode.
7479 */
7480 if (np->features & FE_ULTRA2) {
7481 OUTONW (nc_sien, SBMC);
7482 np->scsi_mode = INB (nc_stest4) & SMODE;
7483 }
7484
7485 /*
7486 ** Fill in target structure.
7487 ** Reinitialize usrsync.
7488 ** Reinitialize usrwide.
7489 ** Prepare sync negotiation according to actual SCSI bus mode.
7490 */
7491
7492 for (i=0;i<MAX_TARGET;i++) {
7493 tcb_p tp = &np->target[i];
7494
7495 tp->to_reset = 0;
7496
7497 tp->sval = 0;
7498 tp->wval = np->rv_scntl3;
7499
7500 if (tp->usrsync != 255) {
7501 if (tp->usrsync <= np->maxsync) {
7502 if (tp->usrsync < np->minsync) {
7503 tp->usrsync = np->minsync;
7504 }
7505 }
7506 else
7507 tp->usrsync = 255;
7508 };
7509
7510 if (tp->usrwide > np->maxwide)
7511 tp->usrwide = np->maxwide;
7512
7513 ncr_negotiate (np, tp);
7514 }
7515
7516 /*
7517 ** Download SCSI SCRIPTS to on-chip RAM if present,
7518 ** and start script processor.
7519 ** We do the download preferently from the CPU.
7520 ** For platforms that may not support PCI memory mapping,
7521 ** we use a simple SCRIPTS that performs MEMORY MOVEs.
7522 */
7523 MEMORY_BARRIER();
7524 if (np->base2_ba) {
7525 if (bootverbose)
7526 printk ("%s: Downloading SCSI SCRIPTS.\n",
7527 ncr_name(np));
7528 #ifdef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
7529 if (np->base2_ws == 8192)
7530 phys = NCB_SCRIPTH0_PHYS (np, start_ram64);
7531 else
7532 phys = NCB_SCRIPTH_PHYS (np, start_ram);
7533 #else
7534 if (np->base2_ws == 8192) {
7535 memcpy_to_pci(np->base2_va + 4096,
7536 np->scripth0, sizeof(struct scripth));
7537 OUTL (nc_mmws, np->scr_ram_seg);
7538 OUTL (nc_mmrs, np->scr_ram_seg);
7539 OUTL (nc_sfs, np->scr_ram_seg);
7540 phys = NCB_SCRIPTH_PHYS (np, start64);
7541 }
7542 else
7543 phys = NCB_SCRIPT_PHYS (np, init);
7544 memcpy_to_pci(np->base2_va, np->script0, sizeof(struct script));
7545 #endif /* SCSI_NCR_PCI_MEM_NOT_SUPPORTED */
7546 }
7547 else
7548 phys = NCB_SCRIPT_PHYS (np, init);
7549
7550 np->istat_sem = 0;
7551
7552 OUTL (nc_dsa, np->p_ncb);
7553 OUTL (nc_dsp, phys);
7554 }
7555
7556 /*==========================================================
7557 **
7558 ** Prepare the negotiation values for wide and
7559 ** synchronous transfers.
7560 **
7561 **==========================================================
7562 */
7563
7564 static void ncr_negotiate (struct ncb* np, struct tcb* tp)
7565 {
7566 /*
7567 ** minsync unit is 4ns !
7568 */
7569
7570 u_long minsync = tp->usrsync;
7571
7572 /*
7573 ** SCSI bus mode limit
7574 */
7575
7576 if (np->scsi_mode && np->scsi_mode == SMODE_SE) {
7577 if (minsync < 12) minsync = 12;
7578 }
7579
7580 /*
7581 ** our limit ..
7582 */
7583
7584 if (minsync < np->minsync)
7585 minsync = np->minsync;
7586
7587 /*
7588 ** divider limit
7589 */
7590
7591 if (minsync > np->maxsync)
7592 minsync = 255;
7593
7594 tp->minsync = minsync;
7595 tp->maxoffs = (minsync<255 ? np->maxoffs : 0);
7596
7597 /*
7598 ** period=0: has to negotiate sync transfer
7599 */
7600
7601 tp->period=0;
7602
7603 /*
7604 ** widedone=0: has to negotiate wide transfer
7605 */
7606 tp->widedone=0;
7607 }
7608
7609 /*==========================================================
7610 **
7611 ** Get clock factor and sync divisor for a given
7612 ** synchronous factor period.
7613 ** Returns the clock factor (in sxfer) and scntl3
7614 ** synchronous divisor field.
7615 **
7616 **==========================================================
7617 */
7618
7619 static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p)
7620 {
7621 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */
7622 int div = np->clock_divn; /* Number of divisors supported */
7623 u_long fak; /* Sync factor in sxfer */
7624 u_long per; /* Period in tenths of ns */
7625 u_long kpc; /* (per * clk) */
7626
7627 /*
7628 ** Compute the synchronous period in tenths of nano-seconds
7629 */
7630 if (sfac <= 10) per = 250;
7631 else if (sfac == 11) per = 303;
7632 else if (sfac == 12) per = 500;
7633 else per = 40 * sfac;
7634
7635 /*
7636 ** Look for the greatest clock divisor that allows an
7637 ** input speed faster than the period.
7638 */
7639 kpc = per * clk;
7640 while (--div >= 0)
7641 if (kpc >= (div_10M[div] << 2)) break;
7642
7643 /*
7644 ** Calculate the lowest clock factor that allows an output
7645 ** speed not faster than the period.
7646 */
7647 fak = (kpc - 1) / div_10M[div] + 1;
7648
7649 #if 0 /* This optimization does not seem very usefull */
7650
7651 per = (fak * div_10M[div]) / clk;
7652
7653 /*
7654 ** Why not to try the immediate lower divisor and to choose
7655 ** the one that allows the fastest output speed ?
7656 ** We dont want input speed too much greater than output speed.
7657 */
7658 if (div >= 1 && fak < 8) {
7659 u_long fak2, per2;
7660 fak2 = (kpc - 1) / div_10M[div-1] + 1;
7661 per2 = (fak2 * div_10M[div-1]) / clk;
7662 if (per2 < per && fak2 <= 8) {
7663 fak = fak2;
7664 per = per2;
7665 --div;
7666 }
7667 }
7668 #endif
7669
7670 if (fak < 4) fak = 4; /* Should never happen, too bad ... */
7671
7672 /*
7673 ** Compute and return sync parameters for the ncr
7674 */
7675 *fakp = fak - 4;
7676 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0);
7677 }
7678
7679
7680 /*==========================================================
7681 **
7682 ** Set actual values, sync status and patch all ccbs of
7683 ** a target according to new sync/wide agreement.
7684 **
7685 **==========================================================
7686 */
7687
7688 static void ncr_set_sync_wide_status (ncb_p np, u_char target)
7689 {
7690 ccb_p cp;
7691 tcb_p tp = &np->target[target];
7692
7693 /*
7694 ** set actual value and sync_status
7695 */
7696 OUTB (nc_sxfer, tp->sval);
7697 OUTB (nc_scntl3, tp->wval);
7698
7699 /*
7700 ** patch ALL ccbs of this target.
7701 */
7702 for (cp = np->ccbc; cp; cp = cp->link_ccb) {
7703 if (cp->host_status == HS_IDLE)
7704 continue;
7705 if (cp->target != target)
7706 continue;
7707 cp->phys.select.sel_scntl3 = tp->wval;
7708 cp->phys.select.sel_sxfer = tp->sval;
7709 };
7710 }
7711
7712 /*==========================================================
7713 **
7714 ** Switch sync mode for current job and it's target
7715 **
7716 **==========================================================
7717 */
7718
7719 static void ncr_setsync (ncb_p np, ccb_p cp, u_char scntl3, u_char sxfer)
7720 {
7721 tcb_p tp;
7722 u_char target = INB (nc_sdid) & 0x0f;
7723 u_char idiv;
7724
7725 assert (cp);
7726 if (!cp) return;
7727
7728 assert (target == (cp->target & 0xf));
7729
7730 tp = &np->target[target];
7731
7732 if (!scntl3 || !(sxfer & 0x1f))
7733 scntl3 = np->rv_scntl3;
7734 scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS) | (np->rv_scntl3 & 0x07);
7735
7736 /*
7737 ** Deduce the value of controller sync period from scntl3.
7738 ** period is in tenths of nano-seconds.
7739 */
7740
7741 idiv = ((scntl3 >> 4) & 0x7);
7742 if ((sxfer & 0x1f) && idiv)
7743 tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz;
7744 else
7745 tp->period = 0xffff;
7746
7747 /*
7748 ** Stop there if sync parameters are unchanged
7749 */
7750 if (tp->sval == sxfer && tp->wval == scntl3) return;
7751 tp->sval = sxfer;
7752 tp->wval = scntl3;
7753
7754 /*
7755 ** Bells and whistles ;-)
7756 ** Donnot announce negotiations due to auto-sense,
7757 ** unless user really want us to be verbose. :)
7758 */
7759 if (bootverbose < 2 && (cp->host_flags & HF_AUTO_SENSE))
7760 goto next;
7761 PRINT_TARGET(np, target);
7762 if (sxfer & 0x01f) {
7763 unsigned f10 = 100000 << (tp->widedone ? tp->widedone -1 : 0);
7764 unsigned mb10 = (f10 + tp->period/2) / tp->period;
7765 char *scsi;
7766
7767 /*
7768 ** Disable extended Sreq/Sack filtering
7769 */
7770 if (tp->period <= 2000) OUTOFFB (nc_stest2, EXT);
7771
7772 /*
7773 ** Bells and whistles ;-)
7774 */
7775 if (tp->period < 500) scsi = "FAST-40";
7776 else if (tp->period < 1000) scsi = "FAST-20";
7777 else if (tp->period < 2000) scsi = "FAST-10";
7778 else scsi = "FAST-5";
7779
7780 printk ("%s %sSCSI %d.%d MB/s (%d ns, offset %d)\n", scsi,
7781 tp->widedone > 1 ? "WIDE " : "",
7782 mb10 / 10, mb10 % 10, tp->period / 10, sxfer & 0x1f);
7783 } else
7784 printk ("%sasynchronous.\n", tp->widedone > 1 ? "wide " : "");
7785 next:
7786 /*
7787 ** set actual value and sync_status
7788 ** patch ALL ccbs of this target.
7789 */
7790 ncr_set_sync_wide_status(np, target);
7791 }
7792
7793 /*==========================================================
7794 **
7795 ** Switch wide mode for current job and it's target
7796 ** SCSI specs say: a SCSI device that accepts a WDTR
7797 ** message shall reset the synchronous agreement to
7798 ** asynchronous mode.
7799 **
7800 **==========================================================
7801 */
7802
7803 static void ncr_setwide (ncb_p np, ccb_p cp, u_char wide, u_char ack)
7804 {
7805 u_short target = INB (nc_sdid) & 0x0f;
7806 tcb_p tp;
7807 u_char scntl3;
7808 u_char sxfer;
7809
7810 assert (cp);
7811 if (!cp) return;
7812
7813 assert (target == (cp->target & 0xf));
7814
7815 tp = &np->target[target];
7816 tp->widedone = wide+1;
7817 scntl3 = (tp->wval & (~EWS)) | (wide ? EWS : 0);
7818
7819 sxfer = ack ? 0 : tp->sval;
7820
7821 /*
7822 ** Stop there if sync/wide parameters are unchanged
7823 */
7824 if (tp->sval == sxfer && tp->wval == scntl3) return;
7825 tp->sval = sxfer;
7826 tp->wval = scntl3;
7827
7828 /*
7829 ** Bells and whistles ;-)
7830 */
7831 if (bootverbose >= 2) {
7832 PRINT_TARGET(np, target);
7833 if (scntl3 & EWS)
7834 printk ("WIDE SCSI (16 bit) enabled.\n");
7835 else
7836 printk ("WIDE SCSI disabled.\n");
7837 }
7838
7839 /*
7840 ** set actual value and sync_status
7841 ** patch ALL ccbs of this target.
7842 */
7843 ncr_set_sync_wide_status(np, target);
7844 }
7845
7846 /*==========================================================
7847 **
7848 ** Switch tagged mode for a target.
7849 **
7850 **==========================================================
7851 */
7852
7853 static void ncr_setup_tags (ncb_p np, u_char tn, u_char ln)
7854 {
7855 tcb_p tp = &np->target[tn];
7856 lcb_p lp = ncr_lp(np, tp, ln);
7857 u_short reqtags, maxdepth;
7858
7859 /*
7860 ** Just in case ...
7861 */
7862 if ((!tp) || (!lp))
7863 return;
7864
7865 /*
7866 ** If SCSI device queue depth is not yet set, leave here.
7867 */
7868 if (!lp->scdev_depth)
7869 return;
7870
7871 /*
7872 ** Donnot allow more tags than the SCSI driver can queue
7873 ** for this device.
7874 ** Donnot allow more tags than we can handle.
7875 */
7876 maxdepth = lp->scdev_depth;
7877 if (maxdepth > lp->maxnxs) maxdepth = lp->maxnxs;
7878 if (lp->maxtags > maxdepth) lp->maxtags = maxdepth;
7879 if (lp->numtags > maxdepth) lp->numtags = maxdepth;
7880
7881 /*
7882 ** only devices conformant to ANSI Version >= 2
7883 ** only devices capable of tagged commands
7884 ** only if enabled by user ..
7885 */
7886 if ((lp->inq_byte7 & INQ7_QUEUE) && lp->numtags > 1) {
7887 reqtags = lp->numtags;
7888 } else {
7889 reqtags = 1;
7890 };
7891
7892 /*
7893 ** Update max number of tags
7894 */
7895 lp->numtags = reqtags;
7896 if (lp->numtags > lp->maxtags)
7897 lp->maxtags = lp->numtags;
7898
7899 /*
7900 ** If we want to switch tag mode, we must wait
7901 ** for no CCB to be active.
7902 */
7903 if (reqtags > 1 && lp->usetags) { /* Stay in tagged mode */
7904 if (lp->queuedepth == reqtags) /* Already announced */
7905 return;
7906 lp->queuedepth = reqtags;
7907 }
7908 else if (reqtags <= 1 && !lp->usetags) { /* Stay in untagged mode */
7909 lp->queuedepth = reqtags;
7910 return;
7911 }
7912 else { /* Want to switch tag mode */
7913 if (lp->busyccbs) /* If not yet safe, return */
7914 return;
7915 lp->queuedepth = reqtags;
7916 lp->usetags = reqtags > 1 ? 1 : 0;
7917 }
7918
7919 /*
7920 ** Patch the lun mini-script, according to tag mode.
7921 */
7922 lp->resel_task = lp->usetags?
7923 cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_tag)) :
7924 cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag));
7925
7926 /*
7927 ** Announce change to user.
7928 */
7929 if (bootverbose) {
7930 PRINT_LUN(np, tn, ln);
7931 if (lp->usetags)
7932 printk("tagged command queue depth set to %d\n", reqtags);
7933 else
7934 printk("tagged command queueing disabled\n");
7935 }
7936 }
7937
7938 /*----------------------------------------------------
7939 **
7940 ** handle user commands
7941 **
7942 **----------------------------------------------------
7943 */
7944
7945 #ifdef SCSI_NCR_USER_COMMAND_SUPPORT
7946
7947 static void ncr_usercmd (ncb_p np)
7948 {
7949 u_char t;
7950 tcb_p tp;
7951 int ln;
7952 u_long size;
7953
7954 switch (np->user.cmd) {
7955 case 0: return;
7956
7957 case UC_SETDEBUG:
7958 #ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
7959 ncr_debug = np->user.data;
7960 #endif
7961 break;
7962
7963 case UC_SETORDER:
7964 np->order = np->user.data;
7965 break;
7966
7967 case UC_SETVERBOSE:
7968 np->verbose = np->user.data;
7969 break;
7970
7971 #ifdef SCSI_NCR_PROFILE_SUPPORT
7972 case UC_CLEARPROF:
7973 bzero(&np->profile, sizeof(np->profile));
7974 break;
7975 #endif
7976 default:
7977 /*
7978 ** We assume that other commands apply to targets.
7979 ** This should always be the case and avoid the below
7980 ** 4 lines to be repeated 5 times.
7981 */
7982 for (t = 0; t < MAX_TARGET; t++) {
7983 if (!((np->user.target >> t) & 1))
7984 continue;
7985 tp = &np->target[t];
7986
7987 switch (np->user.cmd) {
7988
7989 case UC_SETSYNC:
7990 tp->usrsync = np->user.data;
7991 ncr_negotiate (np, tp);
7992 break;
7993
7994 case UC_SETWIDE:
7995 size = np->user.data;
7996 if (size > np->maxwide)
7997 size=np->maxwide;
7998 tp->usrwide = size;
7999 ncr_negotiate (np, tp);
8000 break;
8001
8002 case UC_SETTAGS:
8003 tp->usrtags = np->user.data;
8004 for (ln = 0; ln < MAX_LUN; ln++) {
8005 lcb_p lp;
8006 lp = ncr_lp(np, tp, ln);
8007 if (!lp)
8008 continue;
8009 lp->numtags = np->user.data;
8010 lp->maxtags = lp->numtags;
8011 ncr_setup_tags (np, t, ln);
8012 }
8013 break;
8014
8015 case UC_RESETDEV:
8016 tp->to_reset = 1;
8017 np->istat_sem = SEM;
8018 OUTB (nc_istat, SIGP|SEM);
8019 break;
8020
8021 case UC_CLEARDEV:
8022 for (ln = 0; ln < MAX_LUN; ln++) {
8023 lcb_p lp;
8024 lp = ncr_lp(np, tp, ln);
8025 if (lp)
8026 lp->to_clear = 1;
8027 }
8028 np->istat_sem = SEM;
8029 OUTB (nc_istat, SIGP|SEM);
8030 break;
8031
8032 case UC_SETFLAG:
8033 tp->usrflag = np->user.data;
8034 break;
8035 }
8036 }
8037 break;
8038 }
8039 np->user.cmd=0;
8040 }
8041 #endif
8042
8043 /*==========================================================
8044 **
8045 **
8046 ** ncr timeout handler.
8047 **
8048 **
8049 **==========================================================
8050 **
8051 ** Misused to keep the driver running when
8052 ** interrupts are not configured correctly.
8053 **
8054 **----------------------------------------------------------
8055 */
8056
8057 static void ncr_timeout (ncb_p np)
8058 {
8059 u_long thistime = ktime_get(0);
8060
8061 /*
8062 ** If release process in progress, let's go
8063 ** Set the release stage from 1 to 2 to synchronize
8064 ** with the release process.
8065 */
8066
8067 if (np->release_stage) {
8068 if (np->release_stage == 1) np->release_stage = 2;
8069 return;
8070 }
8071
8072 #ifdef SCSI_NCR_PCIQ_BROKEN_INTR
8073 np->timer.expires = ktime_get((HZ+9)/10);
8074 #else
8075 np->timer.expires = ktime_get(SCSI_NCR_TIMER_INTERVAL);
8076 #endif
8077 add_timer(&np->timer);
8078
8079 /*
8080 ** If we are resetting the ncr, wait for settle_time before
8081 ** clearing it. Then command processing will be resumed.
8082 */
8083 if (np->settle_time) {
8084 if (np->settle_time <= thistime) {
8085 if (bootverbose > 1)
8086 printk("%s: command processing resumed\n", ncr_name(np));
8087 np->settle_time = 0;
8088 requeue_waiting_list(np);
8089 }
8090 return;
8091 }
8092
8093 /*
8094 ** Nothing to do for now, but that may come.
8095 */
8096 if (np->lasttime + 4*HZ < thistime) {
8097 np->lasttime = thistime;
8098 }
8099
8100 #ifdef SCSI_NCR_PCIQ_MAY_MISS_COMPLETIONS
8101 /*
8102 ** Some way-broken PCI bridges may lead to
8103 ** completions being lost when the clearing
8104 ** of the INTFLY flag by the CPU occurs
8105 ** concurrently with the chip raising this flag.
8106 ** If this ever happen, lost completions will
8107 ** be reaped here.
8108 */
8109 ncr_wakeup_done(np);
8110 #endif
8111
8112 #ifdef SCSI_NCR_PCIQ_BROKEN_INTR
8113 if (INB(nc_istat) & (INTF|SIP|DIP)) {
8114
8115 /*
8116 ** Process pending interrupts.
8117 */
8118 if (DEBUG_FLAGS & DEBUG_TINY) printk ("{");
8119 ncr_exception (np);
8120 if (DEBUG_FLAGS & DEBUG_TINY) printk ("}");
8121 }
8122 #endif /* SCSI_NCR_PCIQ_BROKEN_INTR */
8123 }
8124
8125 /*==========================================================
8126 **
8127 ** log message for real hard errors
8128 **
8129 ** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)."
8130 ** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf."
8131 **
8132 ** exception register:
8133 ** ds: dstat
8134 ** si: sist
8135 **
8136 ** SCSI bus lines:
8137 ** so: control lines as driver by NCR.
8138 ** si: control lines as seen by NCR.
8139 ** sd: scsi data lines as seen by NCR.
8140 **
8141 ** wide/fastmode:
8142 ** sxfer: (see the manual)
8143 ** scntl3: (see the manual)
8144 **
8145 ** current script command:
8146 ** dsp: script adress (relative to start of script).
8147 ** dbc: first word of script command.
8148 **
8149 ** First 24 register of the chip:
8150 ** r0..rf
8151 **
8152 **==========================================================
8153 */
8154
8155 static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat)
8156 {
8157 u_int32 dsp;
8158 int script_ofs;
8159 int script_size;
8160 char *script_name;
8161 u_char *script_base;
8162 int i;
8163
8164 dsp = INL (nc_dsp);
8165
8166 if (dsp > np->p_script && dsp <= np->p_script + sizeof(struct script)) {
8167 script_ofs = dsp - np->p_script;
8168 script_size = sizeof(struct script);
8169 script_base = (u_char *) np->script0;
8170 script_name = "script";
8171 }
8172 else if (np->p_scripth < dsp &&
8173 dsp <= np->p_scripth + sizeof(struct scripth)) {
8174 script_ofs = dsp - np->p_scripth;
8175 script_size = sizeof(struct scripth);
8176 script_base = (u_char *) np->scripth0;
8177 script_name = "scripth";
8178 } else {
8179 script_ofs = dsp;
8180 script_size = 0;
8181 script_base = 0;
8182 script_name = "mem";
8183 }
8184
8185 printk ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
8186 ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
8187 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl),
8188 (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs,
8189 (unsigned)INL (nc_dbc));
8190
8191 if (((script_ofs & 3) == 0) &&
8192 (unsigned)script_ofs < script_size) {
8193 printk ("%s: script cmd = %08x\n", ncr_name(np),
8194 scr_to_cpu((int) *(ncrcmd *)(script_base + script_ofs)));
8195 }
8196
8197 printk ("%s: regdump:", ncr_name(np));
8198 for (i=0; i<24;i++)
8199 printk (" %02x", (unsigned)INB_OFF(i));
8200 printk (".\n");
8201 }
8202
8203 /*============================================================
8204 **
8205 ** ncr chip exception handler.
8206 **
8207 **============================================================
8208 **
8209 ** In normal situations, interrupt conditions occur one at
8210 ** a time. But when something bad happens on the SCSI BUS,
8211 ** the chip may raise several interrupt flags before
8212 ** stopping and interrupting the CPU. The additionnal
8213 ** interrupt flags are stacked in some extra registers
8214 ** after the SIP and/or DIP flag has been raised in the
8215 ** ISTAT. After the CPU has read the interrupt condition
8216 ** flag from SIST or DSTAT, the chip unstacks the other
8217 ** interrupt flags and sets the corresponding bits in
8218 ** SIST or DSTAT. Since the chip starts stacking once the
8219 ** SIP or DIP flag is set, there is a small window of time
8220 ** where the stacking does not occur.
8221 **
8222 ** Typically, multiple interrupt conditions may happen in
8223 ** the following situations:
8224 **
8225 ** - SCSI parity error + Phase mismatch (PAR|MA)
8226 ** When an parity error is detected in input phase
8227 ** and the device switches to msg-in phase inside a
8228 ** block MOV.
8229 ** - SCSI parity error + Unexpected disconnect (PAR|UDC)
8230 ** When a stupid device does not want to handle the
8231 ** recovery of an SCSI parity error.
8232 ** - Some combinations of STO, PAR, UDC, ...
8233 ** When using non compliant SCSI stuff, when user is
8234 ** doing non compliant hot tampering on the BUS, when
8235 ** something really bad happens to a device, etc ...
8236 **
8237 ** The heuristic suggested by SYMBIOS to handle
8238 ** multiple interrupts is to try unstacking all
8239 ** interrupts conditions and to handle them on some
8240 ** priority based on error severity.
8241 ** This will work when the unstacking has been
8242 ** successful, but we cannot be 100 % sure of that,
8243 ** since the CPU may have been faster to unstack than
8244 ** the chip is able to stack. Hmmm ... But it seems that
8245 ** such a situation is very unlikely to happen.
8246 **
8247 ** If this happen, for example STO catched by the CPU
8248 ** then UDC happenning before the CPU have restarted
8249 ** the SCRIPTS, the driver may wrongly complete the
8250 ** same command on UDC, since the SCRIPTS didn't restart
8251 ** and the DSA still points to the same command.
8252 ** We avoid this situation by setting the DSA to an
8253 ** invalid value when the CCB is completed and before
8254 ** restarting the SCRIPTS.
8255 **
8256 ** Another issue is that we need some section of our
8257 ** recovery procedures to be somehow uninterruptible and
8258 ** that the SCRIPTS processor does not provides such a
8259 ** feature. For this reason, we handle recovery preferently
8260 ** from the C code and check against some SCRIPTS
8261 ** critical sections from the C code.
8262 **
8263 ** Hopefully, the interrupt handling of the driver is now
8264 ** able to resist to weird BUS error conditions, but donnot
8265 ** ask me for any guarantee that it will never fail. :-)
8266 ** Use at your own decision and risk.
8267 **
8268 **============================================================
8269 */
8270
8271 void ncr_exception (ncb_p np)
8272 {
8273 u_char istat, istatc;
8274 u_char dstat;
8275 u_short sist;
8276 int i;
8277
8278 #ifdef SCSI_NCR_OPTIMIZE_896_1
8279 /*
8280 ** This optimization when used with a 896 that handles
8281 ** phase mismatch from the SCRIPTS allows to only do
8282 ** PCI memory writes transactions from the CPU and so to
8283 ** take advantage of PCI posted writes.
8284 ** Who wants his 500 MHz CPU to wait several micro-seconds
8285 ** for the PCI BUS to be granted when this can be avoided?
8286 ** I don't, even for my slow 233 MHz PII. :-)
8287 **
8288 ** We assume we have been called for command completion.
8289 ** If no completion found, go with normal handling.
8290 ** Ordering is ensured by the SCRIPTS performing a read
8291 ** from main memory prior to raising INTFLY.
8292 ** We have to raise SIGP since the chip may be currently
8293 ** going to a wait reselect instruction. IMO, SIGP should
8294 ** not be clearable in ISTAT since it can be polled and
8295 ** cleared by reading CTEST2. This tiny chip misdesign is a
8296 ** penalty here.
8297 **
8298 ** The MA interrupt and interrupt sharing may also have
8299 ** adverse effects on this optimization, so we only want
8300 ** to use it if it is enabled by user.
8301 ** (BTW, this optimization seems to even have some goodness
8302 ** with my 895 that unfortunately suffers of the MA int.).
8303 */
8304 if (driver_setup.optimize & 1) {
8305 OUTB(nc_istat, (INTF | SIGP | np->istat_sem));
8306 if (ncr_wakeup_done (np)) {
8307 #ifdef SCSI_NCR_PROFILE_SUPPORT
8308 ++np->profile.num_fly;
8309 #endif
8310 return;
8311 }
8312 }
8313 #endif /* SCSI_NCR_OPTIMIZE_896_1 */
8314
8315 /*
8316 ** interrupt on the fly ?
8317 **
8318 ** For bridges that donnot flush posted writes
8319 ** in the reverse direction on read, a dummy read
8320 ** may help not to miss completions.
8321 */
8322 istat = INB (nc_istat);
8323 if (istat & INTF) {
8324 OUTB (nc_istat, (istat & SIGP) | INTF | np->istat_sem);
8325 #ifdef SCSI_NCR_PCIQ_MAY_NOT_FLUSH_PW_UPSTREAM
8326 istat = INB (nc_istat); /* DUMMY READ */
8327 #endif
8328 if (DEBUG_FLAGS & DEBUG_TINY) printk ("F ");
8329 (void)ncr_wakeup_done (np);
8330 #ifdef SCSI_NCR_PROFILE_SUPPORT
8331 ++np->profile.num_fly;
8332 #endif
8333 };
8334
8335 if (!(istat & (SIP|DIP)))
8336 return;
8337
8338 #ifdef SCSI_NCR_PROFILE_SUPPORT
8339 ++np->profile.num_int;
8340 #endif
8341
8342 #if 0 /* We should never get this one */
8343 if (istat & CABRT)
8344 OUTB (nc_istat, CABRT);
8345 #endif
8346
8347 /*
8348 ** Steinbach's Guideline for Systems Programming:
8349 ** Never test for an error condition you don't know how to handle.
8350 */
8351
8352 /*========================================================
8353 ** PAR and MA interrupts may occur at the same time,
8354 ** and we need to know of both in order to handle
8355 ** this situation properly. We try to unstack SCSI
8356 ** interrupts for that reason. BTW, I dislike a LOT
8357 ** such a loop inside the interrupt routine.
8358 ** Even if DMA interrupt stacking is very unlikely to
8359 ** happen, we also try unstacking these ones, since
8360 ** this has no performance impact.
8361 **=========================================================
8362 */
8363 sist = 0;
8364 dstat = 0;
8365 istatc = istat;
8366 do {
8367 if (istatc & SIP)
8368 sist |= INW (nc_sist);
8369 if (istatc & DIP)
8370 dstat |= INB (nc_dstat);
8371 istatc = INB (nc_istat);
8372 istat |= istatc;
8373 } while (istatc & (SIP|DIP));
8374
8375 if (DEBUG_FLAGS & DEBUG_TINY)
8376 printk ("<%d|%x:%x|%x:%x>",
8377 (int)INB(nc_scr0),
8378 dstat,sist,
8379 (unsigned)INL(nc_dsp),
8380 (unsigned)INL(nc_dbc));
8381
8382 /*========================================================
8383 ** First, interrupts we want to service cleanly.
8384 **
8385 ** Phase mismatch (MA) is the most frequent interrupt
8386 ** for chip earlier than the 896 and so we have to service
8387 ** it as quickly as possible.
8388 ** A SCSI parity error (PAR) may be combined with a phase
8389 ** mismatch condition (MA).
8390 ** Programmed interrupts (SIR) are used to call the C code
8391 ** from SCRIPTS.
8392 ** The single step interrupt (SSI) is not used in this
8393 ** driver.
8394 **=========================================================
8395 */
8396
8397 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
8398 !(dstat & (MDPE|BF|ABRT|IID))) {
8399 if (sist & PAR) ncr_int_par (np, sist);
8400 else if (sist & MA) ncr_int_ma (np);
8401 else if (dstat & SIR) ncr_int_sir (np);
8402 else if (dstat & SSI) OUTONB (nc_dcntl, (STD|NOCOM));
8403 else goto unknown_int;
8404 return;
8405 };
8406
8407 /*========================================================
8408 ** Now, interrupts that donnot happen in normal
8409 ** situations and that we may need to recover from.
8410 **
8411 ** On SCSI RESET (RST), we reset everything.
8412 ** On SCSI BUS MODE CHANGE (SBMC), we complete all
8413 ** active CCBs with RESET status, prepare all devices
8414 ** for negotiating again and restart the SCRIPTS.
8415 ** On STO and UDC, we complete the CCB with the corres-
8416 ** ponding status and restart the SCRIPTS.
8417 **=========================================================
8418 */
8419
8420 if (sist & RST) {
8421 ncr_init (np, 1, bootverbose ? "scsi reset" : NULL, HS_RESET);
8422 return;
8423 };
8424
8425 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
8426 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
8427
8428 if (!(sist & (GEN|HTH|SGE)) &&
8429 !(dstat & (MDPE|BF|ABRT|IID))) {
8430 if (sist & SBMC) ncr_int_sbmc (np);
8431 else if (sist & STO) ncr_int_sto (np);
8432 else if (sist & UDC) ncr_int_udc (np);
8433 else goto unknown_int;
8434 return;
8435 };
8436
8437 /*=========================================================
8438 ** Now, interrupts we are not able to recover cleanly.
8439 **
8440 ** Do the register dump.
8441 ** Log message for hard errors.
8442 ** Reset everything.
8443 **=========================================================
8444 */
8445 if (ktime_exp(np->regtime)) {
8446 np->regtime = ktime_get(10*HZ);
8447 for (i = 0; i<sizeof(np->regdump); i++)
8448 ((char*)&np->regdump)[i] = INB_OFF(i);
8449 np->regdump.nc_dstat = dstat;
8450 np->regdump.nc_sist = sist;
8451 };
8452
8453 ncr_log_hard_error(np, sist, dstat);
8454
8455 if ((sist & (GEN|HTH|SGE)) ||
8456 (dstat & (MDPE|BF|ABRT|IID))) {
8457 ncr_start_reset(np);
8458 return;
8459 };
8460
8461 unknown_int:
8462 /*=========================================================
8463 ** We just miss the cause of the interrupt. :(
8464 ** Print a message. The timeout will do the real work.
8465 **=========================================================
8466 */
8467 printk( "%s: unknown interrupt(s) ignored, "
8468 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
8469 ncr_name(np), istat, dstat, sist);
8470 }
8471
8472
8473 /*==========================================================
8474 **
8475 ** generic recovery from scsi interrupt
8476 **
8477 **==========================================================
8478 **
8479 ** The doc says that when the chip gets an SCSI interrupt,
8480 ** it tries to stop in an orderly fashion, by completing
8481 ** an instruction fetch that had started or by flushing
8482 ** the DMA fifo for a write to memory that was executing.
8483 ** Such a fashion is not enough to know if the instruction
8484 ** that was just before the current DSP value has been
8485 ** executed or not.
8486 **
8487 ** There are 3 small SCRIPTS sections that deal with the
8488 ** start queue and the done queue that may break any
8489 ** assomption from the C code if we are interrupted
8490 ** inside, so we reset if it happens. Btw, since these
8491 ** SCRIPTS sections are executed while the SCRIPTS hasn't
8492 ** started SCSI operations, it is very unlikely to happen.
8493 **
8494 ** All the driver data structures are supposed to be
8495 ** allocated from the same 4 GB memory window, so there
8496 ** is a 1 to 1 relationship between DSA and driver data
8497 ** structures. Since we are careful :) to invalidate the
8498 ** DSA when we complete a command or when the SCRIPTS
8499 ** pushes a DSA into a queue, we can trust it when it
8500 ** points to a CCB.
8501 **
8502 **----------------------------------------------------------
8503 */
8504 static void ncr_recover_scsi_int (ncb_p np, u_char hsts)
8505 {
8506 u_int32 dsp = INL (nc_dsp);
8507 u_int32 dsa = INL (nc_dsa);
8508 ccb_p cp = ncr_ccb_from_dsa(np, dsa);
8509
8510 /*
8511 ** If we haven't been interrupted inside the SCRIPTS
8512 ** critical pathes, we can safely restart the SCRIPTS
8513 ** and trust the DSA value if it matches a CCB.
8514 */
8515 if ((!(dsp > NCB_SCRIPT_PHYS (np, getjob_begin) &&
8516 dsp < NCB_SCRIPT_PHYS (np, getjob_end) + 1)) &&
8517 (!(dsp > NCB_SCRIPT_PHYS (np, ungetjob) &&
8518 dsp < NCB_SCRIPT_PHYS (np, reselect) + 1)) &&
8519 (!(dsp > NCB_SCRIPTH_PHYS (np, sel_for_abort) &&
8520 dsp < NCB_SCRIPTH_PHYS (np, sel_for_abort_1) + 1)) &&
8521 (!(dsp > NCB_SCRIPT_PHYS (np, done) &&
8522 dsp < NCB_SCRIPT_PHYS (np, done_end) + 1))) {
8523 if (cp) {
8524 cp->host_status = hsts;
8525 ncr_complete (np, cp);
8526 }
8527 OUTL (nc_dsa, DSA_INVALID);
8528 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
8529 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
8530 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start));
8531 }
8532 else
8533 goto reset_all;
8534
8535 return;
8536
8537 reset_all:
8538 ncr_start_reset(np);
8539 }
8540
8541 /*==========================================================
8542 **
8543 ** ncr chip exception handler for selection timeout
8544 **
8545 **==========================================================
8546 **
8547 ** There seems to be a bug in the 53c810.
8548 ** Although a STO-Interrupt is pending,
8549 ** it continues executing script commands.
8550 ** But it will fail and interrupt (IID) on
8551 ** the next instruction where it's looking
8552 ** for a valid phase.
8553 **
8554 **----------------------------------------------------------
8555 */
8556
8557 void ncr_int_sto (ncb_p np)
8558 {
8559 u_int32 dsp = INL (nc_dsp);
8560
8561 if (DEBUG_FLAGS & DEBUG_TINY) printk ("T");
8562
8563 if (dsp == NCB_SCRIPT_PHYS (np, wf_sel_done) + 8 ||
8564 !(driver_setup.recovery & 1))
8565 ncr_recover_scsi_int(np, HS_SEL_TIMEOUT);
8566 else
8567 ncr_start_reset(np);
8568 }
8569
8570 /*==========================================================
8571 **
8572 ** ncr chip exception handler for unexpected disconnect
8573 **
8574 **==========================================================
8575 **
8576 **----------------------------------------------------------
8577 */
8578 void ncr_int_udc (ncb_p np)
8579 {
8580 printk ("%s: unexpected disconnect\n", ncr_name(np));
8581 ncr_recover_scsi_int(np, HS_UNEXPECTED);
8582 }
8583
8584 /*==========================================================
8585 **
8586 ** ncr chip exception handler for SCSI bus mode change
8587 **
8588 **==========================================================
8589 **
8590 ** spi2-r12 11.2.3 says a transceiver mode change must
8591 ** generate a reset event and a device that detects a reset
8592 ** event shall initiate a hard reset. It says also that a
8593 ** device that detects a mode change shall set data transfer
8594 ** mode to eight bit asynchronous, etc...
8595 ** So, just resetting should be enough.
8596 **
8597 **
8598 **----------------------------------------------------------
8599 */
8600
8601 static void ncr_int_sbmc (ncb_p np)
8602 {
8603 u_char scsi_mode = INB (nc_stest4) & SMODE;
8604
8605 printk("%s: SCSI bus mode change from %x to %x.\n",
8606 ncr_name(np), np->scsi_mode, scsi_mode);
8607
8608 np->scsi_mode = scsi_mode;
8609
8610
8611 /*
8612 ** Suspend command processing for 1 second and
8613 ** reinitialize all except the chip.
8614 */
8615 np->settle_time = ktime_get(1*HZ);
8616 ncr_init (np, 0, bootverbose ? "scsi mode change" : NULL, HS_RESET);
8617 }
8618
8619 /*==========================================================
8620 **
8621 ** ncr chip exception handler for SCSI parity error.
8622 **
8623 **==========================================================
8624 **
8625 ** When the chip detects a SCSI parity error and is
8626 ** currently executing a (CH)MOV instruction, it does
8627 ** not interrupt immediately, but tries to finish the
8628 ** transfer of the current scatter entry before
8629 ** interrupting. The following situations may occur:
8630 **
8631 ** - The complete scatter entry has been transferred
8632 ** without the device having changed phase.
8633 ** The chip will then interrupt with the DSP pointing
8634 ** to the instruction that follows the MOV.
8635 **
8636 ** - A phase mismatch occurs before the MOV finished
8637 ** and phase errors are to be handled by the C code.
8638 ** The chip will then interrupt with both PAR and MA
8639 ** conditions set.
8640 **
8641 ** - A phase mismatch occurs before the MOV finished and
8642 ** phase errors are to be handled by SCRIPTS (895A or 896).
8643 ** The chip will load the DSP with the phase mismatch
8644 ** JUMP address and interrupt the host processor.
8645 **
8646 **----------------------------------------------------------
8647 */
8648
8649 static void ncr_int_par (ncb_p np, u_short sist)
8650 {
8651 u_char hsts = INB (HS_PRT);
8652 u_int32 dsp = INL (nc_dsp);
8653 u_int32 dbc = INL (nc_dbc);
8654 u_int32 dsa = INL (nc_dsa);
8655 u_char sbcl = INB (nc_sbcl);
8656 u_char cmd = dbc >> 24;
8657 int phase = cmd & 7;
8658 ccb_p cp = ncr_ccb_from_dsa(np, dsa);
8659
8660 printk("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
8661 ncr_name(np), hsts, dbc, sbcl);
8662
8663 /*
8664 ** Check that the chip is connected to the SCSI BUS.
8665 */
8666 if (!(INB (nc_scntl1) & ISCON)) {
8667 if (!(driver_setup.recovery & 1)) {
8668 ncr_recover_scsi_int(np, HS_FAIL);
8669 return;
8670 }
8671 goto reset_all;
8672 }
8673
8674 /*
8675 ** If the nexus is not clearly identified, reset the bus.
8676 ** We will try to do better later.
8677 */
8678 if (!cp)
8679 goto reset_all;
8680
8681 /*
8682 ** Check instruction was a MOV, direction was INPUT and
8683 ** ATN is asserted.
8684 */
8685 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
8686 goto reset_all;
8687
8688 /*
8689 ** Keep track of the parity error.
8690 */
8691 cp->xerr_status |= XE_PARITY_ERR;
8692
8693 /*
8694 ** Prepare the message to send to the device.
8695 */
8696 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
8697
8698 /*
8699 ** If the old phase was DATA IN phase, we have to deal with
8700 ** the 3 situations described above.
8701 ** For other input phases (MSG IN and STATUS), the device
8702 ** must resend the whole thing that failed parity checking
8703 ** or signal error. So, jumping to dispatcher should be OK.
8704 */
8705 if (phase == 1) {
8706 /* Phase mismatch handled by SCRIPTS */
8707 if (dsp == NCB_SCRIPTH_PHYS (np, pm_handle))
8708 OUTL (nc_dsp, dsp);
8709 /* Phase mismatch handled by the C code */
8710 else if (sist & MA)
8711 ncr_int_ma (np);
8712 /* No phase mismatch occurred */
8713 else {
8714 OUTL (nc_temp, dsp);
8715 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch));
8716 }
8717 }
8718 else
8719 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
8720 return;
8721
8722 reset_all:
8723 ncr_start_reset(np);
8724 return;
8725 }
8726
8727 /*==========================================================
8728 **
8729 **
8730 ** ncr chip exception handler for phase errors.
8731 **
8732 **
8733 **==========================================================
8734 **
8735 ** We have to construct a new transfer descriptor,
8736 ** to transfer the rest of the current block.
8737 **
8738 **----------------------------------------------------------
8739 */
8740
8741 static void ncr_int_ma (ncb_p np)
8742 {
8743 u_int32 dbc;
8744 u_int32 rest;
8745 u_int32 dsp;
8746 u_int32 dsa;
8747 u_int32 nxtdsp;
8748 u_int32 *vdsp;
8749 u_int32 oadr, olen;
8750 u_int32 *tblp;
8751 u_int32 newcmd;
8752 u_int delta;
8753 u_char cmd;
8754 u_char hflags, hflags0;
8755 struct pm_ctx *pm;
8756 ccb_p cp;
8757
8758 #ifdef SCSI_NCR_PROFILE_SUPPORT
8759 ++np->profile.num_break;
8760 #endif
8761
8762 dsp = INL (nc_dsp);
8763 dbc = INL (nc_dbc);
8764 dsa = INL (nc_dsa);
8765
8766 cmd = dbc >> 24;
8767 rest = dbc & 0xffffff;
8768 delta = 0;
8769
8770 /*
8771 ** locate matching cp.
8772 */
8773 cp = ncr_ccb_from_dsa(np, dsa);
8774
8775 /*
8776 ** Donnot take into account dma fifo and various buffers in
8777 ** INPUT phase since the chip flushes everything before
8778 ** raising the MA interrupt for interrupted INPUT phases.
8779 ** For DATA IN phase, we will check for the SWIDE later.
8780 */
8781 if ((cmd & 7) != 1) {
8782 u_int32 dfifo;
8783 u_char ss0, ss2;
8784
8785 /*
8786 ** Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
8787 */
8788 dfifo = INL(nc_dfifo);
8789
8790 /*
8791 ** Calculate remaining bytes in DMA fifo.
8792 ** (CTEST5 = dfifo >> 16)
8793 */
8794 if (dfifo & (DFS << 16))
8795 delta = ((((dfifo >> 8) & 0x300) |
8796 (dfifo & 0xff)) - rest) & 0x3ff;
8797 else
8798 delta = ((dfifo & 0xff) - rest) & 0x7f;
8799
8800 /*
8801 ** The data in the dma fifo has not been transfered to
8802 ** the target -> add the amount to the rest
8803 ** and clear the data.
8804 ** Check the sstat2 register in case of wide transfer.
8805 */
8806 rest += delta;
8807 ss0 = INB (nc_sstat0);
8808 if (ss0 & OLF) rest++;
8809 if (ss0 & ORF) rest++;
8810 if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
8811 ss2 = INB (nc_sstat2);
8812 if (ss2 & OLF1) rest++;
8813 if (ss2 & ORF1) rest++;
8814 };
8815
8816 /*
8817 ** Clear fifos.
8818 */
8819 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
8820 OUTB (nc_stest3, TE|CSF); /* scsi fifo */
8821 }
8822
8823 /*
8824 ** log the information
8825 */
8826
8827 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
8828 printk ("P%x%x RL=%d D=%d ", cmd&7, INB(nc_sbcl)&7,
8829 (unsigned) rest, (unsigned) delta);
8830
8831 /*
8832 ** try to find the interrupted script command,
8833 ** and the address at which to continue.
8834 */
8835 vdsp = 0;
8836 nxtdsp = 0;
8837 if (dsp > np->p_script &&
8838 dsp <= np->p_script + sizeof(struct script)) {
8839 vdsp = (u_int32 *)((char*)np->script0 + (dsp-np->p_script-8));
8840 nxtdsp = dsp;
8841 }
8842 else if (dsp > np->p_scripth &&
8843 dsp <= np->p_scripth + sizeof(struct scripth)) {
8844 vdsp = (u_int32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8));
8845 nxtdsp = dsp;
8846 }
8847
8848 /*
8849 ** log the information
8850 */
8851 if (DEBUG_FLAGS & DEBUG_PHASE) {
8852 printk ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
8853 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
8854 };
8855
8856 if (!vdsp) {
8857 printk ("%s: interrupted SCRIPT address not found.\n",
8858 ncr_name (np));
8859 goto reset_all;
8860 }
8861
8862 if (!cp) {
8863 printk ("%s: SCSI phase error fixup: CCB already dequeued.\n",
8864 ncr_name (np));
8865 goto reset_all;
8866 }
8867
8868 /*
8869 ** get old startaddress and old length.
8870 */
8871
8872 oadr = scr_to_cpu(vdsp[1]);
8873
8874 if (cmd & 0x10) { /* Table indirect */
8875 tblp = (u_int32 *) ((char*) &cp->phys + oadr);
8876 olen = scr_to_cpu(tblp[0]);
8877 oadr = scr_to_cpu(tblp[1]);
8878 } else {
8879 tblp = (u_int32 *) 0;
8880 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
8881 };
8882
8883 if (DEBUG_FLAGS & DEBUG_PHASE) {
8884 printk ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
8885 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
8886 tblp,
8887 (unsigned) olen,
8888 (unsigned) oadr);
8889 };
8890
8891 /*
8892 ** check cmd against assumed interrupted script command.
8893 */
8894
8895 if (cmd != (scr_to_cpu(vdsp[0]) >> 24)) {
8896 PRINT_ADDR(cp->cmd);
8897 printk ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
8898 (unsigned)cmd, (unsigned)scr_to_cpu(vdsp[0]) >> 24);
8899
8900 goto reset_all;
8901 };
8902
8903 /*
8904 ** if old phase not dataphase, leave here.
8905 */
8906
8907 if (cmd & 0x06) {
8908 PRINT_ADDR(cp->cmd);
8909 printk ("phase change %x-%x %d@%08x resid=%d.\n",
8910 cmd&7, INB(nc_sbcl)&7, (unsigned)olen,
8911 (unsigned)oadr, (unsigned)rest);
8912 goto unexpected_phase;
8913 };
8914
8915 /*
8916 ** Choose the correct PM save area.
8917 **
8918 ** Look at the PM_SAVE SCRIPT if you want to understand
8919 ** this stuff. The equivalent code is implemented in
8920 ** SCRIPTS for the 895A and 896 that are able to handle
8921 ** PM from the SCRIPTS processor.
8922 */
8923
8924 hflags0 = INB (HF_PRT);
8925 hflags = hflags0;
8926
8927 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
8928 if (hflags & HF_IN_PM0)
8929 nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
8930 else if (hflags & HF_IN_PM1)
8931 nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
8932
8933 if (hflags & HF_DP_SAVED)
8934 hflags ^= HF_ACT_PM;
8935 }
8936
8937 if (!(hflags & HF_ACT_PM)) {
8938 pm = &cp->phys.pm0;
8939 newcmd = NCB_SCRIPT_PHYS(np, pm0_data);
8940 }
8941 else {
8942 pm = &cp->phys.pm1;
8943 newcmd = NCB_SCRIPT_PHYS(np, pm1_data);
8944 }
8945
8946 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
8947 if (hflags != hflags0)
8948 OUTB (HF_PRT, hflags);
8949
8950 /*
8951 ** fillin the phase mismatch context
8952 */
8953
8954 pm->sg.addr = cpu_to_scr(oadr + olen - rest);
8955 pm->sg.size = cpu_to_scr(rest);
8956 pm->ret = cpu_to_scr(nxtdsp);
8957
8958 /*
8959 ** If we have a SWIDE,
8960 ** - prepare the address to write the SWIDE from SCRIPTS,
8961 ** - compute the SCRIPTS address to restart from,
8962 ** - move current data pointer context by one byte.
8963 */
8964 nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
8965 if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
8966 (INB (nc_scntl2) & WSR)) {
8967 /*
8968 ** Hmmm... The device may want to also ignore
8969 ** this residue but it must send immediately the
8970 ** appropriate message. We snoop the SCSI BUS
8971 ** and will just throw away this message from
8972 ** SCRIPTS if the SWIDE is to be ignored.
8973 */
8974 if ((INB (nc_sbcl) & 7) == 7 &&
8975 INB (nc_sbdl) == M_IGN_RESIDUE) {
8976 nxtdsp = NCB_SCRIPT_PHYS (np, ign_i_w_r_msg);
8977 }
8978 /*
8979 ** We must grab the SWIDE.
8980 ** We will use some complex SCRIPTS for that.
8981 */
8982 else {
8983 OUTL (nc_scratcha, pm->sg.addr);
8984 nxtdsp = NCB_SCRIPTH_PHYS (np, swide_ma_32);
8985 if (np->features & FE_64BIT) {
8986 OUTB (nc_sbr, (pm->sg.size >> 24));
8987 nxtdsp = NCB_SCRIPTH_PHYS (np, swide_ma_64);
8988 }
8989 /*
8990 ** Adjust our data pointer context.
8991 */
8992 ++pm->sg.addr;
8993 --pm->sg.size;
8994 /*
8995 ** Hmmm... Could it be possible that a SWIDE that
8996 ** is followed by a 1 byte CHMOV would lead to
8997 ** a CHMOV(0). Anyway, we handle it by just
8998 ** skipping context that would attempt a CHMOV(0).
8999 */
9000 if (!pm->sg.size)
9001 newcmd = pm->ret;
9002 }
9003 }
9004
9005 if (DEBUG_FLAGS & DEBUG_PHASE) {
9006 PRINT_ADDR(cp->cmd);
9007 printk ("PM %x %x %x / %x %x %x.\n",
9008 hflags0, hflags, newcmd,
9009 (unsigned)scr_to_cpu(pm->sg.addr),
9010 (unsigned)scr_to_cpu(pm->sg.size),
9011 (unsigned)scr_to_cpu(pm->ret));
9012 }
9013
9014 /*
9015 ** Restart the SCRIPTS processor.
9016 */
9017
9018 OUTL (nc_temp, newcmd);
9019 OUTL (nc_dsp, nxtdsp);
9020 return;
9021
9022 /*
9023 ** Unexpected phase changes that occurs when the current phase
9024 ** is not a DATA IN or DATA OUT phase are due to error conditions.
9025 ** Such event may only happen when the SCRIPTS is using a
9026 ** multibyte SCSI MOVE.
9027 **
9028 ** Phase change Some possible cause
9029 **
9030 ** COMMAND --> MSG IN SCSI parity error detected by target.
9031 ** COMMAND --> STATUS Bad command or refused by target.
9032 ** MSG OUT --> MSG IN Message rejected by target.
9033 ** MSG OUT --> COMMAND Bogus target that discards extended
9034 ** negotiation messages.
9035 **
9036 ** The code below does not care of the new phase and so
9037 ** trusts the target. Why to annoy it ?
9038 ** If the interrupted phase is COMMAND phase, we restart at
9039 ** dispatcher.
9040 ** If a target does not get all the messages after selection,
9041 ** the code assumes blindly that the target discards extended
9042 ** messages and clears the negotiation status.
9043 ** If the target does not want all our response to negotiation,
9044 ** we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
9045 ** bloat for such a should_not_happen situation).
9046 ** In all other situation, we reset the BUS.
9047 ** Are these assumptions reasonnable ? (Wait and see ...)
9048 */
9049 unexpected_phase:
9050 dsp -= 8;
9051 nxtdsp = 0;
9052
9053 switch (cmd & 7) {
9054 case 2: /* COMMAND phase */
9055 nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
9056 break;
9057 #if 0
9058 case 3: /* STATUS phase */
9059 nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
9060 break;
9061 #endif
9062 case 6: /* MSG OUT phase */
9063 /*
9064 ** If the device may want to use untagged when we want
9065 ** tagged, we prepare an IDENTIFY without disc. granted,
9066 ** since we will not be able to handle reselect.
9067 ** Otherwise, we just don't care.
9068 */
9069 if (dsp == NCB_SCRIPT_PHYS (np, send_ident)) {
9070 if (cp->tag != NO_TAG && olen - rest <= 3) {
9071 cp->host_status = HS_BUSY;
9072 np->msgout[0] = M_IDENTIFY | cp->lun;
9073 nxtdsp = NCB_SCRIPTH_PHYS (np, ident_break_atn);
9074 }
9075 else
9076 nxtdsp = NCB_SCRIPTH_PHYS (np, ident_break);
9077 }
9078 else if (dsp == NCB_SCRIPTH_PHYS (np, send_wdtr) ||
9079 dsp == NCB_SCRIPTH_PHYS (np, send_sdtr)) {
9080 nxtdsp = NCB_SCRIPTH_PHYS (np, nego_bad_phase);
9081 }
9082 break;
9083 #if 0
9084 case 7: /* MSG IN phase */
9085 nxtdsp = NCB_SCRIPT_PHYS (np, clrack);
9086 break;
9087 #endif
9088 }
9089
9090 if (nxtdsp) {
9091 OUTL (nc_dsp, nxtdsp);
9092 return;
9093 }
9094
9095 reset_all:
9096 ncr_start_reset(np);
9097 }
9098
9099 /*==========================================================
9100 **
9101 ** ncr chip handler for QUEUE FULL and CHECK CONDITION
9102 **
9103 **==========================================================
9104 **
9105 ** On QUEUE FULL status, we set the actual tagged command
9106 ** queue depth to the number of disconnected CCBs that is
9107 ** hopefully a good value to avoid further QUEUE FULL.
9108 **
9109 ** On CHECK CONDITION or COMMAND TERMINATED, we use the
9110 ** CCB of the failed command for performing a REQUEST
9111 ** SENSE SCSI command.
9112 **
9113 ** We do not want to change the order commands will be
9114 ** actually queued to the device after we received a
9115 ** QUEUE FULL status. We also want to properly deal with
9116 ** contingent allegiance condition. For these reasons,
9117 ** we remove from the start queue all commands for this
9118 ** LUN that haven't been yet queued to the device and
9119 ** put them back in the correponding LUN queue, then
9120 ** requeue the CCB that failed in front of the LUN queue.
9121 ** I just hope this not to be performed too often. :)
9122 **
9123 ** If we are using IMMEDIATE ARBITRATION, we clear the
9124 ** IARB hint for every commands we encounter in order not
9125 ** to be stuck with a won arbitration and no job to queue
9126 ** to a device.
9127 **----------------------------------------------------------
9128 */
9129
9130 static void ncr_sir_to_redo(ncb_p np, int num, ccb_p cp)
9131 {
9132 Scsi_Cmnd *cmd = cp->cmd;
9133 tcb_p tp = &np->target[cp->target];
9134 lcb_p lp = ncr_lp(np, tp, cp->lun);
9135 ccb_p cp2;
9136 int busyccbs = 1;
9137 u_int32 startp;
9138 u_char s_status = INB (SS_PRT);
9139 int msglen;
9140 int i, j;
9141
9142
9143 /*
9144 ** If the LCB is not yet available, then only
9145 ** 1 IO is accepted, so we should have it.
9146 */
9147 if (!lp)
9148 goto next;
9149 /*
9150 ** Remove all CCBs queued to the chip for that LUN and put
9151 ** them back in the LUN CCB wait queue.
9152 */
9153 busyccbs = lp->queuedccbs;
9154 i = (INL (nc_scratcha) - np->p_squeue) / 4;
9155 j = i;
9156 while (i != np->squeueput) {
9157 cp2 = ncr_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
9158 assert(cp2);
9159 #ifdef SCSI_NCR_IARB_SUPPORT
9160 /* IARB hints may not be relevant any more. Forget them. */
9161 cp2->host_flags &= ~HF_HINT_IARB;
9162 #endif
9163 if (cp2 && cp2->target == cp->target && cp2->lun == cp->lun) {
9164 xpt_remque(&cp2->link_ccbq);
9165 xpt_insque_head(&cp2->link_ccbq, &lp->wait_ccbq);
9166 --lp->queuedccbs;
9167 cp2->queued = 0;
9168 }
9169 else {
9170 if (i != j)
9171 np->squeue[j] = np->squeue[i];
9172 if ((j += 2) >= MAX_START*2) j = 0;
9173 }
9174 if ((i += 2) >= MAX_START*2) i = 0;
9175 }
9176 if (i != j) /* Copy back the idle task if needed */
9177 np->squeue[j] = np->squeue[i];
9178 np->squeueput = j; /* Update our current start queue pointer */
9179
9180 /*
9181 ** Requeue the interrupted CCB in front of the
9182 ** LUN CCB wait queue to preserve ordering.
9183 */
9184 xpt_remque(&cp->link_ccbq);
9185 xpt_insque_head(&cp->link_ccbq, &lp->wait_ccbq);
9186 --lp->queuedccbs;
9187 cp->queued = 0;
9188
9189 next:
9190
9191 #ifdef SCSI_NCR_IARB_SUPPORT
9192 /* IARB hint may not be relevant any more. Forget it. */
9193 cp->host_flags &= ~HF_HINT_IARB;
9194 if (np->last_cp)
9195 np->last_cp = 0;
9196 #endif
9197
9198 /*
9199 ** Now we can restart the SCRIPTS processor safely.
9200 */
9201 MEMORY_BARRIER();
9202 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start));
9203
9204 switch(s_status) {
9205 default:
9206 case S_BUSY:
9207 ncr_complete(np, cp);
9208 break;
9209 case S_QUEUE_FULL:
9210 if (!lp || !lp->queuedccbs) {
9211 ncr_complete(np, cp);
9212 break;
9213 }
9214 if (bootverbose >= 1) {
9215 PRINT_ADDR(cmd);
9216 printk ("QUEUE FULL! %d busy, %d disconnected CCBs\n",
9217 busyccbs, lp->queuedccbs);
9218 }
9219 /*
9220 ** Decrease number of tags to the number of
9221 ** disconnected commands.
9222 */
9223 if (lp->queuedccbs < lp->numtags) {
9224 lp->numtags = lp->queuedccbs;
9225 lp->num_good = 0;
9226 ncr_setup_tags (np, cp->target, cp->lun);
9227 }
9228 /*
9229 ** Repair the offending CCB.
9230 */
9231 cp->phys.header.savep = cp->startp;
9232 cp->phys.header.lastp = cp->lastp0;
9233 cp->host_status = HS_BUSY;
9234 cp->scsi_status = S_ILLEGAL;
9235 cp->xerr_status = 0;
9236 cp->phys.extra_bytes = 0;
9237 cp->host_flags &= (HF_PM_TO_C|HF_DATA_IN);
9238
9239 break;
9240
9241 case S_TERMINATED:
9242 case S_CHECK_COND:
9243 /*
9244 ** If we were requesting sense, give up.
9245 */
9246 if (cp->host_flags & HF_AUTO_SENSE) {
9247 ncr_complete(np, cp);
9248 break;
9249 }
9250
9251 /*
9252 ** Save SCSI status and extended error.
9253 ** Compute the data residual now.
9254 */
9255 cp->sv_scsi_status = cp->scsi_status;
9256 cp->sv_xerr_status = cp->xerr_status;
9257 cp->resid = ncr_compute_residual(np, cp);
9258
9259 /*
9260 ** Device returned CHECK CONDITION status.
9261 ** Prepare all needed data strutures for getting
9262 ** sense data.
9263 */
9264
9265 /*
9266 ** identify message
9267 */
9268 cp->scsi_smsg2[0] = M_IDENTIFY | cp->lun;
9269 msglen = 1;
9270
9271 /*
9272 ** If we are currently using anything different from
9273 ** async. 8 bit data transfers with that target,
9274 ** start a negotiation, since the device may want
9275 ** to report us a UNIT ATTENTION condition due to
9276 ** a cause we currently ignore, and we donnot want
9277 ** to be stuck with WIDE and/or SYNC data transfer.
9278 **
9279 ** cp->nego_status is filled by ncr_prepare_nego().
9280 */
9281 ncr_negotiate(np, tp);
9282 cp->nego_status = 0;
9283 if ((tp->wval & EWS) || (tp->sval & 0x1f))
9284 msglen +=
9285 ncr_prepare_nego (np, cp, &cp->scsi_smsg2[msglen]);
9286
9287 /*
9288 ** Message table indirect structure.
9289 */
9290 cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg2));
9291 cp->phys.smsg.size = cpu_to_scr(msglen);
9292
9293 /*
9294 ** sense command
9295 */
9296 cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, sensecmd));
9297 cp->phys.cmd.size = cpu_to_scr(6);
9298
9299 /*
9300 ** patch requested size into sense command
9301 */
9302 cp->sensecmd[0] = 0x03;
9303 cp->sensecmd[1] = cp->lun << 5;
9304 cp->sensecmd[4] = sizeof(cp->sense_buf);
9305
9306 /*
9307 ** sense data
9308 */
9309 bzero(cp->sense_buf, sizeof(cp->sense_buf));
9310 cp->phys.sense.addr = cpu_to_scr(CCB_PHYS(cp,sense_buf[0]));
9311 cp->phys.sense.size = cpu_to_scr(sizeof(cp->sense_buf));
9312
9313 /*
9314 ** requeue the command.
9315 */
9316 startp = NCB_SCRIPTH_PHYS (np, sdata_in);
9317
9318 cp->phys.header.savep = cpu_to_scr(startp);
9319 cp->phys.header.goalp = cpu_to_scr(startp + 16);
9320 cp->phys.header.lastp = cpu_to_scr(startp);
9321 cp->phys.header.wgoalp = cpu_to_scr(startp + 16);
9322 cp->phys.header.wlastp = cpu_to_scr(startp);
9323
9324 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
9325 cp->scsi_status = S_ILLEGAL;
9326 cp->host_flags = (HF_AUTO_SENSE|HF_DATA_IN);
9327
9328 cp->phys.header.go.start =
9329 cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
9330
9331 /*
9332 ** If lp not yet allocated, requeue the command.
9333 */
9334 if (!lp)
9335 ncr_put_start_queue(np, cp);
9336 break;
9337 }
9338
9339 /*
9340 ** requeue awaiting scsi commands for this lun.
9341 */
9342 if (lp)
9343 ncr_start_next_ccb(np, lp, 1);
9344
9345 return;
9346 }
9347
9348 /*----------------------------------------------------------
9349 **
9350 ** After a device has accepted some management message
9351 ** as BUS DEVICE RESET, ABORT TASK, etc ..., or when
9352 ** a device signals a UNIT ATTENTION condition, some
9353 ** tasks are thrown away by the device. We are required
9354 ** to reflect that on our tasks list since the device
9355 ** will never complete these tasks.
9356 **
9357 ** This function completes all disconnected CCBs for a
9358 ** given target that matches the following criteria:
9359 ** - lun=-1 means any logical UNIT otherwise a given one.
9360 ** - task=-1 means any task, otherwise a given one.
9361 **----------------------------------------------------------
9362 */
9363 static int ncr_clear_tasks(ncb_p np, u_char hsts,
9364 int target, int lun, int task)
9365 {
9366 int i = 0;
9367 ccb_p cp;
9368
9369 for (cp = np->ccbc; cp; cp = cp->link_ccb) {
9370 if (cp->host_status != HS_DISCONNECT)
9371 continue;
9372 if (cp->target != target)
9373 continue;
9374 if (lun != -1 && cp->lun != lun)
9375 continue;
9376 if (task != -1 && cp->tag != NO_TAG && cp->scsi_smsg[2] != task)
9377 continue;
9378 cp->host_status = hsts;
9379 cp->scsi_status = S_ILLEGAL;
9380 ncr_complete(np, cp);
9381 ++i;
9382 }
9383 return i;
9384 }
9385
9386 /*==========================================================
9387 **
9388 ** ncr chip handler for TASKS recovery.
9389 **
9390 **==========================================================
9391 **
9392 ** We cannot safely abort a command, while the SCRIPTS
9393 ** processor is running, since we just would be in race
9394 ** with it.
9395 **
9396 ** As long as we have tasks to abort, we keep the SEM
9397 ** bit set in the ISTAT. When this bit is set, the
9398 ** SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
9399 ** each time it enters the scheduler.
9400 **
9401 ** If we have to reset a target, clear tasks of a unit,
9402 ** or to perform the abort of a disconnected job, we
9403 ** restart the SCRIPTS for selecting the target. Once
9404 ** selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
9405 ** If it loses arbitration, the SCRIPTS will interrupt again
9406 ** the next time it will enter its scheduler, and so on ...
9407 **
9408 ** On SIR_TARGET_SELECTED, we scan for the more
9409 ** appropriate thing to do:
9410 **
9411 ** - If nothing, we just sent a M_ABORT message to the
9412 ** target to get rid of the useless SCSI bus ownership.
9413 ** According to the specs, no tasks shall be affected.
9414 ** - If the target is to be reset, we send it a M_RESET
9415 ** message.
9416 ** - If a logical UNIT is to be cleared , we send the
9417 ** IDENTIFY(lun) + M_ABORT.
9418 ** - If an untagged task is to be aborted, we send the
9419 ** IDENTIFY(lun) + M_ABORT.
9420 ** - If a tagged task is to be aborted, we send the
9421 ** IDENTIFY(lun) + task attributes + M_ABORT_TAG.
9422 **
9423 ** Once our 'kiss of death' :) message has been accepted
9424 ** by the target, the SCRIPTS interrupts again
9425 ** (SIR_ABORT_SENT). On this interrupt, we complete
9426 ** all the CCBs that should have been aborted by the
9427 ** target according to our message.
9428 **
9429 **----------------------------------------------------------
9430 */
9431 static void ncr_sir_task_recovery(ncb_p np, int num)
9432 {
9433 ccb_p cp;
9434 tcb_p tp;
9435 int target=-1, lun=-1, task;
9436 int i, k;
9437 u_char *p;
9438
9439 switch(num) {
9440 /*
9441 ** The SCRIPTS processor stopped before starting
9442 ** the next command in order to allow us to perform
9443 ** some task recovery.
9444 */
9445 case SIR_SCRIPT_STOPPED:
9446
9447 /*
9448 ** Do we have any target to reset or unit to clear ?
9449 */
9450 for (i = 0 ; i < MAX_TARGET ; i++) {
9451 tp = &np->target[i];
9452 if (tp->to_reset || (tp->l0p && tp->l0p->to_clear)) {
9453 target = i;
9454 break;
9455 }
9456 if (!tp->lmp)
9457 continue;
9458 for (k = 1 ; k < MAX_LUN ; k++) {
9459 if (tp->lmp[k] && tp->lmp[k]->to_clear) {
9460 target = i;
9461 break;
9462 }
9463 }
9464 if (target != -1)
9465 break;
9466 }
9467
9468 /*
9469 ** If not, look at the CCB list for any
9470 ** disconnected CCB to be aborted.
9471 */
9472 if (target == -1) {
9473 for (cp = np->ccbc; cp; cp = cp->link_ccb) {
9474 if (cp->host_status != HS_DISCONNECT)
9475 continue;
9476 if (cp->to_abort) {
9477 target = cp->target;
9478 break;
9479 }
9480 }
9481 }
9482
9483 /*
9484 ** If some target is to be selected,
9485 ** prepare and start the selection.
9486 */
9487 if (target != -1) {
9488 tp = &np->target[target];
9489 np->abrt_sel.sel_id = target;
9490 np->abrt_sel.sel_scntl3 = tp->wval;
9491 np->abrt_sel.sel_sxfer = tp->sval;
9492 OUTL(nc_dsa, np->p_ncb);
9493 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, sel_for_abort));
9494 return;
9495 }
9496
9497 /*
9498 ** Nothing is to be selected, so we donnot need
9499 ** to synchronize with the SCRIPTS anymore.
9500 ** Remove the SEM flag from the ISTAT.
9501 */
9502 np->istat_sem = 0;
9503 OUTB (nc_istat, SIGP);
9504
9505 /*
9506 ** Now look at CCBs to abort that haven't started yet.
9507 ** Remove all those CCBs from the start queue and
9508 ** complete them with appropriate status.
9509 ** Btw, the SCRIPTS processor is still stopped, so
9510 ** we are not in race.
9511 */
9512 for (cp = np->ccbc; cp; cp = cp->link_ccb) {
9513 if (cp->host_status != HS_BUSY &&
9514 cp->host_status != HS_NEGOTIATE)
9515 continue;
9516 if (!cp->to_abort)
9517 continue;
9518 #ifdef SCSI_NCR_IARB_SUPPORT
9519 /*
9520 ** If we are using IMMEDIATE ARBITRATION, we donnot
9521 ** want to cancel the last queued CCB, since the
9522 ** SCRIPTS may have anticipated the selection.
9523 */
9524 if (cp == np->last_cp) {
9525 cp->to_abort = 0;
9526 continue;
9527 }
9528 #endif
9529 /*
9530 ** Compute index of next position in the start
9531 ** queue the SCRIPTS will schedule.
9532 */
9533 i = (INL (nc_scratcha) - np->p_squeue) / 4;
9534
9535 /*
9536 ** Remove the job from the start queue.
9537 */
9538 k = -1;
9539 while (1) {
9540 if (i == np->squeueput)
9541 break;
9542 if (k == -1) { /* Not found yet */
9543 if (cp == ncr_ccb_from_dsa(np,
9544 scr_to_cpu(np->squeue[i])))
9545 k = i; /* Found */
9546 }
9547 else {
9548 /*
9549 ** Once found, we have to move
9550 ** back all jobs by 1 position.
9551 */
9552 np->squeue[k] = np->squeue[i];
9553 k += 2;
9554 if (k >= MAX_START*2)
9555 k = 0;
9556 }
9557
9558 i += 2;
9559 if (i >= MAX_START*2)
9560 i = 0;
9561 }
9562 assert(k != -1);
9563 if (k != 1) {
9564 np->squeue[k] = np->squeue[i]; /* Idle task */
9565 np->squeueput = k; /* Start queue pointer */
9566 cp->host_status = HS_ABORTED;
9567 cp->scsi_status = S_ILLEGAL;
9568 ncr_complete(np, cp);
9569 }
9570 }
9571 break;
9572 /*
9573 ** The SCRIPTS processor has selected a target
9574 ** we may have some manual recovery to perform for.
9575 */
9576 case SIR_TARGET_SELECTED:
9577 target = (INB (nc_sdid) & 0xf);
9578 tp = &np->target[target];
9579
9580 np->abrt_tbl.addr = vtobus(np->abrt_msg);
9581
9582 /*
9583 ** If the target is to be reset, prepare a
9584 ** M_RESET message and clear the to_reset flag
9585 ** since we donnot expect this operation to fail.
9586 */
9587 if (tp->to_reset) {
9588 np->abrt_msg[0] = M_RESET;
9589 np->abrt_tbl.size = 1;
9590 tp->to_reset = 0;
9591 break;
9592 }
9593
9594 /*
9595 ** Otherwise, look for some logical unit to be cleared.
9596 */
9597 if (tp->l0p && tp->l0p->to_clear)
9598 lun = 0;
9599 else if (tp->lmp) {
9600 for (k = 1 ; k < MAX_LUN ; k++) {
9601 if (tp->lmp[k] && tp->lmp[k]->to_clear) {
9602 lun = k;
9603 break;
9604 }
9605 }
9606 }
9607
9608 /*
9609 ** If a logical unit is to be cleared, prepare
9610 ** an IDENTIFY(lun) + ABORT MESSAGE.
9611 */
9612 if (lun != -1) {
9613 lcb_p lp = ncr_lp(np, tp, lun);
9614 lp->to_clear = 0; /* We donnot expect to fail here */
9615 np->abrt_msg[0] = M_IDENTIFY | lun;
9616 np->abrt_msg[1] = M_ABORT;
9617 np->abrt_tbl.size = 2;
9618 break;
9619 }
9620
9621 /*
9622 ** Otherwise, look for some disconnected job to
9623 ** abort for this target.
9624 */
9625 for (cp = np->ccbc; cp; cp = cp->link_ccb) {
9626 if (cp->host_status != HS_DISCONNECT)
9627 continue;
9628 if (cp->target != target)
9629 continue;
9630 if (cp->to_abort)
9631 break;
9632 }
9633
9634 /*
9635 ** If we have none, probably since the device has
9636 ** completed the command before we won abitration,
9637 ** send a M_ABORT message without IDENTIFY.
9638 ** According to the specs, the device must just
9639 ** disconnect the BUS and not abort any task.
9640 */
9641 if (!cp) {
9642 np->abrt_msg[0] = M_ABORT;
9643 np->abrt_tbl.size = 1;
9644 break;
9645 }
9646
9647 /*
9648 ** We have some task to abort.
9649 ** Set the IDENTIFY(lun)
9650 */
9651 np->abrt_msg[0] = M_IDENTIFY | cp->lun;
9652
9653 /*
9654 ** If we want to abort an untagged command, we
9655 ** will send a IDENTIFY + M_ABORT.
9656 ** Otherwise (tagged command), we will send
9657 ** a IDENTITFY + task attributes + ABORT TAG.
9658 */
9659 if (cp->tag == NO_TAG) {
9660 np->abrt_msg[1] = M_ABORT;
9661 np->abrt_tbl.size = 2;
9662 }
9663 else {
9664 np->abrt_msg[1] = cp->scsi_smsg[1];
9665 np->abrt_msg[2] = cp->scsi_smsg[2];
9666 np->abrt_msg[3] = M_ABORT_TAG;
9667 np->abrt_tbl.size = 4;
9668 }
9669 cp->to_abort = 0; /* We donnot expect to fail here */
9670 break;
9671
9672 /*
9673 ** The target has accepted our message and switched
9674 ** to BUS FREE phase as we expected.
9675 */
9676 case SIR_ABORT_SENT:
9677 target = (INB (nc_sdid) & 0xf);
9678 tp = &np->target[target];
9679
9680 /*
9681 ** If we didn't abort anything, leave here.
9682 */
9683 if (np->abrt_msg[0] == M_ABORT)
9684 break;
9685
9686 /*
9687 ** If we sent a M_RESET, then a hardware reset has
9688 ** been performed by the target.
9689 ** - Reset everything to async 8 bit
9690 ** - Tell ourself to negotiate next time :-)
9691 ** - Prepare to clear all disconnected CCBs for
9692 ** this target from our task list (lun=task=-1)
9693 */
9694 lun = -1;
9695 task = -1;
9696 if (np->abrt_msg[0] == M_RESET) {
9697 tp->sval = 0;
9698 tp->wval = np->rv_scntl3;
9699 ncr_set_sync_wide_status(np, target);
9700 ncr_negotiate(np, tp);
9701 }
9702
9703 /*
9704 ** Otherwise, check for the LUN and TASK(s)
9705 ** concerned by the cancelation.
9706 ** If it is not ABORT_TAG then it is CLEAR_QUEUE
9707 ** or an ABORT message :-)
9708 */
9709 else {
9710 lun = np->abrt_msg[0] & 0x3f;
9711 if (np->abrt_msg[1] == M_ABORT_TAG)
9712 task = np->abrt_msg[2];
9713 }
9714
9715 /*
9716 ** Complete all the CCBs the device should have
9717 ** aborted due to our 'kiss of death' message.
9718 */
9719 (void) ncr_clear_tasks(np, HS_ABORTED, target, lun, task);
9720 break;
9721
9722 /*
9723 ** We have performed a auto-sense that succeeded.
9724 ** If the device reports a UNIT ATTENTION condition
9725 ** due to a RESET condition, we must complete all
9726 ** disconnect CCBs for this unit since the device
9727 ** shall have thrown them away.
9728 ** Since I haven't time to guess what the specs are
9729 ** expecting for other UNIT ATTENTION conditions, I
9730 ** decided to only care about RESET conditions. :)
9731 */
9732 case SIR_AUTO_SENSE_DONE:
9733 cp = ncr_ccb_from_dsa(np, INL (nc_dsa));
9734 if (!cp)
9735 break;
9736 memcpy(cp->cmd->sense_buffer, cp->sense_buf,
9737 sizeof(cp->cmd->sense_buffer));
9738 p = &cp->cmd->sense_buffer[0];
9739
9740 if (p[0] != 0x70 || p[2] != 0x6 || p[12] != 0x29)
9741 break;
9742 #if 0
9743 (void) ncr_clear_tasks(np, HS_RESET, cp->target, cp->lun, -1);
9744 #endif
9745 break;
9746 }
9747
9748 /*
9749 ** Print to the log the message we intend to send.
9750 */
9751 if (num == SIR_TARGET_SELECTED) {
9752 PRINT_TARGET(np, target);
9753 ncr_printl_hex("control msgout:", np->abrt_msg,
9754 np->abrt_tbl.size);
9755 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
9756 }
9757
9758 /*
9759 ** Let the SCRIPTS processor continue.
9760 */
9761 OUTONB (nc_dcntl, (STD|NOCOM));
9762 }
9763
9764
9765 /*==========================================================
9766 **
9767 ** Gérard's alchemy:) that deals with with the data
9768 ** pointer for both MDP and the residual calculation.
9769 **
9770 **==========================================================
9771 **
9772 ** I didn't want to bloat the code by more than 200
9773 ** lignes for the handling of both MDP and the residual.
9774 ** This has been achieved by using a data pointer
9775 ** representation consisting in an index in the data
9776 ** array (dp_sg) and a negative offset (dp_ofs) that
9777 ** have the following meaning:
9778 **
9779 ** - dp_sg = MAX_SCATTER
9780 ** we are at the end of the data script.
9781 ** - dp_sg < MAX_SCATTER
9782 ** dp_sg points to the next entry of the scatter array
9783 ** we want to transfer.
9784 ** - dp_ofs < 0
9785 ** dp_ofs represents the residual of bytes of the
9786 ** previous entry scatter entry we will send first.
9787 ** - dp_ofs = 0
9788 ** no residual to send first.
9789 **
9790 ** The function ncr_evaluate_dp() accepts an arbitray
9791 ** offset (basically from the MDP message) and returns
9792 ** the corresponding values of dp_sg and dp_ofs.
9793 **
9794 **----------------------------------------------------------
9795 */
9796
9797 static int ncr_evaluate_dp(ncb_p np, ccb_p cp, u_int32 scr, int *ofs)
9798 {
9799 u_int32 dp_scr;
9800 int dp_ofs, dp_sg, dp_sgmin;
9801 int tmp;
9802 struct pm_ctx *pm;
9803
9804 /*
9805 ** Compute the resulted data pointer in term of a script
9806 ** address within some DATA script and a signed byte offset.
9807 */
9808 dp_scr = scr;
9809 dp_ofs = *ofs;
9810 if (dp_scr == NCB_SCRIPT_PHYS (np, pm0_data))
9811 pm = &cp->phys.pm0;
9812 else if (dp_scr == NCB_SCRIPT_PHYS (np, pm1_data))
9813 pm = &cp->phys.pm1;
9814 else
9815 pm = 0;
9816
9817 if (pm) {
9818 dp_scr = scr_to_cpu(pm->ret);
9819 dp_ofs -= scr_to_cpu(pm->sg.size);
9820 }
9821
9822 /*
9823 ** Deduce the index of the sg entry.
9824 ** Keep track of the index of the first valid entry.
9825 ** If result is dp_sg = MAX_SCATTER, then we are at the
9826 ** end of the data and vice-versa.
9827 */
9828 tmp = scr_to_cpu(cp->phys.header.goalp);
9829 dp_sg = MAX_SCATTER;
9830 if (dp_scr != tmp)
9831 dp_sg -= (tmp - 8 - (int)dp_scr) / (SCR_SG_SIZE*4);
9832 dp_sgmin = MAX_SCATTER - cp->segments;
9833
9834 /*
9835 ** Move to the sg entry the data pointer belongs to.
9836 **
9837 ** If we are inside the data area, we expect result to be:
9838 **
9839 ** Either,
9840 ** dp_ofs = 0 and dp_sg is the index of the sg entry
9841 ** the data pointer belongs to (or the end of the data)
9842 ** Or,
9843 ** dp_ofs < 0 and dp_sg is the index of the sg entry
9844 ** the data pointer belongs to + 1.
9845 */
9846 if (dp_ofs < 0) {
9847 int n;
9848 while (dp_sg > dp_sgmin) {
9849 --dp_sg;
9850 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
9851 n = dp_ofs + (tmp & 0xffffff);
9852 if (n > 0) {
9853 ++dp_sg;
9854 break;
9855 }
9856 dp_ofs = n;
9857 }
9858 }
9859 else if (dp_ofs > 0) {
9860 while (dp_sg < MAX_SCATTER) {
9861 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
9862 dp_ofs -= (tmp & 0xffffff);
9863 ++dp_sg;
9864 if (dp_ofs <= 0)
9865 break;
9866 }
9867 }
9868
9869 /*
9870 ** Make sure the data pointer is inside the data area.
9871 ** If not, return some error.
9872 */
9873 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
9874 goto out_err;
9875 else if (dp_sg > MAX_SCATTER || (dp_sg == MAX_SCATTER && dp_ofs > 0))
9876 goto out_err;
9877
9878 /*
9879 ** Save the extreme pointer if needed.
9880 */
9881 if (dp_sg > cp->ext_sg ||
9882 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
9883 cp->ext_sg = dp_sg;
9884 cp->ext_ofs = dp_ofs;
9885 }
9886
9887 /*
9888 ** Return data.
9889 */
9890 *ofs = dp_ofs;
9891 return dp_sg;
9892
9893 out_err:
9894 return -1;
9895 }
9896
9897 /*==========================================================
9898 **
9899 ** ncr chip handler for MODIFY DATA POINTER MESSAGE
9900 **
9901 **==========================================================
9902 **
9903 ** We also call this function on IGNORE WIDE RESIDUE
9904 ** messages that do not match a SWIDE full condition.
9905 ** Btw, we assume in that situation that such a message
9906 ** is equivalent to a MODIFY DATA POINTER (offset=-1).
9907 **
9908 **----------------------------------------------------------
9909 */
9910
9911 static void ncr_modify_dp(ncb_p np, tcb_p tp, ccb_p cp, int ofs)
9912 {
9913 int dp_ofs = ofs;
9914 u_int32 dp_scr = INL (nc_temp);
9915 u_int32 dp_ret;
9916 u_int32 tmp;
9917 u_char hflags;
9918 int dp_sg;
9919 struct pm_ctx *pm;
9920
9921 /*
9922 ** Not supported for auto_sense;
9923 */
9924 if (cp->host_flags & HF_AUTO_SENSE)
9925 goto out_reject;
9926
9927 /*
9928 ** Apply our alchemy:) (see comments in ncr_evaluate_dp()),
9929 ** to the resulted data pointer.
9930 */
9931 dp_sg = ncr_evaluate_dp(np, cp, dp_scr, &dp_ofs);
9932 if (dp_sg < 0)
9933 goto out_reject;
9934
9935 /*
9936 ** And our alchemy:) allows to easily calculate the data
9937 ** script address we want to return for the next data phase.
9938 */
9939 dp_ret = cpu_to_scr(cp->phys.header.goalp);
9940 dp_ret = dp_ret - 8 - (MAX_SCATTER - dp_sg) * (SCR_SG_SIZE*4);
9941
9942 /*
9943 ** If offset / scatter entry is zero we donnot need
9944 ** a context for the new current data pointer.
9945 */
9946 if (dp_ofs == 0) {
9947 dp_scr = dp_ret;
9948 goto out_ok;
9949 }
9950
9951 /*
9952 ** Get a context for the new current data pointer.
9953 */
9954 hflags = INB (HF_PRT);
9955
9956 if (hflags & HF_DP_SAVED)
9957 hflags ^= HF_ACT_PM;
9958
9959 if (!(hflags & HF_ACT_PM)) {
9960 pm = &cp->phys.pm0;
9961 dp_scr = NCB_SCRIPT_PHYS (np, pm0_data);
9962 }
9963 else {
9964 pm = &cp->phys.pm1;
9965 dp_scr = NCB_SCRIPT_PHYS (np, pm1_data);
9966 }
9967
9968 hflags &= ~(HF_DP_SAVED);
9969
9970 OUTB (HF_PRT, hflags);
9971
9972 /*
9973 ** Set up the new current data pointer.
9974 ** ofs < 0 there, and for the next data phase, we
9975 ** want to transfer part of the data of the sg entry
9976 ** corresponding to index dp_sg-1 prior to returning
9977 ** to the main data script.
9978 */
9979 pm->ret = cpu_to_scr(dp_ret);
9980 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
9981 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
9982 pm->sg.addr = cpu_to_scr(tmp);
9983 pm->sg.size = cpu_to_scr(-dp_ofs);
9984
9985 out_ok:
9986 OUTL (nc_temp, dp_scr);
9987 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
9988 return;
9989
9990 out_reject:
9991 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, msg_bad));
9992 }
9993
9994
9995 /*==========================================================
9996 **
9997 ** ncr chip calculation of the data residual.
9998 **
9999 **==========================================================
10000 **
10001 ** As I used to say, the requirement of data residual
10002 ** in SCSI is broken, useless and cannot be achieved
10003 ** without huge complexity.
10004 ** But most OSes and even the official CAM require it.
10005 ** When stupidity happens to be so widely spread inside
10006 ** a community, it gets hard to convince.
10007 **
10008 ** Anyway, I don't care, since I am not going to use
10009 ** any software that considers this data residual as
10010 ** a relevant information. :)
10011 **
10012 **----------------------------------------------------------
10013 */
10014
10015 static int ncr_compute_residual(ncb_p np, ccb_p cp)
10016 {
10017 int dp_sg, dp_sgmin, resid, tmp;
10018 int dp_ofs = 0;
10019
10020 /*
10021 ** Should have been checked by the caller.
10022 */
10023 if (cp->phys.header.lastp == cp->phys.header.goalp)
10024 return 0;
10025
10026 /*
10027 ** If the last data pointer is data_io (direction
10028 ** unknown), then no data transfer should have
10029 ** taken place.
10030 */
10031 if (cp->phys.header.lastp == NCB_SCRIPTH_PHYS (np, data_io))
10032 return -cp->data_len;
10033
10034 /*
10035 ** If the device asked for more data than available,
10036 ** return a positive residual value.
10037 */
10038 if (cp->phys.extra_bytes)
10039 return scr_to_cpu(cp->phys.extra_bytes);
10040
10041 /*
10042 ** Evaluate the pointer saved on message COMPLETE.
10043 ** According to our alchemy:), the extreme data
10044 ** pointer will also be updated if needed.
10045 ** On error, assume no data transferred (this may
10046 ** happen if the data direction is unknown).
10047 */
10048 tmp = cpu_to_scr(cp->phys.header.lastp);
10049 if (ncr_evaluate_dp(np, cp, tmp, &dp_ofs) < 0)
10050 return -cp->data_len;
10051
10052 /*
10053 ** We are now full comfortable in the computation
10054 ** of the data residual (2's complement).
10055 */
10056 dp_sgmin = MAX_SCATTER - cp->segments;
10057 resid = cp->ext_ofs;
10058 for (dp_sg = cp->ext_sg; dp_sg < MAX_SCATTER; ++dp_sg) {
10059 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
10060 resid -= (tmp & 0xffffff);
10061 }
10062
10063 /*
10064 ** Hopefully, the result is not too wrong.
10065 */
10066 return resid;
10067 }
10068
10069 /*==========================================================
10070 **
10071 ** Print out the containt of a SCSI message.
10072 **
10073 **==========================================================
10074 */
10075
10076 static int ncr_show_msg (u_char * msg)
10077 {
10078 u_char i;
10079 printk ("%x",*msg);
10080 if (*msg==M_EXTENDED) {
10081 for (i=1;i<8;i++) {
10082 if (i-1>msg[1]) break;
10083 printk ("-%x",msg[i]);
10084 };
10085 return (i+1);
10086 } else if ((*msg & 0xf0) == 0x20) {
10087 printk ("-%x",msg[1]);
10088 return (2);
10089 };
10090 return (1);
10091 }
10092
10093 static void ncr_print_msg (ccb_p cp, char *label, u_char *msg)
10094 {
10095 if (cp)
10096 PRINT_ADDR(cp->cmd);
10097 if (label)
10098 printk ("%s: ", label);
10099
10100 (void) ncr_show_msg (msg);
10101 printk (".\n");
10102 }
10103
10104 /*===================================================================
10105 **
10106 ** Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
10107 **
10108 **===================================================================
10109 **
10110 ** Was Sie schon immer ueber transfermode negotiation wissen wollten ...
10111 **
10112 ** We try to negotiate sync and wide transfer only after
10113 ** a successfull inquire command. We look at byte 7 of the
10114 ** inquire data to determine the capabilities of the target.
10115 **
10116 ** When we try to negotiate, we append the negotiation message
10117 ** to the identify and (maybe) simple tag message.
10118 ** The host status field is set to HS_NEGOTIATE to mark this
10119 ** situation.
10120 **
10121 ** If the target doesn't answer this message immediately
10122 ** (as required by the standard), the SIR_NEGO_FAILED interrupt
10123 ** will be raised eventually.
10124 ** The handler removes the HS_NEGOTIATE status, and sets the
10125 ** negotiated value to the default (async / nowide).
10126 **
10127 ** If we receive a matching answer immediately, we check it
10128 ** for validity, and set the values.
10129 **
10130 ** If we receive a Reject message immediately, we assume the
10131 ** negotiation has failed, and fall back to standard values.
10132 **
10133 ** If we receive a negotiation message while not in HS_NEGOTIATE
10134 ** state, it's a target initiated negotiation. We prepare a
10135 ** (hopefully) valid answer, set our parameters, and send back
10136 ** this answer to the target.
10137 **
10138 ** If the target doesn't fetch the answer (no message out phase),
10139 ** we assume the negotiation has failed, and fall back to default
10140 ** settings (SIR_NEGO_PROTO interrupt).
10141 **
10142 ** When we set the values, we adjust them in all ccbs belonging
10143 ** to this target, in the controller's register, and in the "phys"
10144 ** field of the controller's struct ncb.
10145 **
10146 **---------------------------------------------------------------------
10147 */
10148
10149 /*==========================================================
10150 **
10151 ** ncr chip handler for SYNCHRONOUS DATA TRANSFER
10152 ** REQUEST (SDTR) message.
10153 **
10154 **==========================================================
10155 **
10156 ** Read comments above.
10157 **
10158 **----------------------------------------------------------
10159 */
10160 static void ncr_sync_nego(ncb_p np, tcb_p tp, ccb_p cp)
10161 {
10162 u_char scntl3;
10163 u_char chg, ofs, per, fak;
10164
10165 /*
10166 ** Synchronous request message received.
10167 */
10168
10169 if (DEBUG_FLAGS & DEBUG_NEGO) {
10170 ncr_print_msg(cp, "sync msg in", np->msgin);
10171 };
10172
10173 /*
10174 ** get requested values.
10175 */
10176
10177 chg = 0;
10178 per = np->msgin[3];
10179 ofs = np->msgin[4];
10180 if (ofs==0) per=255;
10181
10182 /*
10183 ** if target sends SDTR message,
10184 ** it CAN transfer synch.
10185 */
10186
10187 if (ofs)
10188 tp->inq_byte7 |= INQ7_SYNC;
10189
10190 /*
10191 ** check values against driver limits.
10192 */
10193
10194 if (per < np->minsync)
10195 {chg = 1; per = np->minsync;}
10196 if (per < tp->minsync)
10197 {chg = 1; per = tp->minsync;}
10198 if (ofs > tp->maxoffs)
10199 {chg = 1; ofs = tp->maxoffs;}
10200
10201 /*
10202 ** Check against controller limits.
10203 */
10204 fak = 7;
10205 scntl3 = 0;
10206 if (ofs != 0) {
10207 ncr_getsync(np, per, &fak, &scntl3);
10208 if (fak > 7) {
10209 chg = 1;
10210 ofs = 0;
10211 }
10212 }
10213 if (ofs == 0) {
10214 fak = 7;
10215 per = 0;
10216 scntl3 = 0;
10217 tp->minsync = 0;
10218 }
10219
10220 if (DEBUG_FLAGS & DEBUG_NEGO) {
10221 PRINT_ADDR(cp->cmd);
10222 printk ("sync: per=%d scntl3=0x%x ofs=%d fak=%d chg=%d.\n",
10223 per, scntl3, ofs, fak, chg);
10224 }
10225
10226 if (INB (HS_PRT) == HS_NEGOTIATE) {
10227 OUTB (HS_PRT, HS_BUSY);
10228 switch (cp->nego_status) {
10229 case NS_SYNC:
10230 /*
10231 ** This was an answer message
10232 */
10233 if (chg) {
10234 /*
10235 ** Answer wasn't acceptable.
10236 */
10237 ncr_setsync (np, cp, 0, 0xe0);
10238 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, msg_bad));
10239 } else {
10240 /*
10241 ** Answer is ok.
10242 */
10243 ncr_setsync (np, cp, scntl3, (fak<<5)|ofs);
10244 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
10245 };
10246 return;
10247
10248 case NS_WIDE:
10249 ncr_setwide (np, cp, 0, 0);
10250 break;
10251 };
10252 };
10253
10254 /*
10255 ** It was a request. Set value and
10256 ** prepare an answer message
10257 */
10258
10259 ncr_setsync (np, cp, scntl3, (fak<<5)|ofs);
10260
10261 np->msgout[0] = M_EXTENDED;
10262 np->msgout[1] = 3;
10263 np->msgout[2] = M_X_SYNC_REQ;
10264 np->msgout[3] = per;
10265 np->msgout[4] = ofs;
10266
10267 cp->nego_status = NS_SYNC;
10268
10269 if (DEBUG_FLAGS & DEBUG_NEGO) {
10270 ncr_print_msg(cp, "sync msgout", np->msgout);
10271 }
10272
10273 np->msgin [0] = M_NOOP;
10274
10275 if (!ofs)
10276 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, msg_bad));
10277 else
10278 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, sdtr_resp));
10279 }
10280
10281 /*==========================================================
10282 **
10283 ** ncr chip handler for WIDE DATA TRANSFER REQUEST
10284 ** (WDTR) message.
10285 **
10286 **==========================================================
10287 **
10288 ** Read comments above.
10289 **
10290 **----------------------------------------------------------
10291 */
10292 static void ncr_wide_nego(ncb_p np, tcb_p tp, ccb_p cp)
10293 {
10294 u_char chg, wide;
10295
10296 /*
10297 ** Wide request message received.
10298 */
10299 if (DEBUG_FLAGS & DEBUG_NEGO) {
10300 ncr_print_msg(cp, "wide msgin", np->msgin);
10301 };
10302
10303 /*
10304 ** get requested values.
10305 */
10306
10307 chg = 0;
10308 wide = np->msgin[3];
10309
10310 /*
10311 ** if target sends WDTR message,
10312 ** it CAN transfer wide.
10313 */
10314
10315 if (wide)
10316 tp->inq_byte7 |= INQ7_WIDE16;
10317
10318 /*
10319 ** check values against driver limits.
10320 */
10321
10322 if (wide > tp->usrwide)
10323 {chg = 1; wide = tp->usrwide;}
10324
10325 if (DEBUG_FLAGS & DEBUG_NEGO) {
10326 PRINT_ADDR(cp->cmd);
10327 printk ("wide: wide=%d chg=%d.\n", wide, chg);
10328 }
10329
10330 if (INB (HS_PRT) == HS_NEGOTIATE) {
10331 OUTB (HS_PRT, HS_BUSY);
10332 switch (cp->nego_status) {
10333 case NS_WIDE:
10334 /*
10335 ** This was an answer message
10336 */
10337 if (chg) {
10338 /*
10339 ** Answer wasn't acceptable.
10340 */
10341 ncr_setwide (np, cp, 0, 1);
10342 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, msg_bad));
10343 } else {
10344 /*
10345 ** Answer is ok.
10346 */
10347 ncr_setwide (np, cp, wide, 1);
10348 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
10349 };
10350 return;
10351
10352 case NS_SYNC:
10353 ncr_setsync (np, cp, 0, 0xe0);
10354 break;
10355 };
10356 };
10357
10358 /*
10359 ** It was a request, set value and
10360 ** prepare an answer message
10361 */
10362
10363 ncr_setwide (np, cp, wide, 1);
10364
10365 np->msgout[0] = M_EXTENDED;
10366 np->msgout[1] = 2;
10367 np->msgout[2] = M_X_WIDE_REQ;
10368 np->msgout[3] = wide;
10369
10370 np->msgin [0] = M_NOOP;
10371
10372 cp->nego_status = NS_WIDE;
10373
10374 if (DEBUG_FLAGS & DEBUG_NEGO) {
10375 ncr_print_msg(cp, "wide msgout", np->msgout);
10376 }
10377
10378 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, wdtr_resp));
10379 }
10380
10381 /*
10382 ** Reset SYNC or WIDE to default settings.
10383 ** Called when a negotiation does not succeed either
10384 ** on rejection or on protocol error.
10385 */
10386 static void ncr_nego_default(ncb_p np, tcb_p tp, ccb_p cp)
10387 {
10388 /*
10389 ** any error in negotiation:
10390 ** fall back to default mode.
10391 */
10392 switch (cp->nego_status) {
10393
10394 case NS_SYNC:
10395 ncr_setsync (np, cp, 0, 0xe0);
10396 break;
10397
10398 case NS_WIDE:
10399 ncr_setwide (np, cp, 0, 0);
10400 break;
10401
10402 };
10403 np->msgin [0] = M_NOOP;
10404 np->msgout[0] = M_NOOP;
10405 cp->nego_status = 0;
10406 }
10407
10408 /*==========================================================
10409 **
10410 ** ncr chip handler for MESSAGE REJECT received for
10411 ** a WIDE or SYNCHRONOUS negotiation.
10412 **
10413 **==========================================================
10414 **
10415 ** Read comments above.
10416 **
10417 **----------------------------------------------------------
10418 */
10419 static void ncr_nego_rejected(ncb_p np, tcb_p tp, ccb_p cp)
10420 {
10421 ncr_nego_default(np, tp, cp);
10422 OUTB (HS_PRT, HS_BUSY);
10423 }
10424
10425
10426 /*==========================================================
10427 **
10428 **
10429 ** ncr chip exception handler for programmed interrupts.
10430 **
10431 **
10432 **==========================================================
10433 */
10434
10435 void ncr_int_sir (ncb_p np)
10436 {
10437 u_char num = INB (nc_dsps);
10438 u_long dsa = INL (nc_dsa);
10439 ccb_p cp = ncr_ccb_from_dsa(np, dsa);
10440 u_char target = INB (nc_sdid) & 0x0f;
10441 tcb_p tp = &np->target[target];
10442 int tmp;
10443
10444 if (DEBUG_FLAGS & DEBUG_TINY) printk ("I#%d", num);
10445
10446 switch (num) {
10447 /*
10448 ** See comments in the SCRIPTS code.
10449 */
10450 #ifdef SCSI_NCR_PCIQ_SYNC_ON_INTR
10451 case SIR_DUMMY_INTERRUPT:
10452 goto out;
10453 #endif
10454 /*
10455 ** The C code is currently trying to recover from something.
10456 ** Typically, user want to abort some command.
10457 */
10458 case SIR_SCRIPT_STOPPED:
10459 case SIR_TARGET_SELECTED:
10460 case SIR_ABORT_SENT:
10461 case SIR_AUTO_SENSE_DONE:
10462 ncr_sir_task_recovery(np, num);
10463 return;
10464 /*
10465 ** The device didn't go to MSG OUT phase after having
10466 ** been selected with ATN. We donnot want to handle
10467 ** that.
10468 */
10469 case SIR_SEL_ATN_NO_MSG_OUT:
10470 printk ("%s:%d: No MSG OUT phase after selection with ATN.\n",
10471 ncr_name (np), target);
10472 goto out_stuck;
10473 /*
10474 ** The device didn't switch to MSG IN phase after
10475 ** having reseleted the initiator.
10476 */
10477 case SIR_RESEL_NO_MSG_IN:
10478 /*
10479 ** After reselection, the device sent a message that wasn't
10480 ** an IDENTIFY.
10481 */
10482 case SIR_RESEL_NO_IDENTIFY:
10483 /*
10484 ** If devices reselecting without sending an IDENTIFY
10485 ** message still exist, this should help.
10486 ** We just assume lun=0, 1 CCB, no tag.
10487 */
10488 if (tp->l0p) {
10489 OUTL (nc_dsa, scr_to_cpu(tp->l0p->tasktbl[0]));
10490 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, resel_go));
10491 return;
10492 }
10493 /*
10494 ** The device reselected a LUN we donnot know of.
10495 */
10496 case SIR_RESEL_BAD_LUN:
10497 np->msgout[0] = M_RESET;
10498 goto out;
10499 /*
10500 ** The device reselected for an untagged nexus and we
10501 ** haven't any.
10502 */
10503 case SIR_RESEL_BAD_I_T_L:
10504 np->msgout[0] = M_ABORT;
10505 goto out;
10506 /*
10507 ** The device reselected for a tagged nexus that we donnot
10508 ** have.
10509 */
10510 case SIR_RESEL_BAD_I_T_L_Q:
10511 np->msgout[0] = M_ABORT_TAG;
10512 goto out;
10513 /*
10514 ** The SCRIPTS let us know that the device has grabbed
10515 ** our message and will abort the job.
10516 */
10517 case SIR_RESEL_ABORTED:
10518 np->lastmsg = np->msgout[0];
10519 np->msgout[0] = M_NOOP;
10520 printk ("%s:%d: message %x sent on bad reselection.\n",
10521 ncr_name (np), target, np->lastmsg);
10522 goto out;
10523 /*
10524 ** The SCRIPTS let us know that a message has been
10525 ** successfully sent to the device.
10526 */
10527 case SIR_MSG_OUT_DONE:
10528 np->lastmsg = np->msgout[0];
10529 np->msgout[0] = M_NOOP;
10530 /* Should we really care of that */
10531 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
10532 if (cp)
10533 cp->xerr_status &= ~XE_PARITY_ERR;
10534 }
10535 goto out;
10536 /*
10537 ** The device didn't send a GOOD SCSI status.
10538 ** We may have some work to do prior to allow
10539 ** the SCRIPTS processor to continue.
10540 */
10541 case SIR_BAD_STATUS:
10542 if (!cp)
10543 goto out;
10544 ncr_sir_to_redo(np, num, cp);
10545 return;
10546 /*
10547 ** We are asked by the SCRIPTS to prepare a
10548 ** REJECT message.
10549 */
10550 case SIR_REJECT_TO_SEND:
10551 ncr_print_msg(cp, "M_REJECT to send for ", np->msgin);
10552 np->msgout[0] = M_REJECT;
10553 goto out;
10554 /*
10555 ** We have been ODD at the end of a DATA IN
10556 ** transfer and the device didn't send a
10557 ** IGNORE WIDE RESIDUE message.
10558 ** It is a data overrun condition.
10559 */
10560 case SIR_SWIDE_OVERRUN:
10561 if (cp)
10562 cp->xerr_status |= XE_EXTRA_DATA;
10563 goto out;
10564 /*
10565 ** We have been ODD at the end of a DATA OUT
10566 ** transfer.
10567 ** It is a data underrun condition.
10568 */
10569 case SIR_SODL_UNDERRUN:
10570 if (cp)
10571 cp->xerr_status |= XE_EXTRA_DATA;
10572 goto out;
10573 /*
10574 ** We received a message.
10575 */
10576 case SIR_MSG_RECEIVED:
10577 if (!cp)
10578 goto out_stuck;
10579 switch (np->msgin [0]) {
10580 /*
10581 ** We received an extended message.
10582 ** We handle MODIFY DATA POINTER, SDTR, WDTR
10583 ** and reject all other extended messages.
10584 */
10585 case M_EXTENDED:
10586 switch (np->msgin [2]) {
10587 case M_X_MODIFY_DP:
10588 if (DEBUG_FLAGS & DEBUG_POINTER)
10589 ncr_print_msg(cp,"modify DP",np->msgin);
10590 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
10591 (np->msgin[5]<<8) + (np->msgin[6]);
10592 ncr_modify_dp(np, tp, cp, tmp);
10593 return;
10594 case M_X_SYNC_REQ:
10595 ncr_sync_nego(np, tp, cp);
10596 return;
10597 case M_X_WIDE_REQ:
10598 ncr_wide_nego(np, tp, cp);
10599 return;
10600 default:
10601 goto out_reject;
10602 }
10603 break;
10604 /*
10605 ** We received a 1/2 byte message not handled from SCRIPTS.
10606 ** We are only expecting MESSAGE REJECT and IGNORE WIDE
10607 ** RESIDUE messages that haven't been anticipated by
10608 ** SCRIPTS on SWIDE full condition. Unanticipated IGNORE
10609 ** WIDE RESIDUE messages are aliased as MODIFY DP (-1).
10610 */
10611 case M_IGN_RESIDUE:
10612 if (DEBUG_FLAGS & DEBUG_POINTER)
10613 ncr_print_msg(cp,"ign wide residue", np->msgin);
10614 ncr_modify_dp(np, tp, cp, -1);
10615 return;
10616 case M_REJECT:
10617 if (INB (HS_PRT) == HS_NEGOTIATE)
10618 ncr_nego_rejected(np, tp, cp);
10619 else {
10620 PRINT_ADDR(cp->cmd);
10621 printk ("M_REJECT received (%x:%x).\n",
10622 scr_to_cpu(np->lastmsg), np->msgout[0]);
10623 }
10624 goto out_clrack;
10625 break;
10626 default:
10627 goto out_reject;
10628 }
10629 break;
10630 /*
10631 ** We received an unknown message.
10632 ** Ignore all MSG IN phases and reject it.
10633 */
10634 case SIR_MSG_WEIRD:
10635 ncr_print_msg(cp, "WEIRD message received", np->msgin);
10636 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, msg_weird));
10637 return;
10638 /*
10639 ** Negotiation failed.
10640 ** Target does not send us the reply.
10641 ** Remove the HS_NEGOTIATE status.
10642 */
10643 case SIR_NEGO_FAILED:
10644 OUTB (HS_PRT, HS_BUSY);
10645 /*
10646 ** Negotiation failed.
10647 ** Target does not want answer message.
10648 */
10649 case SIR_NEGO_PROTO:
10650 ncr_nego_default(np, tp, cp);
10651 goto out;
10652 };
10653
10654 out:
10655 OUTONB (nc_dcntl, (STD|NOCOM));
10656 return;
10657 out_reject:
10658 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, msg_bad));
10659 return;
10660 out_clrack:
10661 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
10662 return;
10663 out_stuck:
10664 }
10665
10666
10667 /*==========================================================
10668 **
10669 **
10670 ** Aquire a control block
10671 **
10672 **
10673 **==========================================================
10674 */
10675
10676 static ccb_p ncr_get_ccb (ncb_p np, u_char tn, u_char ln)
10677 {
10678 tcb_p tp = &np->target[tn];
10679 lcb_p lp = ncr_lp(np, tp, ln);
10680 u_short tag = NO_TAG;
10681 XPT_QUEHEAD *qp;
10682 ccb_p cp = (ccb_p) 0;
10683
10684 /*
10685 ** Allocate a new CCB if needed.
10686 */
10687 if (xpt_que_empty(&np->free_ccbq))
10688 (void) ncr_alloc_ccb(np);
10689
10690 /*
10691 ** Look for a free CCB
10692 */
10693 qp = xpt_remque_head(&np->free_ccbq);
10694 if (!qp)
10695 goto out;
10696 cp = xpt_que_entry(qp, struct ccb, link_ccbq);
10697
10698 /*
10699 ** If the LCB is not yet available and we already
10700 ** have queued a CCB for a LUN without LCB,
10701 ** give up. Otherwise all is fine. :-)
10702 */
10703 if (!lp) {
10704 if (xpt_que_empty(&np->b0_ccbq))
10705 xpt_insque_head(&cp->link_ccbq, &np->b0_ccbq);
10706 else
10707 goto out_free;
10708 } else {
10709 /*
10710 ** Tune tag mode if asked by user.
10711 */
10712 if (lp->queuedepth != lp->numtags) {
10713 ncr_setup_tags(np, tn, ln);
10714 }
10715
10716 /*
10717 ** Get a tag for this nexus if required.
10718 ** Keep from using more tags than we can handle.
10719 */
10720 if (lp->usetags) {
10721 if (lp->busyccbs < lp->maxnxs) {
10722 tag = lp->cb_tags[lp->ia_tag];
10723 ++lp->ia_tag;
10724 if (lp->ia_tag == MAX_TAGS)
10725 lp->ia_tag = 0;
10726 cp->tags_si = lp->tags_si;
10727 ++lp->tags_sum[cp->tags_si];
10728 }
10729 else
10730 goto out_free;
10731 }
10732
10733 /*
10734 ** Put the CCB in the LUN wait queue and
10735 ** count it as busy.
10736 */
10737 xpt_insque_tail(&cp->link_ccbq, &lp->wait_ccbq);
10738 ++lp->busyccbs;
10739 }
10740
10741 /*
10742 ** Remember all informations needed to free this CCB.
10743 */
10744 cp->to_abort = 0;
10745 cp->tag = tag;
10746 cp->target = tn;
10747 cp->lun = ln;
10748
10749 if (DEBUG_FLAGS & DEBUG_TAGS) {
10750 PRINT_LUN(np, tn, ln);
10751 printk ("ccb @%p using tag %d.\n", cp, tag);
10752 }
10753
10754 out:
10755 return cp;
10756 out_free:
10757 xpt_insque_head(&cp->link_ccbq, &np->free_ccbq);
10758 return (ccb_p) 0;
10759 }
10760
10761 /*==========================================================
10762 **
10763 **
10764 ** Release one control block
10765 **
10766 **
10767 **==========================================================
10768 */
10769
10770 static void ncr_free_ccb (ncb_p np, ccb_p cp)
10771 {
10772 tcb_p tp = &np->target[cp->target];
10773 lcb_p lp = ncr_lp(np, tp, cp->lun);
10774
10775 if (DEBUG_FLAGS & DEBUG_TAGS) {
10776 PRINT_LUN(np, cp->target, cp->lun);
10777 printk ("ccb @%p freeing tag %d.\n", cp, cp->tag);
10778 }
10779
10780 /*
10781 ** If lun control block available, make available
10782 ** the task slot and the tag if any.
10783 ** Decrement counters.
10784 */
10785 if (lp) {
10786 if (cp->tag != NO_TAG) {
10787 lp->cb_tags[lp->if_tag++] = cp->tag;
10788 if (lp->if_tag == MAX_TAGS)
10789 lp->if_tag = 0;
10790 --lp->tags_sum[cp->tags_si];
10791 lp->tasktbl[cp->tag] = cpu_to_scr(np->p_bad_i_t_l_q);
10792 } else {
10793 lp->tasktbl[0] = cpu_to_scr(np->p_bad_i_t_l);
10794 }
10795 --lp->busyccbs;
10796 if (cp->queued) {
10797 --lp->queuedccbs;
10798 }
10799 }
10800
10801 /*
10802 ** Make this CCB available.
10803 */
10804 xpt_remque(&cp->link_ccbq);
10805 xpt_insque_head(&cp->link_ccbq, &np->free_ccbq);
10806 cp -> host_status = HS_IDLE;
10807 cp -> queued = 0;
10808 }
10809
10810 /*------------------------------------------------------------------------
10811 ** Allocate a CCB and initialize its fixed part.
10812 **------------------------------------------------------------------------
10813 **------------------------------------------------------------------------
10814 */
10815 static ccb_p ncr_alloc_ccb(ncb_p np)
10816 {
10817 ccb_p cp = 0;
10818 int hcode;
10819
10820 /*
10821 ** Allocate memory for this CCB.
10822 */
10823 cp = m_calloc_dma(sizeof(struct ccb), "CCB");
10824 if (!cp)
10825 return 0;
10826
10827 /*
10828 ** Count it and initialyze it.
10829 */
10830 np->actccbs++;
10831
10832 /*
10833 ** Remember virtual and bus address of this ccb.
10834 */
10835 cp->p_ccb = vtobus(cp);
10836
10837 /*
10838 ** Insert this ccb into the hashed list.
10839 */
10840 hcode = CCB_HASH_CODE(cp->p_ccb);
10841 cp->link_ccbh = np->ccbh[hcode];
10842 np->ccbh[hcode] = cp;
10843
10844 /*
10845 ** Initialyze the start and restart actions.
10846 */
10847 cp->phys.header.go.start = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
10848 cp->phys.header.go.restart = cpu_to_scr(NCB_SCRIPTH_PHYS(np,bad_i_t_l));
10849
10850 /*
10851 ** Initilialyze some other fields.
10852 */
10853 cp->phys.smsg_ext.addr = cpu_to_scr(NCB_PHYS(np, msgin[2]));
10854
10855 /*
10856 ** Chain into wakeup list and free ccb queue.
10857 */
10858 cp->link_ccb = np->ccbc;
10859 np->ccbc = cp;
10860
10861 xpt_insque_head(&cp->link_ccbq, &np->free_ccbq);
10862
10863 return cp;
10864 }
10865
10866 /*------------------------------------------------------------------------
10867 ** Look up a CCB from a DSA value.
10868 **------------------------------------------------------------------------
10869 **------------------------------------------------------------------------
10870 */
10871 static ccb_p ncr_ccb_from_dsa(ncb_p np, u_long dsa)
10872 {
10873 int hcode;
10874 ccb_p cp;
10875
10876 hcode = CCB_HASH_CODE(dsa);
10877 cp = np->ccbh[hcode];
10878 while (cp) {
10879 if (cp->p_ccb == dsa)
10880 break;
10881 cp = cp->link_ccbh;
10882 }
10883
10884 return cp;
10885 }
10886
10887 /*==========================================================
10888 **
10889 **
10890 ** Allocation of resources for Targets/Luns/Tags.
10891 **
10892 **
10893 **==========================================================
10894 */
10895
10896
10897 /*------------------------------------------------------------------------
10898 ** Target control block initialisation.
10899 **------------------------------------------------------------------------
10900 ** This data structure is fully initialized after a SCSI command
10901 ** has been successfully completed for this target.
10902 **------------------------------------------------------------------------
10903 */
10904 static void ncr_init_tcb (ncb_p np, u_char tn)
10905 {
10906 /*
10907 ** Check some alignments required by the chip.
10908 */
10909 assert (( (offsetof(struct ncr_reg, nc_sxfer) ^
10910 offsetof(struct tcb , sval )) &3) == 0);
10911 assert (( (offsetof(struct ncr_reg, nc_scntl3) ^
10912 offsetof(struct tcb , wval )) &3) == 0);
10913 }
10914
10915 /*------------------------------------------------------------------------
10916 ** Lun control block allocation and initialization.
10917 **------------------------------------------------------------------------
10918 ** This data structure is allocated and initialized after a SCSI
10919 ** command has been successfully completed for this target/lun.
10920 **------------------------------------------------------------------------
10921 */
10922 static lcb_p ncr_alloc_lcb (ncb_p np, u_char tn, u_char ln)
10923 {
10924 tcb_p tp = &np->target[tn];
10925 lcb_p lp = ncr_lp(np, tp, ln);
10926
10927 /*
10928 ** Already done, return.
10929 */
10930 if (lp)
10931 return lp;
10932
10933 /*
10934 ** Initialize the target control block if not yet.
10935 */
10936 ncr_init_tcb(np, tn);
10937
10938 /*
10939 ** Allocate the lcb bus address array.
10940 ** Compute the bus address of this table.
10941 */
10942 if (ln && !tp->luntbl) {
10943 int i;
10944
10945 tp->luntbl = m_calloc_dma(256, "LUNTBL");
10946 if (!tp->luntbl)
10947 goto fail;
10948 for (i = 0 ; i < 64 ; i++)
10949 tp->luntbl[i] = cpu_to_scr(NCB_PHYS(np, resel_badlun));
10950 tp->b_luntbl = cpu_to_scr(vtobus(tp->luntbl));
10951 }
10952
10953 /*
10954 ** Allocate the table of pointers for LUN(s) > 0, if needed.
10955 */
10956 if (ln && !tp->lmp) {
10957 tp->lmp = m_calloc(MAX_LUN * sizeof(lcb_p), "LMP");
10958 if (!tp->lmp)
10959 goto fail;
10960 }
10961
10962 /*
10963 ** Allocate the lcb.
10964 ** Make it available to the chip.
10965 */
10966 lp = m_calloc_dma(sizeof(struct lcb), "LCB");
10967 if (!lp)
10968 goto fail;
10969 if (ln) {
10970 tp->lmp[ln] = lp;
10971 tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
10972 }
10973 else {
10974 tp->l0p = lp;
10975 tp->b_lun0 = cpu_to_scr(vtobus(lp));
10976 }
10977
10978 /*
10979 ** Initialize the CCB queue headers.
10980 */
10981 xpt_que_init(&lp->busy_ccbq);
10982 xpt_que_init(&lp->wait_ccbq);
10983
10984 /*
10985 ** Set max CCBs to 1 and use the default task array
10986 ** by default.
10987 */
10988 lp->maxnxs = 1;
10989 lp->tasktbl = &lp->tasktbl_0;
10990 lp->b_tasktbl = cpu_to_scr(vtobus(lp->tasktbl));
10991 lp->tasktbl[0] = cpu_to_scr(np->p_notask);
10992 lp->resel_task = cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag));
10993
10994 /*
10995 ** Initialize command queuing control.
10996 */
10997 lp->busyccbs = 1;
10998 lp->queuedccbs = 1;
10999 lp->queuedepth = 1;
11000 fail:
11001 return lp;
11002 }
11003
11004
11005 /*------------------------------------------------------------------------
11006 ** Lun control block setup on INQUIRY data received.
11007 **------------------------------------------------------------------------
11008 ** We only support WIDE, SYNC for targets and CMDQ for logical units.
11009 ** This setup is done on each INQUIRY since we are expecting user
11010 ** will play with CHANGE DEFINITION commands. :-)
11011 **------------------------------------------------------------------------
11012 */
11013 static lcb_p ncr_setup_lcb (ncb_p np, u_char tn, u_char ln, u_char *inq_data)
11014 {
11015 tcb_p tp = &np->target[tn];
11016 lcb_p lp = ncr_lp(np, tp, ln);
11017 u_char inq_byte7;
11018 int i;
11019
11020 /*
11021 ** If no lcb, try to allocate it.
11022 */
11023 if (!lp && !(lp = ncr_alloc_lcb(np, tn, ln)))
11024 goto fail;
11025
11026 #if 0 /* No more used. Left here as provision */
11027 /*
11028 ** Get device quirks.
11029 */
11030 tp->quirks = 0;
11031 if (tp->quirks && bootverbose) {
11032 PRINT_LUN(np, tn, ln);
11033 printk ("quirks=%x.\n", tp->quirks);
11034 }
11035 #endif
11036
11037 /*
11038 ** Evaluate trustable target/unit capabilities.
11039 ** We only believe device version >= SCSI-2 that
11040 ** use appropriate response data format (2).
11041 ** But it seems that some CCS devices also
11042 ** support SYNC and I donnot want to frustrate
11043 ** anybody. ;-)
11044 */
11045 inq_byte7 = 0;
11046 if ((inq_data[2] & 0x7) >= 2 && (inq_data[3] & 0xf) == 2)
11047 inq_byte7 = inq_data[7];
11048 else if ((inq_data[2] & 0x7) == 1 && (inq_data[3] & 0xf) == 1)
11049 inq_byte7 = INQ7_SYNC;
11050
11051 /*
11052 ** Throw away announced LUN capabilities if we are told
11053 ** that there is no real device supported by the logical unit.
11054 */
11055 if ((inq_data[0] & 0xe0) > 0x20 || (inq_data[0] & 0x1f) == 0x1f)
11056 inq_byte7 &= (INQ7_SYNC | INQ7_WIDE16);
11057
11058 /*
11059 ** If user is wanting SYNC, force this feature.
11060 */
11061 if (driver_setup.force_sync_nego)
11062 inq_byte7 |= INQ7_SYNC;
11063
11064 /*
11065 ** Prepare negotiation if SIP capabilities have changed.
11066 */
11067 tp->inq_done = 1;
11068 if ((inq_byte7 ^ tp->inq_byte7) & (INQ7_SYNC | INQ7_WIDE16)) {
11069 tp->inq_byte7 = inq_byte7;
11070 ncr_negotiate(np, tp);
11071 }
11072
11073 /*
11074 ** If unit supports tagged commands, allocate and
11075 ** initialyze the task table if not yet.
11076 */
11077 if ((inq_byte7 & INQ7_QUEUE) && lp->tasktbl == &lp->tasktbl_0) {
11078 lp->tasktbl = m_calloc_dma(MAX_TASKS*4, "TASKTBL");
11079 if (!lp->tasktbl) {
11080 lp->tasktbl = &lp->tasktbl_0;
11081 goto fail;
11082 }
11083 lp->b_tasktbl = cpu_to_scr(vtobus(lp->tasktbl));
11084 for (i = 0 ; i < MAX_TASKS ; i++)
11085 lp->tasktbl[i] = cpu_to_scr(np->p_notask);
11086
11087 lp->cb_tags = m_calloc(MAX_TAGS, "CB_TAGS");
11088 if (!lp->cb_tags)
11089 goto fail;
11090 for (i = 0 ; i < MAX_TAGS ; i++)
11091 lp->cb_tags[i] = i;
11092
11093 lp->maxnxs = MAX_TAGS;
11094 lp->tags_stime = ktime_get(3*HZ);
11095 }
11096
11097 /*
11098 ** Adjust tagged queueing status if needed.
11099 */
11100 if ((inq_byte7 ^ lp->inq_byte7) & INQ7_QUEUE) {
11101 lp->inq_byte7 = inq_byte7;
11102 lp->numtags = lp->maxtags;
11103 ncr_setup_tags (np, tn, ln);
11104 }
11105
11106 fail:
11107 return lp;
11108 }
11109
11110 /*==========================================================
11111 **
11112 **
11113 ** Build Scatter Gather Block
11114 **
11115 **
11116 **==========================================================
11117 **
11118 ** The transfer area may be scattered among
11119 ** several non adjacent physical pages.
11120 **
11121 ** We may use MAX_SCATTER blocks.
11122 **
11123 **----------------------------------------------------------
11124 */
11125
11126 /*
11127 ** We try to reduce the number of interrupts caused
11128 ** by unexpected phase changes due to disconnects.
11129 ** A typical harddisk may disconnect before ANY block.
11130 ** If we wanted to avoid unexpected phase changes at all
11131 ** we had to use a break point every 512 bytes.
11132 ** Of course the number of scatter/gather blocks is
11133 ** limited.
11134 ** Under Linux, the scatter/gatter blocks are provided by
11135 ** the generic driver. We just have to copy addresses and
11136 ** sizes to the data segment array.
11137 */
11138
11139 /*
11140 ** For 64 bit systems, we use the 8 upper bits of the size field
11141 ** to provide bus address bits 32-39 to the SCRIPTS processor.
11142 ** This allows the 895A and 896 to address up to 1 TB of memory.
11143 ** For 32 bit chips on 64 bit systems, we must be provided with
11144 ** memory addresses that fit into the first 32 bit bus address
11145 ** range and so, this does not matter and we expect an error from
11146 ** the chip if this ever happen.
11147 **
11148 ** We use a separate function for the case Linux does not provide
11149 ** a scatter list in order to allow better code optimization
11150 ** for the case we have a scatter list (BTW, for now this just wastes
11151 ** about 40 bytes of code for x86, but my guess is that the scatter
11152 ** code will get more complex later).
11153 */
11154
11155 #if BITS_PER_LONG > 32
11156 #define SCATTER_ONE(data, badd, len) \
11157 (data)->addr = cpu_to_scr(badd); \
11158 (data)->size = cpu_to_scr((((badd) >> 8) & 0xff000000) + len);
11159 #else
11160 #define SCATTER_ONE(data, badd, len) \
11161 (data)->addr = cpu_to_scr(badd); \
11162 (data)->size = cpu_to_scr(len);
11163 #endif
11164
11165 #define CROSS_16MB(p, n) (((((u_long) p) + n - 1) ^ ((u_long) p)) & ~0xffffff)
11166
11167 static int ncr_scatter_no_sglist(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd)
11168 {
11169 struct scr_tblmove *data = &cp->phys.data[MAX_SCATTER-1];
11170 int segment;
11171
11172 cp->data_len = cmd->request_bufflen;
11173
11174 if (cmd->request_bufflen) {
11175 u_long baddr = map_scsi_single_data(np, cmd);
11176
11177 SCATTER_ONE(data, baddr, cmd->request_bufflen);
11178 if (CROSS_16MB(baddr, cmd->request_bufflen)) {
11179 cp->host_flags |= HF_PM_TO_C;
11180 #ifdef DEBUG_896R1
11181 printk("He! we are crossing a 16 MB boundary (0x%lx, 0x%x)\n",
11182 baddr, cmd->request_bufflen);
11183 #endif
11184 }
11185 segment = 1;
11186 }
11187 else
11188 segment = 0;
11189
11190 return segment;
11191 }
11192
11193 /*
11194 ** DEL 472 - 53C896 Rev 1 - Part Number 609-0393055 - ITEM 5.
11195 **
11196 ** We disable data phase mismatch handling from SCRIPTS for data
11197 ** transfers that contains scatter/gather entries that cross
11198 ** a 16 MB boundary.
11199 ** We use a different scatter function for 896 rev. 1 that needs
11200 ** such a work-around. Doing so, we do not affect performance for
11201 ** other chips.
11202 ** This problem should not be triggered for disk IOs under Linux,
11203 ** since such IOs are performed using pages and buffers that are
11204 ** nicely power-of-two sized and aligned. But, since this may change
11205 ** at any time, a work-around was required.
11206 */
11207 static int ncr_scatter_896R1(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd)
11208 {
11209 int segn;
11210 int use_sg = (int) cmd->use_sg;
11211
11212 cp->data_len = 0;
11213
11214 if (!use_sg)
11215 segn = ncr_scatter_no_sglist(np, cp, cmd);
11216 else if (use_sg > MAX_SCATTER)
11217 segn = -1;
11218 else {
11219 struct scatterlist *scatter = (struct scatterlist *)cmd->buffer;
11220 struct scr_tblmove *data;
11221
11222 use_sg = map_scsi_sg_data(np, cmd);
11223 data = &cp->phys.data[MAX_SCATTER - use_sg];
11224
11225 for (segn = 0; segn < use_sg; segn++) {
11226 u_long baddr = scsi_sg_dma_address(&scatter[segn]);
11227 unsigned int len = scsi_sg_dma_len(&scatter[segn]);
11228
11229 SCATTER_ONE(&data[segn],
11230 baddr,
11231 len);
11232 if (CROSS_16MB(baddr, scatter[segn].length)) {
11233 cp->host_flags |= HF_PM_TO_C;
11234 #ifdef DEBUG_896R1
11235 printk("He! we are crossing a 16 MB boundary (0x%lx, 0x%x)\n",
11236 baddr, scatter[segn].length);
11237 #endif
11238 }
11239 cp->data_len += len;
11240 }
11241 }
11242
11243 return segn;
11244 }
11245
11246 static int ncr_scatter(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd)
11247 {
11248 int segment;
11249 int use_sg = (int) cmd->use_sg;
11250
11251 cp->data_len = 0;
11252
11253 if (!use_sg)
11254 segment = ncr_scatter_no_sglist(np, cp, cmd);
11255 else if (use_sg > MAX_SCATTER)
11256 segment = -1;
11257 else {
11258 struct scatterlist *scatter = (struct scatterlist *)cmd->buffer;
11259 struct scr_tblmove *data;
11260
11261 use_sg = map_scsi_sg_data(np, cmd);
11262 data = &cp->phys.data[MAX_SCATTER - use_sg];
11263
11264 for (segment = 0; segment < use_sg; segment++) {
11265 u_long baddr = scsi_sg_dma_address(&scatter[segment]);
11266 unsigned int len = scsi_sg_dma_len(&scatter[segment]);
11267
11268 SCATTER_ONE(&data[segment],
11269 baddr,
11270 len);
11271 cp->data_len += len;
11272 }
11273 }
11274
11275 return segment;
11276 }
11277
11278 /*==========================================================
11279 **
11280 **
11281 ** Test the pci bus snoop logic :-(
11282 **
11283 ** Has to be called with interrupts disabled.
11284 **
11285 **
11286 **==========================================================
11287 */
11288
11289 #ifndef NCR_IOMAPPED
11290 static int __init ncr_regtest (struct ncb* np)
11291 {
11292 register volatile u_int32 data;
11293 /*
11294 ** ncr registers may NOT be cached.
11295 ** write 0xffffffff to a read only register area,
11296 ** and try to read it back.
11297 */
11298 data = 0xffffffff;
11299 OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data);
11300 data = INL_OFF(offsetof(struct ncr_reg, nc_dstat));
11301 #if 1
11302 if (data == 0xffffffff) {
11303 #else
11304 if ((data & 0xe2f0fffd) != 0x02000080) {
11305 #endif
11306 printk ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
11307 (unsigned) data);
11308 return (0x10);
11309 };
11310 return (0);
11311 }
11312 #endif
11313
11314 static int __init ncr_snooptest (struct ncb* np)
11315 {
11316 u_int32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
11317 int i, err=0;
11318 #ifndef NCR_IOMAPPED
11319 if (np->reg) {
11320 err |= ncr_regtest (np);
11321 if (err) return (err);
11322 }
11323 #endif
11324 /*
11325 ** init
11326 */
11327 pc = NCB_SCRIPTH0_PHYS (np, snooptest);
11328 host_wr = 1;
11329 ncr_wr = 2;
11330 /*
11331 ** Set memory and register.
11332 */
11333 np->ncr_cache = cpu_to_scr(host_wr);
11334 OUTL (nc_temp, ncr_wr);
11335 /*
11336 ** Start script (exchange values)
11337 */
11338 OUTL (nc_dsa, np->p_ncb);
11339 OUTL (nc_dsp, pc);
11340 /*
11341 ** Wait 'til done (with timeout)
11342 */
11343 for (i=0; i<NCR_SNOOP_TIMEOUT; i++)
11344 if (INB(nc_istat) & (INTF|SIP|DIP))
11345 break;
11346 /*
11347 ** Save termination position.
11348 */
11349 pc = INL (nc_dsp);
11350 /*
11351 ** Read memory and register.
11352 */
11353 host_rd = scr_to_cpu(np->ncr_cache);
11354 ncr_rd = INL (nc_scratcha);
11355 ncr_bk = INL (nc_temp);
11356
11357 /*
11358 ** check for timeout
11359 */
11360 if (i>=NCR_SNOOP_TIMEOUT) {
11361 printk ("CACHE TEST FAILED: timeout.\n");
11362 return (0x20);
11363 };
11364 /*
11365 ** Check termination position.
11366 */
11367 if (pc != NCB_SCRIPTH0_PHYS (np, snoopend)+8) {
11368 printk ("CACHE TEST FAILED: script execution failed.\n");
11369 printk ("start=%08lx, pc=%08lx, end=%08lx\n",
11370 (u_long) NCB_SCRIPTH0_PHYS (np, snooptest), (u_long) pc,
11371 (u_long) NCB_SCRIPTH0_PHYS (np, snoopend) +8);
11372 return (0x40);
11373 };
11374 /*
11375 ** Show results.
11376 */
11377 if (host_wr != ncr_rd) {
11378 printk ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n",
11379 (int) host_wr, (int) ncr_rd);
11380 err |= 1;
11381 };
11382 if (host_rd != ncr_wr) {
11383 printk ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n",
11384 (int) ncr_wr, (int) host_rd);
11385 err |= 2;
11386 };
11387 if (ncr_bk != ncr_wr) {
11388 printk ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n",
11389 (int) ncr_wr, (int) ncr_bk);
11390 err |= 4;
11391 };
11392 return (err);
11393 }
11394
11395 /*==========================================================
11396 **
11397 **
11398 ** Profiling the drivers and targets performance.
11399 **
11400 **
11401 **==========================================================
11402 */
11403
11404 #ifdef SCSI_NCR_PROFILE_SUPPORT
11405
11406 static void ncb_profile (ncb_p np, ccb_p cp)
11407 {
11408 int num_disc = (cp->phys.num_disc & 0xff);
11409 int num_disc0 = (cp->phys.num_disc >> 8);
11410
11411 ++np->profile.num_trans;
11412 np->profile.num_disc += num_disc;
11413 np->profile.num_disc0 += num_disc0;
11414 np->profile.num_kbytes += (cp->data_len >> 10);
11415 #if 000
11416 if (num_disc > num_disc0) {
11417 if (cp->data_len <= 1024)
11418 np->profile.num_br1k += (num_disc - num_disc0);
11419 else if (cp->data_len <= 2048)
11420 np->profile.num_br2k += (num_disc - num_disc0);
11421 else if (cp->data_len <= 4096)
11422 np->profile.num_br4k += (num_disc - num_disc0);
11423 else if (cp->data_len <= 8192)
11424 np->profile.num_br8k += (num_disc - num_disc0);
11425 else
11426 np->profile.num_brnk += (num_disc - num_disc0);
11427 }
11428 #endif
11429 }
11430
11431 #endif /* SCSI_NCR_PROFILE_SUPPORT */
11432
11433 /*==========================================================
11434 **
11435 ** Determine the ncr's clock frequency.
11436 ** This is essential for the negotiation
11437 ** of the synchronous transfer rate.
11438 **
11439 **==========================================================
11440 **
11441 ** Note: we have to return the correct value.
11442 ** THERE IS NO SAFE DEFAULT VALUE.
11443 **
11444 ** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
11445 ** 53C860 and 53C875 rev. 1 support fast20 transfers but
11446 ** do not have a clock doubler and so are provided with a
11447 ** 80 MHz clock. All other fast20 boards incorporate a doubler
11448 ** and so should be delivered with a 40 MHz clock.
11449 ** The recent fast40 chips (895/896/895A) use a 40 Mhz base clock
11450 ** and provide a clock quadrupler (160 Mhz). The code below
11451 ** tries to deal as cleverly as possible with all this stuff.
11452 **
11453 **----------------------------------------------------------
11454 */
11455
11456 /*
11457 * Select NCR SCSI clock frequency
11458 */
11459 static void ncr_selectclock(ncb_p np, u_char scntl3)
11460 {
11461 if (np->multiplier < 2) {
11462 OUTB(nc_scntl3, scntl3);
11463 return;
11464 }
11465
11466 if (bootverbose >= 2)
11467 printk ("%s: enabling clock multiplier\n", ncr_name(np));
11468
11469 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
11470 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */
11471 int i = 20;
11472 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
11473 UDELAY (20);
11474 if (!i)
11475 printk("%s: the chip cannot lock the frequency\n", ncr_name(np));
11476 } else /* Wait 20 micro-seconds for doubler */
11477 UDELAY (20);
11478 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
11479 OUTB(nc_scntl3, scntl3);
11480 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
11481 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
11482 }
11483
11484
11485 /*
11486 * calculate NCR SCSI clock frequency (in KHz)
11487 */
11488 static unsigned __init ncrgetfreq (ncb_p np, int gen)
11489 {
11490 unsigned int ms = 0;
11491 unsigned int f;
11492
11493 /*
11494 * Measure GEN timer delay in order
11495 * to calculate SCSI clock frequency
11496 *
11497 * This code will never execute too
11498 * many loop iterations (if DELAY is
11499 * reasonably correct). It could get
11500 * too low a delay (too high a freq.)
11501 * if the CPU is slow executing the
11502 * loop for some reason (an NMI, for
11503 * example). For this reason we will
11504 * if multiple measurements are to be
11505 * performed trust the higher delay
11506 * (lower frequency returned).
11507 */
11508 OUTW (nc_sien , 0); /* mask all scsi interrupts */
11509 (void) INW (nc_sist); /* clear pending scsi interrupt */
11510 OUTB (nc_dien , 0); /* mask all dma interrupts */
11511 (void) INW (nc_sist); /* another one, just to be sure :) */
11512 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
11513 OUTB (nc_stime1, 0); /* disable general purpose timer */
11514 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
11515 while (!(INW(nc_sist) & GEN) && ms++ < 100000)
11516 UDELAY (1000); /* count ms */
11517 OUTB (nc_stime1, 0); /* disable general purpose timer */
11518 /*
11519 * set prescaler to divide by whatever 0 means
11520 * 0 ought to choose divide by 2, but appears
11521 * to set divide by 3.5 mode in my 53c810 ...
11522 */
11523 OUTB (nc_scntl3, 0);
11524
11525 /*
11526 * adjust for prescaler, and convert into KHz
11527 */
11528 f = ms ? ((1 << gen) * 4340) / ms : 0;
11529
11530 if (bootverbose >= 2)
11531 printk ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
11532 ncr_name(np), gen, ms, f);
11533
11534 return f;
11535 }
11536
11537 static unsigned __init ncr_getfreq (ncb_p np)
11538 {
11539 u_int f1, f2;
11540 int gen = 11;
11541
11542 (void) ncrgetfreq (np, gen); /* throw away first result */
11543 f1 = ncrgetfreq (np, gen);
11544 f2 = ncrgetfreq (np, gen);
11545 if (f1 > f2) f1 = f2; /* trust lower result */
11546 return f1;
11547 }
11548
11549 /*
11550 * Get/probe NCR SCSI clock frequency
11551 */
11552 static void __init ncr_getclock (ncb_p np, int mult)
11553 {
11554 unsigned char scntl3 = np->sv_scntl3;
11555 unsigned char stest1 = np->sv_stest1;
11556 unsigned f1;
11557
11558 np->multiplier = 1;
11559 f1 = 40000;
11560
11561 /*
11562 ** True with 875/895/896/895A with clock multiplier selected
11563 */
11564 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
11565 if (bootverbose >= 2)
11566 printk ("%s: clock multiplier found\n", ncr_name(np));
11567 np->multiplier = mult;
11568 }
11569
11570 /*
11571 ** If multiplier not found or scntl3 not 7,5,3,
11572 ** reset chip and get frequency from general purpose timer.
11573 ** Otherwise trust scntl3 BIOS setting.
11574 */
11575 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
11576 OUTB (nc_stest1, 0); /* make sure doubler is OFF */
11577 f1 = ncr_getfreq (np);
11578
11579 if (bootverbose)
11580 printk ("%s: NCR clock is %uKHz\n", ncr_name(np), f1);
11581
11582 if (f1 < 55000) f1 = 40000;
11583 else f1 = 80000;
11584
11585 /*
11586 ** Suggest to also check the PCI clock frequency
11587 ** to make sure our frequency calculation algorithm
11588 ** is not too biased.
11589 */
11590 np->pciclock_min = (33000*55+80-1)/80;
11591 np->pciclock_max = (33000*55)/40;
11592
11593 if (f1 == 40000 && mult > 1) {
11594 if (bootverbose >= 2)
11595 printk ("%s: clock multiplier assumed\n", ncr_name(np));
11596 np->multiplier = mult;
11597 }
11598 } else {
11599 if ((scntl3 & 7) == 3) f1 = 40000;
11600 else if ((scntl3 & 7) == 5) f1 = 80000;
11601 else f1 = 160000;
11602
11603 f1 /= np->multiplier;
11604 }
11605
11606 /*
11607 ** Compute controller synchronous parameters.
11608 */
11609 f1 *= np->multiplier;
11610 np->clock_khz = f1;
11611 }
11612
11613 /*
11614 * Get/probe PCI clock frequency
11615 */
11616 static u_int __init ncr_getpciclock (ncb_p np)
11617 {
11618 static u_int f;
11619
11620 OUTB (nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
11621 f = ncr_getfreq (np);
11622 OUTB (nc_stest1, 0);
11623
11624 return f;
11625 }
11626
11627 /*===================== LINUX ENTRY POINTS SECTION ==========================*/
11628
11629 #ifndef uchar
11630 #define uchar unsigned char
11631 #endif
11632
11633 #ifndef ushort
11634 #define ushort unsigned short
11635 #endif
11636
11637 #ifndef ulong
11638 #define ulong unsigned long
11639 #endif
11640
11641 /* ---------------------------------------------------------------------
11642 **
11643 ** Driver setup from the boot command line
11644 **
11645 ** ---------------------------------------------------------------------
11646 */
11647
11648 #ifdef MODULE
11649 #define ARG_SEP ' '
11650 #else
11651 #define ARG_SEP ','
11652 #endif
11653
11654 #define OPT_TAGS 1
11655 #define OPT_MASTER_PARITY 2
11656 #define OPT_SCSI_PARITY 3
11657 #define OPT_DISCONNECTION 4
11658 #define OPT_SPECIAL_FEATURES 5
11659 #define OPT_ULTRA_SCSI 6
11660 #define OPT_FORCE_SYNC_NEGO 7
11661 #define OPT_REVERSE_PROBE 8
11662 #define OPT_DEFAULT_SYNC 9
11663 #define OPT_VERBOSE 10
11664 #define OPT_DEBUG 11
11665 #define OPT_BURST_MAX 12
11666 #define OPT_LED_PIN 13
11667 #define OPT_MAX_WIDE 14
11668 #define OPT_SETTLE_DELAY 15
11669 #define OPT_DIFF_SUPPORT 16
11670 #define OPT_IRQM 17
11671 #define OPT_PCI_FIX_UP 18
11672 #define OPT_BUS_CHECK 19
11673 #define OPT_OPTIMIZE 20
11674 #define OPT_RECOVERY 21
11675 #define OPT_SAFE_SETUP 22
11676 #define OPT_USE_NVRAM 23
11677 #define OPT_EXCLUDE 24
11678 #define OPT_HOST_ID 25
11679
11680 #ifdef SCSI_NCR_IARB_SUPPORT
11681 #define OPT_IARB 26
11682 #endif
11683
11684 static char setup_token[] __initdata =
11685 "tags:" "mpar:"
11686 "spar:" "disc:"
11687 "specf:" "ultra:"
11688 "fsn:" "revprob:"
11689 "sync:" "verb:"
11690 "debug:" "burst:"
11691 "led:" "wide:"
11692 "settle:" "diff:"
11693 "irqm:" "pcifix:"
11694 "buschk:" "optim:"
11695 "recovery:"
11696 "safe:" "nvram:"
11697 "excl:" "hostid:"
11698 #ifdef SCSI_NCR_IARB_SUPPORT
11699 "iarb:"
11700 #endif
11701 ; /* DONNOT REMOVE THIS ';' */
11702
11703 #ifdef MODULE
11704 #define ARG_SEP ' '
11705 #else
11706 #define ARG_SEP ','
11707 #endif
11708
11709 static int __init get_setup_token(char *p)
11710 {
11711 char *cur = setup_token;
11712 char *pc;
11713 int i = 0;
11714
11715 while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
11716 ++pc;
11717 ++i;
11718 if (!strncmp(p, cur, pc - cur))
11719 return i;
11720 cur = pc;
11721 }
11722 return 0;
11723 }
11724
11725
11726 int __init sym53c8xx_setup(char *str)
11727 {
11728 #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
11729 char *cur = str;
11730 char *pc, *pv;
11731 int i, val, c;
11732 int xi = 0;
11733
11734 while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
11735 char *pe;
11736
11737 val = 0;
11738 pv = pc;
11739 c = *++pv;
11740
11741 if (c == 'n')
11742 val = 0;
11743 else if (c == 'y')
11744 val = 1;
11745 else
11746 val = (int) simple_strtoul(pv, &pe, 0);
11747
11748 switch (get_setup_token(cur)) {
11749 case OPT_TAGS:
11750 driver_setup.default_tags = val;
11751 if (pe && *pe == '/') {
11752 i = 0;
11753 while (*pe && *pe != ARG_SEP &&
11754 i < sizeof(driver_setup.tag_ctrl)-1) {
11755 driver_setup.tag_ctrl[i++] = *pe++;
11756 }
11757 driver_setup.tag_ctrl[i] = '\0';
11758 }
11759 break;
11760 case OPT_MASTER_PARITY:
11761 driver_setup.master_parity = val;
11762 break;
11763 case OPT_SCSI_PARITY:
11764 driver_setup.scsi_parity = val;
11765 break;
11766 case OPT_DISCONNECTION:
11767 driver_setup.disconnection = val;
11768 break;
11769 case OPT_SPECIAL_FEATURES:
11770 driver_setup.special_features = val;
11771 break;
11772 case OPT_ULTRA_SCSI:
11773 driver_setup.ultra_scsi = val;
11774 break;
11775 case OPT_FORCE_SYNC_NEGO:
11776 driver_setup.force_sync_nego = val;
11777 break;
11778 case OPT_REVERSE_PROBE:
11779 driver_setup.reverse_probe = val;
11780 break;
11781 case OPT_DEFAULT_SYNC:
11782 driver_setup.default_sync = val;
11783 break;
11784 case OPT_VERBOSE:
11785 driver_setup.verbose = val;
11786 break;
11787 case OPT_DEBUG:
11788 driver_setup.debug = val;
11789 break;
11790 case OPT_BURST_MAX:
11791 driver_setup.burst_max = val;
11792 break;
11793 case OPT_LED_PIN:
11794 driver_setup.led_pin = val;
11795 break;
11796 case OPT_MAX_WIDE:
11797 driver_setup.max_wide = val? 1:0;
11798 break;
11799 case OPT_SETTLE_DELAY:
11800 driver_setup.settle_delay = val;
11801 break;
11802 case OPT_DIFF_SUPPORT:
11803 driver_setup.diff_support = val;
11804 break;
11805 case OPT_IRQM:
11806 driver_setup.irqm = val;
11807 break;
11808 case OPT_PCI_FIX_UP:
11809 driver_setup.pci_fix_up = val;
11810 break;
11811 case OPT_BUS_CHECK:
11812 driver_setup.bus_check = val;
11813 break;
11814 case OPT_OPTIMIZE:
11815 driver_setup.optimize = val;
11816 break;
11817 case OPT_RECOVERY:
11818 driver_setup.recovery = val;
11819 break;
11820 case OPT_USE_NVRAM:
11821 driver_setup.use_nvram = val;
11822 break;
11823 case OPT_SAFE_SETUP:
11824 memcpy(&driver_setup, &driver_safe_setup,
11825 sizeof(driver_setup));
11826 break;
11827 case OPT_EXCLUDE:
11828 if (xi < SCSI_NCR_MAX_EXCLUDES)
11829 driver_setup.excludes[xi++] = val;
11830 break;
11831 case OPT_HOST_ID:
11832 driver_setup.host_id = val;
11833 break;
11834 #ifdef SCSI_NCR_IARB_SUPPORT
11835 case OPT_IARB:
11836 driver_setup.iarb = val;
11837 break;
11838 #endif
11839 default:
11840 printk("sym53c8xx_setup: unexpected boot option '%.*s' ignored\n", (int)(pc-cur+1), cur);
11841 break;
11842 }
11843
11844 if ((cur = strchr(cur, ARG_SEP)) != NULL)
11845 ++cur;
11846 }
11847 #endif /* SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT */
11848 return 0;
11849 }
11850
11851 #if LINUX_VERSION_CODE >= LinuxVersionCode(2,3,13)
11852 #ifndef MODULE
11853 __setup("sym53c8xx=", sym53c8xx_setup);
11854 #endif
11855 #endif
11856
11857 static int
11858 sym53c8xx_pci_init(Scsi_Host_Template *tpnt, pcidev_t pdev, ncr_device *device);
11859
11860 /*
11861 ** Linux entry point for SYM53C8XX devices detection routine.
11862 **
11863 ** Called by the middle-level scsi drivers at initialization time,
11864 ** or at module installation.
11865 **
11866 ** Read the PCI configuration and try to attach each
11867 ** detected NCR board.
11868 **
11869 ** If NVRAM is present, try to attach boards according to
11870 ** the used defined boot order.
11871 **
11872 ** Returns the number of boards successfully attached.
11873 */
11874
11875 static void __init ncr_print_driver_setup(void)
11876 {
11877 #define YesNo(y) y ? 'y' : 'n'
11878 printk (NAME53C8XX ": setup=disc:%c,specf:%d,ultra:%d,tags:%d,sync:%d,"
11879 "burst:%d,wide:%c,diff:%d,revprob:%c,buschk:0x%x\n",
11880 YesNo(driver_setup.disconnection),
11881 driver_setup.special_features,
11882 driver_setup.ultra_scsi,
11883 driver_setup.default_tags,
11884 driver_setup.default_sync,
11885 driver_setup.burst_max,
11886 YesNo(driver_setup.max_wide),
11887 driver_setup.diff_support,
11888 YesNo(driver_setup.reverse_probe),
11889 driver_setup.bus_check);
11890
11891 printk (NAME53C8XX ": setup=mpar:%c,spar:%c,fsn=%c,verb:%d,debug:0x%x,"
11892 "led:%c,settle:%d,irqm:0x%x,nvram:0x%x,pcifix:0x%x\n",
11893 YesNo(driver_setup.master_parity),
11894 YesNo(driver_setup.scsi_parity),
11895 YesNo(driver_setup.force_sync_nego),
11896 driver_setup.verbose,
11897 driver_setup.debug,
11898 YesNo(driver_setup.led_pin),
11899 driver_setup.settle_delay,
11900 driver_setup.irqm,
11901 driver_setup.use_nvram,
11902 driver_setup.pci_fix_up);
11903 #undef YesNo
11904 }
11905
11906 /*===================================================================
11907 ** SYM53C8XX devices description table and chip ids list.
11908 **===================================================================
11909 */
11910
11911 static ncr_chip ncr_chip_table[] __initdata = SCSI_NCR_CHIP_TABLE;
11912 static ushort ncr_chip_ids[] __initdata = SCSI_NCR_CHIP_IDS;
11913
11914 #ifdef SCSI_NCR_PQS_PDS_SUPPORT
11915 /*===================================================================
11916 ** Detect all NCR PQS/PDS boards and keep track of their bus nr.
11917 **
11918 ** The NCR PQS or PDS card is constructed as a DEC bridge
11919 ** behind which sit a proprietary NCR memory controller and
11920 ** four or two 53c875s as separate devices. In its usual mode
11921 ** of operation, the 875s are slaved to the memory controller
11922 ** for all transfers. We can tell if an 875 is part of a
11923 ** PQS/PDS or not since if it is, it will be on the same bus
11924 ** as the memory controller. To operate with the Linux
11925 ** driver, the memory controller is disabled and the 875s
11926 ** freed to function independently. The only wrinkle is that
11927 ** the preset SCSI ID (which may be zero) must be read in from
11928 ** a special configuration space register of the 875
11929 **===================================================================
11930 */
11931 #define SCSI_NCR_MAX_PQS_BUS 16
11932 static int pqs_bus[SCSI_NCR_MAX_PQS_BUS] __initdata = { 0 };
11933
11934 static void __init ncr_detect_pqs_pds(void)
11935 {
11936 short index;
11937 pcidev_t dev = PCIDEV_NULL;
11938
11939 for(index=0; index < SCSI_NCR_MAX_PQS_BUS; index++) {
11940 u_char tmp;
11941
11942 dev = pci_find_device(0x101a, 0x0009, dev);
11943 if (dev == PCIDEV_NULL) {
11944 pqs_bus[index] = -1;
11945 break;
11946 }
11947 printk(KERN_INFO NAME53C8XX ": NCR PQS/PDS memory controller detected on bus %d\n", PciBusNumber(dev));
11948 pci_read_config_byte(dev, 0x44, &tmp);
11949 /* bit 1: allow individual 875 configuration */
11950 tmp |= 0x2;
11951 pci_write_config_byte(dev, 0x44, tmp);
11952 pci_read_config_byte(dev, 0x45, &tmp);
11953 /* bit 2: drive individual 875 interrupts to the bus */
11954 tmp |= 0x4;
11955 pci_write_config_byte(dev, 0x45, tmp);
11956
11957 pqs_bus[index] = PciBusNumber(dev);
11958 }
11959 }
11960 #endif /* SCSI_NCR_PQS_PDS_SUPPORT */
11961
11962 /*===================================================================
11963 ** Detect all 53c8xx hosts and then attach them.
11964 **
11965 ** If we are using NVRAM, once all hosts are detected, we need to
11966 ** check any NVRAM for boot order in case detect and boot order
11967 ** differ and attach them using the order in the NVRAM.
11968 **
11969 ** If no NVRAM is found or data appears invalid attach boards in
11970 ** the the order they are detected.
11971 **===================================================================
11972 */
11973 int __init sym53c8xx_detect(Scsi_Host_Template *tpnt)
11974 {
11975 pcidev_t pcidev;
11976 int i, j, chips, hosts, count;
11977 int attach_count = 0;
11978 ncr_device *devtbl, *devp;
11979 #ifdef SCSI_NCR_NVRAM_SUPPORT
11980 ncr_nvram nvram0, nvram, *nvp;
11981 #endif
11982
11983 /*
11984 ** PCI is required.
11985 */
11986 if (!pci_present())
11987 return 0;
11988
11989 /*
11990 ** Initialize driver general stuff.
11991 */
11992 #ifdef SCSI_NCR_PROC_INFO_SUPPORT
11993 #if LINUX_VERSION_CODE < LinuxVersionCode(2,3,27)
11994 tpnt->proc_dir = &proc_scsi_sym53c8xx;
11995 #else
11996 tpnt->proc_name = NAME53C8XX;
11997 #endif
11998 tpnt->proc_info = sym53c8xx_proc_info;
11999 #endif
12000
12001 #if defined(SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT) && defined(MODULE)
12002 if (sym53c8xx)
12003 sym53c8xx_setup(sym53c8xx);
12004 #endif
12005 #ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
12006 ncr_debug = driver_setup.debug;
12007 #endif
12008
12009 if (initverbose >= 2)
12010 ncr_print_driver_setup();
12011
12012 /*
12013 ** Allocate the device table since we donnot want to
12014 ** overflow the kernel stack.
12015 ** 1 x 4K PAGE is enough for more than 40 devices for i386.
12016 */
12017 devtbl = m_calloc(PAGE_SIZE, "devtbl");
12018 if (!devtbl)
12019 return 0;
12020
12021 /*
12022 ** Detect all NCR PQS/PDS memory controllers.
12023 */
12024 #ifdef SCSI_NCR_PQS_PDS_SUPPORT
12025 ncr_detect_pqs_pds();
12026 #endif
12027
12028 /*
12029 ** Detect all 53c8xx hosts.
12030 ** Save the first Symbios NVRAM content if any
12031 ** for the boot order.
12032 */
12033 chips = sizeof(ncr_chip_ids) / sizeof(ncr_chip_ids[0]);
12034 hosts = PAGE_SIZE / sizeof(*devtbl);
12035 #ifdef SCSI_NCR_NVRAM_SUPPORT
12036 nvp = (driver_setup.use_nvram & 0x1) ? &nvram0 : 0;
12037 #endif
12038 j = 0;
12039 count = 0;
12040 pcidev = PCIDEV_NULL;
12041 while (1) {
12042 char *msg = "";
12043 if (count >= hosts)
12044 break;
12045 if (j >= chips)
12046 break;
12047 i = driver_setup.reverse_probe ? chips - 1 - j : j;
12048 pcidev = pci_find_device(PCI_VENDOR_ID_NCR, ncr_chip_ids[i],
12049 pcidev);
12050 if (pcidev == PCIDEV_NULL) {
12051 ++j;
12052 continue;
12053 }
12054 /* Some HW as the HP LH4 may report twice PCI devices */
12055 for (i = 0; i < count ; i++) {
12056 if (devtbl[i].slot.bus == PciBusNumber(pcidev) &&
12057 devtbl[i].slot.device_fn == PciDeviceFn(pcidev))
12058 break;
12059 }
12060 if (i != count) /* Ignore this device if we already have it */
12061 continue;
12062 devp = &devtbl[count];
12063 devp->host_id = driver_setup.host_id;
12064 devp->attach_done = 0;
12065 if (sym53c8xx_pci_init(tpnt, pcidev, devp)) {
12066 continue;
12067 }
12068 ++count;
12069 #ifdef SCSI_NCR_NVRAM_SUPPORT
12070 if (nvp) {
12071 ncr_get_nvram(devp, nvp);
12072 switch(nvp->type) {
12073 case SCSI_NCR_SYMBIOS_NVRAM:
12074 /*
12075 * Switch to the other nvram buffer, so that
12076 * nvram0 will contain the first Symbios
12077 * format NVRAM content with boot order.
12078 */
12079 nvp = &nvram;
12080 msg = "with Symbios NVRAM";
12081 break;
12082 case SCSI_NCR_TEKRAM_NVRAM:
12083 msg = "with Tekram NVRAM";
12084 break;
12085 }
12086 }
12087 #endif
12088 #ifdef SCSI_NCR_PQS_PDS_SUPPORT
12089 if (devp->pqs_pds)
12090 msg = "(NCR PQS/PDS)";
12091 #endif
12092 printk(KERN_INFO NAME53C8XX ": 53c%s detected %s\n",
12093 devp->chip.name, msg);
12094 }
12095
12096 /*
12097 ** If we have found a SYMBIOS NVRAM, use first the NVRAM boot
12098 ** sequence as device boot order.
12099 ** check devices in the boot record against devices detected.
12100 ** attach devices if we find a match. boot table records that
12101 ** do not match any detected devices will be ignored.
12102 ** devices that do not match any boot table will not be attached
12103 ** here but will attempt to be attached during the device table
12104 ** rescan.
12105 */
12106 #ifdef SCSI_NCR_NVRAM_SUPPORT
12107 if (!nvp || nvram0.type != SCSI_NCR_SYMBIOS_NVRAM)
12108 goto next;
12109 for (i = 0; i < 4; i++) {
12110 Symbios_host *h = &nvram0.data.Symbios.host[i];
12111 for (j = 0 ; j < count ; j++) {
12112 devp = &devtbl[j];
12113 if (h->device_fn != devp->slot.device_fn ||
12114 h->bus_nr != devp->slot.bus ||
12115 h->device_id != devp->chip.device_id)
12116 continue;
12117 if (devp->attach_done)
12118 continue;
12119 if (h->flags & SYMBIOS_INIT_SCAN_AT_BOOT) {
12120 ncr_get_nvram(devp, nvp);
12121 if (!ncr_attach (tpnt, attach_count, devp))
12122 attach_count++;
12123 }
12124 else if (!(driver_setup.use_nvram & 0x80))
12125 printk(KERN_INFO NAME53C8XX
12126 ": 53c%s state OFF thus not attached\n",
12127 devp->chip.name);
12128 else
12129 continue;
12130
12131 devp->attach_done = 1;
12132 break;
12133 }
12134 }
12135 next:
12136 #endif
12137
12138 /*
12139 ** Rescan device list to make sure all boards attached.
12140 ** Devices without boot records will not be attached yet
12141 ** so try to attach them here.
12142 */
12143 for (i= 0; i < count; i++) {
12144 devp = &devtbl[i];
12145 if (!devp->attach_done) {
12146 #ifdef SCSI_NCR_NVRAM_SUPPORT
12147 ncr_get_nvram(devp, nvp);
12148 #endif
12149 if (!ncr_attach (tpnt, attach_count, devp))
12150 attach_count++;
12151 }
12152 }
12153
12154 m_free(devtbl, PAGE_SIZE, "devtbl");
12155
12156 return attach_count;
12157 }
12158
12159 /*===================================================================
12160 ** Read and check the PCI configuration for any detected NCR
12161 ** boards and save data for attaching after all boards have
12162 ** been detected.
12163 **===================================================================
12164 */
12165 static int __init
12166 sym53c8xx_pci_init(Scsi_Host_Template *tpnt, pcidev_t pdev, ncr_device *device)
12167 {
12168 u_short vendor_id, device_id, command;
12169 u_char cache_line_size, latency_timer;
12170 u_char suggested_cache_line_size = 0;
12171 u_char pci_fix_up = driver_setup.pci_fix_up;
12172 u_char revision;
12173 u_int irq;
12174 u_long base, base_2, io_port;
12175 int i;
12176 ncr_chip *chip;
12177
12178 printk(KERN_INFO NAME53C8XX ": at PCI bus %d, device %d, function %d\n",
12179 PciBusNumber(pdev),
12180 (int) (PciDeviceFn(pdev) & 0xf8) >> 3,
12181 (int) (PciDeviceFn(pdev) & 7));
12182
12183 #ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
12184 if (!pci_dma_supported(pdev, (dma_addr_t) (0xffffffffUL))) {
12185 printk(KERN_WARNING NAME53C8XX
12186 "32 BIT PCI BUS DMA ADDRESSING NOT SUPPORTED\n");
12187 return -1;
12188 }
12189 #endif
12190
12191 /*
12192 ** Read info from the PCI config space.
12193 ** pci_read_config_xxx() functions are assumed to be used for
12194 ** successfully detected PCI devices.
12195 */
12196 vendor_id = PciVendorId(pdev);
12197 device_id = PciDeviceId(pdev);
12198 irq = PciIrqLine(pdev);
12199 i = 0;
12200 i = pci_get_base_address(pdev, i, &io_port);
12201 i = pci_get_base_address(pdev, i, &base);
12202 (void) pci_get_base_address(pdev, i, &base_2);
12203
12204 pci_read_config_word(pdev, PCI_COMMAND, &command);
12205 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
12206 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
12207 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
12208
12209 #ifdef SCSI_NCR_PQS_PDS_SUPPORT
12210 /*
12211 ** Match the BUS number for PQS/PDS devices.
12212 ** Read the SCSI ID from a special register mapped
12213 ** into the configuration space of the individual
12214 ** 875s. This register is set up by the PQS bios
12215 */
12216 for(i = 0; i < SCSI_NCR_MAX_PQS_BUS && pqs_bus[i] != -1; i++) {
12217 u_char tmp;
12218 if (pqs_bus[i] == PciBusNumber(pdev)) {
12219 pci_read_config_byte(pdev, 0x84, &tmp);
12220 device->pqs_pds = 1;
12221 device->host_id = tmp;
12222 break;
12223 }
12224 }
12225 #endif /* SCSI_NCR_PQS_PDS_SUPPORT */
12226
12227 /*
12228 ** If user excludes this chip, donnot initialize it.
12229 */
12230 for (i = 0 ; i < SCSI_NCR_MAX_EXCLUDES ; i++) {
12231 if (driver_setup.excludes[i] ==
12232 (io_port & PCI_BASE_ADDRESS_IO_MASK))
12233 return -1;
12234 }
12235 /*
12236 ** Check if the chip is supported
12237 */
12238 chip = 0;
12239 for (i = 0; i < sizeof(ncr_chip_table)/sizeof(ncr_chip_table[0]); i++) {
12240 if (device_id != ncr_chip_table[i].device_id)
12241 continue;
12242 if (revision > ncr_chip_table[i].revision_id)
12243 continue;
12244 if (!(ncr_chip_table[i].features & FE_LDSTR))
12245 break;
12246 chip = &device->chip;
12247 memcpy(chip, &ncr_chip_table[i], sizeof(*chip));
12248 chip->revision_id = revision;
12249 break;
12250 }
12251
12252 /*
12253 ** Ignore Symbios chips controlled by SISL RAID controller.
12254 ** This controller sets value 0x52414944 at RAM end - 16.
12255 */
12256 #if defined(__i386__) && !defined(SCSI_NCR_PCI_MEM_NOT_SUPPORTED)
12257 if (chip && (base_2 & PCI_BASE_ADDRESS_MEM_MASK)) {
12258 unsigned int ram_size, ram_val;
12259 u_long ram_ptr;
12260
12261 if (chip->features & FE_RAM8K)
12262 ram_size = 8192;
12263 else
12264 ram_size = 4096;
12265
12266 ram_ptr = remap_pci_mem(base_2 & PCI_BASE_ADDRESS_MEM_MASK,
12267 ram_size);
12268 if (ram_ptr) {
12269 ram_val = readl_raw(ram_ptr + ram_size - 16);
12270 unmap_pci_mem(ram_ptr, ram_size);
12271 if (ram_val == 0x52414944) {
12272 printk(NAME53C8XX": not initializing, "
12273 "driven by SISL RAID controller.\n");
12274 return -1;
12275 }
12276 }
12277 }
12278 #endif /* i386 and PCI MEMORY accessible */
12279
12280 if (!chip) {
12281 printk(NAME53C8XX ": not initializing, device not supported\n");
12282 return -1;
12283 }
12284
12285 #ifdef __powerpc__
12286 /*
12287 ** Fix-up for power/pc.
12288 ** Should not be performed by the driver.
12289 */
12290 if ((command & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY))
12291 != (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) {
12292 printk(NAME53C8XX ": setting%s%s...\n",
12293 (command & PCI_COMMAND_IO) ? "" : " PCI_COMMAND_IO",
12294 (command & PCI_COMMAND_MEMORY) ? "" : " PCI_COMMAND_MEMORY");
12295 command |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
12296 pci_write_config_word(pdev, PCI_COMMAND, command);
12297 }
12298
12299 #if LINUX_VERSION_CODE < LinuxVersionCode(2,2,0)
12300 if ( is_prep ) {
12301 if (io_port >= 0x10000000) {
12302 printk(NAME53C8XX ": reallocating io_port (Wacky IBM)");
12303 io_port = (io_port & 0x00FFFFFF) | 0x01000000;
12304 pci_write_config_dword(pdev,
12305 PCI_BASE_ADDRESS_0, io_port);
12306 }
12307 if (base >= 0x10000000) {
12308 printk(NAME53C8XX ": reallocating base (Wacky IBM)");
12309 base = (base & 0x00FFFFFF) | 0x01000000;
12310 pci_write_config_dword(pdev,
12311 PCI_BASE_ADDRESS_1, base);
12312 }
12313 if (base_2 >= 0x10000000) {
12314 printk(NAME53C8XX ": reallocating base2 (Wacky IBM)");
12315 base_2 = (base_2 & 0x00FFFFFF) | 0x01000000;
12316 pci_write_config_dword(pdev,
12317 PCI_BASE_ADDRESS_2, base_2);
12318 }
12319 }
12320 #endif
12321 #endif /* __powerpc__ */
12322
12323 #if defined(__i386__) && !defined(MODULE)
12324 if (!cache_line_size) {
12325 #if LINUX_VERSION_CODE < LinuxVersionCode(2,1,75)
12326 extern char x86;
12327 switch(x86) {
12328 #else
12329 switch(boot_cpu_data.x86) {
12330 #endif
12331 case 4: suggested_cache_line_size = 4; break;
12332 case 6:
12333 case 5: suggested_cache_line_size = 8; break;
12334 }
12335 }
12336 #endif /* __i386__ */
12337
12338 /*
12339 ** Check availability of IO space, memory space.
12340 ** Enable master capability if not yet.
12341 **
12342 ** We shouldn't have to care about the IO region when
12343 ** we are using MMIO. But calling check_region() from
12344 ** both the ncr53c8xx and the sym53c8xx drivers prevents
12345 ** from attaching devices from the both drivers.
12346 ** If you have a better idea, let me know.
12347 */
12348 /* #ifdef NCR_IOMAPPED */
12349 #if 1
12350 if (!(command & PCI_COMMAND_IO)) {
12351 printk(NAME53C8XX ": I/O base address (0x%lx) disabled.\n",
12352 (long) io_port);
12353 io_port = 0;
12354 }
12355 #endif
12356 if (!(command & PCI_COMMAND_MEMORY)) {
12357 printk(NAME53C8XX ": PCI_COMMAND_MEMORY not set.\n");
12358 base = 0;
12359 base_2 = 0;
12360 }
12361 io_port &= PCI_BASE_ADDRESS_IO_MASK;
12362 base &= PCI_BASE_ADDRESS_MEM_MASK;
12363 base_2 &= PCI_BASE_ADDRESS_MEM_MASK;
12364
12365 /* #ifdef NCR_IOMAPPED */
12366 #if 1
12367 if (io_port && check_region (io_port, 128)) {
12368 printk(NAME53C8XX ": IO region 0x%lx[0..127] is in use\n",
12369 (long) io_port);
12370 io_port = 0;
12371 }
12372 if (!io_port)
12373 return -1;
12374 #endif
12375 #ifndef NCR_IOMAPPED
12376 if (!base) {
12377 printk(NAME53C8XX ": MMIO base address disabled.\n");
12378 return -1;
12379 }
12380 #endif
12381
12382 /*
12383 ** Set MASTER capable and PARITY bit, if not yet.
12384 */
12385 if ((command & (PCI_COMMAND_MASTER | PCI_COMMAND_PARITY))
12386 != (PCI_COMMAND_MASTER | PCI_COMMAND_PARITY)) {
12387 printk(NAME53C8XX ": setting%s%s...(fix-up)\n",
12388 (command & PCI_COMMAND_MASTER) ? "" : " PCI_COMMAND_MASTER",
12389 (command & PCI_COMMAND_PARITY) ? "" : " PCI_COMMAND_PARITY");
12390 command |= (PCI_COMMAND_MASTER | PCI_COMMAND_PARITY);
12391 pci_write_config_word(pdev, PCI_COMMAND, command);
12392 }
12393
12394 /*
12395 ** Fix some features according to driver setup.
12396 */
12397 if (!(driver_setup.special_features & 1))
12398 chip->features &= ~FE_SPECIAL_SET;
12399 else {
12400 if (driver_setup.special_features & 2)
12401 chip->features &= ~FE_WRIE;
12402 if (driver_setup.special_features & 4)
12403 chip->features &= ~FE_NOPM;
12404 }
12405 if (driver_setup.ultra_scsi < 2 && (chip->features & FE_ULTRA2)) {
12406 chip->features |= FE_ULTRA;
12407 chip->features &= ~FE_ULTRA2;
12408 }
12409 if (driver_setup.ultra_scsi < 1)
12410 chip->features &= ~FE_ULTRA;
12411 if (!driver_setup.max_wide)
12412 chip->features &= ~FE_WIDE;
12413
12414 /*
12415 ** Some features are required to be enabled in order to
12416 ** work around some chip problems. :) ;)
12417 ** (ITEM 12 of a DEL about the 896 I haven't yet).
12418 ** We must ensure the chip will use WRITE AND INVALIDATE.
12419 ** The revision number limit is for now arbitrary.
12420 */
12421 if (device_id == PCI_DEVICE_ID_NCR_53C896 && revision <= 0x10) {
12422 chip->features |= (FE_WRIE | FE_CLSE);
12423 pci_fix_up |= 3; /* Force appropriate PCI fix-up */
12424 }
12425
12426 #ifdef SCSI_NCR_PCI_FIX_UP_SUPPORT
12427 /*
12428 ** Try to fix up PCI config according to wished features.
12429 */
12430 if ((pci_fix_up & 1) && (chip->features & FE_CLSE) &&
12431 !cache_line_size && suggested_cache_line_size) {
12432 cache_line_size = suggested_cache_line_size;
12433 pci_write_config_byte(pdev,
12434 PCI_CACHE_LINE_SIZE, cache_line_size);
12435 printk(NAME53C8XX ": PCI_CACHE_LINE_SIZE set to %d (fix-up).\n",
12436 cache_line_size);
12437 }
12438
12439 if ((pci_fix_up & 2) && cache_line_size &&
12440 (chip->features & FE_WRIE) && !(command & PCI_COMMAND_INVALIDATE)) {
12441 printk(NAME53C8XX": setting PCI_COMMAND_INVALIDATE (fix-up)\n");
12442 command |= PCI_COMMAND_INVALIDATE;
12443 pci_write_config_word(pdev, PCI_COMMAND, command);
12444 }
12445
12446 /*
12447 ** Tune PCI LATENCY TIMER according to burst max length transfer.
12448 ** (latency timer >= burst length + 6, we add 10 to be quite sure)
12449 */
12450
12451 if (chip->burst_max && (latency_timer == 0 || (pci_fix_up & 4))) {
12452 uchar lt = (1 << chip->burst_max) + 6 + 10;
12453 if (latency_timer < lt) {
12454 printk(NAME53C8XX
12455 ": changing PCI_LATENCY_TIMER from %d to %d.\n",
12456 (int) latency_timer, (int) lt);
12457 latency_timer = lt;
12458 pci_write_config_byte(pdev,
12459 PCI_LATENCY_TIMER, latency_timer);
12460 }
12461 }
12462
12463 #endif /* SCSI_NCR_PCI_FIX_UP_SUPPORT */
12464
12465 /*
12466 ** Initialise ncr_device structure with items required by ncr_attach.
12467 */
12468 device->pdev = pdev;
12469 device->slot.bus = PciBusNumber(pdev);
12470 device->slot.device_fn = PciDeviceFn(pdev);
12471 device->slot.base = base;
12472 device->slot.base_2 = base_2;
12473 device->slot.io_port = io_port;
12474 device->slot.irq = irq;
12475 device->attach_done = 0;
12476
12477 return 0;
12478 }
12479
12480
12481 /*===================================================================
12482 ** Detect and try to read SYMBIOS and TEKRAM NVRAM.
12483 **
12484 ** Data can be used to order booting of boards.
12485 **
12486 ** Data is saved in ncr_device structure if NVRAM found. This
12487 ** is then used to find drive boot order for ncr_attach().
12488 **
12489 ** NVRAM data is passed to Scsi_Host_Template later during
12490 ** ncr_attach() for any device set up.
12491 *===================================================================
12492 */
12493 #ifdef SCSI_NCR_NVRAM_SUPPORT
12494 static void __init ncr_get_nvram(ncr_device *devp, ncr_nvram *nvp)
12495 {
12496 devp->nvram = nvp;
12497 if (!nvp)
12498 return;
12499 /*
12500 ** Get access to chip IO registers
12501 */
12502 #ifdef NCR_IOMAPPED
12503 request_region(devp->slot.io_port, 128, NAME53C8XX);
12504 devp->slot.base_io = devp->slot.io_port;
12505 #else
12506 devp->slot.reg = (struct ncr_reg *) remap_pci_mem(devp->slot.base, 128);
12507 if (!devp->slot.reg)
12508 return;
12509 #endif
12510
12511 /*
12512 ** Try to read SYMBIOS nvram.
12513 ** Try to read TEKRAM nvram if Symbios nvram not found.
12514 */
12515 if (!sym_read_Symbios_nvram(&devp->slot, &nvp->data.Symbios))
12516 nvp->type = SCSI_NCR_SYMBIOS_NVRAM;
12517 else if (!sym_read_Tekram_nvram(&devp->slot, devp->chip.device_id,
12518 &nvp->data.Tekram))
12519 nvp->type = SCSI_NCR_TEKRAM_NVRAM;
12520 else {
12521 nvp->type = 0;
12522 devp->nvram = 0;
12523 }
12524
12525 /*
12526 ** Release access to chip IO registers
12527 */
12528 #ifdef NCR_IOMAPPED
12529 release_region(devp->slot.base_io, 128);
12530 #else
12531 unmap_pci_mem((u_long) devp->slot.reg, 128ul);
12532 #endif
12533
12534 }
12535 #endif /* SCSI_NCR_NVRAM_SUPPORT */
12536
12537 /*
12538 ** Linux select queue depths function
12539 */
12540
12541 #define DEF_DEPTH (driver_setup.default_tags)
12542 #define ALL_TARGETS -2
12543 #define NO_TARGET -1
12544 #define ALL_LUNS -2
12545 #define NO_LUN -1
12546
12547 static int device_queue_depth(ncb_p np, int target, int lun)
12548 {
12549 int c, h, t, u, v;
12550 char *p = driver_setup.tag_ctrl;
12551 char *ep;
12552
12553 h = -1;
12554 t = NO_TARGET;
12555 u = NO_LUN;
12556 while ((c = *p++) != 0) {
12557 v = simple_strtoul(p, &ep, 0);
12558 switch(c) {
12559 case '/':
12560 ++h;
12561 t = ALL_TARGETS;
12562 u = ALL_LUNS;
12563 break;
12564 case 't':
12565 if (t != target)
12566 t = (target == v) ? v : NO_TARGET;
12567 u = ALL_LUNS;
12568 break;
12569 case 'u':
12570 if (u != lun)
12571 u = (lun == v) ? v : NO_LUN;
12572 break;
12573 case 'q':
12574 if (h == np->unit &&
12575 (t == ALL_TARGETS || t == target) &&
12576 (u == ALL_LUNS || u == lun))
12577 return v;
12578 break;
12579 case '-':
12580 t = ALL_TARGETS;
12581 u = ALL_LUNS;
12582 break;
12583 default:
12584 break;
12585 }
12586 p = ep;
12587 }
12588 return DEF_DEPTH;
12589 }
12590
12591 static void sym53c8xx_select_queue_depths(struct Scsi_Host *host, struct scsi_device *devlist)
12592 {
12593 struct scsi_device *device;
12594
12595 for (device = devlist; device; device = device->next) {
12596 ncb_p np;
12597 tcb_p tp;
12598 lcb_p lp;
12599 int numtags;
12600
12601 if (device->host != host)
12602 continue;
12603
12604 np = ((struct host_data *) host->hostdata)->ncb;
12605 tp = &np->target[device->id];
12606 lp = ncr_lp(np, tp, device->lun);
12607
12608 /*
12609 ** Select queue depth from driver setup.
12610 ** Donnot use more than configured by user.
12611 ** Use at least 2.
12612 ** Donnot use more than our maximum.
12613 */
12614 numtags = device_queue_depth(np, device->id, device->lun);
12615 if (numtags > tp->usrtags)
12616 numtags = tp->usrtags;
12617 if (!device->tagged_supported)
12618 numtags = 1;
12619 device->queue_depth = numtags;
12620 if (device->queue_depth < 2)
12621 device->queue_depth = 2;
12622 if (device->queue_depth > MAX_TAGS)
12623 device->queue_depth = MAX_TAGS;
12624
12625 /*
12626 ** Since the queue depth is not tunable under Linux,
12627 ** we need to know this value in order not to
12628 ** announce stupid things to user.
12629 */
12630 if (lp) {
12631 lp->numtags = lp->maxtags = numtags;
12632 lp->scdev_depth = device->queue_depth;
12633 }
12634 ncr_setup_tags (np, device->id, device->lun);
12635
12636 #ifdef DEBUG_SYM53C8XX
12637 printk("sym53c8xx_select_queue_depth: host=%d, id=%d, lun=%d, depth=%d\n",
12638 np->unit, device->id, device->lun, device->queue_depth);
12639 #endif
12640 }
12641 }
12642
12643 /*
12644 ** Linux entry point for info() function
12645 */
12646 const char *sym53c8xx_info (struct Scsi_Host *host)
12647 {
12648 return SCSI_NCR_DRIVER_NAME;
12649 }
12650
12651 /*
12652 ** Linux entry point of queuecommand() function
12653 */
12654
12655 int sym53c8xx_queue_command (Scsi_Cmnd *cmd, void (* done)(Scsi_Cmnd *))
12656 {
12657 ncb_p np = ((struct host_data *) cmd->host->hostdata)->ncb;
12658 unsigned long flags;
12659 int sts;
12660
12661 #ifdef DEBUG_SYM53C8XX
12662 printk("sym53c8xx_queue_command\n");
12663 #endif
12664
12665 cmd->scsi_done = done;
12666 cmd->host_scribble = NULL;
12667 cmd->SCp.ptr = NULL;
12668 cmd->SCp.buffer = NULL;
12669 #ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
12670 cmd->__data_mapped = 0;
12671 cmd->__data_mapping = 0;
12672 #endif
12673
12674 NCR_LOCK_NCB(np, flags);
12675
12676 if ((sts = ncr_queue_command(np, cmd)) != DID_OK) {
12677 SetScsiResult(cmd, sts, 0);
12678 #ifdef DEBUG_SYM53C8XX
12679 printk("sym53c8xx : command not queued - result=%d\n", sts);
12680 #endif
12681 }
12682 #ifdef DEBUG_SYM53C8XX
12683 else
12684 printk("sym53c8xx : command successfully queued\n");
12685 #endif
12686
12687 NCR_UNLOCK_NCB(np, flags);
12688
12689 if (sts != DID_OK) {
12690 unmap_scsi_data(np, cmd);
12691 done(cmd);
12692 }
12693
12694 return sts;
12695 }
12696
12697 /*
12698 ** Linux entry point of the interrupt handler.
12699 ** Since linux versions > 1.3.70, we trust the kernel for
12700 ** passing the internal host descriptor as 'dev_id'.
12701 ** Otherwise, we scan the host list and call the interrupt
12702 ** routine for each host that uses this IRQ.
12703 */
12704
12705 static void sym53c8xx_intr(int irq, void *dev_id, struct pt_regs * regs)
12706 {
12707 unsigned long flags;
12708 ncb_p np = (ncb_p) dev_id;
12709 Scsi_Cmnd *done_list;
12710
12711 #ifdef DEBUG_SYM53C8XX
12712 printk("sym53c8xx : interrupt received\n");
12713 #endif
12714
12715 if (DEBUG_FLAGS & DEBUG_TINY) printk ("[");
12716
12717 NCR_LOCK_NCB(np, flags);
12718 ncr_exception(np);
12719 done_list = np->done_list;
12720 np->done_list = 0;
12721 NCR_UNLOCK_NCB(np, flags);
12722
12723 if (DEBUG_FLAGS & DEBUG_TINY) printk ("]\n");
12724
12725 if (done_list) {
12726 NCR_LOCK_SCSI_DONE(np, flags);
12727 ncr_flush_done_cmds(done_list);
12728 NCR_UNLOCK_SCSI_DONE(np, flags);
12729 }
12730 }
12731
12732 /*
12733 ** Linux entry point of the timer handler
12734 */
12735
12736 static void sym53c8xx_timeout(unsigned long npref)
12737 {
12738 ncb_p np = (ncb_p) npref;
12739 unsigned long flags;
12740 Scsi_Cmnd *done_list;
12741
12742 NCR_LOCK_NCB(np, flags);
12743 ncr_timeout((ncb_p) np);
12744 done_list = np->done_list;
12745 np->done_list = 0;
12746 NCR_UNLOCK_NCB(np, flags);
12747
12748 if (done_list) {
12749 NCR_LOCK_SCSI_DONE(np, flags);
12750 ncr_flush_done_cmds(done_list);
12751 NCR_UNLOCK_SCSI_DONE(np, flags);
12752 }
12753 }
12754
12755 /*
12756 ** Linux entry point of reset() function
12757 */
12758
12759 #if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
12760 int sym53c8xx_reset(Scsi_Cmnd *cmd, unsigned int reset_flags)
12761 #else
12762 int sym53c8xx_reset(Scsi_Cmnd *cmd)
12763 #endif
12764 {
12765 ncb_p np = ((struct host_data *) cmd->host->hostdata)->ncb;
12766 int sts;
12767 unsigned long flags;
12768 Scsi_Cmnd *done_list;
12769
12770 #if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
12771 printk("sym53c8xx_reset: pid=%lu reset_flags=%x serial_number=%ld serial_number_at_timeout=%ld\n",
12772 cmd->pid, reset_flags, cmd->serial_number, cmd->serial_number_at_timeout);
12773 #else
12774 printk("sym53c8xx_reset: command pid %lu\n", cmd->pid);
12775 #endif
12776
12777 NCR_LOCK_NCB(np, flags);
12778
12779 /*
12780 * We have to just ignore reset requests in some situations.
12781 */
12782 #if defined SCSI_RESET_NOT_RUNNING
12783 if (cmd->serial_number != cmd->serial_number_at_timeout) {
12784 sts = SCSI_RESET_NOT_RUNNING;
12785 goto out;
12786 }
12787 #endif
12788 /*
12789 * If the mid-level driver told us reset is synchronous, it seems
12790 * that we must call the done() callback for the involved command,
12791 * even if this command was not queued to the low-level driver,
12792 * before returning SCSI_RESET_SUCCESS.
12793 */
12794
12795 #if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
12796 sts = ncr_reset_bus(np, cmd,
12797 (reset_flags & (SCSI_RESET_SYNCHRONOUS | SCSI_RESET_ASYNCHRONOUS)) == SCSI_RESET_SYNCHRONOUS);
12798 #else
12799 sts = ncr_reset_bus(np, cmd, 0);
12800 #endif
12801
12802 /*
12803 * Since we always reset the controller, when we return success,
12804 * we add this information to the return code.
12805 */
12806 #if defined SCSI_RESET_HOST_RESET
12807 if (sts == SCSI_RESET_SUCCESS)
12808 sts |= SCSI_RESET_HOST_RESET;
12809 #endif
12810
12811 out:
12812 done_list = np->done_list;
12813 np->done_list = 0;
12814 NCR_UNLOCK_NCB(np, flags);
12815
12816 ncr_flush_done_cmds(done_list);
12817
12818 return sts;
12819 }
12820
12821 /*
12822 ** Linux entry point of abort() function
12823 */
12824
12825 int sym53c8xx_abort(Scsi_Cmnd *cmd)
12826 {
12827 ncb_p np = ((struct host_data *) cmd->host->hostdata)->ncb;
12828 int sts;
12829 unsigned long flags;
12830 Scsi_Cmnd *done_list;
12831
12832 #if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
12833 printk("sym53c8xx_abort: pid=%lu serial_number=%ld serial_number_at_timeout=%ld\n",
12834 cmd->pid, cmd->serial_number, cmd->serial_number_at_timeout);
12835 #else
12836 printk("sym53c8xx_abort: command pid %lu\n", cmd->pid);
12837 #endif
12838
12839 NCR_LOCK_NCB(np, flags);
12840
12841 #if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
12842 /*
12843 * We have to just ignore abort requests in some situations.
12844 */
12845 if (cmd->serial_number != cmd->serial_number_at_timeout) {
12846 sts = SCSI_ABORT_NOT_RUNNING;
12847 goto out;
12848 }
12849 #endif
12850
12851 sts = ncr_abort_command(np, cmd);
12852 out:
12853 done_list = np->done_list;
12854 np->done_list = 0;
12855 NCR_UNLOCK_NCB(np, flags);
12856
12857 ncr_flush_done_cmds(done_list);
12858
12859 return sts;
12860 }
12861
12862
12863 #ifdef MODULE
12864 int sym53c8xx_release(struct Scsi_Host *host)
12865 {
12866 #ifdef DEBUG_SYM53C8XX
12867 printk("sym53c8xx : release\n");
12868 #endif
12869 ncr_detach(((struct host_data *) host->hostdata)->ncb);
12870
12871 return 1;
12872 }
12873 #endif
12874
12875
12876 /*
12877 ** Scsi command waiting list management.
12878 **
12879 ** It may happen that we cannot insert a scsi command into the start queue,
12880 ** in the following circumstances.
12881 ** Too few preallocated ccb(s),
12882 ** maxtags < cmd_per_lun of the Linux host control block,
12883 ** etc...
12884 ** Such scsi commands are inserted into a waiting list.
12885 ** When a scsi command complete, we try to requeue the commands of the
12886 ** waiting list.
12887 */
12888
12889 #define next_wcmd host_scribble
12890
12891 static void insert_into_waiting_list(ncb_p np, Scsi_Cmnd *cmd)
12892 {
12893 Scsi_Cmnd *wcmd;
12894
12895 #ifdef DEBUG_WAITING_LIST
12896 printk("%s: cmd %lx inserted into waiting list\n", ncr_name(np), (u_long) cmd);
12897 #endif
12898 cmd->next_wcmd = 0;
12899 if (!(wcmd = np->waiting_list)) np->waiting_list = cmd;
12900 else {
12901 while ((wcmd->next_wcmd) != 0)
12902 wcmd = (Scsi_Cmnd *) wcmd->next_wcmd;
12903 wcmd->next_wcmd = (char *) cmd;
12904 }
12905 }
12906
12907 static Scsi_Cmnd *retrieve_from_waiting_list(int to_remove, ncb_p np, Scsi_Cmnd *cmd)
12908 {
12909 Scsi_Cmnd **pcmd = &np->waiting_list;
12910
12911 while (*pcmd) {
12912 if (cmd == *pcmd) {
12913 if (to_remove) {
12914 *pcmd = (Scsi_Cmnd *) cmd->next_wcmd;
12915 cmd->next_wcmd = 0;
12916 }
12917 #ifdef DEBUG_WAITING_LIST
12918 printk("%s: cmd %lx retrieved from waiting list\n", ncr_name(np), (u_long) cmd);
12919 #endif
12920 return cmd;
12921 }
12922 pcmd = (Scsi_Cmnd **) &(*pcmd)->next_wcmd;
12923 }
12924 return 0;
12925 }
12926
12927 static void process_waiting_list(ncb_p np, int sts)
12928 {
12929 Scsi_Cmnd *waiting_list, *wcmd;
12930
12931 waiting_list = np->waiting_list;
12932 np->waiting_list = 0;
12933
12934 #ifdef DEBUG_WAITING_LIST
12935 if (waiting_list) printk("%s: waiting_list=%lx processing sts=%d\n", ncr_name(np), (u_long) waiting_list, sts);
12936 #endif
12937 while ((wcmd = waiting_list) != 0) {
12938 waiting_list = (Scsi_Cmnd *) wcmd->next_wcmd;
12939 wcmd->next_wcmd = 0;
12940 if (sts == DID_OK) {
12941 #ifdef DEBUG_WAITING_LIST
12942 printk("%s: cmd %lx trying to requeue\n", ncr_name(np), (u_long) wcmd);
12943 #endif
12944 sts = ncr_queue_command(np, wcmd);
12945 }
12946 if (sts != DID_OK) {
12947 #ifdef DEBUG_WAITING_LIST
12948 printk("%s: cmd %lx done forced sts=%d\n", ncr_name(np), (u_long) wcmd, sts);
12949 #endif
12950 SetScsiResult(wcmd, sts, 0);
12951 ncr_queue_done_cmd(np, wcmd);
12952 }
12953 }
12954 }
12955
12956 #undef next_wcmd
12957
12958 #ifdef SCSI_NCR_PROC_INFO_SUPPORT
12959
12960 /*=========================================================================
12961 ** Proc file system stuff
12962 **
12963 ** A read operation returns profile information.
12964 ** A write operation is a control command.
12965 ** The string is parsed in the driver code and the command is passed
12966 ** to the ncr_usercmd() function.
12967 **=========================================================================
12968 */
12969
12970 #ifdef SCSI_NCR_USER_COMMAND_SUPPORT
12971
12972 #define is_digit(c) ((c) >= '0' && (c) <= '9')
12973 #define digit_to_bin(c) ((c) - '0')
12974 #define is_space(c) ((c) == ' ' || (c) == '\t')
12975
12976 static int skip_spaces(char *ptr, int len)
12977 {
12978 int cnt, c;
12979
12980 for (cnt = len; cnt > 0 && (c = *ptr++) && is_space(c); cnt--);
12981
12982 return (len - cnt);
12983 }
12984
12985 static int get_int_arg(char *ptr, int len, u_long *pv)
12986 {
12987 int cnt, c;
12988 u_long v;
12989
12990 for (v = 0, cnt = len; cnt > 0 && (c = *ptr++) && is_digit(c); cnt--) {
12991 v = (v * 10) + digit_to_bin(c);
12992 }
12993
12994 if (pv)
12995 *pv = v;
12996
12997 return (len - cnt);
12998 }
12999
13000 static int is_keyword(char *ptr, int len, char *verb)
13001 {
13002 int verb_len = strlen(verb);
13003
13004 if (len >= strlen(verb) && !memcmp(verb, ptr, verb_len))
13005 return verb_len;
13006 else
13007 return 0;
13008
13009 }
13010
13011 #define SKIP_SPACES(min_spaces) \
13012 if ((arg_len = skip_spaces(ptr, len)) < (min_spaces)) \
13013 return -EINVAL; \
13014 ptr += arg_len; len -= arg_len;
13015
13016 #define GET_INT_ARG(v) \
13017 if (!(arg_len = get_int_arg(ptr, len, &(v)))) \
13018 return -EINVAL; \
13019 ptr += arg_len; len -= arg_len;
13020
13021
13022 /*
13023 ** Parse a control command
13024 */
13025
13026 static int ncr_user_command(ncb_p np, char *buffer, int length)
13027 {
13028 char *ptr = buffer;
13029 int len = length;
13030 struct usrcmd *uc = &np->user;
13031 int arg_len;
13032 u_long target;
13033
13034 bzero(uc, sizeof(*uc));
13035
13036 if (len > 0 && ptr[len-1] == '\n')
13037 --len;
13038
13039 if ((arg_len = is_keyword(ptr, len, "setsync")) != 0)
13040 uc->cmd = UC_SETSYNC;
13041 else if ((arg_len = is_keyword(ptr, len, "settags")) != 0)
13042 uc->cmd = UC_SETTAGS;
13043 else if ((arg_len = is_keyword(ptr, len, "setorder")) != 0)
13044 uc->cmd = UC_SETORDER;
13045 else if ((arg_len = is_keyword(ptr, len, "setverbose")) != 0)
13046 uc->cmd = UC_SETVERBOSE;
13047 else if ((arg_len = is_keyword(ptr, len, "setwide")) != 0)
13048 uc->cmd = UC_SETWIDE;
13049 else if ((arg_len = is_keyword(ptr, len, "setdebug")) != 0)
13050 uc->cmd = UC_SETDEBUG;
13051 else if ((arg_len = is_keyword(ptr, len, "setflag")) != 0)
13052 uc->cmd = UC_SETFLAG;
13053 else if ((arg_len = is_keyword(ptr, len, "resetdev")) != 0)
13054 uc->cmd = UC_RESETDEV;
13055 else if ((arg_len = is_keyword(ptr, len, "cleardev")) != 0)
13056 uc->cmd = UC_CLEARDEV;
13057 #ifdef SCSI_NCR_PROFILE_SUPPORT
13058 else if ((arg_len = is_keyword(ptr, len, "clearprof")) != 0)
13059 uc->cmd = UC_CLEARPROF;
13060 #endif
13061 else
13062 arg_len = 0;
13063
13064 #ifdef DEBUG_PROC_INFO
13065 printk("ncr_user_command: arg_len=%d, cmd=%ld\n", arg_len, uc->cmd);
13066 #endif
13067
13068 if (!arg_len)
13069 return -EINVAL;
13070 ptr += arg_len; len -= arg_len;
13071
13072 switch(uc->cmd) {
13073 case UC_SETSYNC:
13074 case UC_SETTAGS:
13075 case UC_SETWIDE:
13076 case UC_SETFLAG:
13077 case UC_RESETDEV:
13078 case UC_CLEARDEV:
13079 SKIP_SPACES(1);
13080 if ((arg_len = is_keyword(ptr, len, "all")) != 0) {
13081 ptr += arg_len; len -= arg_len;
13082 uc->target = ~0;
13083 } else {
13084 GET_INT_ARG(target);
13085 uc->target = (1<<target);
13086 #ifdef DEBUG_PROC_INFO
13087 printk("ncr_user_command: target=%ld\n", target);
13088 #endif
13089 }
13090 break;
13091 }
13092
13093 switch(uc->cmd) {
13094 case UC_SETVERBOSE:
13095 case UC_SETSYNC:
13096 case UC_SETTAGS:
13097 case UC_SETWIDE:
13098 SKIP_SPACES(1);
13099 GET_INT_ARG(uc->data);
13100 #ifdef DEBUG_PROC_INFO
13101 printk("ncr_user_command: data=%ld\n", uc->data);
13102 #endif
13103 break;
13104 case UC_SETORDER:
13105 SKIP_SPACES(1);
13106 if ((arg_len = is_keyword(ptr, len, "simple")))
13107 uc->data = M_SIMPLE_TAG;
13108 else if ((arg_len = is_keyword(ptr, len, "ordered")))
13109 uc->data = M_ORDERED_TAG;
13110 else if ((arg_len = is_keyword(ptr, len, "default")))
13111 uc->data = 0;
13112 else
13113 return -EINVAL;
13114 break;
13115 case UC_SETDEBUG:
13116 while (len > 0) {
13117 SKIP_SPACES(1);
13118 if ((arg_len = is_keyword(ptr, len, "alloc")))
13119 uc->data |= DEBUG_ALLOC;
13120 else if ((arg_len = is_keyword(ptr, len, "phase")))
13121 uc->data |= DEBUG_PHASE;
13122 else if ((arg_len = is_keyword(ptr, len, "queue")))
13123 uc->data |= DEBUG_QUEUE;
13124 else if ((arg_len = is_keyword(ptr, len, "result")))
13125 uc->data |= DEBUG_RESULT;
13126 else if ((arg_len = is_keyword(ptr, len, "pointer")))
13127 uc->data |= DEBUG_POINTER;
13128 else if ((arg_len = is_keyword(ptr, len, "script")))
13129 uc->data |= DEBUG_SCRIPT;
13130 else if ((arg_len = is_keyword(ptr, len, "tiny")))
13131 uc->data |= DEBUG_TINY;
13132 else if ((arg_len = is_keyword(ptr, len, "timing")))
13133 uc->data |= DEBUG_TIMING;
13134 else if ((arg_len = is_keyword(ptr, len, "nego")))
13135 uc->data |= DEBUG_NEGO;
13136 else if ((arg_len = is_keyword(ptr, len, "tags")))
13137 uc->data |= DEBUG_TAGS;
13138 else
13139 return -EINVAL;
13140 ptr += arg_len; len -= arg_len;
13141 }
13142 #ifdef DEBUG_PROC_INFO
13143 printk("ncr_user_command: data=%ld\n", uc->data);
13144 #endif
13145 break;
13146 case UC_SETFLAG:
13147 while (len > 0) {
13148 SKIP_SPACES(1);
13149 if ((arg_len = is_keyword(ptr, len, "trace")))
13150 uc->data |= UF_TRACE;
13151 else if ((arg_len = is_keyword(ptr, len, "no_disc")))
13152 uc->data |= UF_NODISC;
13153 else
13154 return -EINVAL;
13155 ptr += arg_len; len -= arg_len;
13156 }
13157 break;
13158 default:
13159 break;
13160 }
13161
13162 if (len)
13163 return -EINVAL;
13164 else {
13165 long flags;
13166
13167 NCR_LOCK_NCB(np, flags);
13168 ncr_usercmd (np);
13169 NCR_UNLOCK_NCB(np, flags);
13170 }
13171 return length;
13172 }
13173
13174 #endif /* SCSI_NCR_USER_COMMAND_SUPPORT */
13175
13176 #ifdef SCSI_NCR_USER_INFO_SUPPORT
13177
13178 struct info_str
13179 {
13180 char *buffer;
13181 int length;
13182 int offset;
13183 int pos;
13184 };
13185
13186 static void copy_mem_info(struct info_str *info, char *data, int len)
13187 {
13188 if (info->pos + len > info->length)
13189 len = info->length - info->pos;
13190
13191 if (info->pos + len < info->offset) {
13192 info->pos += len;
13193 return;
13194 }
13195 if (info->pos < info->offset) {
13196 data += (info->offset - info->pos);
13197 len -= (info->offset - info->pos);
13198 }
13199
13200 if (len > 0) {
13201 memcpy(info->buffer + info->pos, data, len);
13202 info->pos += len;
13203 }
13204 }
13205
13206 static int copy_info(struct info_str *info, char *fmt, ...)
13207 {
13208 va_list args;
13209 char buf[81];
13210 int len;
13211
13212 va_start(args, fmt);
13213 len = vsprintf(buf, fmt, args);
13214 va_end(args);
13215
13216 copy_mem_info(info, buf, len);
13217 return len;
13218 }
13219
13220 /*
13221 ** Copy formatted profile information into the input buffer.
13222 */
13223
13224 #define to_ms(t) ((t) * 1000 / HZ)
13225
13226 static int ncr_host_info(ncb_p np, char *ptr, off_t offset, int len)
13227 {
13228 struct info_str info;
13229
13230 info.buffer = ptr;
13231 info.length = len;
13232 info.offset = offset;
13233 info.pos = 0;
13234
13235 copy_info(&info, "General information:\n");
13236 copy_info(&info, " Chip " NAME53C "%s, device id 0x%x, "
13237 "revision id 0x%x\n",
13238 np->chip_name, np->device_id, np->revision_id);
13239 copy_info(&info, " On PCI bus %d, device %d, function %d, "
13240 #ifdef __sparc__
13241 "IRQ %s\n",
13242 #else
13243 "IRQ %d\n",
13244 #endif
13245 np->bus, (np->device_fn & 0xf8) >> 3, np->device_fn & 7,
13246 #ifdef __sparc__
13247 __irq_itoa(np->irq));
13248 #else
13249 (int) np->irq);
13250 #endif
13251 copy_info(&info, " Synchronous period factor %d, "
13252 "max commands per lun %d\n",
13253 (int) np->minsync, MAX_TAGS);
13254
13255 if (driver_setup.debug || driver_setup.verbose > 1) {
13256 copy_info(&info, " Debug flags 0x%x, verbosity level %d\n",
13257 driver_setup.debug, driver_setup.verbose);
13258 }
13259
13260 #ifdef SCSI_NCR_PROFILE_SUPPORT
13261 copy_info(&info, "Profiling information:\n");
13262 copy_info(&info, " %-12s = %lu\n", "num_fly", np->profile.num_fly);
13263 copy_info(&info, " %-12s = %lu\n", "num_trans",np->profile.num_trans);
13264 copy_info(&info, " %-12s = %lu\n", "num_disc", np->profile.num_disc);
13265 copy_info(&info, " %-12s = %lu\n", "num_disc0",np->profile.num_disc0);
13266 copy_info(&info, " %-12s = %lu\n", "num_break",np->profile.num_break);
13267 #if 000
13268 copy_info(&info, " %-12s = %lu\n", "num_br1k",np->profile.num_br1k);
13269 copy_info(&info, " %-12s = %lu\n", "num_br2k",np->profile.num_br2k);
13270 copy_info(&info, " %-12s = %lu\n", "num_br4k",np->profile.num_br4k);
13271 copy_info(&info, " %-12s = %lu\n", "num_br8k",np->profile.num_br8k);
13272 copy_info(&info, " %-12s = %lu\n", "num_brnk",np->profile.num_brnk);
13273 #endif
13274 copy_info(&info, " %-12s = %lu\n", "num_int", np->profile.num_int);
13275 copy_info(&info, " %-12s = %lu\n","num_kbytes",np->profile.num_kbytes);
13276 #endif
13277
13278 return info.pos > info.offset? info.pos - info.offset : 0;
13279 }
13280
13281 #endif /* SCSI_NCR_USER_INFO_SUPPORT */
13282
13283 /*
13284 ** Entry point of the scsi proc fs of the driver.
13285 ** - func = 0 means read (returns profile data)
13286 ** - func = 1 means write (parse user control command)
13287 */
13288
13289 static int sym53c8xx_proc_info(char *buffer, char **start, off_t offset,
13290 int length, int hostno, int func)
13291 {
13292 struct Scsi_Host *host;
13293 struct host_data *host_data;
13294 ncb_p ncb = 0;
13295 int retv;
13296
13297 #ifdef DEBUG_PROC_INFO
13298 printk("sym53c8xx_proc_info: hostno=%d, func=%d\n", hostno, func);
13299 #endif
13300
13301 for (host = first_host; host; host = host->next) {
13302 if (host->hostt != first_host->hostt)
13303 continue;
13304 if (host->host_no == hostno) {
13305 host_data = (struct host_data *) host->hostdata;
13306 ncb = host_data->ncb;
13307 break;
13308 }
13309 }
13310
13311 if (!ncb)
13312 return -EINVAL;
13313
13314 if (func) {
13315 #ifdef SCSI_NCR_USER_COMMAND_SUPPORT
13316 retv = ncr_user_command(ncb, buffer, length);
13317 #else
13318 retv = -EINVAL;
13319 #endif
13320 }
13321 else {
13322 if (start)
13323 *start = buffer;
13324 #ifdef SCSI_NCR_USER_INFO_SUPPORT
13325 retv = ncr_host_info(ncb, buffer, offset, length);
13326 #else
13327 retv = -EINVAL;
13328 #endif
13329 }
13330
13331 return retv;
13332 }
13333
13334
13335 /*=========================================================================
13336 ** End of proc file system stuff
13337 **=========================================================================
13338 */
13339 #endif
13340
13341
13342 #ifdef SCSI_NCR_NVRAM_SUPPORT
13343
13344 /*
13345 * 24C16 EEPROM reading.
13346 *
13347 * GPOI0 - data in/data out
13348 * GPIO1 - clock
13349 * Symbios NVRAM wiring now also used by Tekram.
13350 */
13351
13352 #define SET_BIT 0
13353 #define CLR_BIT 1
13354 #define SET_CLK 2
13355 #define CLR_CLK 3
13356
13357 /*
13358 * Set/clear data/clock bit in GPIO0
13359 */
13360 static void __init
13361 S24C16_set_bit(ncr_slot *np, u_char write_bit, u_char *gpreg, int bit_mode)
13362 {
13363 UDELAY (5);
13364 switch (bit_mode){
13365 case SET_BIT:
13366 *gpreg |= write_bit;
13367 break;
13368 case CLR_BIT:
13369 *gpreg &= 0xfe;
13370 break;
13371 case SET_CLK:
13372 *gpreg |= 0x02;
13373 break;
13374 case CLR_CLK:
13375 *gpreg &= 0xfd;
13376 break;
13377
13378 }
13379 OUTB (nc_gpreg, *gpreg);
13380 UDELAY (5);
13381 }
13382
13383 /*
13384 * Send START condition to NVRAM to wake it up.
13385 */
13386 static void __init S24C16_start(ncr_slot *np, u_char *gpreg)
13387 {
13388 S24C16_set_bit(np, 1, gpreg, SET_BIT);
13389 S24C16_set_bit(np, 0, gpreg, SET_CLK);
13390 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
13391 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
13392 }
13393
13394 /*
13395 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZzzzz!!
13396 */
13397 static void __init S24C16_stop(ncr_slot *np, u_char *gpreg)
13398 {
13399 S24C16_set_bit(np, 0, gpreg, SET_CLK);
13400 S24C16_set_bit(np, 1, gpreg, SET_BIT);
13401 }
13402
13403 /*
13404 * Read or write a bit to the NVRAM,
13405 * read if GPIO0 input else write if GPIO0 output
13406 */
13407 static void __init
13408 S24C16_do_bit(ncr_slot *np, u_char *read_bit, u_char write_bit, u_char *gpreg)
13409 {
13410 S24C16_set_bit(np, write_bit, gpreg, SET_BIT);
13411 S24C16_set_bit(np, 0, gpreg, SET_CLK);
13412 if (read_bit)
13413 *read_bit = INB (nc_gpreg);
13414 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
13415 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
13416 }
13417
13418 /*
13419 * Output an ACK to the NVRAM after reading,
13420 * change GPIO0 to output and when done back to an input
13421 */
13422 static void __init
13423 S24C16_write_ack(ncr_slot *np, u_char write_bit, u_char *gpreg, u_char *gpcntl)
13424 {
13425 OUTB (nc_gpcntl, *gpcntl & 0xfe);
13426 S24C16_do_bit(np, 0, write_bit, gpreg);
13427 OUTB (nc_gpcntl, *gpcntl);
13428 }
13429
13430 /*
13431 * Input an ACK from NVRAM after writing,
13432 * change GPIO0 to input and when done back to an output
13433 */
13434 static void __init
13435 S24C16_read_ack(ncr_slot *np, u_char *read_bit, u_char *gpreg, u_char *gpcntl)
13436 {
13437 OUTB (nc_gpcntl, *gpcntl | 0x01);
13438 S24C16_do_bit(np, read_bit, 1, gpreg);
13439 OUTB (nc_gpcntl, *gpcntl);
13440 }
13441
13442 /*
13443 * WRITE a byte to the NVRAM and then get an ACK to see it was accepted OK,
13444 * GPIO0 must already be set as an output
13445 */
13446 static void __init
13447 S24C16_write_byte(ncr_slot *np, u_char *ack_data, u_char write_data,
13448 u_char *gpreg, u_char *gpcntl)
13449 {
13450 int x;
13451
13452 for (x = 0; x < 8; x++)
13453 S24C16_do_bit(np, 0, (write_data >> (7 - x)) & 0x01, gpreg);
13454
13455 S24C16_read_ack(np, ack_data, gpreg, gpcntl);
13456 }
13457
13458 /*
13459 * READ a byte from the NVRAM and then send an ACK to say we have got it,
13460 * GPIO0 must already be set as an input
13461 */
13462 static void __init
13463 S24C16_read_byte(ncr_slot *np, u_char *read_data, u_char ack_data,
13464 u_char *gpreg, u_char *gpcntl)
13465 {
13466 int x;
13467 u_char read_bit;
13468
13469 *read_data = 0;
13470 for (x = 0; x < 8; x++) {
13471 S24C16_do_bit(np, &read_bit, 1, gpreg);
13472 *read_data |= ((read_bit & 0x01) << (7 - x));
13473 }
13474
13475 S24C16_write_ack(np, ack_data, gpreg, gpcntl);
13476 }
13477
13478 /*
13479 * Read 'len' bytes starting at 'offset'.
13480 */
13481 static int __init
13482 sym_read_S24C16_nvram (ncr_slot *np, int offset, u_char *data, int len)
13483 {
13484 u_char gpcntl, gpreg;
13485 u_char old_gpcntl, old_gpreg;
13486 u_char ack_data;
13487 int retv = 1;
13488 int x;
13489
13490 /* save current state of GPCNTL and GPREG */
13491 old_gpreg = INB (nc_gpreg);
13492 old_gpcntl = INB (nc_gpcntl);
13493 gpcntl = old_gpcntl & 0xfc;
13494
13495 /* set up GPREG & GPCNTL to set GPIO0 and GPIO1 in to known state */
13496 OUTB (nc_gpreg, old_gpreg);
13497 OUTB (nc_gpcntl, gpcntl);
13498
13499 /* this is to set NVRAM into a known state with GPIO0/1 both low */
13500 gpreg = old_gpreg;
13501 S24C16_set_bit(np, 0, &gpreg, CLR_CLK);
13502 S24C16_set_bit(np, 0, &gpreg, CLR_BIT);
13503
13504 /* now set NVRAM inactive with GPIO0/1 both high */
13505 S24C16_stop(np, &gpreg);
13506
13507 /* activate NVRAM */
13508 S24C16_start(np, &gpreg);
13509
13510 /* write device code and random address MSB */
13511 S24C16_write_byte(np, &ack_data,
13512 0xa0 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
13513 if (ack_data & 0x01)
13514 goto out;
13515
13516 /* write random address LSB */
13517 S24C16_write_byte(np, &ack_data,
13518 offset & 0xff, &gpreg, &gpcntl);
13519 if (ack_data & 0x01)
13520 goto out;
13521
13522 /* regenerate START state to set up for reading */
13523 S24C16_start(np, &gpreg);
13524
13525 /* rewrite device code and address MSB with read bit set (lsb = 0x01) */
13526 S24C16_write_byte(np, &ack_data,
13527 0xa1 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
13528 if (ack_data & 0x01)
13529 goto out;
13530
13531 /* now set up GPIO0 for inputting data */
13532 gpcntl |= 0x01;
13533 OUTB (nc_gpcntl, gpcntl);
13534
13535 /* input all requested data - only part of total NVRAM */
13536 for (x = 0; x < len; x++)
13537 S24C16_read_byte(np, &data[x], (x == (len-1)), &gpreg, &gpcntl);
13538
13539 /* finally put NVRAM back in inactive mode */
13540 gpcntl &= 0xfe;
13541 OUTB (nc_gpcntl, gpcntl);
13542 S24C16_stop(np, &gpreg);
13543 retv = 0;
13544 out:
13545 /* return GPIO0/1 to original states after having accessed NVRAM */
13546 OUTB (nc_gpcntl, old_gpcntl);
13547 OUTB (nc_gpreg, old_gpreg);
13548
13549 return retv;
13550 }
13551
13552 #undef SET_BIT 0
13553 #undef CLR_BIT 1
13554 #undef SET_CLK 2
13555 #undef CLR_CLK 3
13556
13557 /*
13558 * Try reading Symbios NVRAM.
13559 * Return 0 if OK.
13560 */
13561 static int __init sym_read_Symbios_nvram (ncr_slot *np, Symbios_nvram *nvram)
13562 {
13563 static u_char Symbios_trailer[6] = {0xfe, 0xfe, 0, 0, 0, 0};
13564 u_char *data = (u_char *) nvram;
13565 int len = sizeof(*nvram);
13566 u_short csum;
13567 int x;
13568
13569 /* probe the 24c16 and read the SYMBIOS 24c16 area */
13570 if (sym_read_S24C16_nvram (np, SYMBIOS_NVRAM_ADDRESS, data, len))
13571 return 1;
13572
13573 /* check valid NVRAM signature, verify byte count and checksum */
13574 if (nvram->type != 0 ||
13575 memcmp(nvram->trailer, Symbios_trailer, 6) ||
13576 nvram->byte_count != len - 12)
13577 return 1;
13578
13579 /* verify checksum */
13580 for (x = 6, csum = 0; x < len - 6; x++)
13581 csum += data[x];
13582 if (csum != nvram->checksum)
13583 return 1;
13584
13585 return 0;
13586 }
13587
13588 /*
13589 * 93C46 EEPROM reading.
13590 *
13591 * GPOI0 - data in
13592 * GPIO1 - data out
13593 * GPIO2 - clock
13594 * GPIO4 - chip select
13595 *
13596 * Used by Tekram.
13597 */
13598
13599 /*
13600 * Pulse clock bit in GPIO0
13601 */
13602 static void __init T93C46_Clk(ncr_slot *np, u_char *gpreg)
13603 {
13604 OUTB (nc_gpreg, *gpreg | 0x04);
13605 UDELAY (2);
13606 OUTB (nc_gpreg, *gpreg);
13607 }
13608
13609 /*
13610 * Read bit from NVRAM
13611 */
13612 static void __init T93C46_Read_Bit(ncr_slot *np, u_char *read_bit, u_char *gpreg)
13613 {
13614 UDELAY (2);
13615 T93C46_Clk(np, gpreg);
13616 *read_bit = INB (nc_gpreg);
13617 }
13618
13619 /*
13620 * Write bit to GPIO0
13621 */
13622 static void __init T93C46_Write_Bit(ncr_slot *np, u_char write_bit, u_char *gpreg)
13623 {
13624 if (write_bit & 0x01)
13625 *gpreg |= 0x02;
13626 else
13627 *gpreg &= 0xfd;
13628
13629 *gpreg |= 0x10;
13630
13631 OUTB (nc_gpreg, *gpreg);
13632 UDELAY (2);
13633
13634 T93C46_Clk(np, gpreg);
13635 }
13636
13637 /*
13638 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZZzzz!!
13639 */
13640 static void __init T93C46_Stop(ncr_slot *np, u_char *gpreg)
13641 {
13642 *gpreg &= 0xef;
13643 OUTB (nc_gpreg, *gpreg);
13644 UDELAY (2);
13645
13646 T93C46_Clk(np, gpreg);
13647 }
13648
13649 /*
13650 * Send read command and address to NVRAM
13651 */
13652 static void __init
13653 T93C46_Send_Command(ncr_slot *np, u_short write_data,
13654 u_char *read_bit, u_char *gpreg)
13655 {
13656 int x;
13657
13658 /* send 9 bits, start bit (1), command (2), address (6) */
13659 for (x = 0; x < 9; x++)
13660 T93C46_Write_Bit(np, (u_char) (write_data >> (8 - x)), gpreg);
13661
13662 *read_bit = INB (nc_gpreg);
13663 }
13664
13665 /*
13666 * READ 2 bytes from the NVRAM
13667 */
13668 static void __init
13669 T93C46_Read_Word(ncr_slot *np, u_short *nvram_data, u_char *gpreg)
13670 {
13671 int x;
13672 u_char read_bit;
13673
13674 *nvram_data = 0;
13675 for (x = 0; x < 16; x++) {
13676 T93C46_Read_Bit(np, &read_bit, gpreg);
13677
13678 if (read_bit & 0x01)
13679 *nvram_data |= (0x01 << (15 - x));
13680 else
13681 *nvram_data &= ~(0x01 << (15 - x));
13682 }
13683 }
13684
13685 /*
13686 * Read Tekram NvRAM data.
13687 */
13688 static int __init
13689 T93C46_Read_Data(ncr_slot *np, u_short *data,int len,u_char *gpreg)
13690 {
13691 u_char read_bit;
13692 int x;
13693
13694 for (x = 0; x < len; x++) {
13695
13696 /* output read command and address */
13697 T93C46_Send_Command(np, 0x180 | x, &read_bit, gpreg);
13698 if (read_bit & 0x01)
13699 return 1; /* Bad */
13700 T93C46_Read_Word(np, &data[x], gpreg);
13701 T93C46_Stop(np, gpreg);
13702 }
13703
13704 return 0;
13705 }
13706
13707 /*
13708 * Try reading 93C46 Tekram NVRAM.
13709 */
13710 static int __init
13711 sym_read_T93C46_nvram (ncr_slot *np, Tekram_nvram *nvram)
13712 {
13713 u_char gpcntl, gpreg;
13714 u_char old_gpcntl, old_gpreg;
13715 int retv = 1;
13716
13717 /* save current state of GPCNTL and GPREG */
13718 old_gpreg = INB (nc_gpreg);
13719 old_gpcntl = INB (nc_gpcntl);
13720
13721 /* set up GPREG & GPCNTL to set GPIO0/1/2/4 in to known state, 0 in,
13722 1/2/4 out */
13723 gpreg = old_gpreg & 0xe9;
13724 OUTB (nc_gpreg, gpreg);
13725 gpcntl = (old_gpcntl & 0xe9) | 0x09;
13726 OUTB (nc_gpcntl, gpcntl);
13727
13728 /* input all of NVRAM, 64 words */
13729 retv = T93C46_Read_Data(np, (u_short *) nvram,
13730 sizeof(*nvram) / sizeof(short), &gpreg);
13731
13732 /* return GPIO0/1/2/4 to original states after having accessed NVRAM */
13733 OUTB (nc_gpcntl, old_gpcntl);
13734 OUTB (nc_gpreg, old_gpreg);
13735
13736 return retv;
13737 }
13738
13739 /*
13740 * Try reading Tekram NVRAM.
13741 * Return 0 if OK.
13742 */
13743 static int __init
13744 sym_read_Tekram_nvram (ncr_slot *np, u_short device_id, Tekram_nvram *nvram)
13745 {
13746 u_char *data = (u_char *) nvram;
13747 int len = sizeof(*nvram);
13748 u_short csum;
13749 int x;
13750
13751 switch (device_id) {
13752 case PCI_DEVICE_ID_NCR_53C885:
13753 case PCI_DEVICE_ID_NCR_53C895:
13754 case PCI_DEVICE_ID_NCR_53C896:
13755 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
13756 data, len);
13757 break;
13758 case PCI_DEVICE_ID_NCR_53C875:
13759 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
13760 data, len);
13761 if (!x)
13762 break;
13763 default:
13764 x = sym_read_T93C46_nvram(np, nvram);
13765 break;
13766 }
13767 if (x)
13768 return 1;
13769
13770 /* verify checksum */
13771 for (x = 0, csum = 0; x < len - 1; x += 2)
13772 csum += data[x] + (data[x+1] << 8);
13773 if (csum != 0x1234)
13774 return 1;
13775
13776 return 0;
13777 }
13778
13779 #endif /* SCSI_NCR_NVRAM_SUPPORT */
13780
13781 /*
13782 ** Module stuff
13783 */
13784
13785 #ifdef MODULE
13786 Scsi_Host_Template driver_template = SYM53C8XX;
13787 #include "scsi_module.c"
13788 #endif
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