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Get rid of arch/mips64/kernel. 9116 lines of code gone.
[linux-2.6/linux-mips.git] / sound / oss / cmpci.c
blobaabfecd7413fc4cc1877c9deb0c6f3e96bb887d0
1 /*****************************************************************************/
2 /*
3 * cmpci.c -- C-Media PCI audio driver.
4 *
5 * Copyright (C) 1999 ChenLi Tien (cltien@cmedia.com.tw)
6 * C-media support (support@cmedia.com.tw)
7 *
8 * Based on the PCI drivers by Thomas Sailer (sailer@ife.ee.ethz.ch)
9 *
10 * For update, visit:
11 * http://members.home.net/puresoft/cmedia.html
12 * http://www.cmedia.com.tw
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 *
28 * Special thanks to David C. Niemi, Jan Pfeifer
29 *
30 *
31 * Module command line parameters:
32 * none so far
33 *
34 *
35 * Supported devices:
36 * /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
37 * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
38 * /dev/midi simple MIDI UART interface, no ioctl
39 *
40 * The card has both an FM and a Wavetable synth, but I have to figure
41 * out first how to drive them...
42 *
43 * Revision history
44 * 06.05.98 0.1 Initial release
45 * 10.05.98 0.2 Fixed many bugs, esp. ADC rate calculation
46 * First stab at a simple midi interface (no bells&whistles)
47 * 13.05.98 0.3 Fix stupid cut&paste error: set_adc_rate was called instead of
48 * set_dac_rate in the FMODE_WRITE case in cm_open
49 * Fix hwptr out of bounds (now mpg123 works)
50 * 14.05.98 0.4 Don't allow excessive interrupt rates
51 * 08.06.98 0.5 First release using Alan Cox' soundcore instead of miscdevice
52 * 03.08.98 0.6 Do not include modversions.h
53 * Now mixer behaviour can basically be selected between
54 * "OSS documented" and "OSS actual" behaviour
55 * 31.08.98 0.7 Fix realplayer problems - dac.count issues
56 * 10.12.98 0.8 Fix drain_dac trying to wait on not yet initialized DMA
57 * 16.12.98 0.9 Fix a few f_file & FMODE_ bugs
58 * 06.01.99 0.10 remove the silly SA_INTERRUPT flag.
59 * hopefully killed the egcs section type conflict
60 * 12.03.99 0.11 cinfo.blocks should be reset after GETxPTR ioctl.
61 * reported by Johan Maes <joma@telindus.be>
62 * 22.03.99 0.12 return EAGAIN instead of EBUSY when O_NONBLOCK
63 * read/write cannot be executed
64 * 18.08.99 1.5 Only deallocate DMA buffer when unloading.
65 * 02.09.99 1.6 Enable SPDIF LOOP
66 * Change the mixer read back
67 * 21.09.99 2.33 Use RCS version as driver version.
68 * Add support for modem, S/PDIF loop and 4 channels.
69 * (8738 only)
70 * Fix bug cause x11amp cannot play.
71 *
72 * Fixes:
73 * Arnaldo Carvalho de Melo <acme@conectiva.com.br>
74 * 18/05/2001 - .bss nitpicks, fix a bug in set_dac_channels where it
75 * was calling prog_dmabuf with s->lock held, call missing
76 * unlock_kernel in cm_midi_release
77 * 08/10/2001 - use set_current_state in some more places
78 *
79 * Carlos Eduardo Gorges <carlos@techlinux.com.br>
80 * Fri May 25 2001
81 * - SMP support ( spin[un]lock* revision )
82 * - speaker mixer support
83 * Mon Aug 13 2001
84 * - optimizations and cleanups
85 * 03/01/2003 - open_mode fixes from Georg Acher <acher@in.tum.de>
86 *
87 */
88 /*****************************************************************************/
89
90 #include <linux/config.h>
91 #include <linux/module.h>
92 #include <linux/string.h>
93 #include <linux/interrupt.h>
94 #include <linux/ioport.h>
95 #include <linux/sched.h>
96 #include <linux/delay.h>
97 #include <linux/sound.h>
98 #include <linux/slab.h>
99 #include <linux/soundcard.h>
100 #include <linux/pci.h>
101 #include <linux/init.h>
102 #include <linux/poll.h>
103 #include <linux/spinlock.h>
104 #include <linux/smp_lock.h>
105 #include <linux/bitops.h>
106 #include <linux/wait.h>
107
108 #include <asm/io.h>
109 #include <asm/page.h>
110 #include <asm/uaccess.h>
111
112 #include "dm.h"
113
114 /* --------------------------------------------------------------------- */
115 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
116 #undef DMABYTEIO
117 /* --------------------------------------------------------------------- */
118
119 #define CM_MAGIC ((PCI_VENDOR_ID_CMEDIA<<16)|PCI_DEVICE_ID_CMEDIA_CM8338A)
120
121 /* CM8338 registers definition ****************/
122
123 #define CODEC_CMI_FUNCTRL0 (0x00)
124 #define CODEC_CMI_FUNCTRL1 (0x04)
125 #define CODEC_CMI_CHFORMAT (0x08)
126 #define CODEC_CMI_INT_HLDCLR (0x0C)
127 #define CODEC_CMI_INT_STATUS (0x10)
128 #define CODEC_CMI_LEGACY_CTRL (0x14)
129 #define CODEC_CMI_MISC_CTRL (0x18)
130 #define CODEC_CMI_TDMA_POS (0x1C)
131 #define CODEC_CMI_MIXER (0x20)
132 #define CODEC_SB16_DATA (0x22)
133 #define CODEC_SB16_ADDR (0x23)
134 #define CODEC_CMI_MIXER1 (0x24)
135 #define CODEC_CMI_MIXER2 (0x25)
136 #define CODEC_CMI_AUX_VOL (0x26)
137 #define CODEC_CMI_MISC (0x27)
138 #define CODEC_CMI_AC97 (0x28)
139
140 #define CODEC_CMI_CH0_FRAME1 (0x80)
141 #define CODEC_CMI_CH0_FRAME2 (0x84)
142 #define CODEC_CMI_CH1_FRAME1 (0x88)
143 #define CODEC_CMI_CH1_FRAME2 (0x8C)
144
145 #define CODEC_CMI_EXT_REG (0xF0)
146
147 /* Mixer registers for SB16 ******************/
148
149 #define DSP_MIX_DATARESETIDX ((unsigned char)(0x00))
150
151 #define DSP_MIX_MASTERVOLIDX_L ((unsigned char)(0x30))
152 #define DSP_MIX_MASTERVOLIDX_R ((unsigned char)(0x31))
153 #define DSP_MIX_VOICEVOLIDX_L ((unsigned char)(0x32))
154 #define DSP_MIX_VOICEVOLIDX_R ((unsigned char)(0x33))
155 #define DSP_MIX_FMVOLIDX_L ((unsigned char)(0x34))
156 #define DSP_MIX_FMVOLIDX_R ((unsigned char)(0x35))
157 #define DSP_MIX_CDVOLIDX_L ((unsigned char)(0x36))
158 #define DSP_MIX_CDVOLIDX_R ((unsigned char)(0x37))
159 #define DSP_MIX_LINEVOLIDX_L ((unsigned char)(0x38))
160 #define DSP_MIX_LINEVOLIDX_R ((unsigned char)(0x39))
161
162 #define DSP_MIX_MICVOLIDX ((unsigned char)(0x3A))
163 #define DSP_MIX_SPKRVOLIDX ((unsigned char)(0x3B))
164
165 #define DSP_MIX_OUTMIXIDX ((unsigned char)(0x3C))
166
167 #define DSP_MIX_ADCMIXIDX_L ((unsigned char)(0x3D))
168 #define DSP_MIX_ADCMIXIDX_R ((unsigned char)(0x3E))
169
170 #define DSP_MIX_INGAINIDX_L ((unsigned char)(0x3F))
171 #define DSP_MIX_INGAINIDX_R ((unsigned char)(0x40))
172 #define DSP_MIX_OUTGAINIDX_L ((unsigned char)(0x41))
173 #define DSP_MIX_OUTGAINIDX_R ((unsigned char)(0x42))
174
175 #define DSP_MIX_AGCIDX ((unsigned char)(0x43))
176
177 #define DSP_MIX_TREBLEIDX_L ((unsigned char)(0x44))
178 #define DSP_MIX_TREBLEIDX_R ((unsigned char)(0x45))
179 #define DSP_MIX_BASSIDX_L ((unsigned char)(0x46))
180 #define DSP_MIX_BASSIDX_R ((unsigned char)(0x47))
181
182 #define CM_CH0_RESET 0x04
183 #define CM_CH1_RESET 0x08
184 #define CM_EXTENT_CODEC 0x100
185 #define CM_EXTENT_MIDI 0x2
186 #define CM_EXTENT_SYNTH 0x4
187 #define CM_INT_CH0 1
188 #define CM_INT_CH1 2
189
190 #define CM_CFMT_STEREO 0x01
191 #define CM_CFMT_16BIT 0x02
192 #define CM_CFMT_MASK 0x03
193 #define CM_CFMT_DACSHIFT 2
194 #define CM_CFMT_ADCSHIFT 0
195
196 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
197
198 #define CM_ENABLE_CH1 0x2
199 #define CM_ENABLE_CH0 0x1
200
201 /* MIDI buffer sizes **************************/
202
203 #define MIDIINBUF 256
204 #define MIDIOUTBUF 256
205
206 #define FMODE_MIDI_SHIFT 2
207 #define FMODE_MIDI_READ (FMODE_READ << FMODE_MIDI_SHIFT)
208 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
209
210 #define FMODE_DMFM 0x10
211
212 #define SND_DEV_DSP16 5
213
214 #define NR_DEVICE 3 /* maximum number of devices */
215
216 /*********************************************/
217
218 struct cm_state {
219 unsigned int magic; /* magic */
220 struct cm_state *next; /* we keep cm cards in a linked list */
221
222 int dev_audio; /* soundcore stuff */
223 int dev_mixer;
224 int dev_midi;
225 int dev_dmfm;
226
227 unsigned int iosb, iobase, iosynth,
228 iomidi, iogame, irq; /* hardware resources */
229 unsigned short deviceid; /* pci_id */
230
231 struct { /* mixer stuff */
232 unsigned int modcnt;
233 unsigned short vol[13];
234 } mix;
235
236 unsigned int rateadc, ratedac; /* wave stuff */
237 unsigned char fmt, enable;
238
239 spinlock_t lock;
240 struct semaphore open_sem;
241 mode_t open_mode;
242 wait_queue_head_t open_wait;
243
244 struct dmabuf {
245 void *rawbuf;
246 unsigned rawphys;
247 unsigned buforder;
248 unsigned numfrag;
249 unsigned fragshift;
250 unsigned hwptr, swptr;
251 unsigned total_bytes;
252 int count;
253 unsigned error; /* over/underrun */
254 wait_queue_head_t wait;
255
256 unsigned fragsize; /* redundant, but makes calculations easier */
257 unsigned dmasize;
258 unsigned fragsamples;
259 unsigned dmasamples;
260
261 unsigned mapped:1; /* OSS stuff */
262 unsigned ready:1;
263 unsigned endcleared:1;
264 unsigned ossfragshift;
265 int ossmaxfrags;
266 unsigned subdivision;
267 } dma_dac, dma_adc;
268
269 struct { /* midi stuff */
270 unsigned ird, iwr, icnt;
271 unsigned ord, owr, ocnt;
272 wait_queue_head_t iwait;
273 wait_queue_head_t owait;
274 struct timer_list timer;
275 unsigned char ibuf[MIDIINBUF];
276 unsigned char obuf[MIDIOUTBUF];
277 } midi;
278
279 int chip_version;
280 int max_channels;
281 int curr_channels;
282 int speakers; /* number of speakers */
283 int capability; /* HW capability, various for chip versions */
284
285 int status; /* HW or SW state */
286
287 int spdif_counter; /* spdif frame counter */
288 };
289
290 /* flags used for capability */
291 #define CAN_AC3_HW 0x00000001 /* 037 or later */
292 #define CAN_AC3_SW 0x00000002 /* 033 or later */
293 #define CAN_AC3 (CAN_AC3_HW | CAN_AC3_SW)
294 #define CAN_DUAL_DAC 0x00000004 /* 033 or later */
295 #define CAN_MULTI_CH_HW 0x00000008 /* 039 or later */
296 #define CAN_MULTI_CH (CAN_MULTI_CH_HW | CAN_DUAL_DAC)
297 #define CAN_LINE_AS_REAR 0x00000010 /* 033 or later */
298 #define CAN_LINE_AS_BASS 0x00000020 /* 039 or later */
299 #define CAN_MIC_AS_BASS 0x00000040 /* 039 or later */
300
301 /* flags used for status */
302 #define DO_AC3_HW 0x00000001
303 #define DO_AC3_SW 0x00000002
304 #define DO_AC3 (DO_AC3_HW | DO_AC3_SW)
305 #define DO_DUAL_DAC 0x00000004
306 #define DO_MULTI_CH_HW 0x00000008
307 #define DO_MULTI_CH (DO_MULTI_CH_HW | DO_DUAL_DAC)
308 #define DO_LINE_AS_REAR 0x00000010 /* 033 or later */
309 #define DO_LINE_AS_BASS 0x00000020 /* 039 or later */
310 #define DO_MIC_AS_BASS 0x00000040 /* 039 or later */
311 #define DO_SPDIF_OUT 0x00000100
312 #define DO_SPDIF_IN 0x00000200
313 #define DO_SPDIF_LOOP 0x00000400
314
315 static struct cm_state *devs;
316 static unsigned long wavetable_mem;
317
318 /* --------------------------------------------------------------------- */
319
320 static inline unsigned ld2(unsigned int x)
321 {
322 unsigned exp=16,l=5,r=0;
323 static const unsigned num[]={0x2,0x4,0x10,0x100,0x10000};
324
325 /* num: 2, 4, 16, 256, 65536 */
326 /* exp: 1, 2, 4, 8, 16 */
327
328 while(l--) {
329 if( x >= num[l] ) {
330 if(num[l]>2) x >>= exp;
331 r+=exp;
332 }
333 exp>>=1;
334 }
335
336 return r;
337 }
338
339 /* --------------------------------------------------------------------- */
340
341 static void maskb(unsigned int addr, unsigned int mask, unsigned int value)
342 {
343 outb((inb(addr) & mask) | value, addr);
344 }
345
346 static void maskw(unsigned int addr, unsigned int mask, unsigned int value)
347 {
348 outw((inw(addr) & mask) | value, addr);
349 }
350
351 static void maskl(unsigned int addr, unsigned int mask, unsigned int value)
352 {
353 outl((inl(addr) & mask) | value, addr);
354 }
355
356 static void set_dmadac1(struct cm_state *s, unsigned int addr, unsigned int count)
357 {
358 if (addr)
359 outl(addr, s->iobase + CODEC_CMI_CH0_FRAME1);
360 outw(count - 1, s->iobase + CODEC_CMI_CH0_FRAME2);
361 maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~1, 0);
362 }
363
364 static void set_dmaadc(struct cm_state *s, unsigned int addr, unsigned int count)
365 {
366 outl(addr, s->iobase + CODEC_CMI_CH0_FRAME1);
367 outw(count - 1, s->iobase + CODEC_CMI_CH0_FRAME2);
368 maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~0, 1);
369 }
370
371 static void set_dmadac(struct cm_state *s, unsigned int addr, unsigned int count)
372 {
373 outl(addr, s->iobase + CODEC_CMI_CH1_FRAME1);
374 outw(count - 1, s->iobase + CODEC_CMI_CH1_FRAME2);
375 maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~2, 0);
376 if (s->status & DO_DUAL_DAC)
377 set_dmadac1(s, 0, count);
378 }
379
380 static void set_countadc(struct cm_state *s, unsigned count)
381 {
382 outw(count - 1, s->iobase + CODEC_CMI_CH0_FRAME2 + 2);
383 }
384
385 static void set_countdac(struct cm_state *s, unsigned count)
386 {
387 outw(count - 1, s->iobase + CODEC_CMI_CH1_FRAME2 + 2);
388 if (s->status & DO_DUAL_DAC)
389 set_countadc(s, count);
390 }
391
392 static inline unsigned get_dmadac(struct cm_state *s)
393 {
394 unsigned int curr_addr;
395
396 curr_addr = inw(s->iobase + CODEC_CMI_CH1_FRAME2) + 1;
397 curr_addr <<= sample_shift[(s->fmt >> CM_CFMT_DACSHIFT) & CM_CFMT_MASK];
398 curr_addr = s->dma_dac.dmasize - curr_addr;
399
400 return curr_addr;
401 }
402
403 static inline unsigned get_dmaadc(struct cm_state *s)
404 {
405 unsigned int curr_addr;
406
407 curr_addr = inw(s->iobase + CODEC_CMI_CH0_FRAME2) + 1;
408 curr_addr <<= sample_shift[(s->fmt >> CM_CFMT_ADCSHIFT) & CM_CFMT_MASK];
409 curr_addr = s->dma_adc.dmasize - curr_addr;
410
411 return curr_addr;
412 }
413
414 static void wrmixer(struct cm_state *s, unsigned char idx, unsigned char data)
415 {
416 outb(idx, s->iobase + CODEC_SB16_ADDR);
417 udelay(10);
418 outb(data, s->iobase + CODEC_SB16_DATA);
419 udelay(10);
420 }
421
422 static unsigned char rdmixer(struct cm_state *s, unsigned char idx)
423 {
424 unsigned char v;
425 unsigned long flags;
426
427 spin_lock_irqsave(&s->lock, flags);
428 outb(idx, s->iobase + CODEC_SB16_ADDR);
429 udelay(10);
430 v = inb(s->iobase + CODEC_SB16_DATA);
431 udelay(10);
432 spin_unlock_irqrestore(&s->lock, flags);
433 return v;
434 }
435
436 static void set_fmt_unlocked(struct cm_state *s, unsigned char mask, unsigned char data)
437 {
438 if (mask)
439 {
440 s->fmt = inb(s->iobase + CODEC_CMI_CHFORMAT);
441 udelay(10);
442 }
443 s->fmt = (s->fmt & mask) | data;
444 outb(s->fmt, s->iobase + CODEC_CMI_CHFORMAT);
445 udelay(10);
446 }
447
448 static void set_fmt(struct cm_state *s, unsigned char mask, unsigned char data)
449 {
450 unsigned long flags;
451
452 spin_lock_irqsave(&s->lock, flags);
453 set_fmt_unlocked(s,mask,data);
454 spin_unlock_irqrestore(&s->lock, flags);
455 }
456
457 static void frobindir(struct cm_state *s, unsigned char idx, unsigned char mask, unsigned char data)
458 {
459 outb(idx, s->iobase + CODEC_SB16_ADDR);
460 udelay(10);
461 outb((inb(s->iobase + CODEC_SB16_DATA) & mask) | data, s->iobase + CODEC_SB16_DATA);
462 udelay(10);
463 }
464
465 static struct {
466 unsigned rate;
467 unsigned lower;
468 unsigned upper;
469 unsigned char freq;
470 } rate_lookup[] =
471 {
472 { 5512, (0 + 5512) / 2, (5512 + 8000) / 2, 0 },
473 { 8000, (5512 + 8000) / 2, (8000 + 11025) / 2, 4 },
474 { 11025, (8000 + 11025) / 2, (11025 + 16000) / 2, 1 },
475 { 16000, (11025 + 16000) / 2, (16000 + 22050) / 2, 5 },
476 { 22050, (16000 + 22050) / 2, (22050 + 32000) / 2, 2 },
477 { 32000, (22050 + 32000) / 2, (32000 + 44100) / 2, 6 },
478 { 44100, (32000 + 44100) / 2, (44100 + 48000) / 2, 3 },
479 { 48000, (44100 + 48000) / 2, 48000, 7 }
480 };
481
482 static void set_spdifout_unlocked(struct cm_state *s, unsigned rate)
483 {
484 if (rate == 48000 || rate == 44100) {
485 // SPDIFI48K SPDF_ACc97
486 maskl(s->iobase + CODEC_CMI_MISC_CTRL, ~0x01008000, rate == 48000 ? 0x01008000 : 0);
487 // ENSPDOUT
488 maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 2, ~0, 0x80);
489 // SPDF_1 SPD2DAC
490 maskw(s->iobase + CODEC_CMI_FUNCTRL1, ~0, 0x240);
491 // CDPLAY
492 if (s->chip_version >= 39)
493 maskb(s->iobase + CODEC_CMI_MIXER1, ~0, 1);
494 s->status |= DO_SPDIF_OUT;
495 } else {
496 maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 2, ~0x80, 0);
497 maskw(s->iobase + CODEC_CMI_FUNCTRL1, ~0x240, 0);
498 if (s->chip_version >= 39)
499 maskb(s->iobase + CODEC_CMI_MIXER1, ~1, 0);
500 s->status &= ~DO_SPDIF_OUT;
501 }
502 }
503
504 static void set_spdifout(struct cm_state *s, unsigned rate)
505 {
506 unsigned long flags;
507
508 spin_lock_irqsave(&s->lock, flags);
509 set_spdifout_unlocked(s,rate);
510 spin_unlock_irqrestore(&s->lock, flags);
511 }
512
513 /* find parity for bit 4~30 */
514 static unsigned parity(unsigned data)
515 {
516 unsigned parity = 0;
517 int counter = 4;
518
519 data >>= 4; // start from bit 4
520 while (counter <= 30) {
521 if (data & 1)
522 parity++;
523 data >>= 1;
524 counter++;
525 }
526 return parity & 1;
527 }
528
529 static void set_ac3_unlocked(struct cm_state *s, unsigned rate)
530 {
531 /* enable AC3 */
532 if (rate == 48000 || rate == 44100) {
533 // mute DAC
534 maskb(s->iobase + CODEC_CMI_MIXER1, ~0, 0x40);
535 // AC3EN for 037, 0x10
536 maskb(s->iobase + CODEC_CMI_CHFORMAT + 2, ~0, 0x10);
537 // AC3EN for 039, 0x04
538 maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~0, 0x04);
539 if (s->capability & CAN_AC3_HW) {
540 // SPD24SEL for 037, 0x02
541 // SPD24SEL for 039, 0x20, but cannot be set
542 maskb(s->iobase + CODEC_CMI_CHFORMAT + 2, ~0, 0x02);
543 s->status |= DO_AC3_HW;
544 if (s->chip_version >= 39)
545 maskb(s->iobase + CODEC_CMI_MIXER1, ~1, 0);
546 } else {
547 // SPD32SEL for 037 & 039, 0x20
548 maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~0, 0x20);
549 // set 176K sample rate to fix 033 HW bug
550 if (s->chip_version == 33) {
551 if (rate == 48000)
552 maskb(s->iobase + CODEC_CMI_CHFORMAT + 1, ~0, 0x08);
553 else
554 maskb(s->iobase + CODEC_CMI_CHFORMAT + 1, ~0x08, 0);
555 }
556 s->status |= DO_AC3_SW;
557 }
558 } else {
559 maskb(s->iobase + CODEC_CMI_MIXER1, ~0x40, 0);
560 maskb(s->iobase + CODEC_CMI_CHFORMAT + 2, ~0x32, 0);
561 maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~0x24, 0);
562 maskb(s->iobase + CODEC_CMI_CHFORMAT + 1, ~0x08, 0);
563 if (s->chip_version == 33)
564 maskb(s->iobase + CODEC_CMI_CHFORMAT + 1, ~0x08, 0);
565 if (s->chip_version >= 39)
566 maskb(s->iobase + CODEC_CMI_MIXER1, ~0, 1);
567 s->status &= ~DO_AC3;
568 }
569 s->spdif_counter = 0;
570
571 }
572
573 static void set_ac3(struct cm_state *s, unsigned rate)
574 {
575 unsigned long flags;
576
577 spin_lock_irqsave(&s->lock, flags);
578 set_spdifout_unlocked(s, rate);
579 set_ac3_unlocked(s,rate);
580 spin_unlock_irqrestore(&s->lock, flags);
581 }
582
583 static int trans_ac3(struct cm_state *s, void *dest, const char *source, int size)
584 {
585 int i = size / 2;
586 int err;
587 unsigned long data;
588 unsigned long *dst = (unsigned long *) dest;
589 unsigned short *src = (unsigned short *)source;
590
591 do {
592 if ((err = __get_user(data, src++)))
593 return err;
594 data <<= 12; // ok for 16-bit data
595 if (s->spdif_counter == 2 || s->spdif_counter == 3)
596 data |= 0x40000000; // indicate AC-3 raw data
597 if (parity(data))
598 data |= 0x80000000; // parity
599 if (s->spdif_counter == 0)
600 data |= 3; // preamble 'M'
601 else if (s->spdif_counter & 1)
602 data |= 5; // odd, 'W'
603 else
604 data |= 9; // even, 'M'
605 *dst++ = data;
606 s->spdif_counter++;
607 if (s->spdif_counter == 384)
608 s->spdif_counter = 0;
609 } while (--i);
610
611 return 0;
612 }
613
614 static void set_adc_rate_unlocked(struct cm_state *s, unsigned rate)
615 {
616 unsigned char freq = 4;
617 int i;
618
619 if (rate > 48000)
620 rate = 48000;
621 if (rate < 8000)
622 rate = 8000;
623 for (i = 0; i < sizeof(rate_lookup) / sizeof(rate_lookup[0]); i++) {
624 if (rate > rate_lookup[i].lower && rate <= rate_lookup[i].upper) {
625 rate = rate_lookup[i].rate;
626 freq = rate_lookup[i].freq;
627 break;
628 }
629 }
630 s->rateadc = rate;
631 freq <<= 2;
632
633 maskb(s->iobase + CODEC_CMI_FUNCTRL1 + 1, ~0x1c, freq);
634 }
635
636 static void set_adc_rate(struct cm_state *s, unsigned rate)
637 {
638 unsigned long flags;
639 unsigned char freq = 4;
640 int i;
641
642 if (rate > 48000)
643 rate = 48000;
644 if (rate < 8000)
645 rate = 8000;
646 for (i = 0; i < sizeof(rate_lookup) / sizeof(rate_lookup[0]); i++) {
647 if (rate > rate_lookup[i].lower && rate <= rate_lookup[i].upper) {
648 rate = rate_lookup[i].rate;
649 freq = rate_lookup[i].freq;
650 break;
651 }
652 }
653 s->rateadc = rate;
654 freq <<= 2;
655
656 spin_lock_irqsave(&s->lock, flags);
657 maskb(s->iobase + CODEC_CMI_FUNCTRL1 + 1, ~0x1c, freq);
658 spin_unlock_irqrestore(&s->lock, flags);
659 }
660
661 static void set_dac_rate(struct cm_state *s, unsigned rate)
662 {
663 unsigned long flags;
664 unsigned char freq = 4;
665 int i;
666
667 if (rate > 48000)
668 rate = 48000;
669 if (rate < 8000)
670 rate = 8000;
671 for (i = 0; i < sizeof(rate_lookup) / sizeof(rate_lookup[0]); i++) {
672 if (rate > rate_lookup[i].lower && rate <= rate_lookup[i].upper) {
673 rate = rate_lookup[i].rate;
674 freq = rate_lookup[i].freq;
675 break;
676 }
677 }
678 s->ratedac = rate;
679 freq <<= 5;
680
681 spin_lock_irqsave(&s->lock, flags);
682 maskb(s->iobase + CODEC_CMI_FUNCTRL1 + 1, ~0xe0, freq);
683
684
685 if (s->curr_channels <= 2)
686 set_spdifout_unlocked(s, rate);
687 if (s->status & DO_DUAL_DAC)
688 set_adc_rate_unlocked(s, rate);
689
690 spin_unlock_irqrestore(&s->lock, flags);
691 }
692
693 /* --------------------------------------------------------------------- */
694 static inline void reset_adc(struct cm_state *s)
695 {
696 /* reset bus master */
697 outb(s->enable | CM_CH0_RESET, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
698 udelay(10);
699 outb(s->enable & ~CM_CH0_RESET, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
700 }
701
702 static inline void reset_dac(struct cm_state *s)
703 {
704 /* reset bus master */
705 outb(s->enable | CM_CH1_RESET, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
706 outb(s->enable & ~CM_CH1_RESET, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
707 if (s->status & DO_DUAL_DAC)
708 reset_adc(s);
709 }
710
711 static inline void pause_adc(struct cm_state *s)
712 {
713 maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~0, 4);
714 }
715
716 static inline void pause_dac(struct cm_state *s)
717 {
718 maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~0, 8);
719 if (s->status & DO_DUAL_DAC)
720 pause_adc(s);
721 }
722
723 static inline void disable_adc(struct cm_state *s)
724 {
725 /* disable channel */
726 s->enable &= ~CM_ENABLE_CH0;
727 outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
728 reset_adc(s);
729 }
730
731 static inline void disable_dac(struct cm_state *s)
732 {
733 /* disable channel */
734 s->enable &= ~CM_ENABLE_CH1;
735 outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
736 reset_dac(s);
737 if (s->status & DO_DUAL_DAC)
738 disable_adc(s);
739 }
740
741 static inline void enable_adc(struct cm_state *s)
742 {
743 if (!(s->enable & CM_ENABLE_CH0)) {
744 /* enable channel */
745 s->enable |= CM_ENABLE_CH0;
746 outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
747 }
748 maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~4, 0);
749 }
750
751 static inline void enable_dac_unlocked(struct cm_state *s)
752 {
753 if (!(s->enable & CM_ENABLE_CH1)) {
754 /* enable channel */
755 s->enable |= CM_ENABLE_CH1;
756 outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
757 }
758 maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~8, 0);
759
760 if (s->status & DO_DUAL_DAC)
761 enable_adc(s);
762 }
763
764 static inline void enable_dac(struct cm_state *s)
765 {
766 unsigned long flags;
767
768 spin_lock_irqsave(&s->lock, flags);
769 enable_dac_unlocked(s);
770 spin_unlock_irqrestore(&s->lock, flags);
771 }
772
773 static inline void stop_adc_unlocked(struct cm_state *s)
774 {
775 if (s->enable & CM_ENABLE_CH0) {
776 /* disable interrupt */
777 maskb(s->iobase + CODEC_CMI_INT_HLDCLR + 2, ~1, 0);
778 disable_adc(s);
779 }
780 }
781
782 static inline void stop_adc(struct cm_state *s)
783 {
784 unsigned long flags;
785
786 spin_lock_irqsave(&s->lock, flags);
787 stop_adc_unlocked(s);
788 spin_unlock_irqrestore(&s->lock, flags);
789
790 }
791
792 static inline void stop_dac_unlocked(struct cm_state *s)
793 {
794 if (s->enable & CM_ENABLE_CH1) {
795 /* disable interrupt */
796 maskb(s->iobase + CODEC_CMI_INT_HLDCLR + 2, ~2, 0);
797 disable_dac(s);
798 }
799 if (s->status & DO_DUAL_DAC)
800 stop_adc_unlocked(s);
801 }
802
803 static inline void stop_dac(struct cm_state *s)
804 {
805 unsigned long flags;
806
807 spin_lock_irqsave(&s->lock, flags);
808 stop_dac_unlocked(s);
809 spin_unlock_irqrestore(&s->lock, flags);
810 }
811
812 static void start_adc_unlocked(struct cm_state *s)
813 {
814 if ((s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
815 && s->dma_adc.ready) {
816 /* enable interrupt */
817 maskb(s->iobase + CODEC_CMI_INT_HLDCLR + 2, ~0, 1);
818 enable_adc(s);
819 }
820 }
821
822 static void start_adc(struct cm_state *s)
823 {
824 unsigned long flags;
825
826 spin_lock_irqsave(&s->lock, flags);
827 start_adc_unlocked(s);
828 spin_unlock_irqrestore(&s->lock, flags);
829 }
830
831 static void start_dac1_unlocked(struct cm_state *s)
832 {
833 if ((s->dma_adc.mapped || s->dma_adc.count > 0) && s->dma_adc.ready) {
834 /* enable interrupt */
835 // maskb(s->iobase + CODEC_CMI_INT_HLDCLR + 2, ~0, 1);
836 enable_dac_unlocked(s);
837 }
838 }
839
840 static void start_dac_unlocked(struct cm_state *s)
841 {
842 if ((s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready) {
843 /* enable interrupt */
844 maskb(s->iobase + CODEC_CMI_INT_HLDCLR + 2, ~0, 2);
845 enable_dac_unlocked(s);
846 }
847 if (s->status & DO_DUAL_DAC)
848 start_dac1_unlocked(s);
849 }
850
851 static void start_dac(struct cm_state *s)
852 {
853 unsigned long flags;
854
855 spin_lock_irqsave(&s->lock, flags);
856 start_dac_unlocked(s);
857 spin_unlock_irqrestore(&s->lock, flags);
858 }
859
860 static int prog_dmabuf(struct cm_state *s, unsigned rec);
861
862 static int set_dac_channels(struct cm_state *s, int channels)
863 {
864 unsigned long flags;
865 spin_lock_irqsave(&s->lock, flags);
866
867 if ((channels > 2) && (channels <= s->max_channels)
868 && (((s->fmt >> CM_CFMT_DACSHIFT) & CM_CFMT_MASK) == (CM_CFMT_STEREO | CM_CFMT_16BIT))) {
869 set_spdifout_unlocked(s, 0);
870 if (s->capability & CAN_MULTI_CH_HW) {
871 // NXCHG
872 maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 3, ~0, 0x80);
873 // CHB3D or CHB3D5C
874 maskb(s->iobase + CODEC_CMI_CHFORMAT + 3, ~0xa0, channels > 4 ? 0x80 : 0x20);
875 // CHB3D6C
876 maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 1, ~0x80, channels == 6 ? 0x80 : 0);
877 // ENCENTER
878 maskb(s->iobase + CODEC_CMI_MISC_CTRL, ~0x80, channels == 6 ? 0x80 : 0);
879 s->status |= DO_MULTI_CH_HW;
880 } else if (s->capability & CAN_DUAL_DAC) {
881 unsigned char fmtm = ~0, fmts = 0;
882 ssize_t ret;
883
884 // ENDBDAC, turn on double DAC mode
885 // XCHGDAC, CH0 -> back, CH1->front
886 maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~0, 0xC0);
887 s->status |= DO_DUAL_DAC;
888 // prepare secondary buffer
889
890 spin_unlock_irqrestore(&s->lock, flags);
891 ret = prog_dmabuf(s, 1);
892 if (ret) return ret;
893 spin_lock_irqsave(&s->lock, flags);
894
895 // copy the hw state
896 fmtm &= ~((CM_CFMT_STEREO | CM_CFMT_16BIT) << CM_CFMT_DACSHIFT);
897 fmtm &= ~((CM_CFMT_STEREO | CM_CFMT_16BIT) << CM_CFMT_ADCSHIFT);
898 // the HW only support 16-bit stereo
899 fmts |= CM_CFMT_16BIT << CM_CFMT_DACSHIFT;
900 fmts |= CM_CFMT_16BIT << CM_CFMT_ADCSHIFT;
901 fmts |= CM_CFMT_STEREO << CM_CFMT_DACSHIFT;
902 fmts |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
903
904 set_fmt_unlocked(s, fmtm, fmts);
905 set_adc_rate_unlocked(s, s->ratedac);
906
907 }
908
909 if (s->speakers > 2)
910 maskb(s->iobase + CODEC_CMI_MISC_CTRL + 3, ~0x04, 0);
911 s->curr_channels = channels;
912 } else {
913 if (s->status & DO_MULTI_CH_HW) {
914 maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 3, ~0x80, 0);
915 maskb(s->iobase + CODEC_CMI_CHFORMAT + 3, ~0xa0, 0);
916 maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 1, ~0x80, 0);
917 } else if (s->status & DO_DUAL_DAC) {
918 maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~0x80, 0);
919 }
920 // N4SPK3D, enable 4 speaker mode (analog duplicate)
921 if (s->speakers > 2)
922 maskb(s->iobase + CODEC_CMI_MISC_CTRL + 3, ~0, 0x04);
923 s->status &= ~DO_MULTI_CH;
924 s->curr_channels = s->fmt & (CM_CFMT_STEREO << CM_CFMT_DACSHIFT) ? 2 : 1;
925 }
926
927 spin_unlock_irqrestore(&s->lock, flags);
928 return s->curr_channels;
929 }
930
931 /* --------------------------------------------------------------------- */
932
933 #define DMABUF_DEFAULTORDER (16-PAGE_SHIFT)
934 #define DMABUF_MINORDER 1
935
936 static void dealloc_dmabuf(struct dmabuf *db)
937 {
938 struct page *pstart, *pend;
939
940 if (db->rawbuf) {
941 /* undo marking the pages as reserved */
942 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
943 for (pstart = virt_to_page(db->rawbuf); pstart <= pend; pstart++)
944 ClearPageReserved(pstart);
945 free_pages((unsigned long)db->rawbuf, db->buforder);
946 }
947 db->rawbuf = NULL;
948 db->mapped = db->ready = 0;
949 }
950
951 /* Ch1 is used for playback, Ch0 is used for recording */
952
953 static int prog_dmabuf(struct cm_state *s, unsigned rec)
954 {
955 struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
956 unsigned rate = rec ? s->rateadc : s->ratedac;
957 int order;
958 unsigned bytepersec;
959 unsigned bufs;
960 struct page *pstart, *pend;
961 unsigned char fmt;
962 unsigned long flags;
963
964 fmt = s->fmt;
965 if (rec) {
966 stop_adc(s);
967 fmt >>= CM_CFMT_ADCSHIFT;
968 } else {
969 stop_dac(s);
970 fmt >>= CM_CFMT_DACSHIFT;
971 }
972
973 fmt &= CM_CFMT_MASK;
974 db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
975 if (!db->rawbuf) {
976 db->ready = db->mapped = 0;
977 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
978 if ((db->rawbuf = (void *)__get_free_pages(GFP_KERNEL | GFP_DMA, order)))
979 break;
980 if (!db->rawbuf)
981 return -ENOMEM;
982 db->buforder = order;
983 db->rawphys = virt_to_bus(db->rawbuf);
984 if ((db->rawphys ^ (db->rawphys + (PAGE_SIZE << db->buforder) - 1)) & ~0xffff)
985 printk(KERN_DEBUG "cmpci: DMA buffer crosses 64k boundary: busaddr 0x%lx size %ld\n",
986 (long) db->rawphys, PAGE_SIZE << db->buforder);
987 if ((db->rawphys + (PAGE_SIZE << db->buforder) - 1) & ~0xffffff)
988 printk(KERN_DEBUG "cmpci: DMA buffer beyond 16MB: busaddr 0x%lx size %ld\n",
989 (long) db->rawphys, PAGE_SIZE << db->buforder);
990 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
991 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
992 for (pstart = virt_to_page(db->rawbuf); pstart <= pend; pstart++)
993 SetPageReserved(pstart);
994 }
995 bytepersec = rate << sample_shift[fmt];
996 bufs = PAGE_SIZE << db->buforder;
997 if (db->ossfragshift) {
998 if ((1000 << db->ossfragshift) < bytepersec)
999 db->fragshift = ld2(bytepersec/1000);
1000 else
1001 db->fragshift = db->ossfragshift;
1002 } else {
1003 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
1004 if (db->fragshift < 3)
1005 db->fragshift = 3;
1006 }
1007 db->numfrag = bufs >> db->fragshift;
1008 while (db->numfrag < 4 && db->fragshift > 3) {
1009 db->fragshift--;
1010 db->numfrag = bufs >> db->fragshift;
1011 }
1012 db->fragsize = 1 << db->fragshift;
1013 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
1014 db->numfrag = db->ossmaxfrags;
1015 /* to make fragsize >= 4096 */
1016 db->fragsamples = db->fragsize >> sample_shift[fmt];
1017 db->dmasize = db->numfrag << db->fragshift;
1018 db->dmasamples = db->dmasize >> sample_shift[fmt];
1019 memset(db->rawbuf, (fmt & CM_CFMT_16BIT) ? 0 : 0x80, db->dmasize);
1020 spin_lock_irqsave(&s->lock, flags);
1021 if (rec) {
1022 if (s->status & DO_DUAL_DAC)
1023 set_dmadac1(s, db->rawphys, db->dmasize >> sample_shift[fmt]);
1024 else
1025 set_dmaadc(s, db->rawphys, db->dmasize >> sample_shift[fmt]);
1026 /* program sample counts */
1027 set_countdac(s, db->fragsamples);
1028 } else {
1029 set_dmadac(s, db->rawphys, db->dmasize >> sample_shift[fmt]);
1030 /* program sample counts */
1031 set_countdac(s, db->fragsamples);
1032 }
1033 spin_unlock_irqrestore(&s->lock, flags);
1034 db->ready = 1;
1035 return 0;
1036 }
1037
1038 static inline void clear_advance(struct cm_state *s)
1039 {
1040 unsigned char c = (s->fmt & (CM_CFMT_16BIT << CM_CFMT_DACSHIFT)) ? 0 : 0x80;
1041 unsigned char *buf = s->dma_dac.rawbuf;
1042 unsigned char *buf1 = s->dma_adc.rawbuf;
1043 unsigned bsize = s->dma_dac.dmasize;
1044 unsigned bptr = s->dma_dac.swptr;
1045 unsigned len = s->dma_dac.fragsize;
1046
1047 if (bptr + len > bsize) {
1048 unsigned x = bsize - bptr;
1049 memset(buf + bptr, c, x);
1050 if (s->status & DO_DUAL_DAC)
1051 memset(buf1 + bptr, c, x);
1052 bptr = 0;
1053 len -= x;
1054 }
1055 memset(buf + bptr, c, len);
1056 if (s->status & DO_DUAL_DAC)
1057 memset(buf1 + bptr, c, len);
1058 }
1059
1060 /* call with spinlock held! */
1061 static void cm_update_ptr(struct cm_state *s)
1062 {
1063 unsigned hwptr;
1064 int diff;
1065
1066 /* update ADC pointer */
1067 if (s->dma_adc.ready) {
1068 if (s->status & DO_DUAL_DAC) {
1069 hwptr = get_dmaadc(s) % s->dma_adc.dmasize;
1070 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
1071 s->dma_adc.hwptr = hwptr;
1072 s->dma_adc.total_bytes += diff;
1073 if (s->dma_adc.mapped) {
1074 s->dma_adc.count += diff;
1075 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1076 wake_up(&s->dma_adc.wait);
1077 } else {
1078 s->dma_adc.count -= diff;
1079 if (s->dma_adc.count <= 0) {
1080 pause_adc(s);
1081 s->dma_adc.error++;
1082 } else if (s->dma_adc.count <= (signed)s->dma_adc.fragsize && !s->dma_adc.endcleared) {
1083 clear_advance(s);
1084 s->dma_adc.endcleared = 1;
1085 }
1086 if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize)
1087 wake_up(&s->dma_adc.wait);
1088 }
1089 } else {
1090 hwptr = get_dmaadc(s) % s->dma_adc.dmasize;
1091 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
1092 s->dma_adc.hwptr = hwptr;
1093 s->dma_adc.total_bytes += diff;
1094 s->dma_adc.count += diff;
1095 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1096 wake_up(&s->dma_adc.wait);
1097 if (!s->dma_adc.mapped) {
1098 if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
1099 pause_adc(s);
1100 s->dma_adc.error++;
1101 }
1102 }
1103 }
1104 }
1105 /* update DAC pointer */
1106 if (s->dma_dac.ready) {
1107 hwptr = get_dmadac(s) % s->dma_dac.dmasize;
1108 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
1109 s->dma_dac.hwptr = hwptr;
1110 s->dma_dac.total_bytes += diff;
1111 if (s->dma_dac.mapped) {
1112 s->dma_dac.count += diff;
1113 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1114 wake_up(&s->dma_dac.wait);
1115 } else {
1116 s->dma_dac.count -= diff;
1117 if (s->dma_dac.count <= 0) {
1118 pause_dac(s);
1119 s->dma_dac.error++;
1120 } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
1121 clear_advance(s);
1122 s->dma_dac.endcleared = 1;
1123 }
1124 if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize)
1125 wake_up(&s->dma_dac.wait);
1126 }
1127 }
1128 }
1129
1130 #ifdef CONFIG_SOUND_CMPCI_MIDI
1131 /* hold spinlock for the following! */
1132 static void cm_handle_midi(struct cm_state *s)
1133 {
1134 unsigned char ch;
1135 int wake;
1136
1137 wake = 0;
1138 while (!(inb(s->iomidi+1) & 0x80)) {
1139 ch = inb(s->iomidi);
1140 if (s->midi.icnt < MIDIINBUF) {
1141 s->midi.ibuf[s->midi.iwr] = ch;
1142 s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
1143 s->midi.icnt++;
1144 }
1145 wake = 1;
1146 }
1147 if (wake)
1148 wake_up(&s->midi.iwait);
1149 wake = 0;
1150 while (!(inb(s->iomidi+1) & 0x40) && s->midi.ocnt > 0) {
1151 outb(s->midi.obuf[s->midi.ord], s->iomidi);
1152 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
1153 s->midi.ocnt--;
1154 if (s->midi.ocnt < MIDIOUTBUF-16)
1155 wake = 1;
1156 }
1157 if (wake)
1158 wake_up(&s->midi.owait);
1159 }
1160 #endif
1161
1162 static irqreturn_t cm_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1163 {
1164 struct cm_state *s = (struct cm_state *)dev_id;
1165 unsigned int intsrc, intstat;
1166 unsigned char mask = 0;
1167
1168 /* fastpath out, to ease interrupt sharing */
1169 intsrc = inl(s->iobase + CODEC_CMI_INT_STATUS);
1170 if (!(intsrc & 0x80000000))
1171 return IRQ_NONE;
1172 spin_lock(&s->lock);
1173 intstat = inb(s->iobase + CODEC_CMI_INT_HLDCLR + 2);
1174 /* acknowledge interrupt */
1175 if (intsrc & CM_INT_CH0)
1176 mask |= 1;
1177 if (intsrc & CM_INT_CH1)
1178 mask |= 2;
1179 outb(intstat & ~mask, s->iobase + CODEC_CMI_INT_HLDCLR + 2);
1180 outb(intstat | mask, s->iobase + CODEC_CMI_INT_HLDCLR + 2);
1181 cm_update_ptr(s);
1182 #ifdef CONFIG_SOUND_CMPCI_MIDI
1183 cm_handle_midi(s);
1184 #endif
1185 spin_unlock(&s->lock);
1186 return IRQ_HANDLED;
1187 }
1188
1189 #ifdef CONFIG_SOUND_CMPCI_MIDI
1190 static void cm_midi_timer(unsigned long data)
1191 {
1192 struct cm_state *s = (struct cm_state *)data;
1193 unsigned long flags;
1194
1195 spin_lock_irqsave(&s->lock, flags);
1196 cm_handle_midi(s);
1197 spin_unlock_irqrestore(&s->lock, flags);
1198 s->midi.timer.expires = jiffies+1;
1199 add_timer(&s->midi.timer);
1200 }
1201 #endif
1202
1203 /* --------------------------------------------------------------------- */
1204
1205 static const char invalid_magic[] = KERN_CRIT "cmpci: invalid magic value\n";
1206
1207 #ifdef CONFIG_SOUND_CMPCI /* support multiple chips */
1208 #define VALIDATE_STATE(s)
1209 #else
1210 #define VALIDATE_STATE(s) \
1211 ({ \
1212 if (!(s) || (s)->magic != CM_MAGIC) { \
1213 printk(invalid_magic); \
1214 return -ENXIO; \
1215 } \
1216 })
1217 #endif
1218
1219 /* --------------------------------------------------------------------- */
1220
1221 #define MT_4 1
1222 #define MT_5MUTE 2
1223 #define MT_4MUTEMONO 3
1224 #define MT_6MUTE 4
1225 #define MT_5MUTEMONO 5
1226
1227 static const struct {
1228 unsigned left;
1229 unsigned right;
1230 unsigned type;
1231 unsigned rec;
1232 unsigned play;
1233 } mixtable[SOUND_MIXER_NRDEVICES] = {
1234 [SOUND_MIXER_CD] = { DSP_MIX_CDVOLIDX_L, DSP_MIX_CDVOLIDX_R, MT_5MUTE, 0x04, 0x02 },
1235 [SOUND_MIXER_LINE] = { DSP_MIX_LINEVOLIDX_L, DSP_MIX_LINEVOLIDX_R, MT_5MUTE, 0x10, 0x08 },
1236 [SOUND_MIXER_MIC] = { DSP_MIX_MICVOLIDX, DSP_MIX_MICVOLIDX, MT_5MUTEMONO, 0x01, 0x01 },
1237 [SOUND_MIXER_SYNTH] = { DSP_MIX_FMVOLIDX_L, DSP_MIX_FMVOLIDX_R, MT_5MUTE, 0x40, 0x00 },
1238 [SOUND_MIXER_VOLUME] = { DSP_MIX_MASTERVOLIDX_L, DSP_MIX_MASTERVOLIDX_R, MT_5MUTE, 0x00, 0x00 },
1239 [SOUND_MIXER_PCM] = { DSP_MIX_VOICEVOLIDX_L, DSP_MIX_VOICEVOLIDX_R, MT_5MUTE, 0x00, 0x00 },
1240 [SOUND_MIXER_SPEAKER]= { DSP_MIX_SPKRVOLIDX, DSP_MIX_SPKRVOLIDX, MT_5MUTEMONO, 0x01, 0x01 }
1241 };
1242
1243 static const unsigned char volidx[SOUND_MIXER_NRDEVICES] =
1244 {
1245 [SOUND_MIXER_CD] = 1,
1246 [SOUND_MIXER_LINE] = 2,
1247 [SOUND_MIXER_MIC] = 3,
1248 [SOUND_MIXER_SYNTH] = 4,
1249 [SOUND_MIXER_VOLUME] = 5,
1250 [SOUND_MIXER_PCM] = 6,
1251 [SOUND_MIXER_SPEAKER]= 7
1252 };
1253
1254 static unsigned mixer_recmask(struct cm_state *s)
1255 {
1256 int i, j, k;
1257
1258 j = rdmixer(s, DSP_MIX_ADCMIXIDX_L);
1259 j &= 0x7f;
1260 for (k = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1261 if (j & mixtable[i].rec)
1262 k |= 1 << i;
1263 return k;
1264 }
1265
1266 static int mixer_ioctl(struct cm_state *s, unsigned int cmd, unsigned long arg)
1267 {
1268 unsigned long flags;
1269 int i, val, j;
1270 unsigned char l, r, rl, rr;
1271
1272 VALIDATE_STATE(s);
1273 if (cmd == SOUND_MIXER_INFO) {
1274 mixer_info info;
1275 strncpy(info.id, "cmpci", sizeof(info.id));
1276 strncpy(info.name, "C-Media PCI", sizeof(info.name));
1277 info.modify_counter = s->mix.modcnt;
1278 if (copy_to_user((void *)arg, &info, sizeof(info)))
1279 return -EFAULT;
1280 return 0;
1281 }
1282 if (cmd == SOUND_OLD_MIXER_INFO) {
1283 _old_mixer_info info;
1284 strncpy(info.id, "cmpci", sizeof(info.id));
1285 strncpy(info.name, "C-Media cmpci", sizeof(info.name));
1286 if (copy_to_user((void *)arg, &info, sizeof(info)))
1287 return -EFAULT;
1288 return 0;
1289 }
1290 if (cmd == OSS_GETVERSION)
1291 return put_user(SOUND_VERSION, (int *)arg);
1292 if (_IOC_TYPE(cmd) != 'M' || _IOC_SIZE(cmd) != sizeof(int))
1293 return -EINVAL;
1294 if (_IOC_DIR(cmd) == _IOC_READ) {
1295 switch (_IOC_NR(cmd)) {
1296 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1297 return put_user(mixer_recmask(s), (int *)arg);
1298
1299 case SOUND_MIXER_OUTSRC: /* Arg contains a bit for each recording source */
1300 return put_user(mixer_recmask(s), (int *)arg);//need fix
1301
1302 case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
1303 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1304 if (mixtable[i].type)
1305 val |= 1 << i;
1306 return put_user(val, (int *)arg);
1307
1308 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
1309 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1310 if (mixtable[i].rec)
1311 val |= 1 << i;
1312 return put_user(val, (int *)arg);
1313
1314 case SOUND_MIXER_OUTMASK: /* Arg contains a bit for each supported recording source */
1315 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1316 if (mixtable[i].play)
1317 val |= 1 << i;
1318 return put_user(val, (int *)arg);
1319
1320 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
1321 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1322 if (mixtable[i].type && mixtable[i].type != MT_4MUTEMONO)
1323 val |= 1 << i;
1324 return put_user(val, (int *)arg);
1325
1326 case SOUND_MIXER_CAPS:
1327 return put_user(0, (int *)arg);
1328
1329 default:
1330 i = _IOC_NR(cmd);
1331 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1332 return -EINVAL;
1333 if (!volidx[i])
1334 return -EINVAL;
1335 return put_user(s->mix.vol[volidx[i]-1], (int *)arg);
1336 }
1337 }
1338 if (_IOC_DIR(cmd) != (_IOC_READ|_IOC_WRITE))
1339 return -EINVAL;
1340 s->mix.modcnt++;
1341 switch (_IOC_NR(cmd)) {
1342 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1343 if (get_user(val, (int *)arg))
1344 return -EFAULT;
1345 i = generic_hweight32(val);
1346 for (j = i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
1347 if (!(val & (1 << i)))
1348 continue;
1349 if (!mixtable[i].rec) {
1350 val &= ~(1 << i);
1351 continue;
1352 }
1353 j |= mixtable[i].rec;
1354 }
1355 spin_lock_irqsave(&s->lock, flags);
1356 wrmixer(s, DSP_MIX_ADCMIXIDX_L, j);
1357 wrmixer(s, DSP_MIX_ADCMIXIDX_R, (j & 1) | (j>>1));
1358 spin_unlock_irqrestore(&s->lock, flags);
1359 return 0;
1360
1361 case SOUND_MIXER_OUTSRC: /* Arg contains a bit for each recording source */
1362 if (get_user(val, (int *)arg))
1363 return -EFAULT;
1364 for (j = i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
1365 if (!(val & (1 << i)))
1366 continue;
1367 if (!mixtable[i].play) {
1368 val &= ~(1 << i);
1369 continue;
1370 }
1371 j |= mixtable[i].play;
1372 }
1373 spin_lock_irqsave(&s->lock, flags);
1374 frobindir(s, DSP_MIX_OUTMIXIDX, 0x1f, j);
1375 spin_unlock_irqrestore(&s->lock, flags);
1376 return 0;
1377
1378 default:
1379 i = _IOC_NR(cmd);
1380 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1381 return -EINVAL;
1382 if (get_user(val, (int *)arg))
1383 return -EFAULT;
1384 l = val & 0xff;
1385 r = (val >> 8) & 0xff;
1386 if (l > 100)
1387 l = 100;
1388 if (r > 100)
1389 r = 100;
1390 spin_lock_irqsave(&s->lock, flags);
1391 switch (mixtable[i].type) {
1392 case MT_4:
1393 if (l >= 10)
1394 l -= 10;
1395 if (r >= 10)
1396 r -= 10;
1397 frobindir(s, mixtable[i].left, 0xf0, l / 6);
1398 frobindir(s, mixtable[i].right, 0xf0, l / 6);
1399 break;
1400
1401 case MT_4MUTEMONO:
1402 rl = (l < 4 ? 0 : (l - 5) / 3) & 31;
1403 rr = (rl >> 2) & 7;
1404 wrmixer(s, mixtable[i].left, rl<<3);
1405 maskb(s->iobase + CODEC_CMI_MIXER2, ~0x0e, rr<<1);
1406 break;
1407
1408 case MT_5MUTEMONO:
1409 r = l;
1410 rl = l < 4 ? 0 : (l - 5) / 3;
1411 rr = rl >> 2;
1412 wrmixer(s, mixtable[i].left, rl<<3);
1413 maskb(s->iobase + CODEC_CMI_MIXER2, ~0x0e, rr<<1);
1414 break;
1415
1416 case MT_5MUTE:
1417 rl = l < 4 ? 0 : (l - 5) / 3;
1418 rr = r < 4 ? 0 : (r - 5) / 3;
1419 wrmixer(s, mixtable[i].left, rl<<3);
1420 wrmixer(s, mixtable[i].right, rr<<3);
1421 break;
1422
1423 case MT_6MUTE:
1424 if (l < 6)
1425 rl = 0x00;
1426 else
1427 rl = l * 2 / 3;
1428 if (r < 6)
1429 rr = 0x00;
1430 else
1431 rr = r * 2 / 3;
1432 wrmixer(s, mixtable[i].left, rl);
1433 wrmixer(s, mixtable[i].right, rr);
1434 break;
1435 }
1436 spin_unlock_irqrestore(&s->lock, flags);
1437
1438 if (!volidx[i])
1439 return -EINVAL;
1440 s->mix.vol[volidx[i]-1] = val;
1441 return put_user(s->mix.vol[volidx[i]-1], (int *)arg);
1442 }
1443 }
1444
1445 /* --------------------------------------------------------------------- */
1446
1447 static int cm_open_mixdev(struct inode *inode, struct file *file)
1448 {
1449 int minor = minor(inode->i_rdev);
1450 struct cm_state *s = devs;
1451
1452 while (s && s->dev_mixer != minor)
1453 s = s->next;
1454 if (!s)
1455 return -ENODEV;
1456 VALIDATE_STATE(s);
1457 file->private_data = s;
1458 return 0;
1459 }
1460
1461 static int cm_release_mixdev(struct inode *inode, struct file *file)
1462 {
1463 struct cm_state *s = (struct cm_state *)file->private_data;
1464
1465 VALIDATE_STATE(s);
1466 return 0;
1467 }
1468
1469 static int cm_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1470 {
1471 return mixer_ioctl((struct cm_state *)file->private_data, cmd, arg);
1472 }
1473
1474 static /*const*/ struct file_operations cm_mixer_fops = {
1475 .owner = THIS_MODULE,
1476 .llseek = no_llseek,
1477 .ioctl = cm_ioctl_mixdev,
1478 .open = cm_open_mixdev,
1479 .release = cm_release_mixdev,
1480 };
1481
1482
1483 /* --------------------------------------------------------------------- */
1484
1485 static int drain_dac(struct cm_state *s, int nonblock)
1486 {
1487 DECLARE_WAITQUEUE(wait, current);
1488 unsigned long flags;
1489 int count, tmo;
1490
1491 if (s->dma_dac.mapped || !s->dma_dac.ready)
1492 return 0;
1493 set_current_state(TASK_INTERRUPTIBLE);
1494 add_wait_queue(&s->dma_dac.wait, &wait);
1495 for (;;) {
1496 spin_lock_irqsave(&s->lock, flags);
1497 count = s->dma_dac.count;
1498 spin_unlock_irqrestore(&s->lock, flags);
1499 if (count <= 0)
1500 break;
1501 if (signal_pending(current))
1502 break;
1503 if (nonblock) {
1504 remove_wait_queue(&s->dma_dac.wait, &wait);
1505 set_current_state(TASK_RUNNING);
1506 return -EBUSY;
1507 }
1508 tmo = 3 * HZ * (count + s->dma_dac.fragsize) / 2 / s->ratedac;
1509 tmo >>= sample_shift[(s->fmt >> CM_CFMT_DACSHIFT) & CM_CFMT_MASK];
1510 if (!schedule_timeout(tmo + 1))
1511 printk(KERN_DEBUG "cmpci: dma timed out??\n");
1512 }
1513 remove_wait_queue(&s->dma_dac.wait, &wait);
1514 set_current_state(TASK_RUNNING);
1515 if (signal_pending(current))
1516 return -ERESTARTSYS;
1517 return 0;
1518 }
1519
1520 /* --------------------------------------------------------------------- */
1521
1522 static ssize_t cm_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1523 {
1524 struct cm_state *s = (struct cm_state *)file->private_data;
1525 ssize_t ret;
1526 unsigned long flags;
1527 unsigned swptr;
1528 int cnt;
1529
1530 VALIDATE_STATE(s);
1531 if (ppos != &file->f_pos)
1532 return -ESPIPE;
1533 if (s->dma_adc.mapped)
1534 return -ENXIO;
1535 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1536 return ret;
1537 if (!access_ok(VERIFY_WRITE, buffer, count))
1538 return -EFAULT;
1539 ret = 0;
1540
1541 while (count > 0) {
1542 spin_lock_irqsave(&s->lock, flags);
1543 swptr = s->dma_adc.swptr;
1544 cnt = s->dma_adc.dmasize-swptr;
1545 if (s->dma_adc.count < cnt)
1546 cnt = s->dma_adc.count;
1547 spin_unlock_irqrestore(&s->lock, flags);
1548 if (cnt > count)
1549 cnt = count;
1550 if (cnt <= 0) {
1551 start_adc(s);
1552 if (file->f_flags & O_NONBLOCK)
1553 return ret ? ret : -EAGAIN;
1554 if (!interruptible_sleep_on_timeout(&s->dma_adc.wait, HZ)) {
1555 printk(KERN_DEBUG "cmpci: read: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1556 s->dma_adc.dmasize, s->dma_adc.fragsize, s->dma_adc.count,
1557 s->dma_adc.hwptr, s->dma_adc.swptr);
1558 spin_lock_irqsave(&s->lock, flags);
1559 stop_adc_unlocked(s);
1560 set_dmaadc(s, s->dma_adc.rawphys, s->dma_adc.dmasamples);
1561 /* program sample counts */
1562 set_countadc(s, s->dma_adc.fragsamples);
1563 s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
1564 spin_unlock_irqrestore(&s->lock, flags);
1565 }
1566 if (signal_pending(current))
1567 return ret ? ret : -ERESTARTSYS;
1568 continue;
1569 }
1570 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt))
1571 return ret ? ret : -EFAULT;
1572 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1573 spin_lock_irqsave(&s->lock, flags);
1574 s->dma_adc.swptr = swptr;
1575 s->dma_adc.count -= cnt;
1576 count -= cnt;
1577 buffer += cnt;
1578 ret += cnt;
1579 start_adc_unlocked(s);
1580 spin_unlock_irqrestore(&s->lock, flags);
1581 }
1582 return ret;
1583 }
1584
1585 static ssize_t cm_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1586 {
1587 struct cm_state *s = (struct cm_state *)file->private_data;
1588 ssize_t ret;
1589 unsigned long flags;
1590 unsigned swptr;
1591 int cnt;
1592
1593 VALIDATE_STATE(s);
1594 if (ppos != &file->f_pos)
1595 return -ESPIPE;
1596 if (s->dma_dac.mapped)
1597 return -ENXIO;
1598 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1599 return ret;
1600 if (!access_ok(VERIFY_READ, buffer, count))
1601 return -EFAULT;
1602 if (s->status & DO_DUAL_DAC) {
1603 if (s->dma_adc.mapped)
1604 return -ENXIO;
1605 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1606 return ret;
1607 if (!access_ok(VERIFY_READ, buffer, count))
1608 return -EFAULT;
1609 }
1610 ret = 0;
1611
1612 while (count > 0) {
1613 spin_lock_irqsave(&s->lock, flags);
1614 if (s->dma_dac.count < 0) {
1615 s->dma_dac.count = 0;
1616 s->dma_dac.swptr = s->dma_dac.hwptr;
1617 }
1618 if (s->status & DO_DUAL_DAC) {
1619 s->dma_adc.swptr = s->dma_dac.swptr;
1620 s->dma_adc.count = s->dma_dac.count;
1621 s->dma_adc.endcleared = s->dma_dac.endcleared;
1622 }
1623 swptr = s->dma_dac.swptr;
1624 cnt = s->dma_dac.dmasize-swptr;
1625 if (s->status & DO_AC3_SW) {
1626 if (s->dma_dac.count + 2 * cnt > s->dma_dac.dmasize)
1627 cnt = (s->dma_dac.dmasize - s->dma_dac.count) / 2;
1628 } else {
1629 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
1630 cnt = s->dma_dac.dmasize - s->dma_dac.count;
1631 }
1632 spin_unlock_irqrestore(&s->lock, flags);
1633 if (cnt > count)
1634 cnt = count;
1635 if ((s->status & DO_DUAL_DAC) && (cnt > count / 2))
1636 cnt = count / 2;
1637 if (cnt <= 0) {
1638 start_dac(s);
1639 if (file->f_flags & O_NONBLOCK)
1640 return ret ? ret : -EAGAIN;
1641 if (!interruptible_sleep_on_timeout(&s->dma_dac.wait, HZ)) {
1642 printk(KERN_DEBUG "cmpci: write: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1643 s->dma_dac.dmasize, s->dma_dac.fragsize, s->dma_dac.count,
1644 s->dma_dac.hwptr, s->dma_dac.swptr);
1645 spin_lock_irqsave(&s->lock, flags);
1646 stop_dac_unlocked(s);
1647 set_dmadac(s, s->dma_dac.rawphys, s->dma_dac.dmasamples);
1648 /* program sample counts */
1649 set_countdac(s, s->dma_dac.fragsamples);
1650 s->dma_dac.count = s->dma_dac.hwptr = s->dma_dac.swptr = 0;
1651 if (s->status & DO_DUAL_DAC) {
1652 set_dmadac1(s, s->dma_adc.rawphys, s->dma_adc.dmasamples);
1653 s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
1654 }
1655 spin_unlock_irqrestore(&s->lock, flags);
1656 }
1657 if (signal_pending(current))
1658 return ret ? ret : -ERESTARTSYS;
1659 continue;
1660 }
1661 if (s->status & DO_AC3_SW) {
1662 int err;
1663
1664 // clip exceeded data, caught by 033 and 037
1665 if (swptr + 2 * cnt > s->dma_dac.dmasize)
1666 cnt = (s->dma_dac.dmasize - swptr) / 2;
1667 if ((err = trans_ac3(s, s->dma_dac.rawbuf + swptr, buffer, cnt)))
1668 return err;
1669 swptr = (swptr + 2 * cnt) % s->dma_dac.dmasize;
1670 } else if (s->status & DO_DUAL_DAC) {
1671 int i, err;
1672 unsigned long *src, *dst0, *dst1;
1673
1674 src = (unsigned long *) buffer;
1675 dst0 = (unsigned long *) (s->dma_dac.rawbuf + swptr);
1676 dst1 = (unsigned long *) (s->dma_adc.rawbuf + swptr);
1677 // copy left/right sample at one time
1678 for (i = 0; i <= cnt / 4; i++) {
1679 if ((err = __get_user(*dst0++, src++)))
1680 return err;
1681 if ((err = __get_user(*dst1++, src++)))
1682 return err;
1683 }
1684 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1685 } else {
1686 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt))
1687 return ret ? ret : -EFAULT;
1688 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1689 }
1690 spin_lock_irqsave(&s->lock, flags);
1691 s->dma_dac.swptr = swptr;
1692 s->dma_dac.count += cnt;
1693 if (s->status & DO_AC3_SW)
1694 s->dma_dac.count += cnt;
1695 s->dma_dac.endcleared = 0;
1696 spin_unlock_irqrestore(&s->lock, flags);
1697 count -= cnt;
1698 buffer += cnt;
1699 ret += cnt;
1700 if (s->status & DO_DUAL_DAC) {
1701 count -= cnt;
1702 buffer += cnt;
1703 ret += cnt;
1704 }
1705 start_dac(s);
1706 }
1707 return ret;
1708 }
1709
1710 static unsigned int cm_poll(struct file *file, struct poll_table_struct *wait)
1711 {
1712 struct cm_state *s = (struct cm_state *)file->private_data;
1713 unsigned long flags;
1714 unsigned int mask = 0;
1715
1716 VALIDATE_STATE(s);
1717 if (file->f_mode & FMODE_WRITE)
1718 poll_wait(file, &s->dma_dac.wait, wait);
1719 if (file->f_mode & FMODE_READ)
1720 poll_wait(file, &s->dma_adc.wait, wait);
1721 spin_lock_irqsave(&s->lock, flags);
1722 cm_update_ptr(s);
1723 if (file->f_mode & FMODE_READ) {
1724 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1725 mask |= POLLIN | POLLRDNORM;
1726 }
1727 if (file->f_mode & FMODE_WRITE) {
1728 if (s->dma_dac.mapped) {
1729 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1730 mask |= POLLOUT | POLLWRNORM;
1731 } else {
1732 if ((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize)
1733 mask |= POLLOUT | POLLWRNORM;
1734 }
1735 }
1736 spin_unlock_irqrestore(&s->lock, flags);
1737 return mask;
1738 }
1739
1740 static int cm_mmap(struct file *file, struct vm_area_struct *vma)
1741 {
1742 struct cm_state *s = (struct cm_state *)file->private_data;
1743 struct dmabuf *db;
1744 int ret = -EINVAL;
1745 unsigned long size;
1746
1747 VALIDATE_STATE(s);
1748 lock_kernel();
1749 if (vma->vm_flags & VM_WRITE) {
1750 if ((ret = prog_dmabuf(s, 0)) != 0)
1751 goto out;
1752 db = &s->dma_dac;
1753 } else if (vma->vm_flags & VM_READ) {
1754 if ((ret = prog_dmabuf(s, 1)) != 0)
1755 goto out;
1756 db = &s->dma_adc;
1757 } else
1758 goto out;
1759 ret = -EINVAL;
1760 if (vma->vm_pgoff != 0)
1761 goto out;
1762 size = vma->vm_end - vma->vm_start;
1763 if (size > (PAGE_SIZE << db->buforder))
1764 goto out;
1765 ret = -EINVAL;
1766 if (remap_page_range(vma, vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
1767 goto out;
1768 db->mapped = 1;
1769 ret = 0;
1770 out:
1771 unlock_kernel();
1772 return ret;
1773 }
1774
1775 static int cm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1776 {
1777 struct cm_state *s = (struct cm_state *)file->private_data;
1778 unsigned long flags;
1779 audio_buf_info abinfo;
1780 count_info cinfo;
1781 int val, mapped, ret;
1782 unsigned char fmtm, fmtd;
1783
1784 VALIDATE_STATE(s);
1785 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1786 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1787 switch (cmd) {
1788 case OSS_GETVERSION:
1789 return put_user(SOUND_VERSION, (int *)arg);
1790
1791 case SNDCTL_DSP_SYNC:
1792 if (file->f_mode & FMODE_WRITE)
1793 return drain_dac(s, 0/*file->f_flags & O_NONBLOCK*/);
1794 return 0;
1795
1796 case SNDCTL_DSP_SETDUPLEX:
1797 return 0;
1798
1799 case SNDCTL_DSP_GETCAPS:
1800 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP | DSP_CAP_BIND, (int *)arg);
1801
1802 case SNDCTL_DSP_RESET:
1803 if (file->f_mode & FMODE_WRITE) {
1804 stop_dac(s);
1805 synchronize_irq(s->irq);
1806 s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
1807 if (s->status & DO_DUAL_DAC)
1808 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1809 }
1810 if (file->f_mode & FMODE_READ) {
1811 stop_adc(s);
1812 synchronize_irq(s->irq);
1813 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1814 }
1815 return 0;
1816
1817 case SNDCTL_DSP_SPEED:
1818 if (get_user(val, (int *)arg))
1819 return -EFAULT;
1820 if (val >= 0) {
1821 if (file->f_mode & FMODE_READ) {
1822 spin_lock_irqsave(&s->lock, flags);
1823 stop_adc_unlocked(s);
1824 s->dma_adc.ready = 0;
1825 set_adc_rate_unlocked(s, val);
1826 spin_unlock_irqrestore(&s->lock, flags);
1827 }
1828 if (file->f_mode & FMODE_WRITE) {
1829 stop_dac(s);
1830 s->dma_dac.ready = 0;
1831 if (s->status & DO_DUAL_DAC)
1832 s->dma_adc.ready = 0;
1833 set_dac_rate(s, val);
1834 }
1835 }
1836 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
1837
1838 case SNDCTL_DSP_STEREO:
1839 if (get_user(val, (int *)arg))
1840 return -EFAULT;
1841 fmtd = 0;
1842 fmtm = ~0;
1843 if (file->f_mode & FMODE_READ) {
1844 stop_adc(s);
1845 s->dma_adc.ready = 0;
1846 if (val)
1847 fmtd |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
1848 else
1849 fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_ADCSHIFT);
1850 }
1851 if (file->f_mode & FMODE_WRITE) {
1852 stop_dac(s);
1853 s->dma_dac.ready = 0;
1854 if (val)
1855 fmtd |= CM_CFMT_STEREO << CM_CFMT_DACSHIFT;
1856 else
1857 fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_DACSHIFT);
1858 if (s->status & DO_DUAL_DAC) {
1859 s->dma_adc.ready = 0;
1860 if (val)
1861 fmtd |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
1862 else
1863 fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_ADCSHIFT);
1864 }
1865 }
1866 set_fmt(s, fmtm, fmtd);
1867 return 0;
1868
1869 case SNDCTL_DSP_CHANNELS:
1870 if (get_user(val, (int *)arg))
1871 return -EFAULT;
1872 if (val != 0) {
1873 fmtd = 0;
1874 fmtm = ~0;
1875 if (file->f_mode & FMODE_READ) {
1876 stop_adc(s);
1877 s->dma_adc.ready = 0;
1878 if (val >= 2)
1879 fmtd |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
1880 else
1881 fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_ADCSHIFT);
1882 }
1883 if (file->f_mode & FMODE_WRITE) {
1884 stop_dac(s);
1885 s->dma_dac.ready = 0;
1886 if (val >= 2)
1887 fmtd |= CM_CFMT_STEREO << CM_CFMT_DACSHIFT;
1888 else
1889 fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_DACSHIFT);
1890 if (s->status & DO_DUAL_DAC) {
1891 s->dma_adc.ready = 0;
1892 if (val >= 2)
1893 fmtd |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
1894 else
1895 fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_ADCSHIFT);
1896 }
1897 }
1898 set_fmt(s, fmtm, fmtd);
1899 if ((s->capability & CAN_MULTI_CH)
1900 && (file->f_mode & FMODE_WRITE)) {
1901 val = set_dac_channels(s, val);
1902 return put_user(val, (int *)arg);
1903 }
1904 }
1905 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (CM_CFMT_STEREO << CM_CFMT_ADCSHIFT)
1906 : (CM_CFMT_STEREO << CM_CFMT_DACSHIFT))) ? 2 : 1, (int *)arg);
1907
1908 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1909 return put_user(AFMT_S16_LE|AFMT_U8|AFMT_AC3, (int *)arg);
1910
1911 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1912 if (get_user(val, (int *)arg))
1913 return -EFAULT;
1914 if (val != AFMT_QUERY) {
1915 fmtd = 0;
1916 fmtm = ~0;
1917 if (file->f_mode & FMODE_READ) {
1918 stop_adc(s);
1919 s->dma_adc.ready = 0;
1920 if (val == AFMT_S16_LE)
1921 fmtd |= CM_CFMT_16BIT << CM_CFMT_ADCSHIFT;
1922 else
1923 fmtm &= ~(CM_CFMT_16BIT << CM_CFMT_ADCSHIFT);
1924 }
1925 if (file->f_mode & FMODE_WRITE) {
1926 stop_dac(s);
1927 s->dma_dac.ready = 0;
1928 if (val == AFMT_S16_LE || val == AFMT_AC3)
1929 fmtd |= CM_CFMT_16BIT << CM_CFMT_DACSHIFT;
1930 else
1931 fmtm &= ~(CM_CFMT_16BIT << CM_CFMT_DACSHIFT);
1932 if (val == AFMT_AC3) {
1933 fmtd |= CM_CFMT_STEREO << CM_CFMT_DACSHIFT;
1934 set_ac3(s, s->ratedac);
1935 } else
1936 set_ac3(s, 0);
1937 if (s->status & DO_DUAL_DAC) {
1938 s->dma_adc.ready = 0;
1939 if (val == AFMT_S16_LE)
1940 fmtd |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
1941 else
1942 fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_ADCSHIFT);
1943 }
1944 }
1945 set_fmt(s, fmtm, fmtd);
1946 }
1947 if (s->status & DO_AC3) return put_user(AFMT_AC3, (int *)arg);
1948 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (CM_CFMT_16BIT << CM_CFMT_ADCSHIFT)
1949 : (CM_CFMT_16BIT << CM_CFMT_DACSHIFT))) ? AFMT_S16_LE : AFMT_U8, (int *)arg);
1950
1951 case SNDCTL_DSP_POST:
1952 return 0;
1953
1954 case SNDCTL_DSP_GETTRIGGER:
1955 val = 0;
1956 if (s->status & DO_DUAL_DAC) {
1957 if (file->f_mode & FMODE_WRITE &&
1958 (s->enable & CM_ENABLE_CH1) &&
1959 (s->enable & CM_ENABLE_CH0))
1960 val |= PCM_ENABLE_OUTPUT;
1961 return put_user(val, (int *)arg);
1962 }
1963 if (file->f_mode & FMODE_READ && s->enable & CM_ENABLE_CH0)
1964 val |= PCM_ENABLE_INPUT;
1965 if (file->f_mode & FMODE_WRITE && s->enable & CM_ENABLE_CH1)
1966 val |= PCM_ENABLE_OUTPUT;
1967 return put_user(val, (int *)arg);
1968
1969 case SNDCTL_DSP_SETTRIGGER:
1970 if (get_user(val, (int *)arg))
1971 return -EFAULT;
1972 if (file->f_mode & FMODE_READ) {
1973 if (val & PCM_ENABLE_INPUT) {
1974 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1975 return ret;
1976 start_adc(s);
1977 } else
1978 stop_adc(s);
1979 }
1980 if (file->f_mode & FMODE_WRITE) {
1981 if (val & PCM_ENABLE_OUTPUT) {
1982 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1983 return ret;
1984 if (s->status & DO_DUAL_DAC) {
1985 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1986 return ret;
1987 }
1988 start_dac(s);
1989 } else
1990 stop_dac(s);
1991 }
1992 return 0;
1993
1994 case SNDCTL_DSP_GETOSPACE:
1995 if (!(file->f_mode & FMODE_WRITE))
1996 return -EINVAL;
1997 if (!(s->enable & CM_ENABLE_CH1) && (val = prog_dmabuf(s, 0)) != 0)
1998 return val;
1999 spin_lock_irqsave(&s->lock, flags);
2000 cm_update_ptr(s);
2001 abinfo.fragsize = s->dma_dac.fragsize;
2002 abinfo.bytes = s->dma_dac.dmasize - s->dma_dac.count;
2003 abinfo.fragstotal = s->dma_dac.numfrag;
2004 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
2005 spin_unlock_irqrestore(&s->lock, flags);
2006 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2007
2008 case SNDCTL_DSP_GETISPACE:
2009 if (!(file->f_mode & FMODE_READ))
2010 return -EINVAL;
2011 if (!(s->enable & CM_ENABLE_CH0) && (val = prog_dmabuf(s, 1)) != 0)
2012 return val;
2013 spin_lock_irqsave(&s->lock, flags);
2014 cm_update_ptr(s);
2015 abinfo.fragsize = s->dma_adc.fragsize;
2016 abinfo.bytes = s->dma_adc.count;
2017 abinfo.fragstotal = s->dma_adc.numfrag;
2018 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
2019 spin_unlock_irqrestore(&s->lock, flags);
2020 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2021
2022 case SNDCTL_DSP_NONBLOCK:
2023 file->f_flags |= O_NONBLOCK;
2024 return 0;
2025
2026 case SNDCTL_DSP_GETODELAY:
2027 if (!(file->f_mode & FMODE_WRITE))
2028 return -EINVAL;
2029 spin_lock_irqsave(&s->lock, flags);
2030 cm_update_ptr(s);
2031 val = s->dma_dac.count;
2032 spin_unlock_irqrestore(&s->lock, flags);
2033 return put_user(val, (int *)arg);
2034
2035 case SNDCTL_DSP_GETIPTR:
2036 if (!(file->f_mode & FMODE_READ))
2037 return -EINVAL;
2038 spin_lock_irqsave(&s->lock, flags);
2039 cm_update_ptr(s);
2040 cinfo.bytes = s->dma_adc.total_bytes;
2041 cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
2042 cinfo.ptr = s->dma_adc.hwptr;
2043 if (s->dma_adc.mapped)
2044 s->dma_adc.count &= s->dma_adc.fragsize-1;
2045 spin_unlock_irqrestore(&s->lock, flags);
2046 if (copy_to_user((void *)arg, &cinfo, sizeof(cinfo)))
2047 return -EFAULT;
2048 return 0;
2049
2050 case SNDCTL_DSP_GETOPTR:
2051 if (!(file->f_mode & FMODE_WRITE))
2052 return -EINVAL;
2053 spin_lock_irqsave(&s->lock, flags);
2054 cm_update_ptr(s);
2055 cinfo.bytes = s->dma_dac.total_bytes;
2056 cinfo.blocks = s->dma_dac.count >> s->dma_dac.fragshift;
2057 cinfo.ptr = s->dma_dac.hwptr;
2058 if (s->dma_dac.mapped)
2059 s->dma_dac.count &= s->dma_dac.fragsize-1;
2060 if (s->status & DO_DUAL_DAC) {
2061 if (s->dma_adc.mapped)
2062 s->dma_adc.count &= s->dma_adc.fragsize-1;
2063 }
2064 spin_unlock_irqrestore(&s->lock, flags);
2065 if (copy_to_user((void *)arg, &cinfo, sizeof(cinfo)))
2066 return -EFAULT;
2067 return 0;
2068
2069 case SNDCTL_DSP_GETBLKSIZE:
2070 if (file->f_mode & FMODE_WRITE) {
2071 if ((val = prog_dmabuf(s, 0)))
2072 return val;
2073 if (s->status & DO_DUAL_DAC) {
2074 if ((val = prog_dmabuf(s, 1)))
2075 return val;
2076 return put_user(2 * s->dma_dac.fragsize, (int *)arg);
2077 }
2078 return put_user(s->dma_dac.fragsize, (int *)arg);
2079 }
2080 if ((val = prog_dmabuf(s, 1)))
2081 return val;
2082 return put_user(s->dma_adc.fragsize, (int *)arg);
2083
2084 case SNDCTL_DSP_SETFRAGMENT:
2085 if (get_user(val, (int *)arg))
2086 return -EFAULT;
2087 if (file->f_mode & FMODE_READ) {
2088 s->dma_adc.ossfragshift = val & 0xffff;
2089 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
2090 if (s->dma_adc.ossfragshift < 4)
2091 s->dma_adc.ossfragshift = 4;
2092 if (s->dma_adc.ossfragshift > 15)
2093 s->dma_adc.ossfragshift = 15;
2094 if (s->dma_adc.ossmaxfrags < 4)
2095 s->dma_adc.ossmaxfrags = 4;
2096 }
2097 if (file->f_mode & FMODE_WRITE) {
2098 s->dma_dac.ossfragshift = val & 0xffff;
2099 s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
2100 if (s->dma_dac.ossfragshift < 4)
2101 s->dma_dac.ossfragshift = 4;
2102 if (s->dma_dac.ossfragshift > 15)
2103 s->dma_dac.ossfragshift = 15;
2104 if (s->dma_dac.ossmaxfrags < 4)
2105 s->dma_dac.ossmaxfrags = 4;
2106 if (s->status & DO_DUAL_DAC) {
2107 s->dma_adc.ossfragshift = s->dma_dac.ossfragshift;
2108 s->dma_adc.ossmaxfrags = s->dma_dac.ossmaxfrags;
2109 }
2110 }
2111 return 0;
2112
2113 case SNDCTL_DSP_SUBDIVIDE:
2114 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
2115 (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
2116 return -EINVAL;
2117 if (get_user(val, (int *)arg))
2118 return -EFAULT;
2119 if (val != 1 && val != 2 && val != 4)
2120 return -EINVAL;
2121 if (file->f_mode & FMODE_READ)
2122 s->dma_adc.subdivision = val;
2123 if (file->f_mode & FMODE_WRITE) {
2124 s->dma_dac.subdivision = val;
2125 if (s->status & DO_DUAL_DAC)
2126 s->dma_adc.subdivision = val;
2127 }
2128 return 0;
2129
2130 case SOUND_PCM_READ_RATE:
2131 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
2132
2133 case SOUND_PCM_READ_CHANNELS:
2134 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (CM_CFMT_STEREO << CM_CFMT_ADCSHIFT) : (CM_CFMT_STEREO << CM_CFMT_DACSHIFT))) ? 2 : 1, (int *)arg);
2135
2136 case SOUND_PCM_READ_BITS:
2137 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (CM_CFMT_16BIT << CM_CFMT_ADCSHIFT) : (CM_CFMT_16BIT << CM_CFMT_DACSHIFT))) ? 16 : 8, (int *)arg);
2138
2139 case SOUND_PCM_READ_FILTER:
2140 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
2141
2142 case SNDCTL_DSP_GETCHANNELMASK:
2143 return put_user(DSP_BIND_FRONT|DSP_BIND_SURR|DSP_BIND_CENTER_LFE|DSP_BIND_SPDIF, (int *)arg);
2144
2145 case SNDCTL_DSP_BIND_CHANNEL:
2146 if (get_user(val, (int *)arg))
2147 return -EFAULT;
2148 if (val == DSP_BIND_QUERY) {
2149 val = DSP_BIND_FRONT;
2150 if (s->status & DO_SPDIF_OUT)
2151 val |= DSP_BIND_SPDIF;
2152 else {
2153 if (s->curr_channels == 4)
2154 val |= DSP_BIND_SURR;
2155 if (s->curr_channels > 4)
2156 val |= DSP_BIND_CENTER_LFE;
2157 }
2158 } else {
2159 if (file->f_mode & FMODE_READ) {
2160 stop_adc(s);
2161 s->dma_adc.ready = 0;
2162 }
2163 if (file->f_mode & FMODE_WRITE) {
2164 stop_dac(s);
2165 s->dma_dac.ready = 0;
2166 if (val & DSP_BIND_SPDIF) {
2167 set_spdifout(s, s->ratedac);
2168 set_dac_channels(s, s->fmt & (CM_CFMT_STEREO << CM_CFMT_DACSHIFT) ? 2 : 1);
2169 if (!(s->status & DO_SPDIF_OUT))
2170 val &= ~DSP_BIND_SPDIF;
2171 } else {
2172 int channels;
2173 int mask;
2174
2175 mask = val & (DSP_BIND_FRONT|DSP_BIND_SURR|DSP_BIND_CENTER_LFE);
2176 switch (mask) {
2177 case DSP_BIND_FRONT:
2178 channels = 2;
2179 break;
2180 case DSP_BIND_FRONT|DSP_BIND_SURR:
2181 channels = 4;
2182 break;
2183 case DSP_BIND_FRONT|DSP_BIND_SURR|DSP_BIND_CENTER_LFE:
2184 channels = 6;
2185 break;
2186 default:
2187 channels = s->fmt & (CM_CFMT_STEREO << CM_CFMT_DACSHIFT) ? 2 : 1;
2188 break;
2189 }
2190 set_dac_channels(s, channels);
2191 }
2192 }
2193 }
2194 return put_user(val, (int *)arg);
2195
2196 case SOUND_PCM_WRITE_FILTER:
2197 case SNDCTL_DSP_MAPINBUF:
2198 case SNDCTL_DSP_MAPOUTBUF:
2199 case SNDCTL_DSP_SETSYNCRO:
2200 return -EINVAL;
2201
2202 }
2203 return mixer_ioctl(s, cmd, arg);
2204 }
2205
2206 static int cm_open(struct inode *inode, struct file *file)
2207 {
2208 int minor = minor(inode->i_rdev);
2209 struct cm_state *s = devs;
2210 unsigned char fmtm = ~0, fmts = 0;
2211
2212 while (s && ((s->dev_audio ^ minor) & ~0xf))
2213 s = s->next;
2214 if (!s)
2215 return -ENODEV;
2216 VALIDATE_STATE(s);
2217 file->private_data = s;
2218 /* wait for device to become free */
2219 down(&s->open_sem);
2220 while (s->open_mode & file->f_mode) {
2221 if (file->f_flags & O_NONBLOCK) {
2222 up(&s->open_sem);
2223 return -EBUSY;
2224 }
2225 up(&s->open_sem);
2226 interruptible_sleep_on(&s->open_wait);
2227 if (signal_pending(current))
2228 return -ERESTARTSYS;
2229 down(&s->open_sem);
2230 }
2231 if (file->f_mode & FMODE_READ) {
2232 fmtm &= ~((CM_CFMT_STEREO | CM_CFMT_16BIT) << CM_CFMT_ADCSHIFT);
2233 if ((minor & 0xf) == SND_DEV_DSP16)
2234 fmts |= CM_CFMT_16BIT << CM_CFMT_ADCSHIFT;
2235 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
2236 set_adc_rate(s, 8000);
2237 }
2238 if (file->f_mode & FMODE_WRITE) {
2239 fmtm &= ~((CM_CFMT_STEREO | CM_CFMT_16BIT) << CM_CFMT_DACSHIFT);
2240 if ((minor & 0xf) == SND_DEV_DSP16)
2241 fmts |= CM_CFMT_16BIT << CM_CFMT_DACSHIFT;
2242 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
2243 set_dac_rate(s, 8000);
2244 // clear previous multichannel, spdif, ac3 state
2245 set_spdifout(s, 0);
2246 if (s->deviceid == PCI_DEVICE_ID_CMEDIA_CM8738) {
2247 set_ac3(s, 0);
2248 set_dac_channels(s, 1);
2249 }
2250 }
2251 set_fmt(s, fmtm, fmts);
2252 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
2253 up(&s->open_sem);
2254 return 0;
2255 }
2256
2257 static int cm_release(struct inode *inode, struct file *file)
2258 {
2259 struct cm_state *s = (struct cm_state *)file->private_data;
2260
2261 VALIDATE_STATE(s);
2262 lock_kernel();
2263 if (file->f_mode & FMODE_WRITE)
2264 drain_dac(s, file->f_flags & O_NONBLOCK);
2265 down(&s->open_sem);
2266 if (file->f_mode & FMODE_WRITE) {
2267 stop_dac(s);
2268
2269 dealloc_dmabuf(&s->dma_dac);
2270 if (s->status & DO_DUAL_DAC)
2271 dealloc_dmabuf(&s->dma_adc);
2272
2273 if (s->status & DO_MULTI_CH)
2274 set_dac_channels(s, 0);
2275 if (s->status & DO_AC3)
2276 set_ac3(s, 0);
2277 if (s->status & DO_SPDIF_OUT)
2278 set_spdifout(s, 0);
2279 }
2280 if (file->f_mode & FMODE_READ) {
2281 stop_adc(s);
2282 dealloc_dmabuf(&s->dma_adc);
2283 }
2284 s->open_mode &= ~(file->f_mode & (FMODE_READ|FMODE_WRITE));
2285 up(&s->open_sem);
2286 wake_up(&s->open_wait);
2287 unlock_kernel();
2288 return 0;
2289 }
2290
2291 static /*const*/ struct file_operations cm_audio_fops = {
2292 .owner = THIS_MODULE,
2293 .llseek = no_llseek,
2294 .read = cm_read,
2295 .write = cm_write,
2296 .poll = cm_poll,
2297 .ioctl = cm_ioctl,
2298 .mmap = cm_mmap,
2299 .open = cm_open,
2300 .release = cm_release,
2301 };
2302
2303 #ifdef CONFIG_SOUND_CMPCI_MIDI
2304 /* --------------------------------------------------------------------- */
2305
2306 static ssize_t cm_midi_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
2307 {
2308 struct cm_state *s = (struct cm_state *)file->private_data;
2309 DECLARE_WAITQUEUE(wait, current);
2310 ssize_t ret;
2311 unsigned long flags;
2312 unsigned ptr;
2313 int cnt;
2314
2315 VALIDATE_STATE(s);
2316 if (ppos != &file->f_pos)
2317 return -ESPIPE;
2318 if (!access_ok(VERIFY_WRITE, buffer, count))
2319 return -EFAULT;
2320 ret = 0;
2321 add_wait_queue(&s->midi.iwait, &wait);
2322 while (count > 0) {
2323 spin_lock_irqsave(&s->lock, flags);
2324 ptr = s->midi.ird;
2325 cnt = MIDIINBUF - ptr;
2326 if (s->midi.icnt < cnt)
2327 cnt = s->midi.icnt;
2328 spin_unlock_irqrestore(&s->lock, flags);
2329 if (cnt > count)
2330 cnt = count;
2331 if (cnt <= 0) {
2332 if (file->f_flags & O_NONBLOCK)
2333 {
2334 if (!ret)
2335 ret = -EAGAIN;
2336 break;
2337 }
2338 __set_current_state(TASK_INTERRUPTIBLE);
2339 schedule();
2340 if (signal_pending(current))
2341 {
2342 if (!ret)
2343 ret = -ERESTARTSYS;
2344 break;
2345 }
2346 continue;
2347 }
2348 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt))
2349 {
2350 if (!ret)
2351 ret = -EFAULT;
2352 break;
2353 }
2354 ptr = (ptr + cnt) % MIDIINBUF;
2355 spin_lock_irqsave(&s->lock, flags);
2356 s->midi.ird = ptr;
2357 s->midi.icnt -= cnt;
2358 spin_unlock_irqrestore(&s->lock, flags);
2359 count -= cnt;
2360 buffer += cnt;
2361 ret += cnt;
2362 break;
2363 }
2364 __set_current_state(TASK_RUNNING);
2365 remove_wait_queue(&s->midi.iwait, &wait);
2366 return ret;
2367 }
2368
2369 static ssize_t cm_midi_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
2370 {
2371 struct cm_state *s = (struct cm_state *)file->private_data;
2372 DECLARE_WAITQUEUE(wait, current);
2373 ssize_t ret;
2374 unsigned long flags;
2375 unsigned ptr;
2376 int cnt;
2377
2378 VALIDATE_STATE(s);
2379 if (ppos != &file->f_pos)
2380 return -ESPIPE;
2381 if (!access_ok(VERIFY_READ, buffer, count))
2382 return -EFAULT;
2383 if (count == 0)
2384 return 0;
2385 ret = 0;
2386 add_wait_queue(&s->midi.owait, &wait);
2387 while (count > 0) {
2388 spin_lock_irqsave(&s->lock, flags);
2389 ptr = s->midi.owr;
2390 cnt = MIDIOUTBUF - ptr;
2391 if (s->midi.ocnt + cnt > MIDIOUTBUF)
2392 cnt = MIDIOUTBUF - s->midi.ocnt;
2393 if (cnt <= 0)
2394 cm_handle_midi(s);
2395 spin_unlock_irqrestore(&s->lock, flags);
2396 if (cnt > count)
2397 cnt = count;
2398 if (cnt <= 0) {
2399 if (file->f_flags & O_NONBLOCK)
2400 {
2401 if (!ret)
2402 ret = -EAGAIN;
2403 break;
2404 }
2405 __set_current_state(TASK_INTERRUPTIBLE);
2406 schedule();
2407 if (signal_pending(current)) {
2408 if (!ret)
2409 ret = -ERESTARTSYS;
2410 break;
2411 }
2412 continue;
2413 }
2414 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt))
2415 {
2416 if (!ret)
2417 ret = -EFAULT;
2418 break;
2419 }
2420 ptr = (ptr + cnt) % MIDIOUTBUF;
2421 spin_lock_irqsave(&s->lock, flags);
2422 s->midi.owr = ptr;
2423 s->midi.ocnt += cnt;
2424 spin_unlock_irqrestore(&s->lock, flags);
2425 count -= cnt;
2426 buffer += cnt;
2427 ret += cnt;
2428 spin_lock_irqsave(&s->lock, flags);
2429 cm_handle_midi(s);
2430 spin_unlock_irqrestore(&s->lock, flags);
2431 }
2432 __set_current_state(TASK_RUNNING);
2433 remove_wait_queue(&s->midi.owait, &wait);
2434 return ret;
2435 }
2436
2437 static unsigned int cm_midi_poll(struct file *file, struct poll_table_struct *wait)
2438 {
2439 struct cm_state *s = (struct cm_state *)file->private_data;
2440 unsigned long flags;
2441 unsigned int mask = 0;
2442
2443 VALIDATE_STATE(s);
2444 if (file->f_mode & FMODE_WRITE)
2445 poll_wait(file, &s->midi.owait, wait);
2446 if (file->f_mode & FMODE_READ)
2447 poll_wait(file, &s->midi.iwait, wait);
2448 spin_lock_irqsave(&s->lock, flags);
2449 if (file->f_mode & FMODE_READ) {
2450 if (s->midi.icnt > 0)
2451 mask |= POLLIN | POLLRDNORM;
2452 }
2453 if (file->f_mode & FMODE_WRITE) {
2454 if (s->midi.ocnt < MIDIOUTBUF)
2455 mask |= POLLOUT | POLLWRNORM;
2456 }
2457 spin_unlock_irqrestore(&s->lock, flags);
2458 return mask;
2459 }
2460
2461 static int cm_midi_open(struct inode *inode, struct file *file)
2462 {
2463 int minor = minor(inode->i_rdev);
2464 struct cm_state *s = devs;
2465 unsigned long flags;
2466
2467 while (s && s->dev_midi != minor)
2468 s = s->next;
2469 if (!s)
2470 return -ENODEV;
2471 VALIDATE_STATE(s);
2472 file->private_data = s;
2473 /* wait for device to become free */
2474 down(&s->open_sem);
2475 while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2476 if (file->f_flags & O_NONBLOCK) {
2477 up(&s->open_sem);
2478 return -EBUSY;
2479 }
2480 up(&s->open_sem);
2481 interruptible_sleep_on(&s->open_wait);
2482 if (signal_pending(current))
2483 return -ERESTARTSYS;
2484 down(&s->open_sem);
2485 }
2486 spin_lock_irqsave(&s->lock, flags);
2487 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2488 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2489 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2490 /* enable MPU-401 */
2491 maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0, 4);
2492 outb(0xff, s->iomidi+1); /* reset command */
2493 if (!(inb(s->iomidi+1) & 0x80))
2494 inb(s->iomidi);
2495 outb(0x3f, s->iomidi+1); /* uart command */
2496 if (!(inb(s->iomidi+1) & 0x80))
2497 inb(s->iomidi);
2498 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2499 init_timer(&s->midi.timer);
2500 s->midi.timer.expires = jiffies+1;
2501 s->midi.timer.data = (unsigned long)s;
2502 s->midi.timer.function = cm_midi_timer;
2503 add_timer(&s->midi.timer);
2504 }
2505 if (file->f_mode & FMODE_READ) {
2506 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2507 }
2508 if (file->f_mode & FMODE_WRITE) {
2509 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2510 }
2511 spin_unlock_irqrestore(&s->lock, flags);
2512 s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2513 up(&s->open_sem);
2514 return 0;
2515 }
2516
2517 static int cm_midi_release(struct inode *inode, struct file *file)
2518 {
2519 struct cm_state *s = (struct cm_state *)file->private_data;
2520 DECLARE_WAITQUEUE(wait, current);
2521 unsigned long flags;
2522 unsigned count, tmo;
2523
2524 VALIDATE_STATE(s);
2525 lock_kernel();
2526
2527 if (file->f_mode & FMODE_WRITE) {
2528 __set_current_state(TASK_INTERRUPTIBLE);
2529 add_wait_queue(&s->midi.owait, &wait);
2530 for (;;) {
2531 spin_lock_irqsave(&s->lock, flags);
2532 count = s->midi.ocnt;
2533 spin_unlock_irqrestore(&s->lock, flags);
2534 if (count <= 0)
2535 break;
2536 if (signal_pending(current))
2537 break;
2538 if (file->f_flags & O_NONBLOCK) {
2539 remove_wait_queue(&s->midi.owait, &wait);
2540 set_current_state(TASK_RUNNING);
2541 unlock_kernel();
2542 return -EBUSY;
2543 }
2544 tmo = (count * HZ) / 3100;
2545 if (!schedule_timeout(tmo ? : 1) && tmo)
2546 printk(KERN_DEBUG "cmpci: midi timed out??\n");
2547 }
2548 remove_wait_queue(&s->midi.owait, &wait);
2549 set_current_state(TASK_RUNNING);
2550 }
2551 down(&s->open_sem);
2552 s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
2553 spin_lock_irqsave(&s->lock, flags);
2554 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2555 del_timer(&s->midi.timer);
2556 outb(0xff, s->iomidi+1); /* reset command */
2557 if (!(inb(s->iomidi+1) & 0x80))
2558 inb(s->iomidi);
2559 /* disable MPU-401 */
2560 maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~4, 0);
2561 }
2562 spin_unlock_irqrestore(&s->lock, flags);
2563 up(&s->open_sem);
2564 wake_up(&s->open_wait);
2565 unlock_kernel();
2566 return 0;
2567 }
2568
2569 static /*const*/ struct file_operations cm_midi_fops = {
2570 .owner = THIS_MODULE,
2571 .llseek = no_llseek,
2572 .read = cm_midi_read,
2573 .write = cm_midi_write,
2574 .poll = cm_midi_poll,
2575 .open = cm_midi_open,
2576 .release = cm_midi_release,
2577 };
2578 #endif
2579
2580 /* --------------------------------------------------------------------- */
2581
2582 #ifdef CONFIG_SOUND_CMPCI_FM
2583 static int cm_dmfm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2584 {
2585 static const unsigned char op_offset[18] = {
2586 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
2587 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
2588 0x10, 0x11, 0x12, 0x13, 0x14, 0x15
2589 };
2590 struct cm_state *s = (struct cm_state *)file->private_data;
2591 struct dm_fm_voice v;
2592 struct dm_fm_note n;
2593 struct dm_fm_params p;
2594 unsigned int io;
2595 unsigned int regb;
2596
2597 switch (cmd) {
2598 case FM_IOCTL_RESET:
2599 for (regb = 0xb0; regb < 0xb9; regb++) {
2600 outb(regb, s->iosynth);
2601 outb(0, s->iosynth+1);
2602 outb(regb, s->iosynth+2);
2603 outb(0, s->iosynth+3);
2604 }
2605 return 0;
2606
2607 case FM_IOCTL_PLAY_NOTE:
2608 if (copy_from_user(&n, (void *)arg, sizeof(n)))
2609 return -EFAULT;
2610 if (n.voice >= 18)
2611 return -EINVAL;
2612 if (n.voice >= 9) {
2613 regb = n.voice - 9;
2614 io = s->iosynth+2;
2615 } else {
2616 regb = n.voice;
2617 io = s->iosynth;
2618 }
2619 outb(0xa0 + regb, io);
2620 outb(n.fnum & 0xff, io+1);
2621 outb(0xb0 + regb, io);
2622 outb(((n.fnum >> 8) & 3) | ((n.octave & 7) << 2) | ((n.key_on & 1) << 5), io+1);
2623 return 0;
2624
2625 case FM_IOCTL_SET_VOICE:
2626 if (copy_from_user(&v, (void *)arg, sizeof(v)))
2627 return -EFAULT;
2628 if (v.voice >= 18)
2629 return -EINVAL;
2630 regb = op_offset[v.voice];
2631 io = s->iosynth + ((v.op & 1) << 1);
2632 outb(0x20 + regb, io);
2633 outb(((v.am & 1) << 7) | ((v.vibrato & 1) << 6) | ((v.do_sustain & 1) << 5) |
2634 ((v.kbd_scale & 1) << 4) | (v.harmonic & 0xf), io+1);
2635 outb(0x40 + regb, io);
2636 outb(((v.scale_level & 0x3) << 6) | (v.volume & 0x3f), io+1);
2637 outb(0x60 + regb, io);
2638 outb(((v.attack & 0xf) << 4) | (v.decay & 0xf), io+1);
2639 outb(0x80 + regb, io);
2640 outb(((v.sustain & 0xf) << 4) | (v.release & 0xf), io+1);
2641 outb(0xe0 + regb, io);
2642 outb(v.waveform & 0x7, io+1);
2643 if (n.voice >= 9) {
2644 regb = n.voice - 9;
2645 io = s->iosynth+2;
2646 } else {
2647 regb = n.voice;
2648 io = s->iosynth;
2649 }
2650 outb(0xc0 + regb, io);
2651 outb(((v.right & 1) << 5) | ((v.left & 1) << 4) | ((v.feedback & 7) << 1) |
2652 (v.connection & 1), io+1);
2653 return 0;
2654
2655 case FM_IOCTL_SET_PARAMS:
2656 if (copy_from_user(&p, (void *)arg, sizeof(p)))
2657 return -EFAULT;
2658 outb(0x08, s->iosynth);
2659 outb((p.kbd_split & 1) << 6, s->iosynth+1);
2660 outb(0xbd, s->iosynth);
2661 outb(((p.am_depth & 1) << 7) | ((p.vib_depth & 1) << 6) | ((p.rhythm & 1) << 5) | ((p.bass & 1) << 4) |
2662 ((p.snare & 1) << 3) | ((p.tomtom & 1) << 2) | ((p.cymbal & 1) << 1) | (p.hihat & 1), s->iosynth+1);
2663 return 0;
2664
2665 case FM_IOCTL_SET_OPL:
2666 outb(4, s->iosynth+2);
2667 outb(arg, s->iosynth+3);
2668 return 0;
2669
2670 case FM_IOCTL_SET_MODE:
2671 outb(5, s->iosynth+2);
2672 outb(arg & 1, s->iosynth+3);
2673 return 0;
2674 }
2675 return -EINVAL;
2676 }
2677
2678 static int cm_dmfm_open(struct inode *inode, struct file *file)
2679 {
2680 int minor = minor(inode->i_rdev);
2681 struct cm_state *s = devs;
2682
2683 while (s && s->dev_dmfm != minor)
2684 s = s->next;
2685 if (!s)
2686 return -ENODEV;
2687 VALIDATE_STATE(s);
2688 file->private_data = s;
2689 /* wait for device to become free */
2690 down(&s->open_sem);
2691 while (s->open_mode & FMODE_DMFM) {
2692 if (file->f_flags & O_NONBLOCK) {
2693 up(&s->open_sem);
2694 return -EBUSY;
2695 }
2696 up(&s->open_sem);
2697 interruptible_sleep_on(&s->open_wait);
2698 if (signal_pending(current))
2699 return -ERESTARTSYS;
2700 down(&s->open_sem);
2701 }
2702 /* init the stuff */
2703 outb(1, s->iosynth);
2704 outb(0x20, s->iosynth+1); /* enable waveforms */
2705 outb(4, s->iosynth+2);
2706 outb(0, s->iosynth+3); /* no 4op enabled */
2707 outb(5, s->iosynth+2);
2708 outb(1, s->iosynth+3); /* enable OPL3 */
2709 s->open_mode |= FMODE_DMFM;
2710 up(&s->open_sem);
2711 return 0;
2712 }
2713
2714 static int cm_dmfm_release(struct inode *inode, struct file *file)
2715 {
2716 struct cm_state *s = (struct cm_state *)file->private_data;
2717 unsigned int regb;
2718
2719 VALIDATE_STATE(s);
2720 lock_kernel();
2721 down(&s->open_sem);
2722 s->open_mode &= ~FMODE_DMFM;
2723 for (regb = 0xb0; regb < 0xb9; regb++) {
2724 outb(regb, s->iosynth);
2725 outb(0, s->iosynth+1);
2726 outb(regb, s->iosynth+2);
2727 outb(0, s->iosynth+3);
2728 }
2729 up(&s->open_sem);
2730 wake_up(&s->open_wait);
2731 unlock_kernel();
2732 return 0;
2733 }
2734
2735 static /*const*/ struct file_operations cm_dmfm_fops = {
2736 .owner = THIS_MODULE,
2737 .llseek = no_llseek,
2738 .ioctl = cm_dmfm_ioctl,
2739 .open = cm_dmfm_open,
2740 .release = cm_dmfm_release,
2741 };
2742 #endif /* CONFIG_SOUND_CMPCI_FM */
2743
2744
2745
2746 static struct initvol {
2747 int mixch;
2748 int vol;
2749 } initvol[] __initdata = {
2750 { SOUND_MIXER_WRITE_CD, 0x4f4f },
2751 { SOUND_MIXER_WRITE_LINE, 0x4f4f },
2752 { SOUND_MIXER_WRITE_MIC, 0x4f4f },
2753 { SOUND_MIXER_WRITE_SYNTH, 0x4f4f },
2754 { SOUND_MIXER_WRITE_VOLUME, 0x4f4f },
2755 { SOUND_MIXER_WRITE_PCM, 0x4f4f }
2756 };
2757
2758 /* check chip version and capability */
2759 static int query_chip(struct cm_state *s)
2760 {
2761 int ChipVersion = -1;
2762 unsigned char RegValue;
2763
2764 // check reg 0Ch, bit 24-31
2765 RegValue = inb(s->iobase + CODEC_CMI_INT_HLDCLR + 3);
2766 if (RegValue == 0) {
2767 // check reg 08h, bit 24-28
2768 RegValue = inb(s->iobase + CODEC_CMI_CHFORMAT + 3);
2769 RegValue &= 0x1f;
2770 if (RegValue == 0) {
2771 ChipVersion = 33;
2772 s->max_channels = 4;
2773 s->capability |= CAN_AC3_SW;
2774 s->capability |= CAN_DUAL_DAC;
2775 } else {
2776 ChipVersion = 37;
2777 s->max_channels = 4;
2778 s->capability |= CAN_AC3_HW;
2779 s->capability |= CAN_DUAL_DAC;
2780 }
2781 } else {
2782 // check reg 0Ch, bit 26
2783 if (RegValue & (1 << (26-24))) {
2784 ChipVersion = 39;
2785 if (RegValue & (1 << (24-24)))
2786 s->max_channels = 6;
2787 else
2788 s->max_channels = 4;
2789 s->capability |= CAN_AC3_HW;
2790 s->capability |= CAN_DUAL_DAC;
2791 s->capability |= CAN_MULTI_CH_HW;
2792 } else {
2793 ChipVersion = 55; // 4 or 6 channels
2794 s->max_channels = 6;
2795 s->capability |= CAN_AC3_HW;
2796 s->capability |= CAN_DUAL_DAC;
2797 s->capability |= CAN_MULTI_CH_HW;
2798 }
2799 }
2800 // still limited to number of speakers
2801 if (s->max_channels > s->speakers)
2802 s->max_channels = s->speakers;
2803 return ChipVersion;
2804 }
2805
2806 #ifdef CONFIG_SOUND_CMPCI_MIDI
2807 static int mpuio = CONFIG_SOUND_CMPCI_MPUIO;
2808 #else
2809 static int mpuio;
2810 #endif
2811 #ifdef CONFIG_SOUND_CMPCI_FM
2812 static int fmio = CONFIG_SOUND_CMPCI_FMIO;
2813 #else
2814 static int fmio;
2815 #endif
2816 #ifdef CONFIG_SOUND_CMPCI_SPDIFINVERSE
2817 static int spdif_inverse = 1;
2818 #else
2819 static int spdif_inverse;
2820 #endif
2821 #ifdef CONFIG_SOUND_CMPCI_SPDIFLOOP
2822 static int spdif_loop = 1;
2823 #else
2824 static int spdif_loop;
2825 #endif
2826 #ifdef CONFIG_SOUND_CMPCI_SPEAKERS
2827 static int speakers = CONFIG_SOUND_CMPCI_SPEAKERS;
2828 #else
2829 static int speakers = 2;
2830 #endif
2831 #ifdef CONFIG_SOUND_CMPCI_LINE_REAR
2832 static int use_line_as_rear = 1;
2833 #else
2834 static int use_line_as_rear;
2835 #endif
2836 #ifdef CONFIG_SOUND_CMPCI_LINE_BASS
2837 static int use_line_as_bass = 1;
2838 #else
2839 static int use_line_as_bass;
2840 #endif
2841 #ifdef CONFIG_SOUND_CMPCI_JOYSTICK
2842 static int joystick = 1;
2843 #else
2844 static int joystick;
2845 #endif
2846 MODULE_PARM(mpuio, "i");
2847 MODULE_PARM(fmio, "i");
2848 MODULE_PARM(spdif_inverse, "i");
2849 MODULE_PARM(spdif_loop, "i");
2850 MODULE_PARM(speakers, "i");
2851 MODULE_PARM(use_line_as_rear, "i");
2852 MODULE_PARM(use_line_as_bass, "i");
2853 MODULE_PARM(joystick, "i");
2854 MODULE_PARM_DESC(mpuio, "(0x330, 0x320, 0x310, 0x300) Base of MPU-401, 0 to disable");
2855 MODULE_PARM_DESC(fmio, "(0x388, 0x3C8, 0x3E0) Base of OPL3, 0 to disable");
2856 MODULE_PARM_DESC(spdif_inverse, "(1/0) Invert S/PDIF-in signal");
2857 MODULE_PARM_DESC(spdif_loop, "(1/0) Route S/PDIF-in to S/PDIF-out directly");
2858 MODULE_PARM_DESC(speakers, "(2-6) Number of speakers you connect");
2859 MODULE_PARM_DESC(use_line_as_rear, "(1/0) Use line-in jack as rear-out");
2860 MODULE_PARM_DESC(use_line_as_bass, "(1/0) Use line-in jack as bass/center");
2861 MODULE_PARM_DESC(joystick, "(1/0) Enable joystick interface, still need joystick driver");
2862
2863 static struct pci_device_id cmpci_pci_tbl[] = {
2864 { PCI_VENDOR_ID_CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8738,
2865 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
2866 { PCI_VENDOR_ID_CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8338A,
2867 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
2868 { PCI_VENDOR_ID_CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8338B,
2869 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
2870 { 0 }
2871 };
2872 MODULE_DEVICE_TABLE(pci, cmpci_pci_tbl);
2873
2874 void initialize_chip(struct pci_dev *pcidev)
2875 {
2876 struct cm_state *s;
2877 mm_segment_t fs;
2878 int i, val;
2879 #if defined(CONFIG_SOUND_CMPCI_MIDI) || defined(CONFIG_SOUND_CMPCI_FM)
2880 unsigned char reg_mask = 0;
2881 #endif
2882 struct {
2883 unsigned short deviceid;
2884 char *devicename;
2885 } devicetable[] =
2886 {
2887 { PCI_DEVICE_ID_CMEDIA_CM8338A, "CM8338A" },
2888 { PCI_DEVICE_ID_CMEDIA_CM8338B, "CM8338B" },
2889 { PCI_DEVICE_ID_CMEDIA_CM8738, "CM8738" },
2890 { PCI_DEVICE_ID_CMEDIA_CM8738B, "CM8738B" },
2891 };
2892 char *devicename = "unknown";
2893 {
2894 if (pci_enable_device(pcidev))
2895 return;
2896 if (pcidev->irq == 0)
2897 return;
2898 s = kmalloc(sizeof(*s), GFP_KERNEL);
2899 if (!s) {
2900 printk(KERN_WARNING "cmpci: out of memory\n");
2901 return;
2902 }
2903 /* search device name */
2904 for (i = 0; i < sizeof(devicetable) / sizeof(devicetable[0]); i++) {
2905 if (devicetable[i].deviceid == pcidev->device)
2906 {
2907 devicename = devicetable[i].devicename;
2908 break;
2909 }
2910 }
2911 memset(s, 0, sizeof(struct cm_state));
2912 init_waitqueue_head(&s->dma_adc.wait);
2913 init_waitqueue_head(&s->dma_dac.wait);
2914 init_waitqueue_head(&s->open_wait);
2915 init_waitqueue_head(&s->midi.iwait);
2916 init_waitqueue_head(&s->midi.owait);
2917 init_MUTEX(&s->open_sem);
2918 spin_lock_init(&s->lock);
2919 s->magic = CM_MAGIC;
2920 s->iobase = pci_resource_start(pcidev, 0);
2921 s->iosynth = fmio;
2922 s->iomidi = mpuio;
2923 s->status = 0;
2924 /* range check */
2925 if (speakers < 2)
2926 speakers = 2;
2927 else if (speakers > 6)
2928 speakers = 6;
2929 s->speakers = speakers;
2930 if (s->iobase == 0)
2931 return;
2932 s->irq = pcidev->irq;
2933
2934 if (!request_region(s->iobase, CM_EXTENT_CODEC, "cmpci")) {
2935 printk(KERN_ERR "cmpci: io ports %#x-%#x in use\n", s->iobase, s->iobase+CM_EXTENT_CODEC-1);
2936 goto err_region5;
2937 }
2938 #ifdef CONFIG_SOUND_CMPCI_MIDI
2939 /* disable MPU-401 */
2940 maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0x04, 0);
2941 if (s->iomidi) {
2942 if (!request_region(s->iomidi, CM_EXTENT_MIDI, "cmpci Midi")) {
2943 printk(KERN_ERR "cmpci: io ports %#x-%#x in use\n", s->iomidi, s->iomidi+CM_EXTENT_MIDI-1);
2944 s->iomidi = 0;
2945 } else {
2946 /* set IO based at 0x330 */
2947 switch (s->iomidi) {
2948 case 0x330:
2949 reg_mask = 0;
2950 break;
2951 case 0x320:
2952 reg_mask = 0x20;
2953 break;
2954 case 0x310:
2955 reg_mask = 0x40;
2956 break;
2957 case 0x300:
2958 reg_mask = 0x60;
2959 break;
2960 default:
2961 s->iomidi = 0;
2962 break;
2963 }
2964 outb((inb(s->iobase + CODEC_CMI_LEGACY_CTRL + 3) & ~0x60) | reg_mask, s->iobase + CODEC_CMI_LEGACY_CTRL + 3);
2965 /* enable MPU-401 */
2966 if (s->iomidi) {
2967 maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0, 0x04);
2968 }
2969 }
2970 }
2971 #endif
2972 #ifdef CONFIG_SOUND_CMPCI_FM
2973 /* disable FM */
2974 maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~8, 0);
2975 if (s->iosynth) {
2976 if (!request_region(s->iosynth, CM_EXTENT_SYNTH, "cmpci FM")) {
2977 printk(KERN_ERR "cmpci: io ports %#x-%#x in use\n", s->iosynth, s->iosynth+CM_EXTENT_SYNTH-1);
2978 s->iosynth = 0;
2979 } else {
2980 /* set IO based at 0x388 */
2981 switch (s->iosynth) {
2982 case 0x388:
2983 reg_mask = 0;
2984 break;
2985 case 0x3C8:
2986 reg_mask = 0x01;
2987 break;
2988 case 0x3E0:
2989 reg_mask = 0x02;
2990 break;
2991 case 0x3E8:
2992 reg_mask = 0x03;
2993 break;
2994 default:
2995 s->iosynth = 0;
2996 break;
2997 }
2998 maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 3, ~0x03, reg_mask);
2999 /* enable FM */
3000 if (s->iosynth) {
3001 maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~0, 8);
3002 }
3003 }
3004 }
3005 #endif
3006 /* enable joystick */
3007 if (joystick)
3008 maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0, 0x02);
3009 else
3010 maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0x02, 0);
3011 /* initialize codec registers */
3012 outb(0, s->iobase + CODEC_CMI_INT_HLDCLR + 2); /* disable ints */
3013 outb(0, s->iobase + CODEC_CMI_FUNCTRL0 + 2); /* disable channels */
3014 /* reset mixer */
3015 wrmixer(s, DSP_MIX_DATARESETIDX, 0);
3016
3017 /* request irq */
3018 if (request_irq(s->irq, cm_interrupt, SA_SHIRQ, "cmpci", s)) {
3019 printk(KERN_ERR "cmpci: irq %u in use\n", s->irq);
3020 goto err_irq;
3021 }
3022 printk(KERN_INFO "cmpci: found %s adapter at io %#06x irq %u\n",
3023 devicename, s->iobase, s->irq);
3024 /* register devices */
3025 if ((s->dev_audio = register_sound_dsp(&cm_audio_fops, -1)) < 0)
3026 goto err_dev1;
3027 if ((s->dev_mixer = register_sound_mixer(&cm_mixer_fops, -1)) < 0)
3028 goto err_dev2;
3029 #ifdef CONFIG_SOUND_CMPCI_MIDI
3030 if ((s->dev_midi = register_sound_midi(&cm_midi_fops, -1)) < 0)
3031 goto err_dev3;
3032 #endif
3033 #ifdef CONFIG_SOUND_CMPCI_FM
3034 if ((s->dev_dmfm = register_sound_special(&cm_dmfm_fops, 15 /* ?? */)) < 0)
3035 goto err_dev4;
3036 #endif
3037 pci_set_master(pcidev); /* enable bus mastering */
3038 /* initialize the chips */
3039 fs = get_fs();
3040 set_fs(KERNEL_DS);
3041 /* set mixer output */
3042 frobindir(s, DSP_MIX_OUTMIXIDX, 0x1f, 0x1f);
3043 /* set mixer input */
3044 val = SOUND_MASK_LINE|SOUND_MASK_SYNTH|SOUND_MASK_CD|SOUND_MASK_MIC;
3045 mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
3046 for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
3047 val = initvol[i].vol;
3048 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
3049 }
3050 /* use channel 0 for record, channel 1 for play */
3051 maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~2, 1);
3052 s->deviceid = pcidev->device;
3053
3054 if (pcidev->device == PCI_DEVICE_ID_CMEDIA_CM8738) {
3055
3056 /* chip version and hw capability check */
3057 s->chip_version = query_chip(s);
3058 printk(KERN_INFO "cmpci: chip version = 0%d\n", s->chip_version);
3059
3060 /* seet SPDIF-in inverse before enable SPDIF loop */
3061 if (spdif_inverse) {
3062 /* turn on spdif-in inverse */
3063 maskb(s->iobase + CODEC_CMI_CHFORMAT + 2, ~0, 1);
3064 printk(KERN_INFO "cmpci: Inverse SPDIF-in\n");
3065 } else {
3066 /* turn off spdif-ininverse */
3067 maskb(s->iobase + CODEC_CMI_CHFORMAT + 2, ~1, 0);
3068 }
3069
3070 /* enable SPDIF loop */
3071 if (spdif_loop) {
3072 s->status |= DO_SPDIF_LOOP;
3073 /* turn on spdif-in to spdif-out */
3074 maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0, 0x80);
3075 printk(KERN_INFO "cmpci: Enable SPDIF loop\n");
3076 } else {
3077 s->status &= ~DO_SPDIF_LOOP;
3078 /* turn off spdif-in to spdif-out */
3079 maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0x80, 0);
3080 }
3081 if (use_line_as_rear) {
3082 s->capability |= CAN_LINE_AS_REAR;
3083 s->status |= DO_LINE_AS_REAR;
3084 maskb(s->iobase + CODEC_CMI_MIXER1, ~0, 0x20);
3085 } else
3086 maskb(s->iobase + CODEC_CMI_MIXER1, ~0x20, 0);
3087 if (s->chip_version >= 39) {
3088 if (use_line_as_bass) {
3089 s->capability |= CAN_LINE_AS_BASS;
3090 s->status |= DO_LINE_AS_BASS;
3091 maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 1, ~0, 0x60);
3092 } else
3093 maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 1, ~0x60, 0);
3094 }
3095 } else {
3096 /* 8338 will fall here */
3097 s->max_channels = 2;
3098 }
3099 /* queue it for later freeing */
3100 s->next = devs;
3101 devs = s;
3102 return;
3103
3104 #ifdef CONFIG_SOUND_CMPCI_FM
3105 unregister_sound_special(s->dev_dmfm);
3106 err_dev4:
3107 #endif
3108 #ifdef CONFIG_SOUND_CMPCI_MIDI
3109 unregister_sound_midi(s->dev_midi);
3110 err_dev3:
3111 #endif
3112 unregister_sound_mixer(s->dev_mixer);
3113 err_dev2:
3114 unregister_sound_dsp(s->dev_audio);
3115 err_dev1:
3116 printk(KERN_ERR "cmpci: cannot register misc device\n");
3117 free_irq(s->irq, s);
3118 err_irq:
3119 #ifdef CONFIG_SOUND_CMPCI_FM
3120 if (s->iosynth) release_region(s->iosynth, CM_EXTENT_SYNTH);
3121 #endif
3122 #ifdef CONFIG_SOUND_CMPCI_MIDI
3123 if (s->iomidi) release_region(s->iomidi, CM_EXTENT_MIDI);
3124 #endif
3125 release_region(s->iobase, CM_EXTENT_CODEC);
3126 err_region5:
3127 kfree(s);
3128 }
3129 if (!devs) {
3130 if (wavetable_mem)
3131 free_pages(wavetable_mem, 20-PAGE_SHIFT);
3132 return;
3133 }
3134 return;
3135 }
3136
3137 static int __init init_cmpci(void)
3138 {
3139 struct pci_dev *pcidev = NULL;
3140 int index = 0;
3141
3142 printk(KERN_INFO "cmpci: version $Revision: 5.64 $ time " __TIME__ " " __DATE__ "\n");
3143
3144 while (index < NR_DEVICE && (
3145 (pcidev = pci_find_device(PCI_VENDOR_ID_CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8738, pcidev)))) {
3146 initialize_chip(pcidev);
3147 index++;
3148 }
3149 while (index < NR_DEVICE && (
3150 (pcidev = pci_find_device(PCI_VENDOR_ID_CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8338A, pcidev)))) {
3151 initialize_chip(pcidev);
3152 index++;
3153 }
3154 while (index < NR_DEVICE && (
3155 (pcidev = pci_find_device(PCI_VENDOR_ID_CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8338B, pcidev)))) {
3156 initialize_chip(pcidev);
3157 index++;
3158 }
3159 return 0;
3160 }
3161
3162 /* --------------------------------------------------------------------- */
3163
3164 MODULE_AUTHOR("ChenLi Tien, cltien@cmedia.com.tw");
3165 MODULE_DESCRIPTION("CM8x38 Audio Driver");
3166 MODULE_LICENSE("GPL");
3167
3168
3169 static void __exit cleanup_cmpci(void)
3170 {
3171 struct cm_state *s;
3172
3173 while ((s = devs)) {
3174 devs = devs->next;
3175 outb(0, s->iobase + CODEC_CMI_INT_HLDCLR + 2); /* disable ints */
3176 synchronize_irq(s->irq);
3177 outb(0, s->iobase + CODEC_CMI_FUNCTRL0 + 2); /* disable channels */
3178 free_irq(s->irq, s);
3179
3180 /* reset mixer */
3181 wrmixer(s, DSP_MIX_DATARESETIDX, 0);
3182
3183 release_region(s->iobase, CM_EXTENT_CODEC);
3184 #ifdef CONFIG_SOUND_CMPCI_MIDI
3185 if (s->iomidi) release_region(s->iomidi, CM_EXTENT_MIDI);
3186 #endif
3187 #ifdef CONFIG_SOUND_CMPCI_FM
3188 if (s->iosynth) release_region(s->iosynth, CM_EXTENT_SYNTH);
3189 #endif
3190 unregister_sound_dsp(s->dev_audio);
3191 unregister_sound_mixer(s->dev_mixer);
3192 #ifdef CONFIG_SOUND_CMPCI_MIDI
3193 unregister_sound_midi(s->dev_midi);
3194 #endif
3195 #ifdef CONFIG_SOUND_CMPCI_FM
3196 unregister_sound_special(s->dev_dmfm);
3197 #endif
3198 kfree(s);
3199 }
3200 if (wavetable_mem)
3201 free_pages(wavetable_mem, 20-PAGE_SHIFT);
3202 printk(KERN_INFO "cmpci: unloading\n");
3203 }
3204
3205 module_init(init_cmpci);
3206 module_exit(cleanup_cmpci);
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