2 * OHCI HCD (Host Controller Driver) for USB.
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
14 * This file is licenced under the GPL.
17 #ifdef CONFIG_PMAC_PBOOK
18 #include <asm/machdep.h>
19 #include <asm/pmac_feature.h>
20 #include <asm/pci-bridge.h>
27 #error "This file is PCI bus glue. CONFIG_PCI must be defined."
30 /*-------------------------------------------------------------------------*/
32 struct ohci_hcd
*dev_to_ohci(struct device
*dev
) {
33 struct pci_dev
*pdev
=
34 container_of (dev
, struct pci_dev
, dev
);
35 struct ohci_hcd
*ohci
=
36 container_of (pci_get_drvdata (pdev
), struct ohci_hcd
, hcd
);
41 /*-------------------------------------------------------------------------*/
44 ohci_pci_start (struct usb_hcd
*hcd
)
46 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
50 ohci
->hcca
= pci_alloc_consistent (hcd
->pdev
,
51 sizeof *ohci
->hcca
, &ohci
->hcca_dma
);
55 /* AMD 756, for most chips (early revs), corrupts register
56 * values on read ... so enable the vendor workaround.
58 if (hcd
->pdev
->vendor
== 0x1022
59 && hcd
->pdev
->device
== 0x740c) {
60 ohci
->flags
= OHCI_QUIRK_AMD756
;
61 info ("%s: AMD756 erratum 4 workaround",
65 /* Apple's OHCI driver has a lot of bizarre workarounds
66 * for this chip. Evidently control and bulk lists
67 * can get confused. (B&W G3 models, and ...)
69 else if (hcd
->pdev
->vendor
== 0x1045
70 && hcd
->pdev
->device
== 0xc861) {
71 info ("%s: WARNING: OPTi workarounds unavailable",
76 memset (ohci
->hcca
, 0, sizeof (struct ohci_hcca
));
77 if ((ret
= ohci_mem_init (ohci
)) < 0) {
81 ohci
->regs
= hcd
->regs
;
83 if (hc_reset (ohci
) < 0) {
88 if (hc_start (ohci
) < 0) {
89 err ("can't start %s", ohci
->hcd
.self
.bus_name
);
102 static int ohci_pci_suspend (struct usb_hcd
*hcd
, u32 state
)
104 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
108 if ((ohci
->hc_control
& OHCI_CTRL_HCFS
) != OHCI_USB_OPER
) {
109 dbg ("can't suspend %s (state is %s)", hcd
->self
.bus_name
,
110 hcfs2string (ohci
->hc_control
& OHCI_CTRL_HCFS
));
114 /* act as if usb suspend can always be used */
115 dbg ("%s: suspend to %d", hcd
->self
.bus_name
, state
);
118 /* First stop processing */
119 spin_lock_irqsave (&ohci
->lock
, flags
);
121 ~(OHCI_CTRL_PLE
|OHCI_CTRL_CLE
|OHCI_CTRL_BLE
|OHCI_CTRL_IE
);
122 writel (ohci
->hc_control
, &ohci
->regs
->control
);
123 writel (OHCI_INTR_SF
, &ohci
->regs
->intrstatus
);
124 (void) readl (&ohci
->regs
->intrstatus
);
125 spin_unlock_irqrestore (&ohci
->lock
, flags
);
127 /* Wait a frame or two */
129 if (!readl (&ohci
->regs
->intrstatus
) & OHCI_INTR_SF
)
132 #ifdef CONFIG_PMAC_PBOOK
133 if (_machine
== _MACH_Pmac
)
134 disable_irq (hcd
->pdev
->irq
);
135 /* else, 2.4 assumes shared irqs -- don't disable */
138 /* Enable remote wakeup */
139 writel (readl (&ohci
->regs
->intrenable
) | OHCI_INTR_RD
,
140 &ohci
->regs
->intrenable
);
142 /* Suspend chip and let things settle down a bit */
143 ohci
->hc_control
= OHCI_USB_SUSPEND
;
144 writel (ohci
->hc_control
, &ohci
->regs
->control
);
145 (void) readl (&ohci
->regs
->control
);
146 mdelay (500); /* No schedule here ! */
148 switch (readl (&ohci
->regs
->control
) & OHCI_CTRL_HCFS
) {
150 dbg ("%s suspend->reset ?", hcd
->self
.bus_name
);
152 case OHCI_USB_RESUME
:
153 dbg ("%s suspend->resume ?", hcd
->self
.bus_name
);
156 dbg ("%s suspend->operational ?", hcd
->self
.bus_name
);
158 case OHCI_USB_SUSPEND
:
159 dbg ("%s suspended", hcd
->self
.bus_name
);
163 /* In some rare situations, Apple's OHCI have happily trashed
164 * memory during sleep. We disable its bus master bit during
167 pci_read_config_word (hcd
->pdev
, PCI_COMMAND
, &cmd
);
168 cmd
&= ~PCI_COMMAND_MASTER
;
169 pci_write_config_word (hcd
->pdev
, PCI_COMMAND
, cmd
);
170 #ifdef CONFIG_PMAC_PBOOK
172 struct device_node
*of_node
;
174 /* Disable USB PAD & cell clock */
175 of_node
= pci_device_to_OF_node (hcd
->pdev
);
177 pmac_call_feature(PMAC_FTR_USB_ENABLE
, of_node
, 0, 0);
184 static int ohci_pci_resume (struct usb_hcd
*hcd
)
186 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
191 #ifdef CONFIG_PMAC_PBOOK
193 struct device_node
*of_node
;
195 /* Re-enable USB PAD & cell clock */
196 of_node
= pci_device_to_OF_node (hcd
->pdev
);
198 pmac_call_feature (PMAC_FTR_USB_ENABLE
, of_node
, 0, 1);
201 /* did we suspend, or were we powered off? */
202 ohci
->hc_control
= readl (&ohci
->regs
->control
);
203 temp
= ohci
->hc_control
& OHCI_CTRL_HCFS
;
206 /* the registers may look crazy here */
207 ohci_dump_status (ohci
);
210 /* Re-enable bus mastering */
211 pci_set_master (ohci
->hcd
.pdev
);
215 case OHCI_USB_RESET
: // lost power
216 info ("USB restart: %s", hcd
->self
.bus_name
);
217 retval
= hc_restart (ohci
);
220 case OHCI_USB_SUSPEND
: // host wakeup
221 case OHCI_USB_RESUME
: // remote wakeup
222 info ("USB continue: %s from %s wakeup", hcd
->self
.bus_name
,
223 (temp
== OHCI_USB_SUSPEND
)
224 ? "host" : "remote");
225 ohci
->hc_control
= OHCI_USB_RESUME
;
226 writel (ohci
->hc_control
, &ohci
->regs
->control
);
227 (void) readl (&ohci
->regs
->control
);
228 mdelay (20); /* no schedule here ! */
229 /* Some controllers (lucent) need a longer delay here */
232 temp
= readl (&ohci
->regs
->control
);
233 temp
= ohci
->hc_control
& OHCI_CTRL_HCFS
;
234 if (temp
!= OHCI_USB_RESUME
) {
235 err ("controller %s won't resume", hcd
->self
.bus_name
);
241 /* Some chips likes being resumed first */
242 writel (OHCI_USB_OPER
, &ohci
->regs
->control
);
243 (void) readl (&ohci
->regs
->control
);
246 /* Then re-enable operations */
247 spin_lock_irqsave (&ohci
->lock
, flags
);
250 ohci
->hc_control
= OHCI_CONTROL_INIT
| OHCI_USB_OPER
;
251 if (!ohci
->ed_rm_list
) {
252 if (ohci
->ed_controltail
)
253 ohci
->hc_control
|= OHCI_CTRL_CLE
;
254 if (ohci
->ed_bulktail
)
255 ohci
->hc_control
|= OHCI_CTRL_BLE
;
257 hcd
->state
= USB_STATE_READY
;
258 writel (ohci
->hc_control
, &ohci
->regs
->control
);
260 /* trigger a start-frame interrupt (why?) */
261 writel (OHCI_INTR_SF
, &ohci
->regs
->intrstatus
);
262 writel (OHCI_INTR_SF
, &ohci
->regs
->intrenable
);
264 /* Check for a pending done list */
265 writel (OHCI_INTR_WDH
, &ohci
->regs
->intrdisable
);
266 (void) readl (&ohci
->regs
->intrdisable
);
267 spin_unlock_irqrestore (&ohci
->lock
, flags
);
269 #ifdef CONFIG_PMAC_PBOOK
270 if (_machine
== _MACH_Pmac
)
271 enable_irq (hcd
->pdev
->irq
);
273 if (ohci
->hcca
->done_head
)
274 dl_done_list (ohci
, dl_reverse_done_list (ohci
));
275 writel (OHCI_INTR_WDH
, &ohci
->regs
->intrenable
);
277 /* assume there are TDs on the bulk and control lists */
278 writel (OHCI_BLF
| OHCI_CLF
, &ohci
->regs
->cmdstatus
);
280 // ohci_dump_status (ohci);
281 dbg ("sleeping = %d, disabled = %d", ohci
->sleeping
, ohci
->disabled
);
285 warn ("odd PCI resume for %s", hcd
->self
.bus_name
);
290 #endif /* CONFIG_PM */
293 /*-------------------------------------------------------------------------*/
295 static const struct hc_driver ohci_pci_hc_driver
= {
296 .description
= hcd_name
,
299 * generic hardware linkage
302 .flags
= HCD_MEMORY
| HCD_USB11
,
305 * basic lifecycle operations
307 .start
= ohci_pci_start
,
309 .suspend
= ohci_pci_suspend
,
310 .resume
= ohci_pci_resume
,
315 * memory lifecycle (except per-request)
317 .hcd_alloc
= ohci_hcd_alloc
,
318 .hcd_free
= ohci_hcd_free
,
321 * managing i/o requests and associated device resources
323 .urb_enqueue
= ohci_urb_enqueue
,
324 .urb_dequeue
= ohci_urb_dequeue
,
325 .free_config
= ohci_free_config
,
330 .get_frame_number
= ohci_get_frame
,
335 .hub_status_data
= ohci_hub_status_data
,
336 .hub_control
= ohci_hub_control
,
339 /*-------------------------------------------------------------------------*/
342 static const struct pci_device_id __devinitdata pci_ids
[] = { {
344 /* handle any USB OHCI controller */
345 .class = (PCI_CLASS_SERIAL_USB
<< 8) | 0x10,
347 .driver_data
= (unsigned long) &ohci_pci_hc_driver
,
349 /* no matter who makes it */
350 .vendor
= PCI_ANY_ID
,
351 .device
= PCI_ANY_ID
,
352 .subvendor
= PCI_ANY_ID
,
353 .subdevice
= PCI_ANY_ID
,
355 }, { /* end: all zeroes */ }
357 MODULE_DEVICE_TABLE (pci
, pci_ids
);
359 /* pci driver glue; this is a "new style" PCI driver module */
360 static struct pci_driver ohci_pci_driver
= {
361 .name
= (char *) hcd_name
,
364 .probe
= usb_hcd_pci_probe
,
365 .remove
= usb_hcd_pci_remove
,
368 .suspend
= usb_hcd_pci_suspend
,
369 .resume
= usb_hcd_pci_resume
,
374 static int __init
ohci_hcd_pci_init (void)
376 dbg (DRIVER_INFO
" (PCI)");
380 dbg ("block sizes: ed %d td %d",
381 sizeof (struct ed
), sizeof (struct td
));
382 return pci_module_init (&ohci_pci_driver
);
384 module_init (ohci_hcd_pci_init
);
386 /*-------------------------------------------------------------------------*/
388 static void __exit
ohci_hcd_pci_cleanup (void)
390 pci_unregister_driver (&ohci_pci_driver
);
392 module_exit (ohci_hcd_pci_cleanup
);