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Merge with Linux 2.5.48.
[linux-2.6/linux-mips.git] / drivers / isdn / hardware / eicon / os_pri.c
blob1f746bfe7d72e0f075b0d02e3e0cc0bb5e5a13d1
1 /* $Id: os_pri.c,v 1.1.2.3 2001/02/14 21:10:19 armin Exp $ */
2
3 #include "platform.h"
4 #include "debuglib.h"
5 #include "cardtype.h"
6 #include "dlist.h"
7 #include "pc.h"
8 #include "pr_pc.h"
9 #include "di_defs.h"
10 #include "dsp_defs.h"
11 #include "di.h"
12 #include "io.h"
13
14 #include "xdi_msg.h"
15 #include "xdi_adapter.h"
16 #include "os_pri.h"
17 #include "diva_pci.h"
18 #include "mi_pc.h"
19 #include "pc_maint.h"
20 #include "dsp_tst.h"
21 #include "diva_dma.h"
22
23 /* --------------------------------------------------------------------------
24 OS Dependent part of XDI driver for DIVA PRI Adapter
25
26 DSP detection/validation by Anthony Booth (Eicon Networks, www.eicon.com)
27 -------------------------------------------------------------------------- */
28
29 #define DIVA_PRI_NO_PCI_BIOS_WORKAROUND 1
30
31 extern int diva_card_read_xlog(diva_os_xdi_adapter_t * a);
32
33 /*
34 ** IMPORTS
35 */
36 extern void prepare_pri_functions(PISDN_ADAPTER IoAdapter);
37 extern void prepare_pri2_functions(PISDN_ADAPTER IoAdapter);
38 extern void diva_xdi_display_adapter_features(int card);
39
40 static int diva_pri_cleanup_adapter(diva_os_xdi_adapter_t * a);
41 static int diva_pri_cmd_card_proc(struct _diva_os_xdi_adapter *a,
42 diva_xdi_um_cfg_cmd_t * cmd, int length);
43 static int pri_get_serial_number(diva_os_xdi_adapter_t * a);
44 static int diva_pri_stop_adapter(diva_os_xdi_adapter_t * a);
45 static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a);
46
47 /*
48 ** Check card revision
49 */
50 static int pri_is_rev_2_card(int card_ordinal)
51 {
52 switch (card_ordinal) {
53 case CARDTYPE_DIVASRV_P_30M_V2_PCI:
54 case CARDTYPE_DIVASRV_VOICE_P_30M_V2_PCI:
55 return (1);
56 }
57 return (0);
58 }
59
60 /*
61 ** BAR0 - SDRAM, MP_MEMORY_SIZE, MP2_MEMORY_SIZE by Rev.2
62 ** BAR1 - DEVICES, 0x1000
63 ** BAR2 - CONTROL (REG), 0x2000
64 ** BAR3 - FLASH (REG), 0x8000
65 ** BAR4 - CONFIG (CFG), 0x1000
66 */
67 int diva_pri_init_card(diva_os_xdi_adapter_t * a)
68 {
69 int bar = 0;
70 int pri_rev_2;
71 unsigned long bar_length[5] = {
72 MP_MEMORY_SIZE,
73 0x1000,
74 0x2000,
75 0x8000,
76 0x1000
77 };
78
79 pri_rev_2 = pri_is_rev_2_card(a->CardOrdinal);
80
81 if (pri_rev_2) {
82 bar_length[0] = MP2_MEMORY_SIZE;
83 }
84 /*
85 Set properties
86 */
87 a->xdi_adapter.Properties = CardProperties[a->CardOrdinal];
88 DBG_LOG(("Load %s", a->xdi_adapter.Properties.Name))
89
90 /*
91 First initialization step: get and check hardware resoures.
92 Do not map resources and do not acecess card at this step
93 */
94 for (bar = 0; bar < 5; bar++) {
95 a->resources.pci.bar[bar] =
96 divasa_get_pci_bar(a->resources.pci.bus,
97 a->resources.pci.func, bar,
98 a->resources.pci.hdev);
99 if (!a->resources.pci.bar[bar]
100 || (a->resources.pci.bar[bar] == 0xFFFFFFF0)) {
101 DBG_ERR(("A: invalid bar[%d]=%08x", bar,
102 a->resources.pci.bar[bar]))
103 return (-1);
104 }
105 }
106 a->resources.pci.irq =
107 (byte) divasa_get_pci_irq(a->resources.pci.bus,
108 a->resources.pci.func,
109 a->resources.pci.hdev);
110 if (!a->resources.pci.irq) {
111 DBG_ERR(("A: invalid irq"));
112 return (-1);
113 }
114
115 /*
116 Map all BAR's
117 */
118 for (bar = 0; bar < 5; bar++) {
119 a->resources.pci.addr[bar] =
120 divasa_remap_pci_bar(a->resources.pci.bar[bar],
121 bar_length[bar]);
122 if (!a->resources.pci.addr[bar]) {
123 DBG_ERR(("A: A(%d), can't map bar[%d]",
124 a->controller, bar))
125 diva_pri_cleanup_adapter(a);
126 return (-1);
127 }
128 }
129
130 /*
131 Get Serial Number of this adapter
132 */
133 if (pri_get_serial_number(a)) {
134 dword serNo;
135 serNo = a->resources.pci.bar[1] & 0xffff0000;
136 serNo |= ((dword) a->resources.pci.bus) << 8;
137 serNo += (a->resources.pci.func + a->controller + 1);
138 a->xdi_adapter.serialNo = serNo & ~0xFF000000;
139 DBG_ERR(("A: A(%d) can't get Serial Number, generated serNo=%ld",
140 a->controller, a->xdi_adapter.serialNo))
141 }
142
143
144 /*
145 Initialize os objects
146 */
147 if (diva_os_initialize_spin_lock(&a->xdi_adapter.isr_spin_lock, "isr")) {
148 diva_pri_cleanup_adapter(a);
149 return (-1);
150 }
151 if (diva_os_initialize_spin_lock
152 (&a->xdi_adapter.data_spin_lock, "data")) {
153 diva_pri_cleanup_adapter(a);
154 return (-1);
155 }
156
157 strcpy(a->xdi_adapter.req_soft_isr.dpc_thread_name, "kdivasprid");
158
159 if (diva_os_initialize_soft_isr(&a->xdi_adapter.req_soft_isr,
160 DIDpcRoutine, &a->xdi_adapter)) {
161 diva_pri_cleanup_adapter(a);
162 return (-1);
163 }
164
165 /*
166 Do not initialize second DPC - only one thread will be created
167 */
168 a->xdi_adapter.isr_soft_isr.object =
169 a->xdi_adapter.req_soft_isr.object;
170
171 /*
172 Next step of card initialization:
173 set up all interface pointers
174 */
175 a->xdi_adapter.Channels = CardProperties[a->CardOrdinal].Channels;
176 a->xdi_adapter.e_max = CardProperties[a->CardOrdinal].E_info;
177
178 a->xdi_adapter.e_tbl =
179 diva_os_malloc(0, a->xdi_adapter.e_max * sizeof(E_INFO));
180 if (!a->xdi_adapter.e_tbl) {
181 diva_pri_cleanup_adapter(a);
182 return (-1);
183 }
184 memset(a->xdi_adapter.e_tbl, 0x00, a->xdi_adapter.e_max * sizeof(E_INFO));
185
186 a->xdi_adapter.a.io = &a->xdi_adapter;
187 a->xdi_adapter.DIRequest = request;
188 a->interface.cleanup_adapter_proc = diva_pri_cleanup_adapter;
189 a->interface.cmd_proc = diva_pri_cmd_card_proc;
190
191 if (pri_rev_2) {
192 prepare_pri2_functions(&a->xdi_adapter);
193 } else {
194 prepare_pri_functions(&a->xdi_adapter);
195 }
196
197 /*
198 Set all memory areas
199 */
200 a->xdi_adapter.Address = a->resources.pci.addr[0];
201 a->xdi_adapter.sdram_bar = a->resources.pci.bar[0];
202 a->xdi_adapter.ram = a->resources.pci.addr[0];
203 a->xdi_adapter.ram += MP_SHARED_RAM_OFFSET;
204
205 a->xdi_adapter.reset = a->resources.pci.addr[2];
206 a->xdi_adapter.reset += MP_RESET;
207
208 a->xdi_adapter.prom =
209 (byte *) (unsigned long) a->resources.pci.bar[3];
210
211 a->xdi_adapter.cfg = a->resources.pci.addr[4];
212 a->xdi_adapter.cfg += MP_IRQ_RESET;
213
214 a->dsp_mask = diva_pri_detect_dsps(a);
215
216 /*
217 Allocate DMA map
218 */
219 if (pri_rev_2) {
220 diva_init_dma_map(a->resources.pci.hdev,
221 (struct _diva_dma_map_entry **) &a->xdi_adapter.dma_map, 32);
222 }
223
224 /*
225 Set IRQ handler
226 */
227 a->xdi_adapter.irq_info.irq_nr = a->resources.pci.irq;
228 sprintf(a->xdi_adapter.irq_info.irq_name,
229 "DIVA PRI %ld", (long) a->xdi_adapter.serialNo);
230
231 if (diva_os_register_irq(a, a->xdi_adapter.irq_info.irq_nr,
232 a->xdi_adapter.irq_info.irq_name)) {
233 diva_pri_cleanup_adapter(a);
234 return (-1);
235 }
236 a->xdi_adapter.irq_info.registered = 1;
237
238 diva_log_info("%s IRQ:%d SerNo:%d", a->xdi_adapter.Properties.Name,
239 a->resources.pci.irq, a->xdi_adapter.serialNo);
240
241 return (0);
242 }
243
244 static int diva_pri_cleanup_adapter(diva_os_xdi_adapter_t * a)
245 {
246 int bar = 0;
247
248 /*
249 Stop Adapter if adapter is running
250 */
251 if (a->xdi_adapter.Initialized) {
252 diva_pri_stop_adapter(a);
253 }
254
255 /*
256 Remove ISR Handler
257 */
258 if (a->xdi_adapter.irq_info.registered) {
259 diva_os_remove_irq(a, a->xdi_adapter.irq_info.irq_nr);
260 }
261 a->xdi_adapter.irq_info.registered = 0;
262
263 /*
264 Step 1: unmap all BAR's, if any was mapped
265 */
266 for (bar = 0; bar < 5; bar++) {
267 if (a->resources.pci.bar[bar]
268 && a->resources.pci.addr[bar]) {
269 divasa_unmap_pci_bar(a->resources.pci.addr[bar]);
270 a->resources.pci.bar[bar] = 0;
271 a->resources.pci.addr[bar] = 0;
272 }
273 }
274
275 /*
276 Free OS objects
277 */
278 diva_os_cancel_soft_isr(&a->xdi_adapter.isr_soft_isr);
279 diva_os_cancel_soft_isr(&a->xdi_adapter.req_soft_isr);
280
281 diva_os_remove_soft_isr(&a->xdi_adapter.req_soft_isr);
282 a->xdi_adapter.isr_soft_isr.object = 0;
283
284 diva_os_destroy_spin_lock(&a->xdi_adapter.isr_spin_lock, "rm");
285 diva_os_destroy_spin_lock(&a->xdi_adapter.data_spin_lock, "rm");
286
287 /*
288 Free memory accupied by XDI adapter
289 */
290 if (a->xdi_adapter.e_tbl) {
291 diva_os_free(0, a->xdi_adapter.e_tbl);
292 a->xdi_adapter.e_tbl = 0;
293 }
294 a->xdi_adapter.Channels = 0;
295 a->xdi_adapter.e_max = 0;
296
297
298 /*
299 Free adapter DMA map
300 */
301 diva_free_dma_map(a->resources.pci.hdev,
302 (struct _diva_dma_map_entry *) a->xdi_adapter.
303 dma_map);
304 a->xdi_adapter.dma_map = 0;
305
306
307 /*
308 Detach this adapter from debug driver
309 */
310
311 return (0);
312 }
313
314 /*
315 ** Activate On Board Boot Loader
316 */
317 static int diva_pri_reset_adapter(PISDN_ADAPTER IoAdapter)
318 {
319 dword i;
320 struct mp_load *boot = (struct mp_load *) IoAdapter->Address;
321
322 if (!IoAdapter->Address || !IoAdapter->reset) {
323 return (-1);
324 }
325 if (IoAdapter->Initialized) {
326 DBG_ERR(("A: A(%d) can't reset PRI adapter - please stop first",
327 IoAdapter->ANum))
328 return (-1);
329 }
330
331 WRITE_DWORD(&boot->err, 0);
332 IoAdapter->rstFnc(IoAdapter);
333 diva_os_wait(10);
334 i = READ_DWORD(&boot->live);
335 diva_os_wait(10);
336 if (i == READ_DWORD(&boot->live)) {
337 DBG_ERR(("A: A(%d) CPU on PRI %ld is not alive!",
338 IoAdapter->ANum, IoAdapter->serialNo))
339 return (-1);
340 }
341 if (READ_DWORD(&boot->err)) {
342 DBG_ERR(("A: A(%d) PRI %ld Board Selftest failed, error=%08lx",
343 IoAdapter->ANum, IoAdapter->serialNo,
344 READ_DWORD(&boot->err)))
345 return (-1);
346 }
347
348 /*
349 Forget all outstanding entities
350 */
351 IoAdapter->e_count = 0;
352 if (IoAdapter->e_tbl) {
353 memset(IoAdapter->e_tbl, 0x00,
354 IoAdapter->e_max * sizeof(E_INFO));
355 }
356 IoAdapter->head = 0;
357 IoAdapter->tail = 0;
358 IoAdapter->assign = 0;
359 IoAdapter->trapped = 0;
360
361 memset(&IoAdapter->a.IdTable[0], 0x00,
362 sizeof(IoAdapter->a.IdTable));
363 memset(&IoAdapter->a.IdTypeTable[0], 0x00,
364 sizeof(IoAdapter->a.IdTypeTable));
365 memset(&IoAdapter->a.FlowControlIdTable[0], 0x00,
366 sizeof(IoAdapter->a.FlowControlIdTable));
367 memset(&IoAdapter->a.FlowControlSkipTable[0], 0x00,
368 sizeof(IoAdapter->a.FlowControlSkipTable));
369 memset(&IoAdapter->a.misc_flags_table[0], 0x00,
370 sizeof(IoAdapter->a.misc_flags_table));
371 memset(&IoAdapter->a.rx_stream[0], 0x00,
372 sizeof(IoAdapter->a.rx_stream));
373 memset(&IoAdapter->a.tx_stream[0], 0x00,
374 sizeof(IoAdapter->a.tx_stream));
375 memset(&IoAdapter->a.tx_pos[0], 0x00, sizeof(IoAdapter->a.tx_pos));
376 memset(&IoAdapter->a.rx_pos[0], 0x00, sizeof(IoAdapter->a.rx_pos));
377
378 return (0);
379 }
380
381 static int
382 diva_pri_write_sdram_block(PISDN_ADAPTER IoAdapter,
383 dword address,
384 const byte * data, dword length, dword limit)
385 {
386 byte *mem = IoAdapter->Address;
387
388 if (((address + length) >= limit) || !mem) {
389 DBG_ERR(("A: A(%d) write PRI address=0x%08lx",
390 IoAdapter->ANum, address + length))
391 return (-1);
392 }
393 mem += address;
394
395 while (length--) {
396 *mem++ = *data++;
397 }
398
399 return (0);
400 }
401
402 static int
403 diva_pri_start_adapter(PISDN_ADAPTER IoAdapter,
404 dword start_address, dword features)
405 {
406 dword i;
407 int started = 0;
408 struct mp_load *boot = (struct mp_load *) IoAdapter->Address;
409 ADAPTER *a = &IoAdapter->a;
410
411 if (IoAdapter->Initialized) {
412 DBG_ERR(("A: A(%d) pri_start_adapter, adapter already running",
413 IoAdapter->ANum))
414 return (-1);
415 }
416 if (!boot) {
417 DBG_ERR(("A: PRI %ld can't start, adapter not mapped",
418 IoAdapter->serialNo))
419 return (-1);
420 }
421
422 sprintf(IoAdapter->Name, "A(%d)", (int) IoAdapter->ANum);
423 DBG_LOG(("A(%d) start PRI at 0x%08lx", IoAdapter->ANum,
424 start_address))
425
426 WRITE_DWORD(&boot->addr, start_address);
427 WRITE_DWORD(&boot->cmd, 3);
428
429 for (i = 0; i < 300; ++i) {
430 diva_os_wait(10);
431 if ((READ_DWORD(&boot->signature) >> 16) == 0x4447) {
432 DBG_LOG(("A(%d) Protocol startup time %d.%02d seconds",
433 IoAdapter->ANum, (i / 100), (i % 100)))
434 started = 1;
435 break;
436 }
437 }
438
439 if (!started) {
440 dword TrapId = READ_DWORD(&IoAdapter->Address[0x80]);
441 dword debug = READ_DWORD(&IoAdapter->Address[0x1c]);
442 DBG_ERR(("A(%d) Adapter start failed 0x%08lx, TrapId=%08lx, debug=%08lx",
443 IoAdapter->ANum, READ_DWORD(&boot->signature),
444 TrapId, debug))
445 if (IoAdapter->trapFnc) {
446 (*(IoAdapter->trapFnc)) (IoAdapter);
447 }
448 IoAdapter->stop(IoAdapter);
449 return (-1);
450 }
451
452 IoAdapter->Initialized = TRUE;
453
454 /*
455 Check Interrupt
456 */
457 IoAdapter->IrqCount = 0;
458 WRITE_DWORD(((dword volatile *) IoAdapter->cfg),
459 (dword) ~ 0x03E00000);
460 a->ReadyInt = 1;
461 a->ram_out(a, &PR_RAM->ReadyInt, 1);
462
463 for (i = 100; !IoAdapter->IrqCount && (i-- > 0); diva_os_wait(10));
464
465 if (!IoAdapter->IrqCount) {
466 DBG_ERR(("A: A(%d) interrupt test failed",
467 IoAdapter->ANum))
468 IoAdapter->Initialized = FALSE;
469 IoAdapter->stop(IoAdapter);
470 return (-1);
471 }
472
473 IoAdapter->Properties.Features = (word) features;
474
475 diva_xdi_display_adapter_features(IoAdapter->ANum);
476
477 DBG_LOG(("A(%d) PRI adapter successfull started", IoAdapter->ANum))
478 /*
479 Register with DIDD
480 */
481 diva_xdi_didd_register_adapter(IoAdapter->ANum);
482
483 return (0);
484 }
485
486 static void diva_pri_clear_interrupts(diva_os_xdi_adapter_t * a)
487 {
488 PISDN_ADAPTER IoAdapter = &a->xdi_adapter;
489
490 /*
491 clear any pending interrupt
492 */
493 IoAdapter->disIrq(IoAdapter);
494
495 IoAdapter->tst_irq(&IoAdapter->a);
496 IoAdapter->clr_irq(&IoAdapter->a);
497 IoAdapter->tst_irq(&IoAdapter->a);
498
499 /*
500 kill pending dpcs
501 */
502 diva_os_cancel_soft_isr(&IoAdapter->req_soft_isr);
503 diva_os_cancel_soft_isr(&IoAdapter->isr_soft_isr);
504 }
505
506 /*
507 ** Stop Adapter, but do not unmap/unregister - adapter
508 ** will be restarted later
509 */
510 static int diva_pri_stop_adapter(diva_os_xdi_adapter_t * a)
511 {
512 PISDN_ADAPTER IoAdapter = &a->xdi_adapter;
513 int i = 100;
514
515 if (!IoAdapter->ram) {
516 return (-1);
517 }
518 if (!IoAdapter->Initialized) {
519 DBG_ERR(("A: A(%d) can't stop PRI adapter - not running",
520 IoAdapter->ANum))
521 return (-1); /* nothing to stop */
522 }
523 IoAdapter->Initialized = 0;
524
525 /*
526 Disconnect Adapter from DIDD
527 */
528 diva_xdi_didd_remove_adapter(IoAdapter->ANum);
529
530 /*
531 Stop interrupts
532 */
533 a->clear_interrupts_proc = diva_pri_clear_interrupts;
534 IoAdapter->a.ReadyInt = 1;
535 IoAdapter->a.ram_inc(&IoAdapter->a, &PR_RAM->ReadyInt);
536 do {
537 diva_os_sleep(10);
538 } while (i-- && a->clear_interrupts_proc);
539
540 if (a->clear_interrupts_proc) {
541 diva_pri_clear_interrupts(a);
542 a->clear_interrupts_proc = 0;
543 DBG_ERR(("A: A(%d) no final interrupt from PRI adapter",
544 IoAdapter->ANum))
545 }
546 IoAdapter->a.ReadyInt = 0;
547
548 /*
549 Stop and reset adapter
550 */
551 IoAdapter->stop(IoAdapter);
552
553 return (0);
554 }
555
556 /*
557 ** Process commands form configuration/download framework and from
558 ** user mode
559 **
560 ** return 0 on success
561 */
562 static int
563 diva_pri_cmd_card_proc(struct _diva_os_xdi_adapter *a,
564 diva_xdi_um_cfg_cmd_t * cmd, int length)
565 {
566 int ret = -1;
567
568 if (cmd->adapter != a->controller) {
569 DBG_ERR(("A: pri_cmd, invalid controller=%d != %d",
570 cmd->adapter, a->controller))
571 return (-1);
572 }
573
574 switch (cmd->command) {
575 case DIVA_XDI_UM_CMD_GET_CARD_ORDINAL:
576 a->xdi_mbox.data_length = sizeof(dword);
577 a->xdi_mbox.data =
578 diva_os_malloc(0, a->xdi_mbox.data_length);
579 if (a->xdi_mbox.data) {
580 *(dword *) a->xdi_mbox.data =
581 (dword) a->CardOrdinal;
582 a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
583 ret = 0;
584 }
585 break;
586
587 case DIVA_XDI_UM_CMD_GET_SERIAL_NR:
588 a->xdi_mbox.data_length = sizeof(dword);
589 a->xdi_mbox.data =
590 diva_os_malloc(0, a->xdi_mbox.data_length);
591 if (a->xdi_mbox.data) {
592 *(dword *) a->xdi_mbox.data =
593 (dword) a->xdi_adapter.serialNo;
594 a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
595 ret = 0;
596 }
597 break;
598
599 case DIVA_XDI_UM_CMD_GET_PCI_HW_CONFIG:
600 a->xdi_mbox.data_length = sizeof(dword) * 9;
601 a->xdi_mbox.data =
602 diva_os_malloc(0, a->xdi_mbox.data_length);
603 if (a->xdi_mbox.data) {
604 int i;
605 dword *data = (dword *) a->xdi_mbox.data;
606
607 for (i = 0; i < 8; i++) {
608 *data++ = a->resources.pci.bar[i];
609 }
610 *data++ = (dword) a->resources.pci.irq;
611 a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
612 ret = 0;
613 }
614 break;
615
616 case DIVA_XDI_UM_CMD_RESET_ADAPTER:
617 ret = diva_pri_reset_adapter(&a->xdi_adapter);
618 break;
619
620 case DIVA_XDI_UM_CMD_WRITE_SDRAM_BLOCK:
621 ret = diva_pri_write_sdram_block(&a->xdi_adapter,
622 cmd->command_data.
623 write_sdram.offset,
624 (byte *) & cmd[1],
625 cmd->command_data.
626 write_sdram.length,
627 pri_is_rev_2_card(a->
628 CardOrdinal)
629 ? MP2_MEMORY_SIZE :
630 MP_MEMORY_SIZE);
631 break;
632
633 case DIVA_XDI_UM_CMD_STOP_ADAPTER:
634 ret = diva_pri_stop_adapter(a);
635 break;
636
637 case DIVA_XDI_UM_CMD_START_ADAPTER:
638 ret = diva_pri_start_adapter(&a->xdi_adapter,
639 cmd->command_data.start.
640 offset,
641 cmd->command_data.start.
642 features);
643 break;
644
645 case DIVA_XDI_UM_CMD_SET_PROTOCOL_FEATURES:
646 a->xdi_adapter.features =
647 cmd->command_data.features.features;
648 a->xdi_adapter.a.protocol_capabilities =
649 a->xdi_adapter.features;
650 DBG_TRC(("Set raw protocol features (%08x)",
651 a->xdi_adapter.features))
652 ret = 0;
653 break;
654
655 case DIVA_XDI_UM_CMD_GET_CARD_STATE:
656 a->xdi_mbox.data_length = sizeof(dword);
657 a->xdi_mbox.data =
658 diva_os_malloc(0, a->xdi_mbox.data_length);
659 if (a->xdi_mbox.data) {
660 dword *data = (dword *) a->xdi_mbox.data;
661 if (!a->xdi_adapter.ram || !a->xdi_adapter.reset ||
662 !a->xdi_adapter.cfg) {
663 *data = 3;
664 } else if (a->xdi_adapter.trapped) {
665 *data = 2;
666 } else if (a->xdi_adapter.Initialized) {
667 *data = 1;
668 } else {
669 *data = 0;
670 }
671 a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
672 ret = 0;
673 }
674 break;
675
676 case DIVA_XDI_UM_CMD_READ_XLOG_ENTRY:
677 ret = diva_card_read_xlog(a);
678 break;
679
680 case DIVA_XDI_UM_CMD_READ_SDRAM:
681 if (a->xdi_adapter.Address) {
682 if (
683 (a->xdi_mbox.data_length =
684 cmd->command_data.read_sdram.length)) {
685 if (
686 (a->xdi_mbox.data_length +
687 cmd->command_data.read_sdram.offset) <
688 a->xdi_adapter.MemorySize) {
689 a->xdi_mbox.data =
690 diva_os_malloc(0,
691 a->xdi_mbox.
692 data_length);
693 if (a->xdi_mbox.data) {
694 byte *src =
695 a->xdi_adapter.Address;
696 byte *dst =
697 a->xdi_mbox.data;
698 dword len =
699 a->xdi_mbox.
700 data_length;
701
702 src +=
703 cmd->command_data.
704 read_sdram.offset;
705
706 while (len--) {
707 *dst++ = *src++;
708 }
709 a->xdi_mbox.status =
710 DIVA_XDI_MBOX_BUSY;
711 ret = 0;
712 }
713 }
714 }
715 }
716 break;
717
718 default:
719 DBG_ERR(("A: A(%d) invalid cmd=%d", a->controller,
720 cmd->command))
721 }
722
723 return (ret);
724 }
725
726 /*
727 ** Get Serial Number
728 */
729 static int pri_get_serial_number(diva_os_xdi_adapter_t * a)
730 {
731 byte data[64];
732 int i;
733 dword len = sizeof(data);
734 volatile byte *config = (byte *) a->resources.pci.addr[4];
735 volatile byte *flash = (byte *) a->resources.pci.addr[3];
736
737 /*
738 * First set some GT6401x config registers before accessing the BOOT-ROM
739 */
740 if (!(config[0xc3c] & 0x08)) {
741 config[0xc3c] |= 0x08; /* Base Address enable register */
742 }
743 config[LOW_BOOTCS_DREG] = 0x00;
744 config[HI_BOOTCS_DREG] = 0xFF;
745 /*
746 * Read only the last 64 bytes of manufacturing data
747 */
748 memset(data, '\0', len);
749 for (i = 0; i < len; i++) {
750 data[i] = flash[0x8000 - len + i];
751 }
752
753 config[LOW_BOOTCS_DREG] = 0xFC; /* Disable FLASH EPROM access */
754 config[HI_BOOTCS_DREG] = 0xFF;
755
756 if (memcmp(&data[48], "DIVAserverPR", 12)) {
757 #if !defined(DIVA_PRI_NO_PCI_BIOS_WORKAROUND) /* { */
758 word cmd = 0, cmd_org;
759 void *addr;
760 dword addr1, addr3, addr4;
761 byte Bus, Slot;
762 void *hdev;
763 addr4 = a->resources.pci.bar[4];
764 addr3 = a->resources.pci.bar[3]; /* flash */
765 addr1 = a->resources.pci.bar[1]; /* unused */
766
767 DBG_ERR(("A: apply Compaq BIOS workaround"))
768 DBG_LOG(("%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x",
769 data[0], data[1], data[2], data[3],
770 data[4], data[5], data[6], data[7]))
771
772 Bus = a->resources.pci.bus;
773 Slot = a->resources.pci.func;
774 hdev = a->resources.pci.hdev;
775 PCIread(Bus, Slot, 0x04, &cmd_org, sizeof(cmd_org), hdev);
776 PCIwrite(Bus, Slot, 0x04, &cmd, sizeof(cmd), hdev);
777
778 PCIwrite(Bus, Slot, 0x14, &addr4, sizeof(addr4), hdev);
779 PCIwrite(Bus, Slot, 0x20, &addr1, sizeof(addr1), hdev);
780
781 PCIwrite(Bus, Slot, 0x04, &cmd_org, sizeof(cmd_org), hdev);
782
783 addr = a->resources.pci.addr[1];
784 a->resources.pci.addr[1] = a->resources.pci.addr[4];
785 a->resources.pci.addr[4] = addr;
786
787 addr1 = a->resources.pci.bar[1];
788 a->resources.pci.bar[1] = a->resources.pci.bar[4];
789 a->resources.pci.bar[4] = addr1;
790
791 /*
792 Try to read Flash again
793 */
794 config = (byte *) a->resources.pci.addr[4];
795 flash = (byte *) a->resources.pci.addr[3];
796 len = sizeof(data);
797
798 if (!(config[0xc3c] & 0x08)) {
799 config[0xc3c] |= 0x08; /* Base Address enable register */
800 }
801 config[LOW_BOOTCS_DREG] = 0x00;
802 config[HI_BOOTCS_DREG] = 0xFF;
803
804 memset(data, '\0', len);
805 for (i = 0; i < len; i++) {
806 data[i] = flash[0x8000 - len + i];
807 }
808 config[LOW_BOOTCS_DREG] = 0xFC;
809 config[HI_BOOTCS_DREG] = 0xFF;
810
811 if (memcmp(&data[48], "DIVAserverPR", 12)) {
812 DBG_ERR(("A: failed to read serial number"))
813 DBG_LOG(("%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x",
814 data[0], data[1], data[2], data[3],
815 data[4], data[5], data[6], data[7]))
816 return (-1);
817 }
818 #else /* } { */
819 DBG_ERR(("A: failed to read DIVA signature word"))
820 DBG_LOG(("%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x",
821 data[0], data[1], data[2], data[3],
822 data[4], data[5], data[6], data[7]))
823 DBG_LOG(("%02x:%02x:%02x:%02x", data[47], data[46],
824 data[45], data[44]))
825 #endif /* } */
826 }
827
828 a->xdi_adapter.serialNo =
829 (data[47] << 24) | (data[46] << 16) | (data[45] << 8) |
830 data[44];
831 if (!a->xdi_adapter.serialNo
832 || (a->xdi_adapter.serialNo == 0xffffffff)) {
833 a->xdi_adapter.serialNo = 0;
834 DBG_ERR(("A: failed to read serial number"))
835 return (-1);
836 }
837
838 DBG_LOG(("Serial No. : %ld", a->xdi_adapter.serialNo))
839 DBG_TRC(("Board Revision : %d.%02d", (int) data[41],
840 (int) data[40]))
841 DBG_TRC(("PLD revision : %d.%02d", (int) data[33],
842 (int) data[32]))
843 DBG_TRC(("Boot loader version : %d.%02d", (int) data[37],
844 (int) data[36]))
845
846 DBG_TRC(("Manufacturing Date : %d/%02d/%02d (yyyy/mm/dd)",
847 (int) ((data[28] > 90) ? 1900 : 2000) +
848 (int) data[28], (int) data[29], (int) data[30]))
849
850 return (0);
851 }
852
853 void diva_os_prepare_pri2_functions(PISDN_ADAPTER IoAdapter)
854 {
855 }
856
857 void diva_os_prepare_pri_functions(PISDN_ADAPTER IoAdapter)
858 {
859 }
860
861 /*
862 ** Checks presence of DSP on board
863 */
864 static int
865 dsp_check_presence(volatile byte * addr, volatile byte * data, int dsp)
866 {
867 word pattern;
868
869 WRITE_WORD(addr, 0x4000);
870 WRITE_WORD(data, DSP_SIGNATURE_PROBE_WORD);
871
872 WRITE_WORD(addr, 0x4000);
873 pattern = READ_WORD(data);
874
875 if (pattern != DSP_SIGNATURE_PROBE_WORD) {
876 DBG_TRC(("W: DSP[%d] %04x(is) != %04x(should)",
877 dsp, pattern, DSP_SIGNATURE_PROBE_WORD))
878 return (-1);
879 }
880
881 WRITE_WORD(addr, 0x4000);
882 WRITE_WORD(data, ~DSP_SIGNATURE_PROBE_WORD);
883
884 WRITE_WORD(addr, 0x4000);
885 pattern = READ_WORD(data);
886
887 if (pattern != (word) ~ DSP_SIGNATURE_PROBE_WORD) {
888 DBG_ERR(("A: DSP[%d] %04x(is) != %04x(should)",
889 dsp, pattern, (word) ~ DSP_SIGNATURE_PROBE_WORD))
890 return (-2);
891 }
892
893 DBG_TRC(("DSP[%d] present", dsp))
894
895 return (0);
896 }
897
898
899 /*
900 ** Check if DSP's are present and operating
901 ** Information about detected DSP's is returned as bit mask
902 ** Bit 0 - DSP1
903 ** ...
904 ** ...
905 ** ...
906 ** Bit 29 - DSP30
907 */
908 static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a)
909 {
910 byte *base = a->resources.pci.addr[2];
911 dword ret = 0;
912 dword row_offset[7] = {
913 0x00000000,
914 0x00000800, /* 1 - ROW 1 */
915 0x00000840, /* 2 - ROW 2 */
916 0x00001000, /* 3 - ROW 3 */
917 0x00001040, /* 4 - ROW 4 */
918 0x00000000 /* 5 - ROW 0 */
919 };
920
921 byte *dsp_addr_port, *dsp_data_port, row_state;
922 int dsp_row = 0, dsp_index, dsp_num;
923
924 if (!base || !a->xdi_adapter.reset) {
925 return (0);
926 }
927
928 *(volatile byte *) (a->xdi_adapter.reset) =
929 _MP_RISC_RESET | _MP_DSP_RESET;
930 diva_os_wait(5);
931
932 for (dsp_num = 0; dsp_num < 30; dsp_num++) {
933 dsp_row = dsp_num / 7 + 1;
934 dsp_index = dsp_num % 7;
935
936 dsp_data_port = base;
937 dsp_addr_port = base;
938
939 dsp_data_port += row_offset[dsp_row];
940 dsp_addr_port += row_offset[dsp_row];
941
942 dsp_data_port += (dsp_index * 8);
943 dsp_addr_port += (dsp_index * 8) + 0x80;
944
945 if (!dsp_check_presence
946 (dsp_addr_port, dsp_data_port, dsp_num + 1)) {
947 ret |= (1 << dsp_num);
948 }
949 }
950
951 *(volatile byte *) (a->xdi_adapter.reset) =
952 _MP_RISC_RESET | _MP_LED1 | _MP_LED2;
953 diva_os_wait(5);
954
955 /*
956 Verify modules
957 */
958 for (dsp_row = 0; dsp_row < 4; dsp_row++) {
959 row_state = ((ret >> (dsp_row * 7)) & 0x7F);
960 if (row_state && (row_state != 0x7F)) {
961 for (dsp_index = 0; dsp_index < 7; dsp_index++) {
962 if (!(row_state & (1 << dsp_index))) {
963 DBG_ERR(("A: MODULE[%d]-DSP[%d] failed",
964 dsp_row + 1,
965 dsp_index + 1))
966 }
967 }
968 }
969 }
970
971 if (!(ret & 0x10000000)) {
972 DBG_ERR(("A: ON BOARD-DSP[1] failed"))
973 }
974 if (!(ret & 0x20000000)) {
975 DBG_ERR(("A: ON BOARD-DSP[2] failed"))
976 }
977
978 /*
979 Print module population now
980 */
981 DBG_LOG(("+-----------------------+"))
982 DBG_LOG(("| DSP MODULE POPULATION |"))
983 DBG_LOG(("+-----------------------+"))
984 DBG_LOG(("| 1 | 2 | 3 | 4 |"))
985 DBG_LOG(("+-----------------------+"))
986 DBG_LOG(("| %s | %s | %s | %s |",
987 ((ret >> (0 * 7)) & 0x7F) ? "Y" : "N",
988 ((ret >> (1 * 7)) & 0x7F) ? "Y" : "N",
989 ((ret >> (2 * 7)) & 0x7F) ? "Y" : "N",
990 ((ret >> (3 * 7)) & 0x7F) ? "Y" : "N"))
991 DBG_LOG(("+-----------------------+"))
992
993 DBG_LOG(("DSP's(present-absent):%08x-%08x", ret,
994 ~ret & 0x3fffffff))
995
996 return (ret);
997 }
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