1 /* mga_dma.c -- DMA support for mga g200/g400 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
28 * Rickard E. (Rik) Faith <faith@valinux.com>
29 * Jeff Hartmann <jhartmann@valinux.com>
30 * Keith Whitwell <keith@tungstengraphics.com>
33 * Gareth Hughes <gareth@valinux.com>
42 #define MGA_DEFAULT_USEC_TIMEOUT 10000
43 #define MGA_FREELIST_DEBUG 0
46 /* ================================================================
50 int mga_do_wait_for_idle( drm_mga_private_t
*dev_priv
)
56 for ( i
= 0 ; i
< dev_priv
->usec_timeout
; i
++ ) {
57 status
= MGA_READ( MGA_STATUS
) & MGA_ENGINE_IDLE_MASK
;
58 if ( status
== MGA_ENDPRDMASTS
) {
59 MGA_WRITE8( MGA_CRTC_INDEX
, 0 );
66 DRM_ERROR( "failed!\n" );
67 DRM_INFO( " status=0x%08x\n", status
);
69 return DRM_ERR(EBUSY
);
72 int mga_do_dma_idle( drm_mga_private_t
*dev_priv
)
78 for ( i
= 0 ; i
< dev_priv
->usec_timeout
; i
++ ) {
79 status
= MGA_READ( MGA_STATUS
) & MGA_DMA_IDLE_MASK
;
80 if ( status
== MGA_ENDPRDMASTS
) return 0;
85 DRM_ERROR( "failed! status=0x%08x\n", status
);
87 return DRM_ERR(EBUSY
);
90 int mga_do_dma_reset( drm_mga_private_t
*dev_priv
)
92 drm_mga_sarea_t
*sarea_priv
= dev_priv
->sarea_priv
;
93 drm_mga_primary_buffer_t
*primary
= &dev_priv
->prim
;
97 /* The primary DMA stream should look like new right about now.
100 primary
->space
= primary
->size
;
101 primary
->last_flush
= 0;
103 sarea_priv
->last_wrap
= 0;
105 /* FIXME: Reset counters, buffer ages etc...
108 /* FIXME: What else do we need to reinitialize? WARP stuff?
114 int mga_do_engine_reset( drm_mga_private_t
*dev_priv
)
118 /* Okay, so we've completely screwed up and locked the engine.
119 * How about we clean up after ourselves?
121 MGA_WRITE( MGA_RST
, MGA_SOFTRESET
);
122 DRM_UDELAY( 15 ); /* Wait at least 10 usecs */
123 MGA_WRITE( MGA_RST
, 0 );
125 /* Initialize the registers that get clobbered by the soft
126 * reset. Many of the core register values survive a reset,
127 * but the drawing registers are basically all gone.
129 * 3D clients should probably die after calling this. The X
130 * server should reset the engine state to known values.
133 MGA_WRITE( MGA_PRIMPTR
,
134 virt_to_bus((void *)dev_priv
->prim
.status_page
) |
139 MGA_WRITE( MGA_ICLEAR
, MGA_SOFTRAPICLR
);
140 MGA_WRITE( MGA_IEN
, MGA_SOFTRAPIEN
);
142 /* The primary DMA stream should look like new right about now.
144 mga_do_dma_reset( dev_priv
);
146 /* This bad boy will never fail.
152 /* ================================================================
156 void mga_do_dma_flush( drm_mga_private_t
*dev_priv
)
158 drm_mga_primary_buffer_t
*primary
= &dev_priv
->prim
;
165 /* We need to wait so that we can do an safe flush */
166 for ( i
= 0 ; i
< dev_priv
->usec_timeout
; i
++ ) {
167 status
= MGA_READ( MGA_STATUS
) & MGA_ENGINE_IDLE_MASK
;
168 if ( status
== MGA_ENDPRDMASTS
) break;
172 if ( primary
->tail
== primary
->last_flush
) {
173 DRM_DEBUG( " bailing out...\n" );
177 tail
= primary
->tail
+ dev_priv
->primary
->offset
;
179 /* We need to pad the stream between flushes, as the card
180 * actually (partially?) reads the first of these commands.
181 * See page 4-16 in the G400 manual, middle of the page or so.
185 DMA_BLOCK( MGA_DMAPAD
, 0x00000000,
186 MGA_DMAPAD
, 0x00000000,
187 MGA_DMAPAD
, 0x00000000,
188 MGA_DMAPAD
, 0x00000000 );
192 primary
->last_flush
= primary
->tail
;
194 head
= MGA_READ( MGA_PRIMADDRESS
);
196 if ( head
<= tail
) {
197 primary
->space
= primary
->size
- primary
->tail
;
199 primary
->space
= head
- tail
;
202 DRM_DEBUG( " head = 0x%06lx\n", head
- dev_priv
->primary
->offset
);
203 DRM_DEBUG( " tail = 0x%06lx\n", tail
- dev_priv
->primary
->offset
);
204 DRM_DEBUG( " space = 0x%06x\n", primary
->space
);
206 mga_flush_write_combine();
207 MGA_WRITE( MGA_PRIMEND
, tail
| MGA_PAGPXFER
);
209 DRM_DEBUG( "done.\n" );
212 void mga_do_dma_wrap_start( drm_mga_private_t
*dev_priv
)
214 drm_mga_primary_buffer_t
*primary
= &dev_priv
->prim
;
221 DMA_BLOCK( MGA_DMAPAD
, 0x00000000,
222 MGA_DMAPAD
, 0x00000000,
223 MGA_DMAPAD
, 0x00000000,
224 MGA_DMAPAD
, 0x00000000 );
228 tail
= primary
->tail
+ dev_priv
->primary
->offset
;
231 primary
->last_flush
= 0;
232 primary
->last_wrap
++;
234 head
= MGA_READ( MGA_PRIMADDRESS
);
236 if ( head
== dev_priv
->primary
->offset
) {
237 primary
->space
= primary
->size
;
239 primary
->space
= head
- dev_priv
->primary
->offset
;
242 DRM_DEBUG( " head = 0x%06lx\n",
243 head
- dev_priv
->primary
->offset
);
244 DRM_DEBUG( " tail = 0x%06x\n", primary
->tail
);
245 DRM_DEBUG( " wrap = %d\n", primary
->last_wrap
);
246 DRM_DEBUG( " space = 0x%06x\n", primary
->space
);
248 mga_flush_write_combine();
249 MGA_WRITE( MGA_PRIMEND
, tail
| MGA_PAGPXFER
);
251 set_bit( 0, &primary
->wrapped
);
252 DRM_DEBUG( "done.\n" );
255 void mga_do_dma_wrap_end( drm_mga_private_t
*dev_priv
)
257 drm_mga_primary_buffer_t
*primary
= &dev_priv
->prim
;
258 drm_mga_sarea_t
*sarea_priv
= dev_priv
->sarea_priv
;
259 u32 head
= dev_priv
->primary
->offset
;
262 sarea_priv
->last_wrap
++;
263 DRM_DEBUG( " wrap = %d\n", sarea_priv
->last_wrap
);
265 mga_flush_write_combine();
266 MGA_WRITE( MGA_PRIMADDRESS
, head
| MGA_DMA_GENERAL
);
268 clear_bit( 0, &primary
->wrapped
);
269 DRM_DEBUG( "done.\n" );
273 /* ================================================================
274 * Freelist management
277 #define MGA_BUFFER_USED ~0
278 #define MGA_BUFFER_FREE 0
280 #if MGA_FREELIST_DEBUG
281 static void mga_freelist_print( drm_device_t
*dev
)
283 drm_mga_private_t
*dev_priv
= dev
->dev_private
;
284 drm_mga_freelist_t
*entry
;
287 DRM_INFO( "current dispatch: last=0x%x done=0x%x\n",
288 dev_priv
->sarea_priv
->last_dispatch
,
289 (unsigned int)(MGA_READ( MGA_PRIMADDRESS
) -
290 dev_priv
->primary
->offset
) );
291 DRM_INFO( "current freelist:\n" );
293 for ( entry
= dev_priv
->head
->next
; entry
; entry
= entry
->next
) {
294 DRM_INFO( " %p idx=%2d age=0x%x 0x%06lx\n",
295 entry
, entry
->buf
->idx
, entry
->age
.head
,
296 entry
->age
.head
- dev_priv
->primary
->offset
);
302 static int mga_freelist_init( drm_device_t
*dev
, drm_mga_private_t
*dev_priv
)
304 drm_device_dma_t
*dma
= dev
->dma
;
306 drm_mga_buf_priv_t
*buf_priv
;
307 drm_mga_freelist_t
*entry
;
309 DRM_DEBUG( "count=%d\n", dma
->buf_count
);
311 dev_priv
->head
= DRM(alloc
)( sizeof(drm_mga_freelist_t
),
313 if ( dev_priv
->head
== NULL
)
314 return DRM_ERR(ENOMEM
);
316 memset( dev_priv
->head
, 0, sizeof(drm_mga_freelist_t
) );
317 SET_AGE( &dev_priv
->head
->age
, MGA_BUFFER_USED
, 0 );
319 for ( i
= 0 ; i
< dma
->buf_count
; i
++ ) {
320 buf
= dma
->buflist
[i
];
321 buf_priv
= buf
->dev_private
;
323 entry
= DRM(alloc
)( sizeof(drm_mga_freelist_t
),
326 return DRM_ERR(ENOMEM
);
328 memset( entry
, 0, sizeof(drm_mga_freelist_t
) );
330 entry
->next
= dev_priv
->head
->next
;
331 entry
->prev
= dev_priv
->head
;
332 SET_AGE( &entry
->age
, MGA_BUFFER_FREE
, 0 );
335 if ( dev_priv
->head
->next
!= NULL
)
336 dev_priv
->head
->next
->prev
= entry
;
337 if ( entry
->next
== NULL
)
338 dev_priv
->tail
= entry
;
340 buf_priv
->list_entry
= entry
;
341 buf_priv
->discard
= 0;
342 buf_priv
->dispatched
= 0;
344 dev_priv
->head
->next
= entry
;
350 static void mga_freelist_cleanup( drm_device_t
*dev
)
352 drm_mga_private_t
*dev_priv
= dev
->dev_private
;
353 drm_mga_freelist_t
*entry
;
354 drm_mga_freelist_t
*next
;
357 entry
= dev_priv
->head
;
360 DRM(free
)( entry
, sizeof(drm_mga_freelist_t
), DRM_MEM_DRIVER
);
364 dev_priv
->head
= dev_priv
->tail
= NULL
;
368 /* FIXME: Still needed?
370 static void mga_freelist_reset( drm_device_t
*dev
)
372 drm_device_dma_t
*dma
= dev
->dma
;
374 drm_mga_buf_priv_t
*buf_priv
;
377 for ( i
= 0 ; i
< dma
->buf_count
; i
++ ) {
378 buf
= dma
->buflist
[i
];
379 buf_priv
= buf
->dev_private
;
380 SET_AGE( &buf_priv
->list_entry
->age
,
381 MGA_BUFFER_FREE
, 0 );
386 static drm_buf_t
*mga_freelist_get( drm_device_t
*dev
)
388 drm_mga_private_t
*dev_priv
= dev
->dev_private
;
389 drm_mga_freelist_t
*next
;
390 drm_mga_freelist_t
*prev
;
391 drm_mga_freelist_t
*tail
= dev_priv
->tail
;
395 head
= MGA_READ( MGA_PRIMADDRESS
);
396 wrap
= dev_priv
->sarea_priv
->last_wrap
;
398 DRM_DEBUG( " tail=0x%06lx %d\n",
400 tail
->age
.head
- dev_priv
->primary
->offset
: 0,
402 DRM_DEBUG( " head=0x%06lx %d\n",
403 head
- dev_priv
->primary
->offset
, wrap
);
405 if ( TEST_AGE( &tail
->age
, head
, wrap
) ) {
406 prev
= dev_priv
->tail
->prev
;
407 next
= dev_priv
->tail
;
409 next
->prev
= next
->next
= NULL
;
410 dev_priv
->tail
= prev
;
411 SET_AGE( &next
->age
, MGA_BUFFER_USED
, 0 );
415 DRM_DEBUG( "returning NULL!\n" );
419 int mga_freelist_put( drm_device_t
*dev
, drm_buf_t
*buf
)
421 drm_mga_private_t
*dev_priv
= dev
->dev_private
;
422 drm_mga_buf_priv_t
*buf_priv
= buf
->dev_private
;
423 drm_mga_freelist_t
*head
, *entry
, *prev
;
425 DRM_DEBUG( "age=0x%06lx wrap=%d\n",
426 buf_priv
->list_entry
->age
.head
-
427 dev_priv
->primary
->offset
,
428 buf_priv
->list_entry
->age
.wrap
);
430 entry
= buf_priv
->list_entry
;
431 head
= dev_priv
->head
;
433 if ( buf_priv
->list_entry
->age
.head
== MGA_BUFFER_USED
) {
434 SET_AGE( &entry
->age
, MGA_BUFFER_FREE
, 0 );
435 prev
= dev_priv
->tail
;
451 /* ================================================================
452 * DMA initialization, cleanup
455 static int mga_do_init_dma( drm_device_t
*dev
, drm_mga_init_t
*init
)
457 drm_mga_private_t
*dev_priv
;
461 dev_priv
= DRM(alloc
)( sizeof(drm_mga_private_t
), DRM_MEM_DRIVER
);
463 return DRM_ERR(ENOMEM
);
465 memset( dev_priv
, 0, sizeof(drm_mga_private_t
) );
467 dev_priv
->chipset
= init
->chipset
;
469 dev_priv
->usec_timeout
= MGA_DEFAULT_USEC_TIMEOUT
;
472 dev_priv
->clear_cmd
= MGA_DWGCTL_CLEAR
| MGA_ATYPE_BLK
;
474 dev_priv
->clear_cmd
= MGA_DWGCTL_CLEAR
| MGA_ATYPE_RSTR
;
476 dev_priv
->maccess
= init
->maccess
;
478 dev_priv
->fb_cpp
= init
->fb_cpp
;
479 dev_priv
->front_offset
= init
->front_offset
;
480 dev_priv
->front_pitch
= init
->front_pitch
;
481 dev_priv
->back_offset
= init
->back_offset
;
482 dev_priv
->back_pitch
= init
->back_pitch
;
484 dev_priv
->depth_cpp
= init
->depth_cpp
;
485 dev_priv
->depth_offset
= init
->depth_offset
;
486 dev_priv
->depth_pitch
= init
->depth_pitch
;
488 /* FIXME: Need to support AGP textures...
490 dev_priv
->texture_offset
= init
->texture_offset
[0];
491 dev_priv
->texture_size
= init
->texture_size
[0];
495 if(!dev_priv
->sarea
) {
496 DRM_ERROR( "failed to find sarea!\n" );
497 /* Assign dev_private so we can do cleanup. */
498 dev
->dev_private
= (void *)dev_priv
;
499 mga_do_cleanup_dma( dev
);
500 return DRM_ERR(EINVAL
);
503 DRM_FIND_MAP( dev_priv
->fb
, init
->fb_offset
);
505 DRM_ERROR( "failed to find framebuffer!\n" );
506 /* Assign dev_private so we can do cleanup. */
507 dev
->dev_private
= (void *)dev_priv
;
508 mga_do_cleanup_dma( dev
);
509 return DRM_ERR(EINVAL
);
511 DRM_FIND_MAP( dev_priv
->mmio
, init
->mmio_offset
);
512 if(!dev_priv
->mmio
) {
513 DRM_ERROR( "failed to find mmio region!\n" );
514 /* Assign dev_private so we can do cleanup. */
515 dev
->dev_private
= (void *)dev_priv
;
516 mga_do_cleanup_dma( dev
);
517 return DRM_ERR(EINVAL
);
519 DRM_FIND_MAP( dev_priv
->status
, init
->status_offset
);
520 if(!dev_priv
->status
) {
521 DRM_ERROR( "failed to find status page!\n" );
522 /* Assign dev_private so we can do cleanup. */
523 dev
->dev_private
= (void *)dev_priv
;
524 mga_do_cleanup_dma( dev
);
525 return DRM_ERR(EINVAL
);
528 DRM_FIND_MAP( dev_priv
->warp
, init
->warp_offset
);
529 if(!dev_priv
->warp
) {
530 DRM_ERROR( "failed to find warp microcode region!\n" );
531 /* Assign dev_private so we can do cleanup. */
532 dev
->dev_private
= (void *)dev_priv
;
533 mga_do_cleanup_dma( dev
);
534 return DRM_ERR(EINVAL
);
536 DRM_FIND_MAP( dev_priv
->primary
, init
->primary_offset
);
537 if(!dev_priv
->primary
) {
538 DRM_ERROR( "failed to find primary dma region!\n" );
539 /* Assign dev_private so we can do cleanup. */
540 dev
->dev_private
= (void *)dev_priv
;
541 mga_do_cleanup_dma( dev
);
542 return DRM_ERR(EINVAL
);
544 DRM_FIND_MAP( dev_priv
->buffers
, init
->buffers_offset
);
545 if(!dev_priv
->buffers
) {
546 DRM_ERROR( "failed to find dma buffer region!\n" );
547 /* Assign dev_private so we can do cleanup. */
548 dev
->dev_private
= (void *)dev_priv
;
549 mga_do_cleanup_dma( dev
);
550 return DRM_ERR(EINVAL
);
553 dev_priv
->sarea_priv
=
554 (drm_mga_sarea_t
*)((u8
*)dev_priv
->sarea
->handle
+
555 init
->sarea_priv_offset
);
557 DRM_IOREMAP( dev_priv
->warp
);
558 DRM_IOREMAP( dev_priv
->primary
);
559 DRM_IOREMAP( dev_priv
->buffers
);
561 if(!dev_priv
->warp
->handle
||
562 !dev_priv
->primary
->handle
||
563 !dev_priv
->buffers
->handle
) {
564 DRM_ERROR( "failed to ioremap agp regions!\n" );
565 /* Assign dev_private so we can do cleanup. */
566 dev
->dev_private
= (void *)dev_priv
;
567 mga_do_cleanup_dma( dev
);
568 return DRM_ERR(ENOMEM
);
571 ret
= mga_warp_install_microcode( dev_priv
);
573 DRM_ERROR( "failed to install WARP ucode!\n" );
574 /* Assign dev_private so we can do cleanup. */
575 dev
->dev_private
= (void *)dev_priv
;
576 mga_do_cleanup_dma( dev
);
580 ret
= mga_warp_init( dev_priv
);
582 DRM_ERROR( "failed to init WARP engine!\n" );
583 /* Assign dev_private so we can do cleanup. */
584 dev
->dev_private
= (void *)dev_priv
;
585 mga_do_cleanup_dma( dev
);
589 dev_priv
->prim
.status
= (u32
*)dev_priv
->status
->handle
;
591 mga_do_wait_for_idle( dev_priv
);
593 /* Init the primary DMA registers.
595 MGA_WRITE( MGA_PRIMADDRESS
,
596 dev_priv
->primary
->offset
| MGA_DMA_GENERAL
);
598 MGA_WRITE( MGA_PRIMPTR
,
599 virt_to_bus((void *)dev_priv
->prim
.status
) |
600 MGA_PRIMPTREN0
| /* Soft trap, SECEND, SETUPEND */
601 MGA_PRIMPTREN1
); /* DWGSYNC */
604 dev_priv
->prim
.start
= (u8
*)dev_priv
->primary
->handle
;
605 dev_priv
->prim
.end
= ((u8
*)dev_priv
->primary
->handle
606 + dev_priv
->primary
->size
);
607 dev_priv
->prim
.size
= dev_priv
->primary
->size
;
609 dev_priv
->prim
.tail
= 0;
610 dev_priv
->prim
.space
= dev_priv
->prim
.size
;
611 dev_priv
->prim
.wrapped
= 0;
613 dev_priv
->prim
.last_flush
= 0;
614 dev_priv
->prim
.last_wrap
= 0;
616 dev_priv
->prim
.high_mark
= 256 * DMA_BLOCK_SIZE
;
618 dev_priv
->prim
.status
[0] = dev_priv
->primary
->offset
;
619 dev_priv
->prim
.status
[1] = 0;
621 dev_priv
->sarea_priv
->last_wrap
= 0;
622 dev_priv
->sarea_priv
->last_frame
.head
= 0;
623 dev_priv
->sarea_priv
->last_frame
.wrap
= 0;
625 if ( mga_freelist_init( dev
, dev_priv
) < 0 ) {
626 DRM_ERROR( "could not initialize freelist\n" );
627 /* Assign dev_private so we can do cleanup. */
628 dev
->dev_private
= (void *)dev_priv
;
629 mga_do_cleanup_dma( dev
);
630 return DRM_ERR(ENOMEM
);
633 /* Make dev_private visable to others. */
634 dev
->dev_private
= (void *)dev_priv
;
638 int mga_do_cleanup_dma( drm_device_t
*dev
)
642 if ( dev
->dev_private
) {
643 drm_mga_private_t
*dev_priv
= dev
->dev_private
;
645 DRM_IOREMAPFREE( dev_priv
->warp
);
646 DRM_IOREMAPFREE( dev_priv
->primary
);
647 DRM_IOREMAPFREE( dev_priv
->buffers
);
649 if ( dev_priv
->head
!= NULL
) {
650 mga_freelist_cleanup( dev
);
653 DRM(free
)( dev
->dev_private
, sizeof(drm_mga_private_t
),
655 dev
->dev_private
= NULL
;
661 int mga_dma_init( DRM_IOCTL_ARGS
)
666 DRM_COPY_FROM_USER_IOCTL( init
, (drm_mga_init_t
*)data
, sizeof(init
) );
668 switch ( init
.func
) {
670 return mga_do_init_dma( dev
, &init
);
671 case MGA_CLEANUP_DMA
:
672 return mga_do_cleanup_dma( dev
);
675 return DRM_ERR(EINVAL
);
679 /* ================================================================
680 * Primary DMA stream management
683 int mga_dma_flush( DRM_IOCTL_ARGS
)
686 drm_mga_private_t
*dev_priv
= (drm_mga_private_t
*)dev
->dev_private
;
689 LOCK_TEST_WITH_RETURN( dev
);
691 DRM_COPY_FROM_USER_IOCTL( lock
, (drm_lock_t
*)data
, sizeof(lock
) );
693 DRM_DEBUG( "%s%s%s\n",
694 (lock
.flags
& _DRM_LOCK_FLUSH
) ? "flush, " : "",
695 (lock
.flags
& _DRM_LOCK_FLUSH_ALL
) ? "flush all, " : "",
696 (lock
.flags
& _DRM_LOCK_QUIESCENT
) ? "idle, " : "" );
698 WRAP_WAIT_WITH_RETURN( dev_priv
);
700 if ( lock
.flags
& (_DRM_LOCK_FLUSH
| _DRM_LOCK_FLUSH_ALL
) ) {
701 mga_do_dma_flush( dev_priv
);
704 if ( lock
.flags
& _DRM_LOCK_QUIESCENT
) {
706 int ret
= mga_do_wait_for_idle( dev_priv
);
708 DRM_INFO( "%s: -EBUSY\n", __FUNCTION__
);
711 return mga_do_wait_for_idle( dev_priv
);
718 int mga_dma_reset( DRM_IOCTL_ARGS
)
721 drm_mga_private_t
*dev_priv
= (drm_mga_private_t
*)dev
->dev_private
;
723 LOCK_TEST_WITH_RETURN( dev
);
725 return mga_do_dma_reset( dev_priv
);
729 /* ================================================================
730 * DMA buffer management
733 static int mga_dma_get_buffers( drm_device_t
*dev
, drm_dma_t
*d
)
738 for ( i
= d
->granted_count
; i
< d
->request_count
; i
++ ) {
739 buf
= mga_freelist_get( dev
);
740 if ( !buf
) return DRM_ERR(EAGAIN
);
742 buf
->pid
= DRM_CURRENTPID
;
744 if ( DRM_COPY_TO_USER( &d
->request_indices
[i
],
745 &buf
->idx
, sizeof(buf
->idx
) ) )
746 return DRM_ERR(EFAULT
);
747 if ( DRM_COPY_TO_USER( &d
->request_sizes
[i
],
748 &buf
->total
, sizeof(buf
->total
) ) )
749 return DRM_ERR(EFAULT
);
756 int mga_dma_buffers( DRM_IOCTL_ARGS
)
759 drm_device_dma_t
*dma
= dev
->dma
;
760 drm_mga_private_t
*dev_priv
= (drm_mga_private_t
*)dev
->dev_private
;
764 LOCK_TEST_WITH_RETURN( dev
);
766 DRM_COPY_FROM_USER_IOCTL( d
, (drm_dma_t
*)data
, sizeof(d
) );
768 /* Please don't send us buffers.
770 if ( d
.send_count
!= 0 ) {
771 DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n",
772 DRM_CURRENTPID
, d
.send_count
);
773 return DRM_ERR(EINVAL
);
776 /* We'll send you buffers.
778 if ( d
.request_count
< 0 || d
.request_count
> dma
->buf_count
) {
779 DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n",
780 DRM_CURRENTPID
, d
.request_count
, dma
->buf_count
);
781 return DRM_ERR(EINVAL
);
784 WRAP_TEST_WITH_RETURN( dev_priv
);
788 if ( d
.request_count
) {
789 ret
= mga_dma_get_buffers( dev
, &d
);
792 DRM_COPY_TO_USER_IOCTL( (drm_dma_t
*)data
, d
, sizeof(d
) );