arch/mips/pci/pci.c

   1 /*
   2  * Copyright 2001 MontaVista Software Inc.
   3  * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
   4  *
   5  * Modified to be mips generic, ppopov@mvista.com
   6  * arch/mips/kernel/pci.c
   7  *     Common MIPS PCI routines.
   8  *
   9  * This program is free software; you can redistribute  it and/or modify it
  10  * under  the terms of  the GNU General  Public License as published by the
  11  * Free Software Foundation;  either version 2 of the  License, or (at your
  12  * option) any later version.
  13  */
  14
  15 /*
  16  * This file contains common PCI routines meant to be shared for
  17  * all MIPS machines.
  18  *
  19  * Strategies:
  20  *
  21  * . We rely on pci_auto.c file to assign PCI resources (MEM and IO)
  22  *   TODO: this should be optional for some machines where they do have
  23  *   a real "pcibios" that does resource assignment.
  24  *
  25  * . We then use pci_scan_bus() to "discover" all the resources for
  26  *   later use by Linux.
  27  *
  28  * . We finally reply on a board supplied function, pcibios_fixup_irq(), to
  29  *   to assign the interrupts.  We may use setup-irq.c under drivers/pci
  30  *   later.
  31  *
  32  * . Specifically, we will *NOT* use pci_assign_unassigned_resources(),
  33  *   because we assume all PCI devices should have the resources correctly
  34  *   assigned and recorded.
  35  *
  36  * Limitations:
  37  *
  38  * . We "collapse" all IO and MEM spaces in sub-buses under a top-level bus
  39  *   into a contiguous range.
  40  *
  41  * . In the case of Memory space, the rnage is 1:1 mapping with CPU physical
  42  *   address space.
  43  *
  44  * . In the case of IO space, it starts from 0, and the beginning address
  45  *   is mapped to KSEG0ADDR(mips_io_port) in the CPU physical address.
  46  *
  47  * . These are the current MIPS limitations (by ioremap, etc).  In the
  48  *   future, we may remove them.
  49  *
  50  * Credits:
  51  *      Most of the code are derived from the pci routines from PPC and Alpha,
  52  *      which were mostly writtne by
  53  *              Cort Dougan, cort@fsmlabs.com
  54  *              Matt Porter, mporter@mvista.com
  55  *              Dave Rusling david.rusling@reo.mts.dec.com
  56  *              David Mosberger davidm@cs.arizona.edu
  57  */
  58 #include <linux/config.h>
  59 #include <linux/kernel.h>
  60 #include <linux/init.h>
  61 #include <linux/types.h>
  62 #include <linux/pci.h>
  63
  64 #include <asm/pci_channel.h>
  65
  66 extern void pcibios_fixup(void);
  67 extern void pcibios_fixup_irqs(void);
  68
  69 void __init pcibios_fixup_irqs(void)
  70 {                               /* HP-LJ */
  71         struct pci_dev *dev;
  72         int slot_num;
  73
  74
  75         pci_for_each_dev(dev) {
  76                 slot_num = PCI_SLOT(dev->devfn);
  77                 switch (slot_num) {
  78                 case 2:
  79                         dev->irq = 3;
  80                         break;
  81                 case 3:
  82                         dev->irq = 4;
  83                         break;
  84                 case 4:
  85                         dev->irq = 5;
  86                         break;
  87                 default:
  88                         break;
  89                 }
  90         }
  91 }
  92
  93 void __init pcibios_fixup_resources(struct pci_dev *dev)
  94 {                               /* HP-LJ */
  95         int pos;
  96         int bases;
  97
  98         printk("adjusting pci device: %s\n", dev->name);
  99
 100         switch (dev->hdr_type) {
 101         case PCI_HEADER_TYPE_NORMAL:
 102                 bases = 6;
 103                 break;
 104         case PCI_HEADER_TYPE_BRIDGE:
 105                 bases = 2;
 106                 break;
 107         case PCI_HEADER_TYPE_CARDBUS:
 108                 bases = 1;
 109                 break;
 110         default:
 111                 bases = 0;
 112                 break;
 113         }
 114         for (pos = 0; pos < bases; pos++) {
 115                 struct resource *res = &dev->resource[pos];
 116                 if (res->start >= IO_MEM_LOGICAL_START &&
 117                     res->end <= IO_MEM_LOGICAL_END) {
 118                         res->start += IO_MEM_VIRTUAL_OFFSET;
 119                         res->end += IO_MEM_VIRTUAL_OFFSET;
 120                 }
 121                 if (res->start >= IO_PORT_LOGICAL_START &&
 122                     res->end <= IO_PORT_LOGICAL_END) {
 123                         res->start += IO_PORT_VIRTUAL_OFFSET;
 124                         res->end += IO_PORT_VIRTUAL_OFFSET;
 125                 }
 126         }
 127
 128 }
 129
 130 struct pci_fixup pcibios_fixups[] = {
 131         {PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID,
 132          pcibios_fixup_resources},
 133         {0}
 134 };
 135
 136 extern int pciauto_assign_resources(int busno, struct pci_channel *hose);
 137
 138 static int __init pcibios_init(void)
 139 {
 140         struct pci_channel *p;
 141         struct pci_bus *bus;
 142         int busno;
 143
 144 #ifdef CONFIG_PCI_AUTO
 145         /* assign resources */
 146         busno = 0;
 147         for (p = mips_pci_channels; p->pci_ops != NULL; p++) {
 148                 busno = pciauto_assign_resources(busno, p) + 1;
 149         }
 150 #endif
 151
 152         /* scan the buses */
 153         busno = 0;
 154         for (p = mips_pci_channels; p->pci_ops != NULL; p++) {
 155                 bus = pci_scan_bus(busno, p->pci_ops, p);
 156                 busno = bus->subordinate + 1;
 157         }
 158
 159         /* machine dependent fixups */
 160         pcibios_fixup();
 161         /* fixup irqs (board specific routines) */
 162         pcibios_fixup_irqs();
 163
 164         return 0;
 165 }
 166
 167 subsys_initcall(pcibios_init);
 168
 169 int pcibios_enable_device(struct pci_dev *dev, int mask)
 170 {
 171         /* pciauto_assign_resources() will enable all devices found */
 172         return 0;
 173 }
 174
 175 unsigned long __init pci_bridge_check_io(struct pci_dev *bridge)
 176 {
 177         u16 io;
 178
 179         pci_read_config_word(bridge, PCI_IO_BASE, &io);
 180         if (!io) {
 181                 pci_write_config_word(bridge, PCI_IO_BASE, 0xf0f0);
 182                 pci_read_config_word(bridge, PCI_IO_BASE, &io);
 183                 pci_write_config_word(bridge, PCI_IO_BASE, 0x0);
 184         }
 185         if (io)
 186                 return IORESOURCE_IO;
 187         //printk(KERN_WARNING "PCI: bridge %s does not support I/O forwarding!\n", bridge->name);
 188         return 0;
 189 }
 190
 191 void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 192 {
 193         /* Propogate hose info into the subordinate devices.  */
 194
 195         struct pci_channel *hose = bus->sysdata;
 196         struct pci_dev *dev = bus->self;
 197
 198         if (!dev) {
 199                 /* Root bus */
 200                 bus->resource[0] = hose->io_resource;
 201                 bus->resource[1] = hose->mem_resource;
 202         } else {
 203                 /* This is a bridge. Do not care how it's initialized,
 204                    just link its resources to the bus ones */
 205                 int i;
 206
 207                 for (i = 0; i < 3; i++) {
 208                         bus->resource[i] =
 209                             &dev->resource[PCI_BRIDGE_RESOURCES + i];
 210                         bus->resource[i]->name = bus->name;
 211                 }
 212                 bus->resource[0]->flags |= pci_bridge_check_io(dev);
 213                 bus->resource[1]->flags |= IORESOURCE_MEM;
 214                 /* For now, propagate hose limits to the bus;
 215                    we'll adjust them later. */
 216                 bus->resource[0]->end = hose->io_resource->end;
 217                 bus->resource[1]->end = hose->mem_resource->end;
 218                 /* Turn off downstream PF memory address range by default */
 219                 bus->resource[2]->start = 1024 * 1024;
 220                 bus->resource[2]->end = bus->resource[2]->start - 1;
 221         }
 222 }
 223
 224 char *pcibios_setup(char *str)
 225 {
 226         return str;
 227 }
 228
 229 void pcibios_align_resource(void *data, struct resource *res,
 230                             unsigned long size, unsigned long align)
 231 {
 232         /* this should not be called */
 233 }