arch/mips/pci/pci-sni.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * SNI specific PCI support for RM200/RM300.
   7  *
   8  * Copyright (C) 1997 - 2000 Ralf Baechle
   9  */
  10 #include <linux/kernel.h>
  11 #include <linux/init.h>
  12 #include <linux/pci.h>
  13 #include <linux/types.h>
  14 #include <asm/byteorder.h>
  15 #include <asm/sni.h>
  16
  17 #define mkaddr(bus, devfn, where)                                                   \
  18 do {                                                                         \
  19         if (bus->number == 0)                                         \
  20                 return -1;                                                   \
  21         *(volatile u32 *)PCIMT_CONFIG_ADDRESS =                              \
  22                  ((bus->number    & 0xff) << 0x10) |                    \
  23                  ((devfn & 0xff) << 0x08) |                             \
  24                  (where  & 0xfc);                                            \
  25 } while(0)
  26
  27 #if 0
  28 /* To do:  Bring this uptodate ...  */
  29 static void pcimt_pcibios_fixup(void)
  30 {
  31         struct pci_dev *dev;
  32
  33         pci_for_each_dev(dev) {
  34                 /*
  35                  * TODO: Take care of RM300 revision D boards for where the
  36                  * network slot became an ordinary PCI slot.
  37                  */
  38                 if (dev->devfn == PCI_DEVFN(1, 0)) {
  39                         /* Evil hack ...  */
  40                         set_cp0_config(CONF_CM_CMASK,
  41                                        CONF_CM_CACHABLE_NO_WA);
  42                         dev->irq = PCIMT_IRQ_SCSI;
  43                         continue;
  44                 }
  45                 if (dev->devfn == PCI_DEVFN(2, 0)) {
  46                         dev->irq = PCIMT_IRQ_ETHERNET;
  47                         continue;
  48                 }
  49
  50                 switch (dev->irq) {
  51                 case 1...4:
  52                         dev->irq += PCIMT_IRQ_INTA - 1;
  53                         break;
  54                 case 0:
  55                         break;
  56                 default:
  57                         printk("PCI device on bus %d, dev %d, function %d "
  58                                "impossible interrupt configured.\n",
  59                                dev->bus->number, PCI_SLOT(dev->devfn),
  60                                PCI_SLOT(dev->devfn));
  61                 }
  62         }
  63 }
  64 #endif
  65
  66 /*
  67  * We can't address 8 and 16 bit words directly.  Instead we have to
  68  * read/write a 32bit word and mask/modify the data we actually want.
  69  */
  70 static int pcimt_read(struct pci_bus *bus, unsigned int devfn, int where,
  71                       int size, u32 * val)
  72 {
  73         u32 res;
  74
  75         switch (size) {
  76         case 1:
  77                 mkaddr(bus, devfn, where);
  78                 res = *(volatile u32 *) PCIMT_CONFIG_DATA;
  79                 res = (le32_to_cpu(res) >> ((where & 3) << 3)) & 0xff;
  80                 *val = (u8) res;
  81                 break;
  82         case 2:
  83                 if (where & 1)
  84                         return PCIBIOS_BAD_REGISTER_NUMBER;
  85                 mkaddr(bus, devfn, where);
  86                 res = *(volatile u32 *) PCIMT_CONFIG_DATA;
  87                 res = (le32_to_cpu(res) >> ((where & 3) << 3)) & 0xffff;
  88                 *val = (u16) res;
  89                 break;
  90         case 4:
  91                 if (where & 3)
  92                         return PCIBIOS_BAD_REGISTER_NUMBER;
  93                 mkaddr(bus, devfn, where);
  94                 res = *(volatile u32 *) PCIMT_CONFIG_DATA;
  95                 res = le32_to_cpu(res);
  96                 *val = res;
  97                 break;
  98         }
  99
 100         return PCIBIOS_SUCCESSFUL;
 101 }
 102
 103 static int pcimt_write(struct pci_bus *bus, unsigned int devfn, int where,
 104                        int size, u32 val)
 105 {
 106         switch (size) {
 107         case 1:
 108                 mkaddr(bus, devfn, where);
 109                 *(volatile u8 *) (PCIMT_CONFIG_DATA + (where & 3)) =
 110                     (u8) le32_to_cpu(val);
 111                 break;
 112         case 2:
 113                 if (where & 1)
 114                         return PCIBIOS_BAD_REGISTER_NUMBER;
 115                 mkaddr(bus, devfn, where);
 116                 *(volatile u16 *) (PCIMT_CONFIG_DATA + (where & 3)) =
 117                     (u16) le32_to_cpu(val);
 118                 break;
 119         case 4:
 120                 if (where & 3)
 121                         return PCIBIOS_BAD_REGISTER_NUMBER;
 122                 mkaddr(bus, devfn, where);
 123                 *(volatile u32 *) PCIMT_CONFIG_DATA = le32_to_cpu(val);
 124                 break;
 125         }
 126
 127         return PCIBIOS_SUCCESSFUL;
 128 }
 129
 130 struct pci_ops sni_pci_ops = {
 131         .read = pcimt_read,
 132         .write = pcimt_write,
 133 };
 134
 135 void __devinit pcibios_fixup_bus(struct pci_bus *b)
 136 {
 137 }
 138
 139 static int __init pcibios_init(void)
 140 {
 141         struct pci_ops *ops = &sni_pci_ops;
 142
 143         pci_scan_bus(0, ops, NULL);
 144
 145         return 0;
 146 }
 147
 148 subsys_initcall(pcibios_init);
 149
 150 int __init pcibios_enable_device(struct pci_dev *dev, int mask)
 151 {
 152         /* Not needed, since we enable all devices at startup.  */
 153         return 0;
 154 }
 155
 156 void pcibios_align_resource(void *data, struct resource *res,
 157                             unsigned long size, unsigned long align)
 158 {
 159 }
 160
 161 unsigned __init int pcibios_assign_all_busses(void)
 162 {
 163         return 0;
 164 }
 165
 166 char *__init pcibios_setup(char *str)
 167 {
 168         /* Nothing to do for now.  */
 169
 170         return str;
 171 }
 172
 173 struct pci_fixup pcibios_fixups[] = {
 174         {0}
 175 };