2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994, 1995 Waldorf Electronics
7 * Written by Ralf Baechle and Andreas Busse
8 * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 Ralf Baechle
9 * Copyright (C) 1996 Paul M. Antoine
10 * Modified for DECStation and hence R3000 support by Paul M. Antoine
11 * Further modifications by David S. Miller and Harald Koerfgen
12 * Copyright (C) 1999 Silicon Graphics, Inc.
13 * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
14 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
16 #include <linux/config.h>
17 #include <linux/init.h>
18 #include <linux/threads.h>
21 #include <asm/regdef.h>
23 #include <asm/processor.h>
24 #include <asm/mipsregs.h>
25 #include <asm/stackframe.h>
26 #ifdef CONFIG_SGI_IP27
27 #include <asm/sn/addrs.h>
28 #include <asm/sn/sn0/hubni.h>
29 #include <asm/sn/klkernvars.h>
32 .macro ARC64_TWIDDLE_PC
33 #if defined(CONFIG_ARC64) || defined(CONFIG_MAPPED_KERNEL)
34 /* We get launched at a XKPHYS address but the kernel is linked to
35 run at a KSEG0 address, so jump there. */
42 #ifdef CONFIG_SGI_IP27
44 * outputs the local nasid into res. IP27 stuff.
46 .macro GET_NASID_ASM res
47 dli \res, LOCAL_HUB_ADDR(NI_STATUS_REV_ID)
49 and \res, NSRI_NODEID_MASK
50 dsrl \res, NSRI_NODEID_SHFT
52 #endif /* CONFIG_SGI_IP27 */
55 * inputs are the text nasid in t1, data nasid in t2.
57 .macro MAPPED_KERNEL_SETUP_TLB
58 #ifdef CONFIG_MAPPED_KERNEL
60 * This needs to read the nasid - assume 0 for now.
61 * Drop in 0xffffffffc0000000 in tlbhi, 0+VG in tlblo_0,
64 dli t0, 0xffffffffc0000000
66 li t0, 0x1c000 # Offset of text into node memory
67 dsll t1, NASID_SHFT # Shift text nasid into place
68 dsll t2, NASID_SHFT # Same for data nasid
69 or t1, t1, t0 # Physical load address of kernel text
70 or t2, t2, t0 # Physical load address of kernel data
73 dsll t1, 6 # Get pfn into place
74 dsll t2, 6 # Get pfn into place
75 li t0, ((_PAGE_GLOBAL|_PAGE_VALID| _CACHE_CACHABLE_COW) >> 6)
77 mtc0 t0, CP0_ENTRYLO0 # physaddr, VG, cach exlwr
78 li t0, ((_PAGE_GLOBAL|_PAGE_VALID| _PAGE_DIRTY|_CACHE_CACHABLE_COW) >> 6)
80 mtc0 t0, CP0_ENTRYLO1 # physaddr, DVG, cach exlwr
81 li t0, 0x1ffe000 # MAPPED_KERN_TLBMASK, TLBPGMASK_16M
94 * Reserved space for exception handlers.
95 * Necessary for machines which link their kernels at KSEG0.
99 EXPORT(stext) # used for profiling
104 NESTED(kernel_entry, 16, sp) # kernel entry point
105 #ifdef CONFIG_SGI_IP27
107 move t2, t1 # text and data are here
108 MAPPED_KERNEL_SETUP_TLB
113 CLI # disable interrupts
115 PTR_LA $28, init_thread_union
116 PTR_ADDIU sp, $28, _THREAD_SIZE - 32
117 set_saved_sp sp, t0, t1
118 PTR_SUBU sp, 4 * SZREG # init stack pointer
121 * The firmware/bootloader passes argc/argp/envp
122 * to us as arguments. But clear bss first because
123 * the romvec and other important info is stored there
126 PTR_LA t0, __bss_start
128 PTR_LA t1, __bss_stop - LONGSIZE
130 PTR_ADDIU t0, LONGSIZE
139 * SMP slave cpus entry point. Board specific code for bootstrap calls this
140 * function after setting up the stack and gp registers.
142 NESTED(smp_bootstrap, 16, sp)
143 #ifdef CONFIG_SGI_IP27
145 li t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
146 KLDIR_OFF_POINTER + K0BASE
149 ld t0, 0(t0) # t0 points to kern_vars struct
150 lh t1, KV_RO_NASID_OFFSET(t0)
151 lh t2, KV_RW_NASID_OFFSET(t0)
152 MAPPED_KERNEL_SETUP_TLB
154 #endif /* CONFIG_SGI_IP27 */
160 * For the moment set ST0_KU so the CPU will not spit fire when
161 * executing 64-bit instructions. The full initialization of the
162 * CPU's status register is done later in per_cpu_trap_init().
170 #endif /* CONFIG_SMP */
174 .comm kernelsp, NR_CPUS * 8, 8
175 .comm pgd_current, NR_CPUS * 8, 8
177 .macro page name, order=0
179 \name: .size \name, (_PAGE_SIZE << \order)
180 .org . + (_PAGE_SIZE << \order)
189 * Here we only have a two-level pagetable structure ...
191 page swapper_pg_dir, _PGD_ORDER
192 page invalid_pte_table, _PTE_ORDER
196 * ... but on 64-bit we've got three-level pagetables with a
197 * slightly different layout ...
199 page swapper_pg_dir, _PGD_ORDER
200 page invalid_pmd_table, _PMD_ORDER
201 page invalid_pte_table, _PTE_ORDER
204 * 64-bit kernel mappings are really screwed up ...
206 page kptbl, _PGD_ORDER