[MIPS] prom_free_prom_memory cleanup
[linux-2.6/linux-mips.git] / lib / iomap.c
blobd6ccdd85df5311a4326bf584920a1293dc11243c
1 /*
2 * Implement the default iomap interfaces
4 * (C) Copyright 2004 Linus Torvalds
5 */
6 #include <linux/pci.h>
7 #include <linux/module.h>
8 #include <asm/io.h>
11 * Read/write from/to an (offsettable) iomem cookie. It might be a PIO
12 * access or a MMIO access, these functions don't care. The info is
13 * encoded in the hardware mapping set up by the mapping functions
14 * (or the cookie itself, depending on implementation and hw).
16 * The generic routines don't assume any hardware mappings, and just
17 * encode the PIO/MMIO as part of the cookie. They coldly assume that
18 * the MMIO IO mappings are not in the low address range.
20 * Architectures for which this is not true can't use this generic
21 * implementation and should do their own copy.
24 #ifndef HAVE_ARCH_PIO_SIZE
26 * We encode the physical PIO addresses (0-0xffff) into the
27 * pointer by offsetting them with a constant (0x10000) and
28 * assuming that all the low addresses are always PIO. That means
29 * we can do some sanity checks on the low bits, and don't
30 * need to just take things for granted.
32 #define PIO_OFFSET 0x10000UL
33 #define PIO_MASK 0x0ffffUL
34 #define PIO_RESERVED 0x40000UL
35 #endif
38 * Ugly macros are a way of life.
40 #define VERIFY_PIO(port) BUG_ON((port & ~PIO_MASK) != PIO_OFFSET)
42 #define IO_COND(addr, is_pio, is_mmio) do { \
43 unsigned long port = (unsigned long __force)addr; \
44 if (port < PIO_RESERVED) { \
45 VERIFY_PIO(port); \
46 port &= PIO_MASK; \
47 is_pio; \
48 } else { \
49 is_mmio; \
50 } \
51 } while (0)
53 #ifndef pio_read16be
54 #define pio_read16be(port) swab16(inw(port))
55 #define pio_read32be(port) swab32(inl(port))
56 #endif
58 #ifndef mmio_read16be
59 #define mmio_read16be(addr) be16_to_cpu(__raw_readw(addr))
60 #define mmio_read32be(addr) be32_to_cpu(__raw_readl(addr))
61 #endif
63 unsigned int fastcall ioread8(void __iomem *addr)
65 IO_COND(addr, return inb(port), return readb(addr));
67 unsigned int fastcall ioread16(void __iomem *addr)
69 IO_COND(addr, return inw(port), return readw(addr));
71 unsigned int fastcall ioread16be(void __iomem *addr)
73 IO_COND(addr, return pio_read16be(port), return mmio_read16be(addr));
75 unsigned int fastcall ioread32(void __iomem *addr)
77 IO_COND(addr, return inl(port), return readl(addr));
79 unsigned int fastcall ioread32be(void __iomem *addr)
81 IO_COND(addr, return pio_read32be(port), return mmio_read32be(addr));
83 EXPORT_SYMBOL(ioread8);
84 EXPORT_SYMBOL(ioread16);
85 EXPORT_SYMBOL(ioread16be);
86 EXPORT_SYMBOL(ioread32);
87 EXPORT_SYMBOL(ioread32be);
89 #ifndef pio_write16be
90 #define pio_write16be(val,port) outw(swab16(val),port)
91 #define pio_write32be(val,port) outl(swab32(val),port)
92 #endif
94 #ifndef mmio_write16be
95 #define mmio_write16be(val,port) __raw_writew(be16_to_cpu(val),port)
96 #define mmio_write32be(val,port) __raw_writel(be32_to_cpu(val),port)
97 #endif
99 void fastcall iowrite8(u8 val, void __iomem *addr)
101 IO_COND(addr, outb(val,port), writeb(val, addr));
103 void fastcall iowrite16(u16 val, void __iomem *addr)
105 IO_COND(addr, outw(val,port), writew(val, addr));
107 void fastcall iowrite16be(u16 val, void __iomem *addr)
109 IO_COND(addr, pio_write16be(val,port), mmio_write16be(val, addr));
111 void fastcall iowrite32(u32 val, void __iomem *addr)
113 IO_COND(addr, outl(val,port), writel(val, addr));
115 void fastcall iowrite32be(u32 val, void __iomem *addr)
117 IO_COND(addr, pio_write32be(val,port), mmio_write32be(val, addr));
119 EXPORT_SYMBOL(iowrite8);
120 EXPORT_SYMBOL(iowrite16);
121 EXPORT_SYMBOL(iowrite16be);
122 EXPORT_SYMBOL(iowrite32);
123 EXPORT_SYMBOL(iowrite32be);
126 * These are the "repeat MMIO read/write" functions.
127 * Note the "__raw" accesses, since we don't want to
128 * convert to CPU byte order. We write in "IO byte
129 * order" (we also don't have IO barriers).
131 #ifndef mmio_insb
132 static inline void mmio_insb(void __iomem *addr, u8 *dst, int count)
134 while (--count >= 0) {
135 u8 data = __raw_readb(addr);
136 *dst = data;
137 dst++;
140 static inline void mmio_insw(void __iomem *addr, u16 *dst, int count)
142 while (--count >= 0) {
143 u16 data = __raw_readw(addr);
144 *dst = data;
145 dst++;
148 static inline void mmio_insl(void __iomem *addr, u32 *dst, int count)
150 while (--count >= 0) {
151 u32 data = __raw_readl(addr);
152 *dst = data;
153 dst++;
156 #endif
158 #ifndef mmio_outsb
159 static inline void mmio_outsb(void __iomem *addr, const u8 *src, int count)
161 while (--count >= 0) {
162 __raw_writeb(*src, addr);
163 src++;
166 static inline void mmio_outsw(void __iomem *addr, const u16 *src, int count)
168 while (--count >= 0) {
169 __raw_writew(*src, addr);
170 src++;
173 static inline void mmio_outsl(void __iomem *addr, const u32 *src, int count)
175 while (--count >= 0) {
176 __raw_writel(*src, addr);
177 src++;
180 #endif
182 void fastcall ioread8_rep(void __iomem *addr, void *dst, unsigned long count)
184 IO_COND(addr, insb(port,dst,count), mmio_insb(addr, dst, count));
186 void fastcall ioread16_rep(void __iomem *addr, void *dst, unsigned long count)
188 IO_COND(addr, insw(port,dst,count), mmio_insw(addr, dst, count));
190 void fastcall ioread32_rep(void __iomem *addr, void *dst, unsigned long count)
192 IO_COND(addr, insl(port,dst,count), mmio_insl(addr, dst, count));
194 EXPORT_SYMBOL(ioread8_rep);
195 EXPORT_SYMBOL(ioread16_rep);
196 EXPORT_SYMBOL(ioread32_rep);
198 void fastcall iowrite8_rep(void __iomem *addr, const void *src, unsigned long count)
200 IO_COND(addr, outsb(port, src, count), mmio_outsb(addr, src, count));
202 void fastcall iowrite16_rep(void __iomem *addr, const void *src, unsigned long count)
204 IO_COND(addr, outsw(port, src, count), mmio_outsw(addr, src, count));
206 void fastcall iowrite32_rep(void __iomem *addr, const void *src, unsigned long count)
208 IO_COND(addr, outsl(port, src,count), mmio_outsl(addr, src, count));
210 EXPORT_SYMBOL(iowrite8_rep);
211 EXPORT_SYMBOL(iowrite16_rep);
212 EXPORT_SYMBOL(iowrite32_rep);
214 /* Create a virtual mapping cookie for an IO port range */
215 void __iomem *ioport_map(unsigned long port, unsigned int nr)
217 if (port > PIO_MASK)
218 return NULL;
219 return (void __iomem *) (unsigned long) (port + PIO_OFFSET);
222 void ioport_unmap(void __iomem *addr)
224 /* Nothing to do */
226 EXPORT_SYMBOL(ioport_map);
227 EXPORT_SYMBOL(ioport_unmap);
229 /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
230 void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
232 unsigned long start = pci_resource_start(dev, bar);
233 unsigned long len = pci_resource_len(dev, bar);
234 unsigned long flags = pci_resource_flags(dev, bar);
236 if (!len || !start)
237 return NULL;
238 if (maxlen && len > maxlen)
239 len = maxlen;
240 if (flags & IORESOURCE_IO)
241 return ioport_map(start, len);
242 if (flags & IORESOURCE_MEM) {
243 if (flags & IORESOURCE_CACHEABLE)
244 return ioremap(start, len);
245 return ioremap_nocache(start, len);
247 /* What? */
248 return NULL;
251 void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
253 IO_COND(addr, /* nothing */, iounmap(addr));
255 EXPORT_SYMBOL(pci_iomap);
256 EXPORT_SYMBOL(pci_iounmap);