include/asm-h8300/traps.h

   1 /*
   2  *  linux/include/asm/traps.h
   3  *
   4  *  Copyright (C) 1993        Hamish Macdonald
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file COPYING in the main directory of this archive
   8  * for more details.
   9  */
  10
  11 #ifndef _H8300_TRAPS_H
  12 #define _H8300_TRAPS_H
  13
  14 #if 0
  15 #ifndef __ASSEMBLY__
  16
  17 typedef void (*e_vector)(void);
  18
  19 extern e_vector vectors[];
  20
  21 #endif
  22
  23 #define VEC_BUSERR  (2)
  24 #define VEC_ADDRERR (3)
  25 #define VEC_ILLEGAL (4)
  26 #define VEC_ZERODIV (5)
  27 #define VEC_CHK     (6)
  28 #define VEC_TRAP    (7)
  29 #define VEC_PRIV    (8)
  30 #define VEC_TRACE   (9)
  31 #define VEC_LINE10  (10)
  32 #define VEC_LINE11  (11)
  33 #define VEC_RESV1   (12)
  34 #define VEC_COPROC  (13)
  35 #define VEC_FORMAT  (14)
  36 #define VEC_UNINT   (15)
  37 #define VEC_SPUR    (24)
  38 #define VEC_INT1    (25)
  39 #define VEC_INT2    (26)
  40 #define VEC_INT3    (27)
  41 #define VEC_INT4    (28)
  42 #define VEC_INT5    (29)
  43 #define VEC_INT6    (30)
  44 #define VEC_INT7    (31)
  45 #define VEC_SYS     (32)
  46 #define VEC_TRAP1   (33)
  47 #define VEC_TRAP2   (34)
  48 #define VEC_TRAP3   (35)
  49 #define VEC_TRAP4   (36)
  50 #define VEC_TRAP5   (37)
  51 #define VEC_TRAP6   (38)
  52 #define VEC_TRAP7   (39)
  53 #define VEC_TRAP8   (40)
  54 #define VEC_TRAP9   (41)
  55 #define VEC_TRAP10  (42)
  56 #define VEC_TRAP11  (43)
  57 #define VEC_TRAP12  (44)
  58 #define VEC_TRAP13  (45)
  59 #define VEC_TRAP14  (46)
  60 #define VEC_TRAP15  (47)
  61 #define VEC_FPBRUC  (48)
  62 #define VEC_FPIR    (49)
  63 #define VEC_FPDIVZ  (50)
  64 #define VEC_FPUNDER (51)
  65 #define VEC_FPOE    (52)
  66 #define VEC_FPOVER  (53)
  67 #define VEC_FPNAN   (54)
  68 #define VEC_FPUNSUP (55)
  69 #define VEC_UNIMPEA (60)
  70 #define VEC_UNIMPII (61)
  71 #define VEC_USER    (64)
  72
  73 #define VECOFF(vec) ((vec)<<2)
  74
  75 #ifndef __ASSEMBLY__
  76
  77 /* Status register bits */
  78 #define PS_T  (0x8000)
  79 #define PS_S  (0x2000)
  80 #define PS_M  (0x1000)
  81 #define PS_C  (0x0001)
  82
  83 /* bits for 68020/68030 special status word */
  84
  85 #define FC    (0x8000)
  86 #define FB    (0x4000)
  87 #define RC    (0x2000)
  88 #define RB    (0x1000)
  89 #define DF    (0x0100)
  90 #define RM    (0x0080)
  91 #define RW    (0x0040)
  92 #define SZ    (0x0030)
  93 #define DFC   (0x0007)
  94
  95 /* bits for 68030 MMU status register (mmusr,psr) */
  96
  97 #define MMU_B        (0x8000)    /* bus error */
  98 #define MMU_L        (0x4000)    /* limit violation */
  99 #define MMU_S        (0x2000)    /* supervisor violation */
 100 #define MMU_WP       (0x0800)    /* write-protected */
 101 #define MMU_I        (0x0400)    /* invalid descriptor */
 102 #define MMU_M        (0x0200)    /* ATC entry modified */
 103 #define MMU_T        (0x0040)    /* transparent translation */
 104 #define MMU_NUM      (0x0007)    /* number of levels traversed */
 105
 106
 107 /* bits for 68040 special status word */
 108 #define CP_040  (0x8000)
 109 #define CU_040  (0x4000)
 110 #define CT_040  (0x2000)
 111 #define CM_040  (0x1000)
 112 #define MA_040  (0x0800)
 113 #define ATC_040 (0x0400)
 114 #define LK_040  (0x0200)
 115 #define RW_040  (0x0100)
 116 #define SIZ_040 (0x0060)
 117 #define TT_040  (0x0018)
 118 #define TM_040  (0x0007)
 119
 120 /* bits for 68040 write back status word */
 121 #define WBV_040   (0x80)
 122 #define WBSIZ_040 (0x60)
 123 #define WBBYT_040 (0x20)
 124 #define WBWRD_040 (0x40)
 125 #define WBLNG_040 (0x00)
 126 #define WBTT_040  (0x18)
 127 #define WBTM_040  (0x07)
 128
 129 /* bus access size codes */
 130 #define BA_SIZE_BYTE    (0x20)
 131 #define BA_SIZE_WORD    (0x40)
 132 #define BA_SIZE_LONG    (0x00)
 133 #define BA_SIZE_LINE    (0x60)
 134
 135 /* bus access transfer type codes */
 136 #define BA_TT_MOVE16    (0x08)
 137
 138 /* structure for stack frames */
 139
 140 struct frame {
 141     struct pt_regs ptregs;
 142     union {
 143             struct {
 144                     unsigned long  iaddr;    /* instruction address */
 145             } fmt2;
 146             struct {
 147                     unsigned long  effaddr;  /* effective address */
 148             } fmt3;
 149             struct {
 150                     unsigned long  effaddr;  /* effective address */
 151                     unsigned long  pc;       /* pc of faulted instr */
 152             } fmt4;
 153             struct {
 154                     unsigned long  effaddr;  /* effective address */
 155                     unsigned short ssw;      /* special status word */
 156                     unsigned short wb3s;     /* write back 3 status */
 157                     unsigned short wb2s;     /* write back 2 status */
 158                     unsigned short wb1s;     /* write back 1 status */
 159                     unsigned long  faddr;    /* fault address */
 160                     unsigned long  wb3a;     /* write back 3 address */
 161                     unsigned long  wb3d;     /* write back 3 data */
 162                     unsigned long  wb2a;     /* write back 2 address */
 163                     unsigned long  wb2d;     /* write back 2 data */
 164                     unsigned long  wb1a;     /* write back 1 address */
 165                     unsigned long  wb1dpd0;  /* write back 1 data/push data 0*/
 166                     unsigned long  pd1;      /* push data 1*/
 167                     unsigned long  pd2;      /* push data 2*/
 168                     unsigned long  pd3;      /* push data 3*/
 169             } fmt7;
 170             struct {
 171                     unsigned long  iaddr;    /* instruction address */
 172                     unsigned short int1[4];  /* internal registers */
 173             } fmt9;
 174             struct {
 175                     unsigned short int1;
 176                     unsigned short ssw;      /* special status word */
 177                     unsigned short isc;      /* instruction stage c */
 178                     unsigned short isb;      /* instruction stage b */
 179                     unsigned long  daddr;    /* data cycle fault address */
 180                     unsigned short int2[2];
 181                     unsigned long  dobuf;    /* data cycle output buffer */
 182                     unsigned short int3[2];
 183             } fmta;
 184             struct {
 185                     unsigned short int1;
 186                     unsigned short ssw;     /* special status word */
 187                     unsigned short isc;     /* instruction stage c */
 188                     unsigned short isb;     /* instruction stage b */
 189                     unsigned long  daddr;   /* data cycle fault address */
 190                     unsigned short int2[2];
 191                     unsigned long  dobuf;   /* data cycle output buffer */
 192                     unsigned short int3[4];
 193                     unsigned long  baddr;   /* stage B address */
 194                     unsigned short int4[2];
 195                     unsigned long  dibuf;   /* data cycle input buffer */
 196                     unsigned short int5[3];
 197                     unsigned       ver : 4; /* stack frame version # */
 198                     unsigned       int6:12;
 199                     unsigned short int7[18];
 200             } fmtb;
 201     } un;
 202 };
 203
 204 #endif /* __ASSEMBLY__ */
 205 #endif
 206
 207 #endif /* _H8300_TRAPS_H */