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Coarsly sort out 32-bit-only, 64-bit-only and ``portable'' MIPS lib/
[linux-2.6/linux-mips.git] / drivers / video / pm3fb.c
bloba9d045b28c70a8fe8a472241f5857ce18842800a
1 /*
2 * linux/drivers/video/pm3fb.c -- 3DLabs Permedia3 frame buffer device
3 *
4 * Copyright (C) 2001 Romain Dolbeau <dolbeau@irisa.fr>
5 * Based on code written by:
6 * Sven Luther, <luther@dpt-info.u-strasbg.fr>
7 * Alan Hourihane, <alanh@fairlite.demon.co.uk>
8 * Russel King, <rmk@arm.linux.org.uk>
9 * Based on linux/drivers/video/skeletonfb.c:
10 * Copyright (C) 1997 Geert Uytterhoeven
11 * Based on linux/driver/video/pm2fb.c:
12 * Copyright (C) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT)
13 * Copyright (C) 1999 Jakub Jelinek (jakub@redhat.com)
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file COPYING in the main directory of this archive for
17 * more details.
18 *
19 * $Header: /cvsroot/linux/drivers/video/pm3fb.c,v 1.1 2002/02/25 19:11:06 marcelo Exp $
20 *
21 * CHANGELOG:
22 * Mon Feb 11 10:35:48 MET 2002, v 1.4.11B: Cosmetic update.
23 * Wed Jan 23 14:16:59 MET 2002, v 1.4.11: Preliminary 2.5.x support, patch for 2.5.2.
24 * Wed Nov 28 11:08:29 MET 2001, v 1.4.10: potential bug fix for SDRAM-based board, patch for 2.4.16.
25 * Thu Sep 20 10:24:42 MET DST 2001, v 1.4.9: sync bug fix, preliminary flatpanel support, better timings.
26 * Tue Aug 28 10:13:01 MET DST 2001, v 1.4.8: memory timings check, minor bug fixes.
27 * Wed Jul 18 19:06:14 CEST 2001, v 1.4.7: Mode fix (800x600-100, 1024x768-100 changed), using HW panning + accel bug fix.
28 * Mon Jun 25 10:33:56 MET DST 2001, v 1.4.6: Depth 12 fix, chip reset ioctl, moved memory erase ioctl to DEBUG.
29 * Wed Jun 20 11:13:08 MET DST 2001, v 1.4.5: Fixed missing blinking cursor in 8bpp, code cleaning, memory erase IOCTL.
30 * Mon Jun 18 16:00:27 CEST 2001, v 1.4.4: Depth 12 (RGBA 4444) support, code cleaning.
31 * Fri Jun 15 13:53:01 CEST 2001, v 1.4.3: Removed warnings, depth 15 support, add 'depth' option.
32 * Thu Jun 14 10:13:52 MET DST 2001, v 1.4.2: Fixed depth switching bug, preliminary 15bpp (RGB5551) support.
33 * Thu Apr 12 11:16:45 MET DST 2001, v 1.4.1B: Doc updates.
34 * Fri Apr 6 11:12:53 MET DST 2001, v 1.4.1: Configure.help, minor cleanup
35 * Thu Mar 29 10:56:50 MET DST 2001, v 1.4.0: Module & module options support (note: linux patch changed, 2.2.19 added).
36 * Thu Mar 15 15:30:31 MET 2001, v 1.3.2: Fixed mirroring bug on little-endian.
37 * Wed Mar 14 21:25:54 CET 2001, v 1.3.1: Fixed bug in BlockMove (_bmov).
38 * Tue Mar 13 10:53:19 MET 2001, v 1.3.0: Character drawing hardware support (in all width between 1 and 16), fixes.
39 * Thu Mar 8 10:20:16 MET 2001, v 1.2.2: Better J2000 support, "font:" option.
40 * Tue Mar 6 21:25:04 CET 2001, v 1.2.1: Better acceleration support.
41 * Mon Mar 5 21:54:17 CET 2001, v 1.2.0: Partial acceleration support (clear & bmove)
42 * Mon Mar 5 12:52:15 CET 2001, v 1.1.3: Big pan_display fix.
43 * Sun Mar 4 22:21:50 CET 2001, v 1.1.2: (numerous) bug fixes.
44 * Fri Mar 2 15:54:07 CET 2001, v 1.1.1: Might have Appian J2000 support, resource mangement in 2.4
45 * Wed Feb 28 18:21:35 CET 2001, v 1.1.0: Might have multiple boards support (added, but not yest tested)
46 * Tue Feb 27 17:31:12 CET 2001, v 1.0.6: fixes boot-time mode select, add more default mode
47 * Tue Feb 27 14:01:36 CET 2001, v 1.0.5: fixes (1.0.4 was broken for 2.2), cleaning up
48 * Mon Feb 26 23:17:36 CET 2001, v 1.0.4: preliminary 2.4.x support, dropped (useless on pm3) partial product, more OF fix
49 * Mon Feb 26 20:59:05 CET 2001, v 1.0.3: No more shadow register (and wasted memory), endianess fix, use OF-preset resolution by default
50 * Wed Feb 21 22:09:30 CET 2001, v 1.0.2: Code cleaning for future multiboard support, better OF support, bugs fix
51 * Wed Feb 21 19:58:56 CET 2001, v 1.0.1: OpenFirmware support, fixed memory detection, better debug support, code cleaning
52 * Wed Feb 21 14:47:06 CET 2001, v 1.0.0: First working version
53 */
54
55 #include <linux/config.h>
56 #include <linux/module.h>
57 #include <linux/version.h>
58 #include <linux/kernel.h>
59 #include <linux/errno.h>
60 #include <linux/string.h>
61 #include <linux/mm.h>
62 #include <linux/tty.h>
63 #include <linux/slab.h>
64 #include <linux/vmalloc.h>
65 #include <linux/delay.h>
66 #include <linux/interrupt.h>
67 #include <linux/fb.h>
68 #include <linux/init.h>
69 #include <linux/pci.h>
70 #include <linux/ioport.h>
71
72 #include <video/fbcon.h>
73 #include <video/fbcon-mfb.h>
74 #include <video/fbcon-cfb2.h>
75 #include <video/fbcon-cfb4.h>
76 #include <video/fbcon-cfb8.h>
77 #include <video/fbcon-cfb16.h>
78 #include <video/fbcon-cfb24.h>
79 #include <video/fbcon-cfb32.h>
80 #include <video/pm3fb.h>
81
82 #include <asm/io.h>
83 #include <asm/uaccess.h>
84
85 #ifdef CONFIG_FB_OF
86 #include <asm/prom.h>
87 #endif
88
89 /* ************************************* */
90 /* ***** The various "global" data ***** */
91 /* ************************************* */
92
93 /* those will need a rework for multiple board support */
94 /* Driver name */
95 static const char permedia3_name[16] = "Permedia3";
96
97 /* the fb_par struct, mandatory */
98 struct pm3fb_par {
99 u32 pixclock; /* pixclock in KHz */
100
101 u32 width; /* width of virtual screen */
102 u32 height; /* height of virtual screen */
103
104 u32 hsstart; /* horiz. sync start */
105 u32 hsend; /* horiz. sync end */
106 u32 hbend; /* horiz. blank end (also gate end) */
107 u32 htotal; /* total width (w/ sync & blank) */
108
109 u32 vsstart; /* vert. sync start */
110 u32 vsend; /* vert. sync end */
111 u32 vbend; /* vert. blank end */
112 u32 vtotal; /* total height (w/ sync & blank) */
113
114 u32 stride; /* screen stride */
115 u32 base; /* screen base (xoffset+yoffset) in 128 bits unit */
116 /* NOTE : unlike other pm3 stuff above, stored *after* shiftbpp. don't ask */
117 u32 depth; /* screen depth (8, 12, 15, 16 or 32) */
118 u32 video; /* video control (hsync,vsync) */
119 };
120
121 /* memory timings */
122 struct pm3fb_timings
123 {
124 unsigned long caps;
125 unsigned long timings;
126 unsigned long control;
127 unsigned long refresh;
128 unsigned long powerdown;
129 };
130 typedef enum pm3fb_timing_result { pm3fb_timing_ok, pm3fb_timing_problem, pm3fb_timing_retry } pm3fb_timing_result;
131 #define PM3FB_UNKNOWN_TIMING_VALUE ((unsigned long)-1)
132 #define PM3FB_UNKNOWN_TIMINGS { PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE }
133
134 /* the fb_info struct, mandatory */
135 struct pm3fb_info {
136 struct fb_info_gen gen;
137 unsigned long board_num; /* internal board number */
138 unsigned long use_current;
139 struct pm3fb_par *current_par;
140 struct pci_dev *dev; /* PCI device */
141 #ifdef SUPPORT_FB_OF
142 struct device_node *dn; /* OF node for the PCI device */
143 #endif /* SUPPORT_FB_OF */
144 unsigned long board_type; /* index in the cardbase */
145 unsigned char *fb_base; /* framebuffer memory base */
146 u32 fb_size; /* framebuffer memory size */
147 unsigned char *p_fb; /* physical address of frame buffer */
148 unsigned char *v_fb; /* virtual address of frame buffer */
149 unsigned char *pIOBase; /* physical address of registers region, must be rg_base or rg_base+PM2_REGS_SIZE depending on the host endianness */
150 unsigned char *vIOBase; /* address of registers after ioremap() */
151 struct {
152 u8 transp;
153 u8 red;
154 u8 green;
155 u8 blue;
156 } palette[256];
157 union {
158 #ifdef FBCON_HAS_CFB16
159 u16 cmap12[16]; /* RGBA 4444 */
160 u16 cmap15[16]; /* RGBA 5551 */
161 u16 cmap16[16]; /* RGBA 5650 */
162 #endif
163 #ifdef FBCON_HAS_CFB32
164 u32 cmap32[16];
165 #endif
166 } cmap;
167 struct pm3fb_timings memt;
168 };
169
170 /* regular resolution database*/
171 static struct {
172 char name[16];
173 struct pm3fb_par user_mode;
174 } mode_base[] __initdata = {
175 {
176 "default-800x600", {
177 49500, 800, 600, 16, 96, 256, 1056, 1, 4, 25, 625,
178 800, 0, 8,
179 PM3VideoControl_ENABLE |
180 PM3VideoControl_HSYNC_ACTIVE_HIGH
181 |
182 PM3VideoControl_VSYNC_ACTIVE_HIGH
183 | PM3VideoControl_PIXELSIZE_8BIT}}, {
184 "1024x768-74", {
185 78752, 1024, 768, 32, 128, 304, 1328, 1, 4, 38,
186 806, 1024, 0, 8,
187 PM3VideoControl_ENABLE |
188 PM3VideoControl_HSYNC_ACTIVE_HIGH
189 |
190 PM3VideoControl_VSYNC_ACTIVE_HIGH
191 | PM3VideoControl_PIXELSIZE_8BIT}}, {
192 "1024x768-74-32", {
193 78752, 1024, 768, 32, 128, 304, 1328, 1, 4, 38,
194 806, 1024, 0, 32,
195 PM3VideoControl_ENABLE |
196 PM3VideoControl_HSYNC_ACTIVE_HIGH
197 |
198 PM3VideoControl_VSYNC_ACTIVE_HIGH
199 | PM3VideoControl_PIXELSIZE_32BIT}},
200 /* Generated mode : "1600x1024", for the SGI 1600SW flat panel*/
201 {
202 "SGI1600SW", {
203 108000, 1600, 1024, 16, 56, 104, 1704, 3, 6, 32,
204 1056, 1600, 0, 8,
205 PM3VideoControl_ENABLE|
206 PM3VideoControl_HSYNC_ACTIVE_LOW|PM3VideoControl_VSYNC_ACTIVE_LOW|
207 PM3VideoControl_PIXELSIZE_32BIT}},
208 /* ##### auto-generated mode, by fbtimings2pm3 */
209 /* Generated mode : "640x480-60" */
210 {
211 "640x480-60", {
212 25174, 640, 480, 16, 112, 160, 800, 10, 12, 45,
213 525, 640, 0, 8,
214 PM3VideoControl_ENABLE |
215 PM3VideoControl_HSYNC_ACTIVE_LOW
216 |
217 PM3VideoControl_VSYNC_ACTIVE_LOW
218 | PM3VideoControl_PIXELSIZE_8BIT}},
219 /* Generated mode : "640x480-72" */
220 {
221 "640x480-72", {
222 31199, 640, 480, 24, 64, 192, 832, 9, 12, 40, 520,
223 640, 0, 8,
224 PM3VideoControl_ENABLE |
225 PM3VideoControl_HSYNC_ACTIVE_LOW
226 |
227 PM3VideoControl_VSYNC_ACTIVE_LOW
228 | PM3VideoControl_PIXELSIZE_8BIT}},
229 /* Generated mode : "640x480-75" */
230 {
231 "640x480-75", {
232 31499, 640, 480, 16, 80, 200, 840, 1, 4, 20, 500,
233 640, 0, 8,
234 PM3VideoControl_ENABLE |
235 PM3VideoControl_HSYNC_ACTIVE_LOW
236 |
237 PM3VideoControl_VSYNC_ACTIVE_LOW
238 | PM3VideoControl_PIXELSIZE_8BIT}},
239 /* Generated mode : "640x480-90" */
240 {
241 "640x480-90", {
242 39909, 640, 480, 32, 72, 192, 832, 25, 39, 53, 533,
243 640, 0, 8,
244 PM3VideoControl_ENABLE |
245 PM3VideoControl_HSYNC_ACTIVE_LOW
246 |
247 PM3VideoControl_VSYNC_ACTIVE_LOW
248 | PM3VideoControl_PIXELSIZE_8BIT}},
249 /* Generated mode : "640x480-100" */
250 {
251 "640x480-100", {
252 44899, 640, 480, 32, 160, 208, 848, 22, 34, 51,
253 531, 640, 0, 8,
254 PM3VideoControl_ENABLE |
255 PM3VideoControl_HSYNC_ACTIVE_LOW
256 |
257 PM3VideoControl_VSYNC_ACTIVE_LOW
258 | PM3VideoControl_PIXELSIZE_8BIT}},
259 /* Generated mode : "800x600-48-lace" */
260 /* INTERLACED NOT SUPPORTED
261 {"800x600-48-lace", {35999, 800, 600, 80, 208, 264, 1064, 11, 23, 102, 702, 800, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
262 INTERLACED NOT SUPPORTED */
263 /* Generated mode : "800x600-56" */
264 {
265 "800x600-56", {
266 35999, 800, 600, 24, 96, 224, 1024, 1, 3, 25, 625,
267 800, 0, 8,
268 PM3VideoControl_ENABLE |
269 PM3VideoControl_HSYNC_ACTIVE_HIGH
270 |
271 PM3VideoControl_VSYNC_ACTIVE_HIGH
272 | PM3VideoControl_PIXELSIZE_8BIT}},
273 /* Generated mode : "800x600-60" */
274 {
275 "800x600-60", {
276 40000, 800, 600, 40, 168, 256, 1056, 1, 5, 28, 628,
277 800, 0, 8,
278 PM3VideoControl_ENABLE |
279 PM3VideoControl_HSYNC_ACTIVE_HIGH
280 |
281 PM3VideoControl_VSYNC_ACTIVE_HIGH
282 | PM3VideoControl_PIXELSIZE_8BIT}},
283 /* Generated mode : "800x600-70" */
284 {
285 "800x600-70", {
286 44899, 800, 600, 24, 168, 208, 1008, 9, 21, 36,
287 636, 800, 0, 8,
288 PM3VideoControl_ENABLE |
289 PM3VideoControl_HSYNC_ACTIVE_HIGH
290 |
291 PM3VideoControl_VSYNC_ACTIVE_LOW
292 | PM3VideoControl_PIXELSIZE_8BIT}},
293 /* Generated mode : "800x600-72" */
294 {
295 "800x600-72", {
296 50000, 800, 600, 56, 176, 240, 1040, 37, 43, 66,
297 666, 800, 0, 8,
298 PM3VideoControl_ENABLE |
299 PM3VideoControl_HSYNC_ACTIVE_HIGH
300 |
301 PM3VideoControl_VSYNC_ACTIVE_HIGH
302 | PM3VideoControl_PIXELSIZE_8BIT}},
303 /* Generated mode : "800x600-75" */
304 {
305 "800x600-75", {
306 49497, 800, 600, 16, 96, 256, 1056, 1, 4, 25, 625,
307 800, 0, 8,
308 PM3VideoControl_ENABLE |
309 PM3VideoControl_HSYNC_ACTIVE_HIGH
310 |
311 PM3VideoControl_VSYNC_ACTIVE_HIGH
312 | PM3VideoControl_PIXELSIZE_8BIT}},
313 /* Generated mode : "800x600-90" */
314 {
315 "800x600-90", {
316 56637, 800, 600, 8, 72, 192, 992, 8, 19, 35, 635,
317 800, 0, 8,
318 PM3VideoControl_ENABLE |
319 PM3VideoControl_HSYNC_ACTIVE_HIGH
320 |
321 PM3VideoControl_VSYNC_ACTIVE_HIGH
322 | PM3VideoControl_PIXELSIZE_8BIT}},
323 /* Generated mode : "800x600-100", from /etc/fb.modes */
324 /* DISABLED, hsstart == 0
325 {
326 "800x600-100", {
327 67499, 800, 600, 0, 64, 280, 1080, 7, 11, 25, 625,
328 800, 0, 8,
329 PM3VideoControl_ENABLE |
330 PM3VideoControl_HSYNC_ACTIVE_HIGH
331 |
332 PM3VideoControl_VSYNC_ACTIVE_HIGH
333 | PM3VideoControl_PIXELSIZE_8BIT}},
334 */
335 /* Generated mode : "800x600-100", from ??? */
336 {
337 "800x600-100", {
338 69650, 800, 600, 64, 128, 288, 1088, 4, 10, 40, 640, 800, 0, 8,
339 PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_LOW|
340 PM3VideoControl_VSYNC_ACTIVE_LOW|PM3VideoControl_PIXELSIZE_8BIT}},
341 /* Generated mode : "1024x768-43-lace" */
342 /* INTERLACED NOT SUPPORTED
343 {"1024x768-43-lace", {44899, 1024, 768, 8, 184, 240, 1264, 1, 9, 49, 817, 1024, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
344 INTERLACED NOT SUPPORTED */
345 /* Generated mode : "1024x768-60" */
346 {
347 "1024x768-60", {
348 64998, 1024, 768, 24, 160, 320, 1344, 3, 9, 38,
349 806, 1024, 0, 8,
350 PM3VideoControl_ENABLE |
351 PM3VideoControl_HSYNC_ACTIVE_LOW
352 |
353 PM3VideoControl_VSYNC_ACTIVE_LOW
354 | PM3VideoControl_PIXELSIZE_8BIT}},
355 /* Generated mode : "1024x768-70" */
356 {
357 "1024x768-70", {
358 74996, 1024, 768, 24, 160, 304, 1328, 3, 9, 38,
359 806, 1024, 0, 8,
360 PM3VideoControl_ENABLE |
361 PM3VideoControl_HSYNC_ACTIVE_LOW
362 |
363 PM3VideoControl_VSYNC_ACTIVE_LOW
364 | PM3VideoControl_PIXELSIZE_8BIT}},
365 /* Generated mode : "1024x768-72" */
366 {
367 "1024x768-72", {
368 74996, 10224, 768, 24, 160, 264, 10488, 3, 9, 38,
369 806, 10224, 0, 8,
370 PM3VideoControl_ENABLE |
371 PM3VideoControl_HSYNC_ACTIVE_LOW
372 |
373 PM3VideoControl_VSYNC_ACTIVE_LOW
374 | PM3VideoControl_PIXELSIZE_8BIT}},
375 /* Generated mode : "1024x768-75" */
376 {
377 "1024x768-75", {
378 78746, 1024, 768, 16, 112, 288, 1312, 1, 4, 32,
379 800, 1024, 0, 8,
380 PM3VideoControl_ENABLE |
381 PM3VideoControl_HSYNC_ACTIVE_HIGH
382 |
383 PM3VideoControl_VSYNC_ACTIVE_HIGH
384 | PM3VideoControl_PIXELSIZE_8BIT}},
385 /* Generated mode : "1024x768-90" */
386 {
387 "1024x768-90", {
388 100000, 1024, 768, 0, 96, 288, 1312, 21, 36, 77,
389 845, 1024, 0, 8,
390 PM3VideoControl_ENABLE |
391 PM3VideoControl_HSYNC_ACTIVE_LOW
392 |
393 PM3VideoControl_VSYNC_ACTIVE_LOW
394 | PM3VideoControl_PIXELSIZE_8BIT}},
395 /* Generated mode : "1024x768-100", from /etc/fb.modes */
396 /* DISABLED, vsstart == 0
397 {
398 "1024x768-100", {
399 109998, 1024, 768, 0, 88, 368, 1392, 0, 8, 24, 792,
400 1024, 0, 8,
401 PM3VideoControl_ENABLE |
402 PM3VideoControl_HSYNC_ACTIVE_LOW
403 |
404 PM3VideoControl_VSYNC_ACTIVE_LOW
405 | PM3VideoControl_PIXELSIZE_8BIT}},
406 */
407 /* Generated mode : "1024x768-100", from ??? */
408 {
409 "1024x768-100", {
410 115500, 1024, 768, 32, 224, 416, 1440, 3, 13, 34, 802, 1024, 0, 8,
411 PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_LOW|
412 PM3VideoControl_VSYNC_ACTIVE_LOW|PM3VideoControl_PIXELSIZE_8BIT}},
413 /* Generated mode : "1152x864-43-lace" */
414 /* INTERLACED NOT SUPPORTED
415 {"1152x864-43-lace", {64998, 1152, 864, 72, 200, 264, 1416, 78, 87, 191, 1055, 1152, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
416 INTERLACED NOT SUPPORTED */
417 /* Generated mode : "1152x864-47-lace" */
418 /* INTERLACED NOT SUPPORTED
419 {"1152x864-47-lace", {64998, 1152, 864, 88, 216, 296, 1448, 30, 39, 83, 947, 1152, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
420 INTERLACED NOT SUPPORTED */
421 /* Generated mode : "1152x864-60" */
422 {
423 "1152x864-60", {
424 80000, 1152, 864, 64, 176, 304, 1456, 6, 11, 52,
425 916, 1152, 0, 8,
426 PM3VideoControl_ENABLE |
427 PM3VideoControl_HSYNC_ACTIVE_HIGH
428 |
429 PM3VideoControl_VSYNC_ACTIVE_HIGH
430 | PM3VideoControl_PIXELSIZE_8BIT}},
431 /* Generated mode : "1152x864-70" */
432 {
433 "1152x864-70", {
434 100000, 1152, 864, 40, 192, 360, 1512, 13, 24, 81,
435 945, 1152, 0, 8,
436 PM3VideoControl_ENABLE |
437 PM3VideoControl_HSYNC_ACTIVE_HIGH
438 |
439 PM3VideoControl_VSYNC_ACTIVE_HIGH
440 | PM3VideoControl_PIXELSIZE_8BIT}},
441 /* Generated mode : "1152x864-75" */
442 {
443 "1152x864-75", {
444 109998, 1152, 864, 24, 168, 312, 1464, 45, 53, 138,
445 1002, 1152, 0, 8,
446 PM3VideoControl_ENABLE |
447 PM3VideoControl_HSYNC_ACTIVE_HIGH
448 |
449 PM3VideoControl_VSYNC_ACTIVE_HIGH
450 | PM3VideoControl_PIXELSIZE_8BIT}},
451 /* Generated mode : "1152x864-80" */
452 {
453 "1152x864-80", {
454 109998, 1152, 864, 16, 128, 288, 1440, 30, 37, 94,
455 958, 1152, 0, 8,
456 PM3VideoControl_ENABLE |
457 PM3VideoControl_HSYNC_ACTIVE_HIGH
458 |
459 PM3VideoControl_VSYNC_ACTIVE_HIGH
460 | PM3VideoControl_PIXELSIZE_8BIT}},
461 /* Generated mode : "1280x1024-43-lace" */
462 /* INTERLACED NOT SUPPORTED
463 {"1280x1024-43-lace", {80000, 1024, 1024, 80, 160, 320, 1344, 50, 60, 125, 1149, 1024, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
464 INTERLACED NOT SUPPORTED */
465 /* Generated mode : "1280x1024-47-lace" */
466 /* INTERLACED NOT SUPPORTED
467 {"1280x1024-47-lace", {80000, 1280, 1024, 80, 160, 320, 1600, 1, 11, 29, 1053, 1280, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
468 INTERLACED NOT SUPPORTED */
469 /* Generated mode : "1280x1024-60" */
470 {
471 "1280x1024-60", {
472 107991, 1280, 1024, 48, 160, 408, 1688, 1, 4, 42,
473 1066, 1280, 0, 8,
474 PM3VideoControl_ENABLE |
475 PM3VideoControl_HSYNC_ACTIVE_HIGH
476 |
477 PM3VideoControl_VSYNC_ACTIVE_HIGH
478 | PM3VideoControl_PIXELSIZE_8BIT}},
479 /* Generated mode : "1280x1024-70" */
480 {
481 "1280x1024-70", {
482 125992, 1280, 1024, 80, 192, 408, 1688, 1, 6, 42,
483 1066, 1280, 0, 8,
484 PM3VideoControl_ENABLE |
485 PM3VideoControl_HSYNC_ACTIVE_HIGH
486 |
487 PM3VideoControl_VSYNC_ACTIVE_HIGH
488 | PM3VideoControl_PIXELSIZE_8BIT}},
489 /* Generated mode : "1280x1024-74" */
490 {
491 "1280x1024-74", {
492 134989, 1280, 1024, 32, 176, 432, 1712, 0, 30, 40,
493 1064, 1280, 0, 8,
494 PM3VideoControl_ENABLE |
495 PM3VideoControl_HSYNC_ACTIVE_HIGH
496 |
497 PM3VideoControl_VSYNC_ACTIVE_HIGH
498 | PM3VideoControl_PIXELSIZE_8BIT}},
499 /* Generated mode : "1280x1024-75" */
500 {
501 "1280x1024-75", {
502 134989, 1280, 1024, 16, 160, 408, 1688, 1, 4, 42,
503 1066, 1280, 0, 8,
504 PM3VideoControl_ENABLE |
505 PM3VideoControl_HSYNC_ACTIVE_HIGH
506 |
507 PM3VideoControl_VSYNC_ACTIVE_HIGH
508 | PM3VideoControl_PIXELSIZE_8BIT}},
509 /* Generated mode : "1600x1200-60" */
510 {
511 "1600x1200-60", {
512 155981, 1600, 1200, 32, 192, 448, 2048, 10, 18, 70,
513 1270, 1600, 0, 8,
514 PM3VideoControl_ENABLE |
515 PM3VideoControl_HSYNC_ACTIVE_LOW
516 |
517 PM3VideoControl_VSYNC_ACTIVE_LOW
518 | PM3VideoControl_PIXELSIZE_8BIT}},
519 /* Generated mode : "1600x1200-66" */
520 {
521 "1600x1200-66", {
522 171998, 1600, 1200, 40, 176, 480, 2080, 3, 6, 53,
523 1253, 1600, 0, 8,
524 PM3VideoControl_ENABLE |
525 PM3VideoControl_HSYNC_ACTIVE_LOW
526 |
527 PM3VideoControl_VSYNC_ACTIVE_LOW
528 | PM3VideoControl_PIXELSIZE_8BIT}},
529 /* Generated mode : "1600x1200-76" */
530 {
531 "1600x1200-76", {
532 197980, 1600, 1200, 40, 176, 480, 2080, 3, 8, 50,
533 1250, 1600, 0, 8,
534 PM3VideoControl_ENABLE |
535 PM3VideoControl_HSYNC_ACTIVE_LOW
536 |
537 PM3VideoControl_VSYNC_ACTIVE_LOW
538 | PM3VideoControl_PIXELSIZE_8BIT}},
539 /* ##### end of auto-generated mode */
540 {
541 "\0",}
542 };
543
544 /* more mandatory stuff (see skeletonfb.c + framebuffer driver HOWTO */
545 static struct pm3fb_info fb_info[PM3_MAX_BOARD];
546 static struct pm3fb_par current_par[PM3_MAX_BOARD];
547 static int current_par_valid[PM3_MAX_BOARD];
548 /* to allow explicit filtering of board */
549 short bus[PM3_MAX_BOARD];
550 short slot[PM3_MAX_BOARD];
551 short func[PM3_MAX_BOARD];
552 short disable[PM3_MAX_BOARD];
553 short noaccel[PM3_MAX_BOARD];
554 char fontn[PM3_MAX_BOARD][PM3_FONTNAME_SIZE];
555 short depth[PM3_MAX_BOARD];
556 short flatpanel[PM3_MAX_BOARD];
557 static struct display disp[PM3_MAX_BOARD];
558 static char g_options[PM3_OPTIONS_SIZE] __initdata = "pm3fb,dummy";
559 short printtimings = 0;
560 short forcesize[PM3_MAX_BOARD];
561
562 /* ********************* */
563 /* ***** prototype ***** */
564 /* ********************* */
565 /* card-specific */
566 static void pm3fb_j2000_setup(struct pm3fb_info *l_fb_info);
567 /* permedia3-specific */
568 static pm3fb_timing_result pm3fb_preserve_memory_timings(struct pm3fb_info *l_fb_info);
569 static pm3fb_timing_result pm3fb_try_memory_timings(struct pm3fb_info *l_fb_info);
570 static void pm3fb_write_memory_timings(struct pm3fb_info *l_fb_info);
571 static unsigned long pm3fb_read_dac_reg(struct pm3fb_info *l_fb_info,
572 unsigned long r);
573 static unsigned long pm3fb_CalculateClock(struct pm3fb_info *l_fb_info, unsigned long reqclock, /* In kHz units */
574 unsigned long refclock, /* In kHz units */
575 unsigned char *prescale, /* ClkPreScale */
576 unsigned char *feedback, /* ClkFeedBackScale */
577 unsigned char *postscale
578 /* ClkPostScale */ );
579 static void pm3fb_clear_memory(struct pm3fb_info *l_fb_info, u32 cc);
580 static void pm3fb_clear_colormap(struct pm3fb_info *l_fb_info, unsigned char r, unsigned char g, unsigned char b);
581 static void pm3fb_common_init(struct pm3fb_info *l_fb_info);
582 static int pm3fb_Shiftbpp(struct pm3fb_info *l_fb_info,
583 unsigned long depth, int v);
584 static int pm3fb_Unshiftbpp(struct pm3fb_info *l_fb_info,
585 unsigned long depth, int v);
586 static void pm3fb_mapIO(struct pm3fb_info *l_fb_info);
587 static void pm3fb_unmapIO(struct pm3fb_info *l_fb_info);
588 #if defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2)
589 static void pm3fb_show_cur_mode(struct pm3fb_info *l_fb_info);
590 #endif
591 static void pm3fb_show_cur_timing(struct pm3fb_info *l_fb_info);
592 static void pm3fb_write_mode(struct pm3fb_info *l_fb_info);
593 static void pm3fb_read_mode(struct pm3fb_info *l_fb_info,
594 struct pm3fb_par *curpar);
595 static unsigned long pm3fb_size_memory(struct pm3fb_info *l_fb_info);
596 /* accelerated permedia3-specific */
597 #ifdef PM3FB_USE_ACCEL
598 static void pm3fb_wait_pm3(struct pm3fb_info *l_fb_info);
599 static void pm3fb_init_engine(struct pm3fb_info *l_fb_info);
600 #ifdef FBCON_HAS_CFB32
601 static void pm3fb_cfb32_clear(struct vc_data *conp,
602 struct display *p,
603 int sy, int sx, int height, int width);
604 static void pm3fb_cfb32_clear_margins(struct vc_data *conp,
605 struct display *p, int bottom_only);
606 #endif /* FBCON_HAS_CFB32 */
607 #ifdef FBCON_HAS_CFB16
608 static void pm3fb_cfb16_clear(struct vc_data *conp,
609 struct display *p,
610 int sy, int sx, int height, int width);
611 static void pm3fb_cfb16_clear_margins(struct vc_data *conp,
612 struct display *p, int bottom_only);
613 #endif /* FBCON_HAS_CFB16 */
614 #ifdef FBCON_HAS_CFB8
615 static void pm3fb_cfb8_clear(struct vc_data *conp,
616 struct display *p,
617 int sy, int sx, int height, int width);
618 static void pm3fb_cfb8_clear_margins(struct vc_data *conp,
619 struct display *p, int bottom_only);
620 #endif /* FBCON_HAS_CFB8 */
621 #if defined(FBCON_HAS_CFB8) || defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB32)
622 static void pm3fb_cfbX_bmove(struct display *p,
623 int sy, int sx,
624 int dy, int dx, int height, int width);
625 static void pm3fb_cfbX_putc(struct vc_data *conp, struct display *p,
626 int c, int yy, int xx);
627 static void pm3fb_cfbX_putcs(struct vc_data *conp, struct display *p,
628 const unsigned short *s, int count, int yy,
629 int xx);
630 static void pm3fb_cfbX_revc(struct display *p, int xx, int yy);
631 #endif /* FBCON_HAS_CFB8 || FBCON_HAS_CFB16 || FBCON_HAS_CFB32 */
632 #endif /* PM3FB_USE_ACCEL */
633 /* pre-init */
634 static void pm3fb_mode_setup(char *mode, unsigned long board_num);
635 static void pm3fb_pciid_setup(char *pciid, unsigned long board_num);
636 static char *pm3fb_boardnum_setup(char *options, unsigned long *bn);
637 static void pm3fb_real_setup(char *options);
638 /* fbdev */
639 static int pm3fb_encode_fix(struct fb_fix_screeninfo *fix,
640 const void *par, struct fb_info_gen *info);
641 static int pm3fb_decode_var(const struct fb_var_screeninfo *var,
642 void *par, struct fb_info_gen *info);
643 static void pm3fb_encode_depth(struct fb_var_screeninfo *var, long d);
644 static int pm3fb_encode_var(struct fb_var_screeninfo *var,
645 const void *par, struct fb_info_gen *info);
646 static void pm3fb_get_par(void *par, struct fb_info_gen *info);
647 static void pm3fb_set_par(const void *par, struct fb_info_gen *info);
648 static void pm3fb_set_color(struct pm3fb_info *l_fb_info,
649 unsigned char regno, unsigned char r,
650 unsigned char g, unsigned char b);
651 static int pm3fb_getcolreg(unsigned regno, unsigned *red, unsigned *green,
652 unsigned *blue, unsigned *transp,
653 struct fb_info *info);
654 static int pm3fb_setcolreg(unsigned regno, unsigned red, unsigned green,
655 unsigned blue, unsigned transp,
656 struct fb_info *info);
657 static int pm3fb_blank(int blank_mode, struct fb_info_gen *info);
658 static void pm3fb_set_disp(const void *par, struct display *disp,
659 struct fb_info_gen *info);
660 static void pm3fb_detect(void);
661 static int pm3fb_pan_display(const struct fb_var_screeninfo *var,
662 struct fb_info_gen *info);
663 static int pm3fb_ioctl(struct inode *inode, struct file *file,
664 u_int cmd, u_long arg, int con,
665 struct fb_info *info);
666
667
668 /* the struct that hold them together */
669 #ifdef KERNEL_2_2
670 struct fbgen_hwswitch pm3fb_switch = {
671 pm3fb_detect, pm3fb_encode_fix, pm3fb_decode_var, pm3fb_encode_var,
672 pm3fb_get_par, pm3fb_set_par, pm3fb_getcolreg, pm3fb_setcolreg,
673 pm3fb_pan_display, pm3fb_blank, pm3fb_set_disp
674 };
675
676 static struct fb_ops pm3fb_ops = {
677 fbgen_get_fix, fbgen_get_var, fbgen_set_var,
678 fbgen_get_cmap, fbgen_set_cmap, fbgen_pan_display, pm3fb_ioctl,
679 NULL, NULL
680 };
681 #endif /* KERNEL_2_2 */
682 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
683 struct fbgen_hwswitch pm3fb_switch = {
684 pm3fb_detect, pm3fb_encode_fix, pm3fb_decode_var, pm3fb_encode_var,
685 pm3fb_get_par, pm3fb_set_par, pm3fb_getcolreg,
686 pm3fb_pan_display, pm3fb_blank, pm3fb_set_disp
687 };
688
689 static struct fb_ops pm3fb_ops = {
690 .owner = THIS_MODULE,
691 .fb_get_fix = fbgen_get_fix,
692 .fb_get_var = fbgen_get_var,
693 .fb_set_var = fbgen_set_var,
694 .fb_get_cmap = fbgen_get_cmap,
695 .fb_set_cmap = fbgen_set_cmap,
696 .fb_setcolreg = pm3fb_setcolreg,
697 .fb_pan_display =fbgen_pan_display,
698 .fb_blank = fbgen_blank,
699 .fb_ioctl = pm3fb_ioctl,
700 };
701 #endif /* KERNEL_2_4 or KERNEL_2_5 */
702 #ifdef PM3FB_USE_ACCEL
703 #ifdef FBCON_HAS_CFB32
704 static struct display_switch pm3fb_cfb32 = {
705 fbcon_cfb32_setup, pm3fb_cfbX_bmove, pm3fb_cfb32_clear,
706 pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
707 NULL /* cursor() */ , NULL /* set_font() */ ,
708 pm3fb_cfb32_clear_margins,
709 FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
710 };
711 #endif /* FBCON_HAS_CFB32 */
712 #ifdef FBCON_HAS_CFB16
713 static struct display_switch pm3fb_cfb16 = {
714 fbcon_cfb16_setup, pm3fb_cfbX_bmove, pm3fb_cfb16_clear,
715 pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
716 NULL /* cursor() */ , NULL /* set_font() */ ,
717 pm3fb_cfb16_clear_margins,
718 FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
719 };
720 #endif /* FBCON_HAS_CFB16 */
721 #ifdef FBCON_HAS_CFB8
722 static struct display_switch pm3fb_cfb8 = {
723 fbcon_cfb8_setup, pm3fb_cfbX_bmove, pm3fb_cfb8_clear,
724 pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
725 NULL /* cursor() */ , NULL /* set_font() */ ,
726 pm3fb_cfb8_clear_margins,
727 FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
728 };
729 #endif /* FBCON_HAS_CFB8 */
730 #endif /* PM3FB_USE_ACCEL */
731
732 /* ****************************** */
733 /* ***** card-specific data ***** */
734 /* ****************************** */
735 struct pm3fb_card_timings {
736 unsigned long memsize; /* 0 for last value (i.e. default) */
737 struct pm3fb_timings memt;
738 };
739
740 static struct pm3fb_card_timings t_FormacProFormance3[] = {
741 { 16, { 0x02e311b8, 0x06100205, 0x08000002, 0x00000079, 0x00000000} },
742 { 0, { 0x02e311b8, 0x06100205, 0x08000002, 0x00000079, 0x00000000} } /* from 16 MB PF3 */
743 };
744
745 static struct pm3fb_card_timings t_AppianJeronimo2000[] = {
746 { 32, { 0x02e311B8, 0x07424905, 0x0c000003, 0x00000061, 0x00000000} },
747 { 0, { 0x02e311B8, 0x07424905, 0x0c000003, 0x00000061, 0x00000000} } /* from 32MB J2000 */
748 };
749
750 static struct pm3fb_card_timings t_3DLabsOxygenVX1[] = {
751 { 32, { 0x30e311b8, 0x08501204, 0x08000002, 0x0000006b, 0x00000000} },
752 { 0, { 0x30e311b8, 0x08501204, 0x08000002, 0x0000006b, 0x00000000} } /* from 32MB VX1 */
753 };
754
755 static struct {
756 char cardname[32]; /* recognized card name */
757 u16 subvendor; /* subvendor of the card */
758 u16 subdevice; /* subdevice of the card */
759 u8 func; /* function of the card to which the extra init apply */
760 void (*specific_setup)(struct pm3fb_info *l_fb_info); /* card/func specific setup, done before _any_ FB access */
761 struct pm3fb_card_timings *c_memt; /* defauls timings for the boards */
762 } cardbase[] = {
763 { "Unknown Permedia3 board", 0xFFFF, 0xFFFF, 0xFF, NULL, NULL },
764 { "Appian Jeronimo 2000 head 1", 0x1097, 0x3d32, 1, NULL,
765 t_AppianJeronimo2000
766 },
767 { "Appian Jeronimo 2000 head 2", 0x1097, 0x3d32, 2, pm3fb_j2000_setup,
768 t_AppianJeronimo2000
769 },
770 { "Formac ProFormance 3", PCI_VENDOR_ID_3DLABS, 0x000a, 0, NULL, /* Formac use 3DLabs ID ?!? */
771 t_FormacProFormance3
772 },
773 { "3DLabs Permedia3 Create!", PCI_VENDOR_ID_3DLABS, 0x0127, 0, NULL, NULL },
774 { "3DLabs Oxygen VX1 PCI", PCI_VENDOR_ID_3DLABS, 0x0121, 0, NULL,
775 t_3DLabsOxygenVX1
776 },
777 { "3DLabs Oxygen VX1 AGP", PCI_VENDOR_ID_3DLABS, 0x0125, 0, NULL, NULL },
778 { "3DLabs Oxygen VX1-16 AGP", PCI_VENDOR_ID_3DLABS, 0x0140, 0, NULL, NULL },
779 { "3DLabs Oxygen VX1-1600SW PCI", PCI_VENDOR_ID_3DLABS, 0x0800, 0, NULL, NULL },
780 { "\0", 0x0, 0x0, 0, NULL, NULL }
781 };
782
783 /* ********************************** */
784 /* ***** card-specific function ***** */
785 /* ********************************** */
786 static void pm3fb_j2000_setup(struct pm3fb_info *l_fb_info)
787 { /* the appian j2000 require more initialization of the second head */
788 /* l_fb_info must point to the _second_ head of the J2000 */
789
790 DTRACE;
791
792 l_fb_info->memt = t_AppianJeronimo2000[0].memt; /* 32 MB, first and only j2000 ? */
793
794 pm3fb_write_memory_timings(l_fb_info);
795 }
796
797 /* *************************************** */
798 /* ***** permedia3-specific function ***** */
799 /* *************************************** */
800 static pm3fb_timing_result pm3fb_preserve_memory_timings(struct pm3fb_info *l_fb_info)
801 {
802 l_fb_info->memt.caps = PM3_READ_REG(PM3LocalMemCaps);
803 l_fb_info->memt.timings = PM3_READ_REG(PM3LocalMemTimings);
804 l_fb_info->memt.control = PM3_READ_REG(PM3LocalMemControl);
805 l_fb_info->memt.refresh = PM3_READ_REG(PM3LocalMemRefresh);
806 l_fb_info->memt.powerdown = PM3_READ_REG(PM3LocalMemPowerDown);
807
808 if ((l_fb_info->memt.caps == PM3FB_UNKNOWN_TIMING_VALUE) ||
809 (l_fb_info->memt.timings == PM3FB_UNKNOWN_TIMING_VALUE) ||
810 (l_fb_info->memt.control == PM3FB_UNKNOWN_TIMING_VALUE) ||
811 (l_fb_info->memt.refresh == PM3FB_UNKNOWN_TIMING_VALUE) ||
812 (l_fb_info->memt.powerdown == PM3FB_UNKNOWN_TIMING_VALUE))
813 {
814 printk(KERN_ERR "pm3fb: invalid memory timings in permedia3 board #%ld\n", l_fb_info->board_num);
815 return(pm3fb_try_memory_timings(l_fb_info));
816 }
817 return(pm3fb_timing_ok);
818 }
819
820 static pm3fb_timing_result pm3fb_try_memory_timings(struct pm3fb_info *l_fb_info)
821 {
822 if (cardbase[l_fb_info->board_type].c_memt)
823 {
824 int i = 0, done = 0;
825 while (!done)
826 {
827 if ((cardbase[l_fb_info->board_type].c_memt[i].memsize == l_fb_info->fb_size)
828 || !(cardbase[l_fb_info->board_type].c_memt[i].memsize))
829 { /* will use the 0-sized timings by default */
830 done = 1;
831 l_fb_info->memt = cardbase[l_fb_info->board_type].c_memt[i].memt;
832 printk(KERN_WARNING "pm3fb: trying to use predefined memory timings for permedia3 board #%ld (%s, %ld MB)\n",
833 l_fb_info->board_num,
834 cardbase[l_fb_info->board_type].cardname,
835 cardbase[l_fb_info->board_type].c_memt[i].memsize);
836 pm3fb_write_memory_timings(l_fb_info);
837 return(pm3fb_timing_retry);
838 }
839 i++;
840 }
841 } else
842 return(pm3fb_timing_problem);
843 return(pm3fb_timing_ok);
844 }
845
846 static void pm3fb_write_memory_timings(struct pm3fb_info *l_fb_info)
847 {
848 unsigned char m, n, p;
849 unsigned long clockused;
850
851 PM3_SLOW_WRITE_REG(PM3LocalMemCaps, l_fb_info->memt.caps);
852 PM3_SLOW_WRITE_REG(PM3LocalMemTimings, l_fb_info->memt.timings);
853 PM3_SLOW_WRITE_REG(PM3LocalMemControl, l_fb_info->memt.control);
854 PM3_SLOW_WRITE_REG(PM3LocalMemRefresh, l_fb_info->memt.refresh);
855 PM3_SLOW_WRITE_REG(PM3LocalMemPowerDown, l_fb_info->memt.powerdown);
856
857 clockused =
858 pm3fb_CalculateClock(l_fb_info, 2 * 105000, PM3_REF_CLOCK, &m,
859 &n, &p);
860
861 PM3_WRITE_DAC_REG(PM3RD_KClkPreScale, m);
862 PM3_WRITE_DAC_REG(PM3RD_KClkFeedbackScale, n);
863 PM3_WRITE_DAC_REG(PM3RD_KClkPostScale, p);
864 PM3_WRITE_DAC_REG(PM3RD_KClkControl,
865 PM3RD_KClkControl_STATE_RUN |
866 PM3RD_KClkControl_SOURCE_PLL |
867 PM3RD_KClkControl_ENABLE);
868 PM3_WRITE_DAC_REG(PM3RD_MClkControl,
869 PM3RD_MClkControl_STATE_RUN |
870 PM3RD_MClkControl_SOURCE_KCLK |
871 PM3RD_MClkControl_ENABLE);
872 PM3_WRITE_DAC_REG(PM3RD_SClkControl,
873 PM3RD_SClkControl_STATE_RUN |
874 PM3RD_SClkControl_SOURCE_PCLK |
875 PM3RD_SClkControl_ENABLE);
876 }
877
878 static unsigned long pm3fb_read_dac_reg(struct pm3fb_info *l_fb_info,
879 unsigned long r)
880 {
881 DASSERT((l_fb_info->vIOBase != (unsigned char *) (-1)),
882 "l_fb_info->vIOBase mapped in read dac reg\n");
883 PM3_SET_INDEX(r);
884 mb();
885 return (PM3_READ_REG(PM3RD_IndexedData));
886 }
887
888 /* Calculating various clock parameter */
889 static unsigned long pm3fb_CalculateClock(struct pm3fb_info *l_fb_info, unsigned long reqclock, /* In kHz units */
890 unsigned long refclock, /* In kHz units */
891 unsigned char *prescale, /* ClkPreScale */
892 unsigned char *feedback, /* ClkFeedBackScale */
893 unsigned char *postscale
894 /* ClkPostScale */ )
895 {
896 int f, pre, post;
897 unsigned long freq;
898 long freqerr = 1000;
899 unsigned long actualclock = 0;
900
901 DTRACE;
902
903 for (f = 1; f < 256; f++) {
904 for (pre = 1; pre < 256; pre++) {
905 for (post = 0; post < 5; post++) {
906 freq =
907 ((2 * refclock * f) /
908 (pre * (1 << post)));
909 if ((reqclock > freq - freqerr)
910 && (reqclock < freq + freqerr)) {
911 freqerr =
912 (reqclock >
913 freq) ? reqclock -
914 freq : freq - reqclock;
915 *feedback = f;
916 *prescale = pre;
917 *postscale = post;
918 actualclock = freq;
919 }
920 }
921 }
922 }
923
924 return (actualclock);
925 }
926
927 static int pm3fb_Shiftbpp(struct pm3fb_info *l_fb_info,
928 unsigned long depth, int v)
929 {
930 DTRACE;
931
932 switch (depth) {
933 case 8:
934 return (v >> 4);
935 case 12:
936 case 15:
937 case 16:
938 return (v >> 3);
939 case 32:
940 return (v >> 2);
941 }
942 DPRINTK(1, "Unsupported depth %ld\n", depth);
943 return (0);
944 }
945
946 static int pm3fb_Unshiftbpp(struct pm3fb_info *l_fb_info,
947 unsigned long depth, int v)
948 {
949 DTRACE;
950
951 switch (depth) {
952 case 8:
953 return (v << 4);
954 case 12:
955 case 15:
956 case 16:
957 return (v << 3);
958 case 32:
959 return (v << 2);
960 }
961 DPRINTK(1, "Unsupported depth %ld\n", depth);
962 return (0);
963 }
964
965 static void pm3fb_mapIO(struct pm3fb_info *l_fb_info)
966 {
967 DTRACE;
968
969 l_fb_info->vIOBase =
970 ioremap((unsigned long) l_fb_info->pIOBase, PM3_REGS_SIZE);
971 l_fb_info->v_fb =
972 ioremap((unsigned long) l_fb_info->p_fb, l_fb_info->fb_size);
973 DPRINTK(2, "IO mapping : IOBase %lx / %lx, fb %lx / %lx\n",
974 (unsigned long) l_fb_info->pIOBase,
975 (unsigned long) l_fb_info->vIOBase,
976 (unsigned long) l_fb_info->p_fb,
977 (unsigned long) l_fb_info->v_fb);
978 }
979
980 static void pm3fb_unmapIO(struct pm3fb_info *l_fb_info)
981 {
982 DTRACE;
983
984 iounmap(l_fb_info->vIOBase);
985 iounmap(l_fb_info->v_fb);
986 l_fb_info->vIOBase = (unsigned char *) -1;
987 l_fb_info->v_fb = (unsigned char *) -1;
988 }
989
990 #if defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2)
991 static void pm3fb_show_cur_mode(struct pm3fb_info *l_fb_info)
992 {
993 DPRINTK(2, "PM3Aperture0: 0x%08x\n", PM3_READ_REG(PM3Aperture0));
994 DPRINTK(2, "PM3Aperture1: 0x%08x\n", PM3_READ_REG(PM3Aperture1));
995 DPRINTK(2, "PM3ByAperture1Mode: 0x%08x\n",
996 PM3_READ_REG(PM3ByAperture1Mode));
997 DPRINTK(2, "PM3ByAperture2Mode: 0x%08x\n",
998 PM3_READ_REG(PM3ByAperture2Mode));
999 DPRINTK(2, "PM3ChipConfig: 0x%08x\n", PM3_READ_REG(PM3ChipConfig));
1000 DPRINTK(2, "PM3FIFODis: 0x%08x\n", PM3_READ_REG(PM3FIFODis));
1001 DPRINTK(2, "PM3HTotal: 0x%08x\n", PM3_READ_REG(PM3HTotal));
1002 DPRINTK(2, "PM3HbEnd: 0x%08x\n", PM3_READ_REG(PM3HbEnd));
1003 DPRINTK(2, "PM3HgEnd: 0x%08x\n", PM3_READ_REG(PM3HgEnd));
1004 DPRINTK(2, "PM3HsEnd: 0x%08x\n", PM3_READ_REG(PM3HsEnd));
1005 DPRINTK(2, "PM3HsStart: 0x%08x\n", PM3_READ_REG(PM3HsStart));
1006 DPRINTK(2, "PM3MemBypassWriteMask: 0x%08x\n",
1007 PM3_READ_REG(PM3MemBypassWriteMask));
1008 DPRINTK(2, "PM3RD_IndexControl: 0x%08x\n",
1009 PM3_READ_REG(PM3RD_IndexControl));
1010 DPRINTK(2, "PM3ScreenBase: 0x%08x\n", PM3_READ_REG(PM3ScreenBase));
1011 DPRINTK(2, "PM3ScreenStride: 0x%08x\n",
1012 PM3_READ_REG(PM3ScreenStride));
1013 DPRINTK(2, "PM3VClkCtl: 0x%08x\n", PM3_READ_REG(PM3VClkCtl));
1014 DPRINTK(2, "PM3VTotal: 0x%08x\n", PM3_READ_REG(PM3VTotal));
1015 DPRINTK(2, "PM3VbEnd: 0x%08x\n", PM3_READ_REG(PM3VbEnd));
1016 DPRINTK(2, "PM3VideoControl: 0x%08x\n",
1017 PM3_READ_REG(PM3VideoControl));
1018 DPRINTK(2, "PM3VsEnd: 0x%08x\n", PM3_READ_REG(PM3VsEnd));
1019 DPRINTK(2, "PM3VsStart: 0x%08x\n", PM3_READ_REG(PM3VsStart));
1020
1021 DPRINTK(2, "PM3RD_ColorFormat: %ld\n",
1022 PM3_READ_DAC_REG(PM3RD_ColorFormat));
1023 DPRINTK(2, "PM3RD_DACControl: %ld\n",
1024 PM3_READ_DAC_REG(PM3RD_DACControl));
1025 DPRINTK(2, "PM3RD_DClk0FeedbackScale: %ld\n",
1026 PM3_READ_DAC_REG(PM3RD_DClk0FeedbackScale));
1027 DPRINTK(2, "PM3RD_DClk0PostScale: %ld\n",
1028 PM3_READ_DAC_REG(PM3RD_DClk0PostScale));
1029 DPRINTK(2, "PM3RD_DClk0PreScale: %ld\n",
1030 PM3_READ_DAC_REG(PM3RD_DClk0PreScale));
1031 DPRINTK(2, "[not set] PM3RD_IndexControl: %ld\n",
1032 PM3_READ_DAC_REG(PM3RD_IndexControl));
1033 DPRINTK(2, "PM3RD_MiscControl: %ld\n",
1034 PM3_READ_DAC_REG(PM3RD_MiscControl));
1035 DPRINTK(2, "PM3RD_PixelSize: %ld\n",
1036 PM3_READ_DAC_REG(PM3RD_PixelSize));
1037 DPRINTK(2, "PM3RD_SyncControl: %ld\n",
1038 PM3_READ_DAC_REG(PM3RD_SyncControl));
1039 }
1040
1041 #endif /* defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2) */
1042 static void pm3fb_show_cur_timing(struct pm3fb_info *l_fb_info)
1043 {
1044 u16 subvendor, subdevice;
1045
1046 if ((!pci_read_config_word
1047 (l_fb_info->dev, PCI_SUBSYSTEM_VENDOR_ID, &subvendor))
1048 &&
1049 (!pci_read_config_word
1050 (l_fb_info->dev, PCI_SUBSYSTEM_ID, &subdevice))) {
1051 /* well, nothing... */
1052 } else {
1053 subvendor = subdevice = (u16)-1;
1054 }
1055
1056 printk(KERN_INFO "pm3fb: memory timings for board #%ld (subvendor: 0x%hx, subdevice: 0x%hx)\n", l_fb_info->board_num, subvendor, subdevice);
1057 printk(KERN_INFO " PM3LocalMemCaps: 0x%08x\n",
1058 PM3_READ_REG(PM3LocalMemCaps));
1059 printk(KERN_INFO " PM3LocalMemTimings: 0x%08x\n",
1060 PM3_READ_REG(PM3LocalMemTimings));
1061 printk(KERN_INFO " PM3LocalMemControl: 0x%08x\n",
1062 PM3_READ_REG(PM3LocalMemControl));
1063 printk(KERN_INFO " PM3LocalMemRefresh: 0x%08x\n",
1064 PM3_READ_REG(PM3LocalMemRefresh));
1065 printk(KERN_INFO " PM3LocalMemPowerDown: 0x%08x\n",
1066 PM3_READ_REG(PM3LocalMemPowerDown));
1067 }
1068
1069 /* write the mode to registers */
1070 static void pm3fb_write_mode(struct pm3fb_info *l_fb_info)
1071 {
1072 char tempsync = 0x00, tempmisc = 0x00;
1073 DTRACE;
1074
1075 PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, 0xffffffff);
1076 PM3_SLOW_WRITE_REG(PM3Aperture0, 0x00000000);
1077 PM3_SLOW_WRITE_REG(PM3Aperture1, 0x00000000);
1078 PM3_SLOW_WRITE_REG(PM3FIFODis, 0x00000007);
1079
1080 PM3_SLOW_WRITE_REG(PM3HTotal,
1081 pm3fb_Shiftbpp(l_fb_info,
1082 l_fb_info->current_par->depth,
1083 l_fb_info->current_par->htotal -
1084 1));
1085 PM3_SLOW_WRITE_REG(PM3HsEnd,
1086 pm3fb_Shiftbpp(l_fb_info,
1087 l_fb_info->current_par->depth,
1088 l_fb_info->current_par->hsend));
1089 PM3_SLOW_WRITE_REG(PM3HsStart,
1090 pm3fb_Shiftbpp(l_fb_info,
1091 l_fb_info->current_par->depth,
1092 l_fb_info->current_par->
1093 hsstart));
1094 PM3_SLOW_WRITE_REG(PM3HbEnd,
1095 pm3fb_Shiftbpp(l_fb_info,
1096 l_fb_info->current_par->depth,
1097 l_fb_info->current_par->hbend));
1098 PM3_SLOW_WRITE_REG(PM3HgEnd,
1099 pm3fb_Shiftbpp(l_fb_info,
1100 l_fb_info->current_par->depth,
1101 l_fb_info->current_par->hbend));
1102 PM3_SLOW_WRITE_REG(PM3ScreenStride,
1103 pm3fb_Shiftbpp(l_fb_info,
1104 l_fb_info->current_par->depth,
1105 l_fb_info->current_par->stride));
1106 PM3_SLOW_WRITE_REG(PM3VTotal, l_fb_info->current_par->vtotal - 1);
1107 PM3_SLOW_WRITE_REG(PM3VsEnd, l_fb_info->current_par->vsend - 1);
1108 PM3_SLOW_WRITE_REG(PM3VsStart,
1109 l_fb_info->current_par->vsstart - 1);
1110 PM3_SLOW_WRITE_REG(PM3VbEnd, l_fb_info->current_par->vbend);
1111
1112 switch (l_fb_info->current_par->depth) {
1113 case 8:
1114 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1115 PM3ByApertureMode_PIXELSIZE_8BIT);
1116 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1117 PM3ByApertureMode_PIXELSIZE_8BIT);
1118 break;
1119
1120 case 12:
1121 case 15:
1122 case 16:
1123 #ifndef __BIG_ENDIAN
1124 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1125 PM3ByApertureMode_PIXELSIZE_16BIT);
1126 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1127 PM3ByApertureMode_PIXELSIZE_16BIT);
1128 #else
1129 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1130 PM3ByApertureMode_PIXELSIZE_16BIT |
1131 PM3ByApertureMode_BYTESWAP_BADC);
1132 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1133 PM3ByApertureMode_PIXELSIZE_16BIT |
1134 PM3ByApertureMode_BYTESWAP_BADC);
1135 #endif /* ! __BIG_ENDIAN */
1136 break;
1137
1138 case 32:
1139 #ifndef __BIG_ENDIAN
1140 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1141 PM3ByApertureMode_PIXELSIZE_32BIT);
1142 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1143 PM3ByApertureMode_PIXELSIZE_32BIT);
1144 #else
1145 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1146 PM3ByApertureMode_PIXELSIZE_32BIT |
1147 PM3ByApertureMode_BYTESWAP_DCBA);
1148 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1149 PM3ByApertureMode_PIXELSIZE_32BIT |
1150 PM3ByApertureMode_BYTESWAP_DCBA);
1151 #endif /* ! __BIG_ENDIAN */
1152 break;
1153
1154 default:
1155 DPRINTK(1, "Unsupported depth %d\n",
1156 l_fb_info->current_par->depth);
1157 break;
1158 }
1159
1160 /*
1161 * Oxygen VX1 - it appears that setting PM3VideoControl and
1162 * then PM3RD_SyncControl to the same SYNC settings undoes
1163 * any net change - they seem to xor together. Only set the
1164 * sync options in PM3RD_SyncControl. --rmk
1165 */
1166 {
1167 unsigned int video = l_fb_info->current_par->video;
1168
1169 video &= ~(PM3VideoControl_HSYNC_MASK |
1170 PM3VideoControl_VSYNC_MASK);
1171 video |= PM3VideoControl_HSYNC_ACTIVE_HIGH |
1172 PM3VideoControl_VSYNC_ACTIVE_HIGH;
1173 PM3_SLOW_WRITE_REG(PM3VideoControl, video);
1174 }
1175 PM3_SLOW_WRITE_REG(PM3VClkCtl,
1176 (PM3_READ_REG(PM3VClkCtl) & 0xFFFFFFFC));
1177 PM3_SLOW_WRITE_REG(PM3ScreenBase, l_fb_info->current_par->base);
1178 PM3_SLOW_WRITE_REG(PM3ChipConfig,
1179 (PM3_READ_REG(PM3ChipConfig) & 0xFFFFFFFD));
1180
1181 {
1182 unsigned char m; /* ClkPreScale */
1183 unsigned char n; /* ClkFeedBackScale */
1184 unsigned char p; /* ClkPostScale */
1185 (void)pm3fb_CalculateClock(l_fb_info, l_fb_info->current_par->pixclock, PM3_REF_CLOCK, &m, &n, &p);
1186
1187 DPRINTK(2,
1188 "Pixclock: %d, Pre: %d, Feedback: %d, Post: %d\n",
1189 l_fb_info->current_par->pixclock, (int) m, (int) n,
1190 (int) p);
1191
1192 PM3_WRITE_DAC_REG(PM3RD_DClk0PreScale, m);
1193 PM3_WRITE_DAC_REG(PM3RD_DClk0FeedbackScale, n);
1194 PM3_WRITE_DAC_REG(PM3RD_DClk0PostScale, p);
1195 }
1196 /*
1197 PM3_WRITE_DAC_REG(PM3RD_IndexControl, 0x00);
1198 */
1199 /*
1200 PM3_SLOW_WRITE_REG(PM3RD_IndexControl, 0x00);
1201 */
1202 if ((l_fb_info->current_par->video & PM3VideoControl_HSYNC_MASK) ==
1203 PM3VideoControl_HSYNC_ACTIVE_HIGH)
1204 tempsync |= PM3RD_SyncControl_HSYNC_ACTIVE_HIGH;
1205 if ((l_fb_info->current_par->video & PM3VideoControl_VSYNC_MASK) ==
1206 PM3VideoControl_VSYNC_ACTIVE_HIGH)
1207 tempsync |= PM3RD_SyncControl_VSYNC_ACTIVE_HIGH;
1208
1209 PM3_WRITE_DAC_REG(PM3RD_SyncControl, tempsync);
1210 DPRINTK(2, "PM3RD_SyncControl: %d\n", tempsync);
1211
1212 if (flatpanel[l_fb_info->board_num])
1213 {
1214 PM3_WRITE_DAC_REG(PM3RD_DACControl, PM3RD_DACControl_BLANK_PEDESTAL_ENABLE);
1215 PM3_WAIT(2);
1216 PM3_WRITE_REG(PM3VSConfiguration, 0x06);
1217 PM3_WRITE_REG(0x5a00, 1 << 14); /* black magic... */
1218 tempmisc = PM3RD_MiscControl_VSB_OUTPUT_ENABLE;
1219 }
1220 else
1221 PM3_WRITE_DAC_REG(PM3RD_DACControl, 0x00);
1222
1223 switch (l_fb_info->current_par->depth) {
1224 case 8:
1225 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1226 PM3RD_PixelSize_8_BIT_PIXELS);
1227 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1228 PM3RD_ColorFormat_CI8_COLOR |
1229 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW);
1230 tempmisc |= PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1231 break;
1232 case 12:
1233 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1234 PM3RD_PixelSize_16_BIT_PIXELS);
1235 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1236 PM3RD_ColorFormat_4444_COLOR |
1237 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
1238 PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
1239 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1240 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1241 break;
1242 case 15:
1243 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1244 PM3RD_PixelSize_16_BIT_PIXELS);
1245 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1246 PM3RD_ColorFormat_5551_FRONT_COLOR |
1247 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
1248 PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
1249 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1250 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1251 break;
1252 case 16:
1253 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1254 PM3RD_PixelSize_16_BIT_PIXELS);
1255 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1256 PM3RD_ColorFormat_565_FRONT_COLOR |
1257 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
1258 PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
1259 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1260 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1261 break;
1262 case 32:
1263 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1264 PM3RD_PixelSize_32_BIT_PIXELS);
1265 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1266 PM3RD_ColorFormat_8888_COLOR |
1267 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW);
1268 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1269 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1270 break;
1271 }
1272 PM3_WRITE_DAC_REG(PM3RD_MiscControl, tempmisc);
1273
1274 PM3_SHOW_CUR_MODE;
1275 }
1276
1277 static void pm3fb_read_mode(struct pm3fb_info *l_fb_info,
1278 struct pm3fb_par *curpar)
1279 {
1280 unsigned long pixsize1, pixsize2, clockused;
1281 unsigned long pre, feedback, post;
1282
1283 DTRACE;
1284
1285 clockused = PM3_READ_REG(PM3VClkCtl);
1286
1287 switch (clockused) {
1288 case 3:
1289 pre = PM3_READ_DAC_REG(PM3RD_DClk3PreScale);
1290 feedback = PM3_READ_DAC_REG(PM3RD_DClk3FeedbackScale);
1291 post = PM3_READ_DAC_REG(PM3RD_DClk3PostScale);
1292
1293 DPRINTK(2,
1294 "DClk3 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1295 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1296 feedback,
1297 post));
1298 break;
1299 case 2:
1300 pre = PM3_READ_DAC_REG(PM3RD_DClk2PreScale);
1301 feedback = PM3_READ_DAC_REG(PM3RD_DClk2FeedbackScale);
1302 post = PM3_READ_DAC_REG(PM3RD_DClk2PostScale);
1303
1304 DPRINTK(2,
1305 "DClk2 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1306 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1307 feedback,
1308 post));
1309 break;
1310 case 1:
1311 pre = PM3_READ_DAC_REG(PM3RD_DClk1PreScale);
1312 feedback = PM3_READ_DAC_REG(PM3RD_DClk1FeedbackScale);
1313 post = PM3_READ_DAC_REG(PM3RD_DClk1PostScale);
1314
1315 DPRINTK(2,
1316 "DClk1 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1317 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1318 feedback,
1319 post));
1320 break;
1321 case 0:
1322 pre = PM3_READ_DAC_REG(PM3RD_DClk0PreScale);
1323 feedback = PM3_READ_DAC_REG(PM3RD_DClk0FeedbackScale);
1324 post = PM3_READ_DAC_REG(PM3RD_DClk0PostScale);
1325
1326 DPRINTK(2,
1327 "DClk0 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1328 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1329 feedback,
1330 post));
1331 break;
1332 default:
1333 pre = feedback = post = 0;
1334 DPRINTK(1, "Unknowk D clock used : %ld\n", clockused);
1335 break;
1336 }
1337
1338 curpar->pixclock = PM3_SCALE_TO_CLOCK(pre, feedback, post);
1339
1340 pixsize1 =
1341 PM3ByApertureMode_PIXELSIZE_MASK &
1342 (PM3_READ_REG(PM3ByAperture1Mode));
1343 pixsize2 =
1344 PM3ByApertureMode_PIXELSIZE_MASK &
1345 (PM3_READ_REG(PM3ByAperture2Mode));
1346
1347 DASSERT((pixsize1 == pixsize2),
1348 "pixsize the same in both aperture\n");
1349
1350 if (pixsize1 & PM3ByApertureMode_PIXELSIZE_32BIT)
1351 curpar->depth = 32;
1352 else if (pixsize1 & PM3ByApertureMode_PIXELSIZE_16BIT)
1353 {
1354 curpar->depth = 16;
1355 }
1356 else
1357 curpar->depth = 8;
1358
1359 /* not sure if I need to add one on the next ; it give better result with */
1360 curpar->htotal =
1361 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1362 1 + PM3_READ_REG(PM3HTotal));
1363 curpar->hsend =
1364 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1365 PM3_READ_REG(PM3HsEnd));
1366 curpar->hsstart =
1367 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1368 PM3_READ_REG(PM3HsStart));
1369 curpar->hbend =
1370 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1371 PM3_READ_REG(PM3HbEnd));
1372
1373 curpar->stride =
1374 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1375 PM3_READ_REG(PM3ScreenStride));
1376
1377 curpar->vtotal = 1 + PM3_READ_REG(PM3VTotal);
1378 curpar->vsend = 1 + PM3_READ_REG(PM3VsEnd);
1379 curpar->vsstart = 1 + PM3_READ_REG(PM3VsStart);
1380 curpar->vbend = PM3_READ_REG(PM3VbEnd);
1381
1382 curpar->video = PM3_READ_REG(PM3VideoControl);
1383
1384 curpar->base = PM3_READ_REG(PM3ScreenBase);
1385 curpar->width = curpar->htotal - curpar->hbend; /* make virtual == displayed resolution */
1386 curpar->height = curpar->vtotal - curpar->vbend;
1387
1388 DPRINTK(2, "Found : %d * %d, %d Khz, stride is %08x\n",
1389 curpar->width, curpar->height, curpar->pixclock,
1390 curpar->stride);
1391 }
1392
1393 static unsigned long pm3fb_size_memory(struct pm3fb_info *l_fb_info)
1394 {
1395 unsigned long memsize = 0, tempBypass, i, temp1, temp2;
1396 u16 subvendor, subdevice;
1397 pm3fb_timing_result ptr;
1398
1399 DTRACE;
1400
1401 l_fb_info->fb_size = 64 * 1024 * 1024; /* pm3 aperture always 64 MB */
1402 pm3fb_mapIO(l_fb_info); /* temporary map IO */
1403
1404 DASSERT((l_fb_info->vIOBase != NULL),
1405 "IO successfully mapped before mem detect\n");
1406 DASSERT((l_fb_info->v_fb != NULL),
1407 "FB successfully mapped before mem detect\n");
1408
1409 /* card-specific stuff, *before* accessing *any* FB memory */
1410 if ((!pci_read_config_word
1411 (l_fb_info->dev, PCI_SUBSYSTEM_VENDOR_ID, &subvendor))
1412 &&
1413 (!pci_read_config_word
1414 (l_fb_info->dev, PCI_SUBSYSTEM_ID, &subdevice))) {
1415 i = 0; l_fb_info->board_type = 0;
1416 while ((cardbase[i].cardname[0]) && !(l_fb_info->board_type)) {
1417 if ((cardbase[i].subvendor == subvendor) &&
1418 (cardbase[i].subdevice == subdevice) &&
1419 (cardbase[i].func == PCI_FUNC(l_fb_info->dev->devfn))) {
1420 DPRINTK(2, "Card #%ld is an %s\n",
1421 l_fb_info->board_num,
1422 cardbase[i].cardname);
1423 if (cardbase[i].specific_setup)
1424 cardbase[i].specific_setup(l_fb_info);
1425 l_fb_info->board_type = i;
1426 }
1427 i++;
1428 }
1429 if (!l_fb_info->board_type) {
1430 DPRINTK(1, "Card #%ld is an unknown 0x%04x / 0x%04x\n",
1431 l_fb_info->board_num, subvendor, subdevice);
1432 }
1433 } else {
1434 printk(KERN_ERR "pm3fb: Error: pci_read_config_word failed, board #%ld\n",
1435 l_fb_info->board_num);
1436 }
1437
1438 if (printtimings)
1439 pm3fb_show_cur_timing(l_fb_info);
1440
1441 /* card-specific setup is done, we preserve the final
1442 memory timing for future reference */
1443 if ((ptr = pm3fb_preserve_memory_timings(l_fb_info)) == pm3fb_timing_problem) { /* memory timings were wrong ! oops.... */
1444 return(0);
1445 }
1446
1447 tempBypass = PM3_READ_REG(PM3MemBypassWriteMask);
1448
1449 DPRINTK(2, "PM3MemBypassWriteMask was: 0x%08lx\n", tempBypass);
1450
1451 PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, 0xFFFFFFFF);
1452
1453 /* pm3 split up memory, replicates, and do a lot of nasty stuff IMHO ;-) */
1454 for (i = 0; i < 32; i++) {
1455 #ifdef KERNEL_2_2
1456 #ifdef MUST_BYTESWAP
1457 writel(__swab32(i * 0x00345678),
1458 (l_fb_info->v_fb + (i * 1048576)));
1459 #else
1460 writel(i * 0x00345678, (l_fb_info->v_fb + (i * 1048576)));
1461 #endif
1462 mb();
1463 #ifdef MUST_BYTESWAP
1464 temp1 = __swab32(readl((l_fb_info->v_fb + (i * 1048576))));
1465 #else
1466 temp1 = readl((l_fb_info->v_fb + (i * 1048576)));
1467 #endif
1468 #endif /* KERNEL_2_2 */
1469 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
1470 fb_writel(i * 0x00345678,
1471 (l_fb_info->v_fb + (i * 1048576)));
1472 mb();
1473 temp1 = fb_readl((l_fb_info->v_fb + (i * 1048576)));
1474 #endif /* KERNEL_2_4 or KERNEL_2_5 */
1475 /* Let's check for wrapover, write will fail at 16MB boundary */
1476 if (temp1 == (i * 0x00345678))
1477 memsize = i;
1478 else
1479 break;
1480 }
1481
1482 DPRINTK(2, "First detect pass already got %ld MB\n", memsize + 1);
1483
1484 if (memsize == i) {
1485 for (i = 0; i < 32; i++) {
1486 /* Clear first 32MB ; 0 is 0, no need to byteswap */
1487 writel(0x0000000,
1488 (l_fb_info->v_fb + (i * 1048576)));
1489 mb();
1490 }
1491
1492 for (i = 32; i < 64; i++) {
1493 #ifdef KERNEL_2_2
1494 #ifdef MUST_BYTESWAP
1495 writel(__swab32(i * 0x00345678),
1496 (l_fb_info->v_fb + (i * 1048576)));
1497 #else
1498 writel(i * 0x00345678,
1499 (l_fb_info->v_fb + (i * 1048576)));
1500 #endif
1501 mb();
1502 #ifdef MUST_BYTESWAP
1503 temp1 =
1504 __swab32(readl
1505 ((l_fb_info->v_fb + (i * 1048576))));
1506 temp2 =
1507 __swab32(readl
1508 ((l_fb_info->v_fb +
1509 ((i - 32) * 1048576))));
1510 #else
1511 temp1 = readl((l_fb_info->v_fb + (i * 1048576)));
1512 temp2 =
1513 readl((l_fb_info->v_fb +
1514 ((i - 32) * 1048576)));
1515 #endif
1516 #endif /* KERNEL_2_2 */
1517 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
1518 fb_writel(i * 0x00345678,
1519 (l_fb_info->v_fb + (i * 1048576)));
1520 mb();
1521 temp1 =
1522 fb_readl((l_fb_info->v_fb + (i * 1048576)));
1523 temp2 =
1524 fb_readl((l_fb_info->v_fb +
1525 ((i - 32) * 1048576)));
1526 #endif /* KERNEL_2_4 or KERNEL_2_5 */
1527 if ((temp1 == (i * 0x00345678)) && (temp2 == 0)) /* different value, different RAM... */
1528 memsize = i;
1529 else
1530 break;
1531 }
1532 }
1533
1534 DPRINTK(2, "Second detect pass got %ld MB\n", memsize + 1);
1535
1536 PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, tempBypass);
1537
1538 pm3fb_unmapIO(l_fb_info);
1539 memsize = 1048576 * (memsize + 1);
1540
1541 DPRINTK(2, "Returning 0x%08lx bytes\n", memsize);
1542
1543 if (forcesize[l_fb_info->board_num] && ((forcesize[l_fb_info->board_num] * 1048576) != memsize))
1544 {
1545 printk(KERN_WARNING "pm3fb: mismatch between probed (%ld MB) and specified (%hd MB) memory size, using SPECIFIED !\n", memsize, forcesize[l_fb_info->board_num]);
1546 memsize = 1048576 * forcesize[l_fb_info->board_num];
1547 }
1548
1549 l_fb_info->fb_size = memsize;
1550
1551 if (ptr == pm3fb_timing_retry)
1552 {
1553 printk(KERN_WARNING "pm3fb: retrying memory timings check");
1554 if (pm3fb_try_memory_timings(l_fb_info) == pm3fb_timing_problem)
1555 return(0);
1556 }
1557
1558 return (memsize);
1559 }
1560
1561 static void pm3fb_clear_memory(struct pm3fb_info *l_fb_info, u32 cc)
1562 {
1563 int i;
1564
1565 DTRACE;
1566
1567 for (i = 0; i < (l_fb_info->fb_size / sizeof(u32)) ; i++) /* clear entire FB memory to black */
1568 {
1569 #ifdef KERNEL_2_2
1570 #ifdef MUST_BYTESWAP
1571 writel(__swab32(cc), (l_fb_info->v_fb + (i * sizeof(u32))));
1572 #else
1573 writel(cc, (l_fb_info->v_fb + (i * sizeof(u32))));
1574 #endif
1575 #endif
1576 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
1577 fb_writel(cc, (l_fb_info->v_fb + (i * sizeof(u32))));
1578 #endif
1579 }
1580 }
1581
1582 static void pm3fb_clear_colormap(struct pm3fb_info *l_fb_info, unsigned char r, unsigned char g, unsigned char b)
1583 {
1584 int i;
1585
1586 DTRACE;
1587
1588 for (i = 0; i < 256 ; i++) /* fill color map with white */
1589 pm3fb_set_color(l_fb_info, i, r, g, b);
1590
1591 }
1592
1593 /* common initialisation */
1594 static void pm3fb_common_init(struct pm3fb_info *l_fb_info)
1595 {
1596 DTRACE;
1597
1598 DPRINTK(2, "Initializing board #%ld @ %lx\n", l_fb_info->board_num,
1599 (unsigned long) l_fb_info);
1600
1601 strcpy(l_fb_info->gen.info.modename, permedia3_name);
1602 disp[l_fb_info->board_num].scrollmode = 0; /* SCROLL_YNOMOVE; *//* 0 means "let fbcon choose" */
1603 l_fb_info->gen.parsize = sizeof(struct pm3fb_par);
1604 l_fb_info->gen.info.changevar = NULL;
1605 l_fb_info->gen.info.fbops = &pm3fb_ops;
1606 l_fb_info->gen.info.disp = &(disp[l_fb_info->board_num]);
1607 if (fontn[l_fb_info->board_num][0])
1608 strcpy(l_fb_info->gen.info.fontname,
1609 fontn[l_fb_info->board_num]);
1610 l_fb_info->gen.info.switch_con = &fbgen_switch;
1611 l_fb_info->gen.info.updatevar = &fbgen_update_var; /* */
1612 l_fb_info->gen.info.flags = FBINFO_FLAG_DEFAULT;
1613
1614 pm3fb_mapIO(l_fb_info);
1615
1616 pm3fb_clear_memory(l_fb_info, 0);
1617 pm3fb_clear_colormap(l_fb_info, 0, 0, 0);
1618
1619 (void) fbgen_get_var(&(disp[l_fb_info->board_num]).var, -1,
1620 &l_fb_info->gen.info);
1621
1622 if (depth[l_fb_info->board_num]) /* override mode-defined depth */
1623 {
1624 pm3fb_encode_depth(&(disp[l_fb_info->board_num]).var, depth[l_fb_info->board_num]);
1625 (disp[l_fb_info->board_num]).var.bits_per_pixel = depth2bpp(depth[l_fb_info->board_num]);
1626 }
1627
1628 (void) fbgen_do_set_var(&(disp[l_fb_info->board_num]).var, 1,
1629 &l_fb_info->gen);
1630
1631 fbgen_set_disp(-1, &l_fb_info->gen);
1632
1633 do_install_cmap(0, &l_fb_info->gen.info);
1634
1635 if (register_framebuffer(&l_fb_info->gen.info) < 0) {
1636 DPRINTK(1, "Couldn't register framebuffer\n");
1637 return;
1638 }
1639
1640 PM3_WRITE_DAC_REG(PM3RD_CursorMode,
1641 PM3RD_CursorMode_CURSOR_DISABLE);
1642
1643 PM3_SHOW_CUR_MODE;
1644
1645 pm3fb_write_mode(l_fb_info);
1646
1647 printk("fb%d: %s, using %uK of video memory (%s)\n",
1648 l_fb_info->gen.info.node,
1649 permedia3_name, (u32) (l_fb_info->fb_size >> 10),
1650 cardbase[l_fb_info->board_type].cardname);
1651 }
1652
1653 /* **************************************************** */
1654 /* ***** accelerated permedia3-specific functions ***** */
1655 /* **************************************************** */
1656 #ifdef PM3FB_USE_ACCEL
1657 static void pm3fb_wait_pm3(struct pm3fb_info *l_fb_info)
1658 {
1659 DTRACE;
1660
1661 PM3_SLOW_WRITE_REG(PM3FilterMode, PM3FilterModeSync);
1662 PM3_SLOW_WRITE_REG(PM3Sync, 0);
1663 mb();
1664 do {
1665 while ((PM3_READ_REG(PM3OutFIFOWords)) == 0);
1666 rmb();
1667 } while ((PM3_READ_REG(PM3OutputFifo)) != PM3Sync_Tag);
1668 }
1669
1670 static void pm3fb_init_engine(struct pm3fb_info *l_fb_info)
1671 {
1672 PM3_SLOW_WRITE_REG(PM3FilterMode, PM3FilterModeSync);
1673 PM3_SLOW_WRITE_REG(PM3StatisticMode, 0x0);
1674 PM3_SLOW_WRITE_REG(PM3DeltaMode, 0x0);
1675 PM3_SLOW_WRITE_REG(PM3RasterizerMode, 0x0);
1676 PM3_SLOW_WRITE_REG(PM3ScissorMode, 0x0);
1677 PM3_SLOW_WRITE_REG(PM3LineStippleMode, 0x0);
1678 PM3_SLOW_WRITE_REG(PM3AreaStippleMode, 0x0);
1679 PM3_SLOW_WRITE_REG(PM3GIDMode, 0x0);
1680 PM3_SLOW_WRITE_REG(PM3DepthMode, 0x0);
1681 PM3_SLOW_WRITE_REG(PM3StencilMode, 0x0);
1682 PM3_SLOW_WRITE_REG(PM3StencilData, 0x0);
1683 PM3_SLOW_WRITE_REG(PM3ColorDDAMode, 0x0);
1684 PM3_SLOW_WRITE_REG(PM3TextureCoordMode, 0x0);
1685 PM3_SLOW_WRITE_REG(PM3TextureIndexMode0, 0x0);
1686 PM3_SLOW_WRITE_REG(PM3TextureIndexMode1, 0x0);
1687 PM3_SLOW_WRITE_REG(PM3TextureReadMode, 0x0);
1688 PM3_SLOW_WRITE_REG(PM3LUTMode, 0x0);
1689 PM3_SLOW_WRITE_REG(PM3TextureFilterMode, 0x0);
1690 PM3_SLOW_WRITE_REG(PM3TextureCompositeMode, 0x0);
1691 PM3_SLOW_WRITE_REG(PM3TextureApplicationMode, 0x0);
1692 PM3_SLOW_WRITE_REG(PM3TextureCompositeColorMode1, 0x0);
1693 PM3_SLOW_WRITE_REG(PM3TextureCompositeAlphaMode1, 0x0);
1694 PM3_SLOW_WRITE_REG(PM3TextureCompositeColorMode0, 0x0);
1695 PM3_SLOW_WRITE_REG(PM3TextureCompositeAlphaMode0, 0x0);
1696 PM3_SLOW_WRITE_REG(PM3FogMode, 0x0);
1697 PM3_SLOW_WRITE_REG(PM3ChromaTestMode, 0x0);
1698 PM3_SLOW_WRITE_REG(PM3AlphaTestMode, 0x0);
1699 PM3_SLOW_WRITE_REG(PM3AntialiasMode, 0x0);
1700 PM3_SLOW_WRITE_REG(PM3YUVMode, 0x0);
1701 PM3_SLOW_WRITE_REG(PM3AlphaBlendColorMode, 0x0);
1702 PM3_SLOW_WRITE_REG(PM3AlphaBlendAlphaMode, 0x0);
1703 PM3_SLOW_WRITE_REG(PM3DitherMode, 0x0);
1704 PM3_SLOW_WRITE_REG(PM3LogicalOpMode, 0x0);
1705 PM3_SLOW_WRITE_REG(PM3RouterMode, 0x0);
1706 PM3_SLOW_WRITE_REG(PM3Window, 0x0);
1707
1708 PM3_SLOW_WRITE_REG(PM3Config2D, 0x0);
1709
1710 PM3_SLOW_WRITE_REG(PM3SpanColorMask, 0xffffffff);
1711
1712 PM3_SLOW_WRITE_REG(PM3XBias, 0x0);
1713 PM3_SLOW_WRITE_REG(PM3YBias, 0x0);
1714 PM3_SLOW_WRITE_REG(PM3DeltaControl, 0x0);
1715
1716 PM3_SLOW_WRITE_REG(PM3BitMaskPattern, 0xffffffff);
1717
1718 PM3_SLOW_WRITE_REG(PM3FBDestReadEnables,
1719 PM3FBDestReadEnables_E(0xff) |
1720 PM3FBDestReadEnables_R(0xff) |
1721 PM3FBDestReadEnables_ReferenceAlpha(0xff));
1722 PM3_SLOW_WRITE_REG(PM3FBDestReadBufferAddr0, 0x0);
1723 PM3_SLOW_WRITE_REG(PM3FBDestReadBufferOffset0, 0x0);
1724 PM3_SLOW_WRITE_REG(PM3FBDestReadBufferWidth0,
1725 PM3FBDestReadBufferWidth_Width(l_fb_info->
1726 current_par->
1727 width));
1728
1729 PM3_SLOW_WRITE_REG(PM3FBDestReadMode,
1730 PM3FBDestReadMode_ReadEnable |
1731 PM3FBDestReadMode_Enable0);
1732 PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferAddr, 0x0);
1733 PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferOffset, 0x0);
1734 PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferWidth,
1735 PM3FBSourceReadBufferWidth_Width(l_fb_info->
1736 current_par->
1737 width));
1738 PM3_SLOW_WRITE_REG(PM3FBSourceReadMode,
1739 PM3FBSourceReadMode_Blocking |
1740 PM3FBSourceReadMode_ReadEnable);
1741
1742 {
1743 unsigned long rm = 1;
1744 switch (l_fb_info->current_par->depth) {
1745 case 8:
1746 PM3_SLOW_WRITE_REG(PM3PixelSize,
1747 PM3PixelSize_GLOBAL_8BIT);
1748 break;
1749 case 12:
1750 case 15:
1751 case 16:
1752 PM3_SLOW_WRITE_REG(PM3PixelSize,
1753 PM3PixelSize_GLOBAL_16BIT);
1754 break;
1755 case 32:
1756 PM3_SLOW_WRITE_REG(PM3PixelSize,
1757 PM3PixelSize_GLOBAL_32BIT);
1758 break;
1759 default:
1760 DPRINTK(1, "Unsupported depth %d\n",
1761 l_fb_info->current_par->depth);
1762 break;
1763 }
1764 PM3_SLOW_WRITE_REG(PM3RasterizerMode, rm);
1765 }
1766
1767 PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0xffffffff);
1768 PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0xffffffff);
1769 PM3_SLOW_WRITE_REG(PM3FBWriteMode,
1770 PM3FBWriteMode_WriteEnable |
1771 PM3FBWriteMode_OpaqueSpan |
1772 PM3FBWriteMode_Enable0);
1773 PM3_SLOW_WRITE_REG(PM3FBWriteBufferAddr0, 0x0);
1774 PM3_SLOW_WRITE_REG(PM3FBWriteBufferOffset0, 0x0);
1775 PM3_SLOW_WRITE_REG(PM3FBWriteBufferWidth0,
1776 PM3FBWriteBufferWidth_Width(l_fb_info->
1777 current_par->
1778 width));
1779
1780 PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, 0x0);
1781 {
1782 unsigned long sofb = (8UL * l_fb_info->fb_size) /
1783 ((depth2bpp(l_fb_info->current_par->depth))
1784 * l_fb_info->current_par->width); /* size in lines of FB */
1785 if (sofb > 4095)
1786 PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, 4095);
1787 else
1788 PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, sofb);
1789
1790 switch (l_fb_info->current_par->depth) {
1791 case 8:
1792 PM3_SLOW_WRITE_REG(PM3DitherMode,
1793 (1 << 10) | (2 << 3));
1794 break;
1795 case 12:
1796 case 15:
1797 case 16:
1798 PM3_SLOW_WRITE_REG(PM3DitherMode,
1799 (1 << 10) | (1 << 3));
1800 break;
1801 case 32:
1802 PM3_SLOW_WRITE_REG(PM3DitherMode,
1803 (1 << 10) | (0 << 3));
1804 break;
1805 default:
1806 DPRINTK(1, "Unsupported depth %d\n",
1807 l_fb_info->current_par->depth);
1808 break;
1809 }
1810 }
1811
1812 PM3_SLOW_WRITE_REG(PM3dXDom, 0x0);
1813 PM3_SLOW_WRITE_REG(PM3dXSub, 0x0);
1814 PM3_SLOW_WRITE_REG(PM3dY, (1 << 16));
1815 PM3_SLOW_WRITE_REG(PM3StartXDom, 0x0);
1816 PM3_SLOW_WRITE_REG(PM3StartXSub, 0x0);
1817 PM3_SLOW_WRITE_REG(PM3StartY, 0x0);
1818 PM3_SLOW_WRITE_REG(PM3Count, 0x0);
1819
1820 /* Disable LocalBuffer. better safe than sorry */
1821 PM3_SLOW_WRITE_REG(PM3LBDestReadMode, 0x0);
1822 PM3_SLOW_WRITE_REG(PM3LBDestReadEnables, 0x0);
1823 PM3_SLOW_WRITE_REG(PM3LBSourceReadMode, 0x0);
1824 PM3_SLOW_WRITE_REG(PM3LBWriteMode, 0x0);
1825
1826 pm3fb_wait_pm3(l_fb_info);
1827 }
1828
1829 #ifdef FBCON_HAS_CFB32
1830 static void pm3fb_cfb32_clear(struct vc_data *conp,
1831 struct display *p,
1832 int sy, int sx, int height, int width)
1833 {
1834 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1835 u32 c;
1836
1837 DTRACE;
1838
1839 sx = sx * fontwidth(p);
1840 width = width * fontwidth(p);
1841 sy = sy * fontheight(p);
1842 height = height * fontheight(p);
1843 c = ((u32 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1844
1845 /* block fills in 32bpp are hard, but in low res (width <= 1600 :-)
1846 we can use 16bpp operations, but not if NoWriteMask is on (SDRAM) */
1847 if ((l_fb_info->current_par->width > 1600) ||
1848 (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)) {
1849 PM3_WAIT(4);
1850
1851 PM3_WRITE_REG(PM3Config2D,
1852 PM3Config2D_UseConstantSource |
1853 PM3Config2D_ForegroundROPEnable |
1854 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1855 PM3Config2D_FBWriteEnable);
1856
1857 PM3_WRITE_REG(PM3ForegroundColor, c);
1858
1859 PM3_WRITE_REG(PM3RectanglePosition,
1860 (PM3RectanglePosition_XOffset(sx)) |
1861 (PM3RectanglePosition_YOffset(sy)));
1862
1863 PM3_WRITE_REG(PM3Render2D,
1864 PM3Render2D_XPositive |
1865 PM3Render2D_YPositive |
1866 PM3Render2D_Operation_Normal |
1867 PM3Render2D_SpanOperation |
1868 (PM3Render2D_Width(width)) |
1869 (PM3Render2D_Height(height)));
1870 } else {
1871 PM3_WAIT(8);
1872
1873 PM3_WRITE_REG(PM3FBBlockColor, c);
1874
1875 PM3_WRITE_REG(PM3PixelSize, PM3PixelSize_GLOBAL_16BIT);
1876
1877 PM3_WRITE_REG(PM3FBWriteBufferWidth0,
1878 PM3FBWriteBufferWidth_Width(l_fb_info->
1879 current_par->
1880 width << 1));
1881
1882 PM3_WRITE_REG(PM3Config2D,
1883 PM3Config2D_UseConstantSource |
1884 PM3Config2D_ForegroundROPEnable |
1885 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1886 PM3Config2D_FBWriteEnable);
1887
1888 PM3_WRITE_REG(PM3RectanglePosition,
1889 (PM3RectanglePosition_XOffset(sx << 1)) |
1890 (PM3RectanglePosition_YOffset(sy)));
1891
1892 PM3_WRITE_REG(PM3Render2D,
1893 PM3Render2D_XPositive |
1894 PM3Render2D_YPositive |
1895 PM3Render2D_Operation_Normal |
1896 (PM3Render2D_Width(width << 1)) |
1897 (PM3Render2D_Height(height)));
1898
1899 PM3_WRITE_REG(PM3FBWriteBufferWidth0,
1900 PM3FBWriteBufferWidth_Width(l_fb_info->
1901 current_par->
1902 width));
1903
1904 PM3_WRITE_REG(PM3PixelSize, PM3PixelSize_GLOBAL_32BIT);
1905 }
1906
1907 pm3fb_wait_pm3(l_fb_info);
1908 }
1909
1910 static void pm3fb_cfb32_clear_margins(struct vc_data *conp,
1911 struct display *p, int bottom_only)
1912 {
1913 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1914 int sx, sy;
1915 u32 c;
1916
1917 DTRACE;
1918
1919 sx = conp->vc_cols * fontwidth(p); /* right margin */
1920 sy = conp->vc_rows * fontheight(p); /* bottom margin */
1921 c = ((u32 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1922
1923 if (!bottom_only) { /* right margin top->bottom */
1924 PM3_WAIT(4);
1925
1926 PM3_WRITE_REG(PM3Config2D,
1927 PM3Config2D_UseConstantSource |
1928 PM3Config2D_ForegroundROPEnable |
1929 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1930 PM3Config2D_FBWriteEnable);
1931
1932 PM3_WRITE_REG(PM3ForegroundColor, c);
1933
1934 PM3_WRITE_REG(PM3RectanglePosition,
1935 (PM3RectanglePosition_XOffset
1936 (p->var.xoffset +
1937 sx)) | (PM3RectanglePosition_YOffset(p->
1938 var.
1939 yoffset)));
1940
1941 PM3_WRITE_REG(PM3Render2D,
1942 PM3Render2D_XPositive |
1943 PM3Render2D_YPositive |
1944 PM3Render2D_Operation_Normal |
1945 PM3Render2D_SpanOperation |
1946 (PM3Render2D_Width(p->var.xres - sx)) |
1947 (PM3Render2D_Height(p->var.yres)));
1948 }
1949
1950 /* bottom margin left -> right */
1951 PM3_WAIT(4);
1952
1953 PM3_WRITE_REG(PM3Config2D,
1954 PM3Config2D_UseConstantSource |
1955 PM3Config2D_ForegroundROPEnable |
1956 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1957 PM3Config2D_FBWriteEnable);
1958
1959 PM3_WRITE_REG(PM3ForegroundColor, c);
1960
1961 PM3_WRITE_REG(PM3RectanglePosition,
1962 (PM3RectanglePosition_XOffset(p->var.xoffset)) |
1963 (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
1964
1965 PM3_WRITE_REG(PM3Render2D,
1966 PM3Render2D_XPositive |
1967 PM3Render2D_YPositive |
1968 PM3Render2D_Operation_Normal |
1969 PM3Render2D_SpanOperation |
1970 (PM3Render2D_Width(p->var.xres)) |
1971 (PM3Render2D_Height(p->var.yres - sy)));
1972
1973 pm3fb_wait_pm3(l_fb_info);
1974 }
1975 #endif /* FBCON_HAS_CFB32 */
1976 #ifdef FBCON_HAS_CFB16
1977 static void pm3fb_cfb16_clear(struct vc_data *conp,
1978 struct display *p,
1979 int sy, int sx, int height, int width)
1980 {
1981 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1982 u32 c;
1983
1984 DTRACE;
1985
1986 sx = sx * fontwidth(p);
1987 width = width * fontwidth(p);
1988 sy = sy * fontheight(p);
1989 height = height * fontheight(p);
1990 c = ((u16 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1991 c = c | (c << 16);
1992
1993 PM3_WAIT(4);
1994
1995 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
1996 PM3_WRITE_REG(PM3ForegroundColor, c);
1997 else
1998 PM3_WRITE_REG(PM3FBBlockColor, c);
1999
2000 PM3_WRITE_REG(PM3Config2D,
2001 PM3Config2D_UseConstantSource |
2002 PM3Config2D_ForegroundROPEnable |
2003 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2004 PM3Config2D_FBWriteEnable);
2005
2006 PM3_WRITE_REG(PM3RectanglePosition,
2007 (PM3RectanglePosition_XOffset(sx)) |
2008 (PM3RectanglePosition_YOffset(sy)));
2009
2010 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2011 PM3_WRITE_REG(PM3Render2D,
2012 PM3Render2D_XPositive |
2013 PM3Render2D_YPositive |
2014 PM3Render2D_Operation_Normal |
2015 PM3Render2D_SpanOperation |
2016 (PM3Render2D_Width(width)) |
2017 (PM3Render2D_Height(height)));
2018 else
2019 PM3_WRITE_REG(PM3Render2D,
2020 PM3Render2D_XPositive |
2021 PM3Render2D_YPositive |
2022 PM3Render2D_Operation_Normal |
2023 (PM3Render2D_Width(width)) |
2024 (PM3Render2D_Height(height)));
2025
2026 pm3fb_wait_pm3(l_fb_info);
2027 }
2028
2029 static void pm3fb_cfb16_clear_margins(struct vc_data *conp,
2030 struct display *p, int bottom_only)
2031 {
2032 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2033 int sx, sy;
2034 u32 c;
2035
2036 DTRACE;
2037
2038 sx = conp->vc_cols * fontwidth(p); /* right margin */
2039 sy = conp->vc_rows * fontheight(p); /* bottom margin */
2040 c = ((u16 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
2041 c = c | (c << 16);
2042
2043 if (!bottom_only) { /* right margin top->bottom */
2044 PM3_WAIT(4);
2045
2046 PM3_WRITE_REG(PM3Config2D,
2047 PM3Config2D_UseConstantSource |
2048 PM3Config2D_ForegroundROPEnable |
2049 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2050 PM3Config2D_FBWriteEnable);
2051
2052 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2053 PM3_WRITE_REG(PM3ForegroundColor, c);
2054 else
2055 PM3_WRITE_REG(PM3FBBlockColor, c);
2056
2057 PM3_WRITE_REG(PM3RectanglePosition,
2058 (PM3RectanglePosition_XOffset
2059 (p->var.xoffset +
2060 sx)) | (PM3RectanglePosition_YOffset(p->
2061 var.
2062 yoffset)));
2063 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2064 PM3_WRITE_REG(PM3Render2D,
2065 PM3Render2D_XPositive |
2066 PM3Render2D_YPositive |
2067 PM3Render2D_Operation_Normal |
2068 PM3Render2D_SpanOperation |
2069 (PM3Render2D_Width(p->var.xres - sx)) |
2070 (PM3Render2D_Height(p->var.yres)));
2071 else
2072 PM3_WRITE_REG(PM3Render2D,
2073 PM3Render2D_XPositive |
2074 PM3Render2D_YPositive |
2075 PM3Render2D_Operation_Normal |
2076 (PM3Render2D_Width(p->var.xres - sx)) |
2077 (PM3Render2D_Height(p->var.yres)));
2078 }
2079
2080 /* bottom margin left -> right */
2081 PM3_WAIT(4);
2082
2083 PM3_WRITE_REG(PM3Config2D,
2084 PM3Config2D_UseConstantSource |
2085 PM3Config2D_ForegroundROPEnable |
2086 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2087 PM3Config2D_FBWriteEnable);
2088
2089 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2090 PM3_WRITE_REG(PM3ForegroundColor, c);
2091 else
2092 PM3_WRITE_REG(PM3FBBlockColor, c);
2093
2094
2095 PM3_WRITE_REG(PM3RectanglePosition,
2096 (PM3RectanglePosition_XOffset(p->var.xoffset)) |
2097 (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
2098
2099 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2100 PM3_WRITE_REG(PM3Render2D,
2101 PM3Render2D_XPositive |
2102 PM3Render2D_YPositive |
2103 PM3Render2D_Operation_Normal |
2104 PM3Render2D_SpanOperation |
2105 (PM3Render2D_Width(p->var.xres)) |
2106 (PM3Render2D_Height(p->var.yres - sy)));
2107 else
2108 PM3_WRITE_REG(PM3Render2D,
2109 PM3Render2D_XPositive |
2110 PM3Render2D_YPositive |
2111 PM3Render2D_Operation_Normal |
2112 (PM3Render2D_Width(p->var.xres)) |
2113 (PM3Render2D_Height(p->var.yres - sy)));
2114
2115 pm3fb_wait_pm3(l_fb_info);
2116 }
2117 #endif /* FBCON_HAS_CFB16 */
2118 #ifdef FBCON_HAS_CFB8
2119 static void pm3fb_cfb8_clear(struct vc_data *conp,
2120 struct display *p,
2121 int sy, int sx, int height, int width)
2122 {
2123 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2124 u32 c;
2125
2126 DTRACE;
2127
2128 sx = sx * fontwidth(p);
2129 width = width * fontwidth(p);
2130 sy = sy * fontheight(p);
2131 height = height * fontheight(p);
2132
2133 c = attr_bgcol_ec(p, conp);
2134 c |= c << 8;
2135 c |= c << 16;
2136
2137 PM3_WAIT(4);
2138
2139 PM3_WRITE_REG(PM3Config2D,
2140 PM3Config2D_UseConstantSource |
2141 PM3Config2D_ForegroundROPEnable |
2142 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2143 PM3Config2D_FBWriteEnable);
2144
2145 PM3_WRITE_REG(PM3ForegroundColor, c);
2146
2147 PM3_WRITE_REG(PM3RectanglePosition,
2148 (PM3RectanglePosition_XOffset(sx)) |
2149 (PM3RectanglePosition_YOffset(sy)));
2150
2151 PM3_WRITE_REG(PM3Render2D,
2152 PM3Render2D_XPositive |
2153 PM3Render2D_YPositive |
2154 PM3Render2D_Operation_Normal |
2155 PM3Render2D_SpanOperation |
2156 (PM3Render2D_Width(width)) |
2157 (PM3Render2D_Height(height)));
2158
2159 pm3fb_wait_pm3(l_fb_info);
2160 }
2161
2162 static void pm3fb_cfb8_clear_margins(struct vc_data *conp,
2163 struct display *p, int bottom_only)
2164 {
2165 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2166 int sx, sy;
2167 u32 c;
2168
2169 DTRACE;
2170
2171 sx = conp->vc_cols * fontwidth(p); /* right margin */
2172 sy = conp->vc_rows * fontheight(p); /* bottom margin */
2173 c = attr_bgcol_ec(p, conp);
2174 c |= c << 8;
2175 c |= c << 16;
2176
2177 if (!bottom_only) { /* right margin top->bottom */
2178 PM3_WAIT(4);
2179
2180 PM3_WRITE_REG(PM3Config2D,
2181 PM3Config2D_UseConstantSource |
2182 PM3Config2D_ForegroundROPEnable |
2183 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2184 PM3Config2D_FBWriteEnable);
2185
2186 PM3_WRITE_REG(PM3ForegroundColor, c);
2187
2188 PM3_WRITE_REG(PM3RectanglePosition,
2189 (PM3RectanglePosition_XOffset
2190 (p->var.xoffset +
2191 sx)) | (PM3RectanglePosition_YOffset(p->
2192 var.
2193 yoffset)));
2194
2195 PM3_WRITE_REG(PM3Render2D,
2196 PM3Render2D_XPositive |
2197 PM3Render2D_YPositive |
2198 PM3Render2D_Operation_Normal |
2199 PM3Render2D_SpanOperation |
2200 (PM3Render2D_Width(p->var.xres - sx)) |
2201 (PM3Render2D_Height(p->var.yres)));
2202 }
2203
2204 /* bottom margin left -> right */
2205 PM3_WAIT(4);
2206
2207 PM3_WRITE_REG(PM3Config2D,
2208 PM3Config2D_UseConstantSource |
2209 PM3Config2D_ForegroundROPEnable |
2210 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2211 PM3Config2D_FBWriteEnable);
2212
2213 PM3_WRITE_REG(PM3ForegroundColor, c);
2214
2215 PM3_WRITE_REG(PM3RectanglePosition,
2216 (PM3RectanglePosition_XOffset(p->var.xoffset)) |
2217 (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
2218
2219 PM3_WRITE_REG(PM3Render2D,
2220 PM3Render2D_XPositive |
2221 PM3Render2D_YPositive |
2222 PM3Render2D_Operation_Normal |
2223 PM3Render2D_SpanOperation |
2224 (PM3Render2D_Width(p->var.xres)) |
2225 (PM3Render2D_Height(p->var.yres - sy)));
2226
2227 pm3fb_wait_pm3(l_fb_info);
2228 }
2229 #endif /* FBCON_HAS_CFB8 */
2230 #if defined(FBCON_HAS_CFB8) || defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB32)
2231 static void pm3fb_cfbX_bmove(struct display *p,
2232 int sy, int sx,
2233 int dy, int dx, int height, int width)
2234 {
2235 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2236 int x_align, o_x, o_y;
2237
2238 DTRACE;
2239
2240 sx = sx * fontwidth(p);
2241 dx = dx * fontwidth(p);
2242 width = width * fontwidth(p);
2243 sy = sy * fontheight(p);
2244 dy = dy * fontheight(p);
2245 height = height * fontheight(p);
2246
2247 o_x = sx - dx; /*(sx > dx ) ? (sx - dx) : (dx - sx); */
2248 o_y = sy - dy; /*(sy > dy ) ? (sy - dy) : (dy - sy); */
2249
2250 x_align = (sx & 0x1f);
2251
2252 PM3_WAIT(6);
2253
2254 PM3_WRITE_REG(PM3Config2D,
2255 PM3Config2D_UserScissorEnable |
2256 PM3Config2D_ForegroundROPEnable |
2257 PM3Config2D_Blocking |
2258 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2259 PM3Config2D_FBWriteEnable);
2260
2261 PM3_WRITE_REG(PM3ScissorMinXY,
2262 ((dy & 0x0fff) << 16) | (dx & 0x0fff));
2263 PM3_WRITE_REG(PM3ScissorMaxXY,
2264 (((dy + height) & 0x0fff) << 16) |
2265 ((dx + width) & 0x0fff));
2266
2267 PM3_WRITE_REG(PM3FBSourceReadBufferOffset,
2268 PM3FBSourceReadBufferOffset_XOffset(o_x) |
2269 PM3FBSourceReadBufferOffset_YOffset(o_y));
2270
2271 PM3_WRITE_REG(PM3RectanglePosition,
2272 (PM3RectanglePosition_XOffset(dx - x_align)) |
2273 (PM3RectanglePosition_YOffset(dy)));
2274
2275 PM3_WRITE_REG(PM3Render2D,
2276 ((sx > dx) ? PM3Render2D_XPositive : 0) |
2277 ((sy > dy) ? PM3Render2D_YPositive : 0) |
2278 PM3Render2D_Operation_Normal |
2279 PM3Render2D_SpanOperation |
2280 PM3Render2D_FBSourceReadEnable |
2281 (PM3Render2D_Width(width + x_align)) |
2282 (PM3Render2D_Height(height)));
2283
2284 pm3fb_wait_pm3(l_fb_info);
2285 }
2286
2287 static void pm3fb_cfbX_putc(struct vc_data *conp, struct display *p,
2288 int c, int yy, int xx)
2289 {
2290 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2291 u8 *cdat, asx = 0, asy = 0, o_x = 0, o_y = 0;
2292 u32 fgx, bgx, ldat;
2293 int sx, sy, i;
2294
2295 DTRACE;
2296
2297 if (l_fb_info->current_par->depth == 8)
2298 fgx = attr_fgcol(p, c);
2299 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2300 fgx = ((u16 *) p->dispsw_data)[attr_fgcol(p, c)];
2301 else
2302 fgx = ((u32 *) p->dispsw_data)[attr_fgcol(p, c)];
2303
2304 PM3_COLOR(fgx);
2305
2306 if (l_fb_info->current_par->depth == 8)
2307 bgx = attr_bgcol(p, c);
2308 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2309 bgx = ((u16 *) p->dispsw_data)[attr_bgcol(p, c)];
2310 else
2311 bgx = ((u32 *) p->dispsw_data)[attr_bgcol(p, c)];
2312
2313 PM3_COLOR(bgx);
2314
2315 PM3_WAIT(4);
2316
2317 PM3_WRITE_REG(PM3Config2D,
2318 PM3Config2D_UseConstantSource |
2319 PM3Config2D_ForegroundROPEnable |
2320 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2321 PM3Config2D_FBWriteEnable | PM3Config2D_OpaqueSpan);
2322
2323 PM3_WRITE_REG(PM3ForegroundColor, fgx);
2324 PM3_WRITE_REG(PM3FillBackgroundColor, bgx);
2325
2326 /* WARNING : address select X need to specify 8 bits for fontwidth <= 8 */
2327 /* and 16 bits for fontwidth <= 16 */
2328 /* same in _putcs, same for Y and fontheight */
2329 if (fontwidth(p) <= 8)
2330 asx = 2;
2331 else if (fontwidth(p) <= 16)
2332 asx = 3; /* look OK */
2333 if (fontheight(p) <= 8)
2334 asy = 2;
2335 else if (fontheight(p) <= 16)
2336 asy = 3; /* look OK */
2337 else if (fontheight(p) <= 32)
2338 asy = 4; /* look OK */
2339
2340 sx = xx * fontwidth(p);
2341 sy = yy * fontheight(p);
2342
2343 if (fontwidth(p) <= 8)
2344 o_x = (8 - (sx & 0x7)) & 0x7;
2345 else if (fontwidth(p) <= 16)
2346 o_x = (16 - (sx & 0xF)) & 0xF;
2347 if (fontheight(p) <= 8)
2348 o_y = (8 - (sy & 0x7)) & 0x7;
2349 else if (fontheight(p) <= 16)
2350 o_y = (16 - (sy & 0xF)) & 0xF;
2351 else if (fontheight(p) <= 32)
2352 o_y = (32 - (sy & 0x1F)) & 0x1F;
2353
2354 PM3_WRITE_REG(PM3AreaStippleMode, (o_x << 7) | (o_y << 12) | /* x_offset, y_offset in pattern */
2355 (1 << 18) | /* BE */
2356 1 | (asx << 1) | (asy << 4) | /* address select x/y */
2357 (1 << 20)); /* OpaqueSpan */
2358
2359 if (fontwidth(p) <= 8) {
2360 cdat = p->fontdata + (c & p->charmask) * fontheight(p);
2361 } else {
2362 cdat =
2363 p->fontdata +
2364 ((c & p->charmask) * (fontheight(p) << 1));
2365 }
2366
2367 PM3_WAIT(2 + fontheight(p));
2368
2369 for (i = 0; i < fontheight(p); i++) { /* assume fontheight <= 32 */
2370 if (fontwidth(p) <= 8) {
2371 ldat = *cdat++;
2372 } else { /* assume fontwidth <= 16 ATM */
2373
2374 ldat = ((*cdat++) << 8);
2375 ldat |= *cdat++;
2376 }
2377 PM3_WRITE_REG(AreaStipplePattern_indexed(i), ldat);
2378 }
2379
2380 PM3_WRITE_REG(PM3RectanglePosition,
2381 (PM3RectanglePosition_XOffset(sx)) |
2382 (PM3RectanglePosition_YOffset(sy)));
2383
2384 PM3_WRITE_REG(PM3Render2D,
2385 PM3Render2D_AreaStippleEnable |
2386 PM3Render2D_XPositive |
2387 PM3Render2D_YPositive |
2388 PM3Render2D_Operation_Normal |
2389 PM3Render2D_SpanOperation |
2390 (PM3Render2D_Width(fontwidth(p))) |
2391 (PM3Render2D_Height(fontheight(p))));
2392
2393 pm3fb_wait_pm3(l_fb_info);
2394 }
2395
2396 static void pm3fb_cfbX_putcs(struct vc_data *conp, struct display *p,
2397 const unsigned short *s, int count, int yy,
2398 int xx)
2399 {
2400 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2401 u8 *cdat, asx = 0, asy = 0, o_x = 0, o_y = 0;
2402 u32 fgx, bgx, ldat;
2403 int sx, sy, i, j;
2404 u16 sc;
2405
2406 DTRACE;
2407
2408 sc = scr_readw(s);
2409 if (l_fb_info->current_par->depth == 8)
2410 fgx = attr_fgcol(p, sc);
2411 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2412 fgx = ((u16 *) p->dispsw_data)[attr_fgcol(p, sc)];
2413 else
2414 fgx = ((u32 *) p->dispsw_data)[attr_fgcol(p, sc)];
2415
2416 PM3_COLOR(fgx);
2417
2418 if (l_fb_info->current_par->depth == 8)
2419 bgx = attr_bgcol(p, sc);
2420 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2421 bgx = ((u16 *) p->dispsw_data)[attr_bgcol(p, sc)];
2422 else
2423 bgx = ((u32 *) p->dispsw_data)[attr_bgcol(p, sc)];
2424
2425 PM3_COLOR(bgx);
2426
2427 PM3_WAIT(4);
2428
2429 PM3_WRITE_REG(PM3Config2D,
2430 PM3Config2D_UseConstantSource |
2431 PM3Config2D_ForegroundROPEnable |
2432 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2433 PM3Config2D_FBWriteEnable |
2434 PM3Config2D_OpaqueSpan);
2435
2436 PM3_WRITE_REG(PM3ForegroundColor, fgx);
2437 PM3_WRITE_REG(PM3FillBackgroundColor, bgx);
2438
2439 /* WARNING : address select X need to specify 8 bits for fontwidth <= 8 */
2440 /* and 16 bits for fontwidth <= 16 */
2441 /* same in _putc, same for Y and fontheight */
2442 if (fontwidth(p) <= 8)
2443 asx = 2;
2444 else if (fontwidth(p) <= 16)
2445 asx = 3; /* look OK */
2446 if (fontheight(p) <= 8)
2447 asy = 2;
2448 else if (fontheight(p) <= 16)
2449 asy = 3; /* look OK */
2450 else if (fontheight(p) <= 32)
2451 asy = 4; /* look OK */
2452
2453 sy = yy * fontheight(p);
2454
2455 if (fontheight(p) <= 8)
2456 o_y = (8 - (sy & 0x7)) & 0x7;
2457 else if (fontheight(p) <= 16)
2458 o_y = (16 - (sy & 0xF)) & 0xF;
2459 else if (fontheight(p) <= 32)
2460 o_y = (32 - (sy & 0x1F)) & 0x1F;
2461
2462 for (j = 0; j < count; j++) {
2463 sc = scr_readw(s + j);
2464 if (fontwidth(p) <= 8)
2465 cdat = p->fontdata +
2466 (sc & p->charmask) * fontheight(p);
2467 else
2468 cdat = p->fontdata +
2469 ((sc & p->charmask) * fontheight(p) << 1);
2470
2471 sx = (xx + j) * fontwidth(p);
2472
2473 if (fontwidth(p) <= 8)
2474 o_x = (8 - (sx & 0x7)) & 0x7;
2475 else if (fontwidth(p) <= 16)
2476 o_x = (16 - (sx & 0xF)) & 0xF;
2477
2478 PM3_WAIT(3 + fontheight(p));
2479
2480 PM3_WRITE_REG(PM3AreaStippleMode, (o_x << 7) | (o_y << 12) | /* x_offset, y_offset in pattern */
2481 (1 << 18) | /* BE */
2482 1 | (asx << 1) | (asy << 4) | /* address select x/y */
2483 (1 << 20)); /* OpaqueSpan */
2484
2485 for (i = 0; i < fontheight(p); i++) { /* assume fontheight <= 32 */
2486 if (fontwidth(p) <= 8) {
2487 ldat = *cdat++;
2488 } else { /* assume fontwidth <= 16 ATM */
2489 ldat = ((*cdat++) << 8);
2490 ldat |= *cdat++;
2491 }
2492 PM3_WRITE_REG(AreaStipplePattern_indexed(i), ldat);
2493 }
2494
2495 PM3_WRITE_REG(PM3RectanglePosition,
2496 (PM3RectanglePosition_XOffset(sx)) |
2497 (PM3RectanglePosition_YOffset(sy)));
2498
2499 PM3_WRITE_REG(PM3Render2D,
2500 PM3Render2D_AreaStippleEnable |
2501 PM3Render2D_XPositive |
2502 PM3Render2D_YPositive |
2503 PM3Render2D_Operation_Normal |
2504 PM3Render2D_SpanOperation |
2505 (PM3Render2D_Width(fontwidth(p))) |
2506 (PM3Render2D_Height(fontheight(p))));
2507 }
2508 pm3fb_wait_pm3(l_fb_info);
2509 }
2510
2511 static void pm3fb_cfbX_revc(struct display *p, int xx, int yy)
2512 {
2513 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2514
2515 xx = xx * fontwidth(p);
2516 yy = yy * fontheight(p);
2517
2518 if (l_fb_info->current_par->depth == 8)
2519 {
2520 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2521 PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0x0F0F0F0F);
2522 else
2523 PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0x0F0F0F0F);
2524 }
2525
2526 PM3_WAIT(3);
2527
2528 PM3_WRITE_REG(PM3Config2D,
2529 PM3Config2D_UseConstantSource |
2530 PM3Config2D_ForegroundROPEnable |
2531 (PM3Config2D_ForegroundROP(0xa)) | /* Oxa is GXinvert */
2532 PM3Config2D_FBDestReadEnable |
2533 PM3Config2D_FBWriteEnable);
2534
2535 PM3_WRITE_REG(PM3RectanglePosition,
2536 (PM3RectanglePosition_XOffset(xx)) |
2537 (PM3RectanglePosition_YOffset(yy)));
2538
2539 PM3_WRITE_REG(PM3Render2D,
2540 PM3Render2D_XPositive |
2541 PM3Render2D_YPositive |
2542 PM3Render2D_Operation_Normal |
2543 PM3Render2D_SpanOperation |
2544 (PM3Render2D_Width(fontwidth(p))) |
2545 (PM3Render2D_Height(fontheight(p))));
2546
2547 pm3fb_wait_pm3(l_fb_info);
2548
2549 if (l_fb_info->current_par->depth == 8)
2550 {
2551 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2552 PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0xFFFFFFFF);
2553 else
2554 PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0xFFFFFFFF);
2555 }
2556 }
2557
2558 #endif /* FBCON_HAS_CFB8 || FBCON_HAS_CFB16 || FBCON_HAS_CFB32 */
2559 #endif /* PM3FB_USE_ACCEL */
2560 /* *********************************** */
2561 /* ***** pre-init board(s) setup ***** */
2562 /* *********************************** */
2563
2564 static void pm3fb_mode_setup(char *mode, unsigned long board_num)
2565 {
2566 struct pm3fb_info *l_fb_info = &(fb_info[board_num]);
2567 struct pm3fb_par *l_fb_par = &(current_par[board_num]);
2568 unsigned long i = 0;
2569
2570 current_par_valid[board_num] = 0;
2571
2572 if (!strncmp(mode, "current", 7)) {
2573 l_fb_info->use_current = 1; /* default w/ OpenFirmware */
2574 } else {
2575 while ((mode_base[i].name[0])
2576 && (!current_par_valid[board_num])) {
2577 if (!
2578 (strncmp
2579 (mode, mode_base[i].name,
2580 strlen(mode_base[i].name)))) {
2581 memcpy(l_fb_par, &(mode_base[i].user_mode),
2582 sizeof(struct pm3fb_par));
2583 current_par_valid[board_num] = 1;
2584 DPRINTK(2, "Mode set to %s\n",
2585 mode_base[i].name);
2586 }
2587 i++;
2588 }
2589 DASSERT(current_par_valid[board_num],
2590 "Valid mode on command line\n");
2591 }
2592 }
2593
2594 static void pm3fb_pciid_setup(char *pciid, unsigned long board_num)
2595 {
2596 short l_bus = -1, l_slot = -1, l_func = -1;
2597 char *next;
2598
2599 if (pciid) {
2600 l_bus = simple_strtoul(pciid, &next, 10);
2601 if (next && (next[0] == ':')) {
2602 pciid = next + 1;
2603 l_slot = simple_strtoul(pciid, &next, 10);
2604 if (next && (next[0] == ':')) {
2605 pciid = next + 1;
2606 l_func =
2607 simple_strtoul(pciid, (char **) NULL,
2608 10);
2609 }
2610 }
2611 } else
2612 return;
2613
2614 if ((l_bus >= 0) && (l_slot >= 0) && (l_func >= 0)) {
2615 bus[board_num] = l_bus;
2616 slot[board_num] = l_slot;
2617 func[board_num] = l_func;
2618 DPRINTK(2, "Board #%ld will be PciId: %hd:%hd:%hd\n",
2619 board_num, l_bus, l_slot, l_func);
2620 } else {
2621 DPRINTK(1, "Invalid PciId: %hd:%hd:%hd for board #%ld\n",
2622 l_bus, l_slot, l_func, board_num);
2623 }
2624 }
2625
2626 static void pm3fb_font_setup(char *lf, unsigned long board_num)
2627 {
2628 unsigned long lfs = strlen(lf);
2629
2630 if (lfs > (PM3_FONTNAME_SIZE - 1)) {
2631 DPRINTK(1, "Fontname %s too long\n", lf);
2632 return;
2633 }
2634 strlcpy(fontn[board_num], lf, lfs + 1);
2635 }
2636
2637 static void pm3fb_bootdepth_setup(char *bds, unsigned long board_num)
2638 {
2639 unsigned long bd = simple_strtoul(bds, (char **) NULL, 10);
2640
2641 if (!(depth_supported(bd))) {
2642 printk(KERN_WARNING "pm3fb: ignoring invalid depth %s for board #%ld\n",
2643 bds, board_num);
2644 return;
2645 }
2646 depth[board_num] = bd;
2647 }
2648
2649 static void pm3fb_forcesize_setup(char *bds, unsigned long board_num)
2650 {
2651 unsigned long bd = simple_strtoul(bds, (char **) NULL, 10);
2652
2653 if (bd > 64) {
2654 printk(KERN_WARNING "pm3fb: ignoring invalid memory size %s for board #%ld\n",
2655 bds, board_num);
2656 return;
2657 }
2658 forcesize[board_num] = bd;
2659 }
2660
2661 static char *pm3fb_boardnum_setup(char *options, unsigned long *bn)
2662 {
2663 char *next;
2664
2665 if (!(CHAR_IS_NUM(options[0]))) {
2666 (*bn) = 0;
2667 return (options);
2668 }
2669
2670 (*bn) = simple_strtoul(options, &next, 10);
2671
2672 if (next && (next[0] == ':') && ((*bn) >= 0)
2673 && ((*bn) <= PM3_MAX_BOARD)) {
2674 DPRINTK(2, "Board_num seen as %ld\n", (*bn));
2675 return (next + 1);
2676 } else {
2677 (*bn) = 0;
2678 DPRINTK(2, "Board_num default to %ld\n", (*bn));
2679 return (options);
2680 }
2681 }
2682
2683 static void pm3fb_real_setup(char *options)
2684 {
2685 char *next;
2686 unsigned long i, bn;
2687 struct pm3fb_info *l_fb_info;
2688
2689 DTRACE;
2690
2691 DPRINTK(2, "Options : %s\n", options);
2692
2693 for (i = 0; i < PM3_MAX_BOARD; i++) {
2694 l_fb_info = &(fb_info[i]);
2695 memset(l_fb_info, 0, sizeof(struct pm3fb_info));
2696 l_fb_info->gen.fbhw = &pm3fb_switch;
2697 l_fb_info->board_num = i;
2698 current_par_valid[i] = 0;
2699 slot[i] = -1;
2700 func[i] = -1;
2701 bus[i] = -1;
2702 disable[i] = 0;
2703 noaccel[i] = 0;
2704 fontn[i][0] = '\0';
2705 depth[i] = 0;
2706 l_fb_info->current_par = &(current_par[i]);
2707 }
2708
2709 /* eat up prefix pm3fb and whatever is used as separator i.e. :,= */
2710 if (!strncmp(options, "pm3fb", 5)) {
2711 options += 5;
2712 while (((*options) == ',') || ((*options) == ':')
2713 || ((*options) == '='))
2714 options++;
2715 }
2716
2717 while (options) {
2718 bn = 0;
2719 if ((next = strchr(options, ','))) {
2720 (*next) = '\0';
2721 next++;
2722 }
2723
2724 if (!strncmp(options, "mode:", 5)) {
2725 options = pm3fb_boardnum_setup(options + 5, &bn);
2726 DPRINTK(2, "Setting mode for board #%ld\n", bn);
2727 pm3fb_mode_setup(options, bn);
2728 } else if (!strncmp(options, "off:", 4)) {
2729 options = pm3fb_boardnum_setup(options + 4, &bn);
2730 DPRINTK(2, "Disabling board #%ld\n", bn);
2731 disable[bn] = 1;
2732 } else if (!strncmp(options, "off", 3)) { /* disable everything */
2733 for (i = 0; i < PM3_MAX_BOARD; i++)
2734 disable[i] = 1;
2735 } else if (!strncmp(options, "disable:", 8)) {
2736 options = pm3fb_boardnum_setup(options + 8, &bn);
2737 DPRINTK(2, "Disabling board #%ld\n", bn);
2738 disable[bn] = 1;
2739 } else if (!strncmp(options, "pciid:", 6)) {
2740 options = pm3fb_boardnum_setup(options + 6, &bn);
2741 DPRINTK(2, "Setting PciID for board #%ld\n", bn);
2742 pm3fb_pciid_setup(options, bn);
2743 } else if (!strncmp(options, "noaccel:", 8)) {
2744 options = pm3fb_boardnum_setup(options + 8, &bn);
2745 noaccel[bn] = 1;
2746 } else if (!strncmp(options, "font:", 5)) {
2747 options = pm3fb_boardnum_setup(options + 5, &bn);
2748 pm3fb_font_setup(options, bn);
2749 } else if (!strncmp(options, "depth:", 6)) {
2750 options = pm3fb_boardnum_setup(options + 6, &bn);
2751 pm3fb_bootdepth_setup(options, bn);
2752 } else if (!strncmp(options, "printtimings", 12)) {
2753 printtimings = 1;
2754 } else if (!strncmp(options, "flatpanel:", 10)) {
2755 options = pm3fb_boardnum_setup(options + 10, &bn);
2756 flatpanel[bn] = 1;
2757 } else if (!strncmp(options, "forcesize:", 10)) {
2758 options = pm3fb_boardnum_setup(options + 10, &bn);
2759 pm3fb_forcesize_setup(options, bn);
2760 }
2761 options = next;
2762 }
2763 }
2764
2765 /* ********************************************** */
2766 /* ***** framebuffer API standard functions ***** */
2767 /* ********************************************** */
2768
2769 static int pm3fb_encode_fix(struct fb_fix_screeninfo *fix,
2770 const void *par, struct fb_info_gen *info)
2771 {
2772 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
2773 struct pm3fb_par *p = (struct pm3fb_par *) par;
2774
2775 DTRACE;
2776
2777 strcpy(fix->id, permedia3_name);
2778 fix->smem_start = (unsigned long)l_fb_info->p_fb;
2779 fix->smem_len = l_fb_info->fb_size;
2780 fix->mmio_start = (unsigned long)l_fb_info->pIOBase;
2781 fix->mmio_len = PM3_REGS_SIZE;
2782 #ifdef PM3FB_USE_ACCEL
2783 if (!(noaccel[l_fb_info->board_num]))
2784 fix->accel = FB_ACCEL_3DLABS_PERMEDIA3;
2785 else
2786 #endif /* PM3FB_USE_ACCEL */
2787 fix->accel = FB_ACCEL_NONE;
2788 fix->type = FB_TYPE_PACKED_PIXELS;
2789 fix->visual =
2790 (p->depth == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
2791 if (current_par_valid[l_fb_info->board_num])
2792 fix->line_length =
2793 l_fb_info->current_par->width *
2794 depth2ByPP(l_fb_info->current_par->depth);
2795 else
2796 fix->line_length = 0;
2797 fix->xpanstep = 64 / depth2bpp(p->depth);
2798 fix->ypanstep = 1;
2799 fix->ywrapstep = 0;
2800 return (0);
2801 }
2802
2803 static int pm3fb_decode_var(const struct fb_var_screeninfo *var,
2804 void *par, struct fb_info_gen *info)
2805 {
2806 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
2807 struct pm3fb_par *p = (struct pm3fb_par *) par;
2808 struct pm3fb_par temp_p;
2809 u32 xres;
2810
2811 DTRACE;
2812
2813 DASSERT((var != NULL), "fb_var_screeninfo* not NULL");
2814 DASSERT((p != NULL), "pm3fb_par* not NULL");
2815 DASSERT((l_fb_info != NULL), "pm3fb_info* not NULL");
2816
2817 memset(&temp_p, 0, sizeof(struct pm3fb_par));
2818 temp_p.width = (var->xres_virtual + 7) & ~7;
2819 temp_p.height = var->yres_virtual;
2820
2821 if (!(depth_supported(var->bits_per_pixel))) /* round unsupported up to a multiple of 8 */
2822 temp_p.depth = depth2bpp(var->bits_per_pixel);
2823 else
2824 temp_p.depth = var->bits_per_pixel;
2825
2826 temp_p.depth = (temp_p.depth > 32) ? 32 : temp_p.depth; /* max 32 */
2827 temp_p.depth = (temp_p.depth == 24) ? 32 : temp_p.depth; /* 24 unsupported, round-up to 32 */
2828
2829 if ((temp_p.depth == 16) && (var->red.length == 5) && (var->green.length == 5) && (var->blue.length == 5))
2830 temp_p.depth = 15; /* RGBA 5551 is stored as depth 15 */
2831
2832 if ((temp_p.depth == 16) && (var->red.length == 4) && (var->green.length == 4) && (var->blue.length == 4))
2833 temp_p.depth = 12; /* RGBA 4444 is stored as depth 12 */
2834
2835
2836 DPRINTK(2,
2837 "xres: %d, yres: %d, vxres: %d, vyres: %d ; xoffset:%d, yoffset: %d\n",
2838 var->xres, var->yres, var->xres_virtual, var->yres_virtual,
2839 var->xoffset, var->yoffset);
2840
2841 xres = (var->xres + 31) & ~31;
2842 if (temp_p.width < xres + var->xoffset)
2843 temp_p.width = xres + var->xoffset;
2844 if (temp_p.height < var->yres + var->yoffset)
2845 temp_p.height = var->yres + var->yoffset;
2846
2847 if (temp_p.width > 2048) {
2848 DPRINTK(1, "virtual width not supported: %u\n",
2849 temp_p.width);
2850 return (-EINVAL);
2851 }
2852 if (var->yres < 200) {
2853 DPRINTK(1, "height not supported: %u\n", (u32) var->yres);
2854 return (-EINVAL);
2855 }
2856 if (temp_p.height < 200 || temp_p.height > 4095) {
2857 DPRINTK(1, "virtual height not supported: %u\n",
2858 temp_p.height);
2859 return (-EINVAL);
2860 }
2861 if (!(depth_supported(temp_p.depth))) {
2862 DPRINTK(1, "depth not supported: %u\n", temp_p.depth);
2863 return (-EINVAL);
2864 }
2865 if ((temp_p.width * temp_p.height * depth2ByPP(temp_p.depth)) >
2866 l_fb_info->fb_size) {
2867 DPRINTK(1, "no memory for screen (%ux%ux%u)\n",
2868 temp_p.width, temp_p.height, temp_p.depth);
2869 return (-EINVAL);
2870 }
2871
2872 if ((!var->pixclock) ||
2873 (!var->right_margin) ||
2874 (!var->hsync_len) ||
2875 (!var->left_margin) ||
2876 (!var->lower_margin) ||
2877 (!var->vsync_len) || (!var->upper_margin)
2878 ) {
2879 unsigned long i = 0, done = 0;
2880 printk(KERN_WARNING "pm3fb: refusing to use a likely wrong timing\n");
2881
2882 while ((mode_base[i].user_mode.width) && !done) {
2883 if ((mode_base[i].user_mode.width == temp_p.width)
2884 && (mode_base[i].user_mode.height ==
2885 temp_p.height)) {
2886 printk(KERN_NOTICE "pm3fb: using close match %s\n",
2887 mode_base[i].name);
2888 temp_p = mode_base[i].user_mode;
2889 done = 1;
2890 }
2891 i++;
2892 }
2893 if (!done)
2894 return (-EINVAL);
2895 } else {
2896 temp_p.pixclock = PICOS2KHZ(var->pixclock);
2897 if (temp_p.pixclock > PM3_MAX_PIXCLOCK) {
2898 DPRINTK(1, "pixclock too high (%uKHz)\n",
2899 temp_p.pixclock);
2900 return (-EINVAL);
2901 }
2902
2903 temp_p.hsstart = var->right_margin;
2904 temp_p.hsend = var->right_margin + var->hsync_len;
2905 temp_p.hbend =
2906 var->right_margin + var->hsync_len + var->left_margin;
2907 temp_p.htotal = xres + temp_p.hbend;
2908
2909 temp_p.vsstart = var->lower_margin;
2910 temp_p.vsend = var->lower_margin + var->vsync_len;
2911 temp_p.vbend =
2912 var->lower_margin + var->vsync_len + var->upper_margin;
2913 temp_p.vtotal = var->yres + temp_p.vbend;
2914
2915 temp_p.stride = temp_p.width;
2916
2917 DPRINTK(2, "Using %d * %d, %d Khz, stride is %08x\n",
2918 temp_p.width, temp_p.height, temp_p.pixclock,
2919 temp_p.stride);
2920
2921 temp_p.base =
2922 pm3fb_Shiftbpp(l_fb_info, temp_p.depth,
2923 (var->yoffset * xres) + var->xoffset);
2924
2925 temp_p.video = 0;
2926
2927 if (var->sync & FB_SYNC_HOR_HIGH_ACT)
2928 temp_p.video |= PM3VideoControl_HSYNC_ACTIVE_HIGH;
2929 else
2930 temp_p.video |= PM3VideoControl_HSYNC_ACTIVE_LOW;
2931
2932 if (var->sync & FB_SYNC_VERT_HIGH_ACT)
2933 temp_p.video |= PM3VideoControl_VSYNC_ACTIVE_HIGH;
2934 else
2935 temp_p.video |= PM3VideoControl_VSYNC_ACTIVE_LOW;
2936
2937 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
2938 DPRINTK(1, "Interlaced mode not supported\n\n");
2939 return (-EINVAL);
2940 }
2941
2942 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE)
2943 temp_p.video |= PM3VideoControl_LINE_DOUBLE_ON;
2944 else
2945 temp_p.video |= PM3VideoControl_LINE_DOUBLE_OFF;
2946
2947 if (var->activate == FB_ACTIVATE_NOW)
2948 temp_p.video |= PM3VideoControl_ENABLE;
2949 else {
2950 temp_p.video |= PM3VideoControl_DISABLE;
2951 DPRINTK(2, "PM3Video disabled\n");
2952 }
2953
2954 switch (temp_p.depth) {
2955 case 8:
2956 temp_p.video |= PM3VideoControl_PIXELSIZE_8BIT;
2957 break;
2958 case 12:
2959 case 15:
2960 case 16:
2961 temp_p.video |= PM3VideoControl_PIXELSIZE_16BIT;
2962 break;
2963 case 32:
2964 temp_p.video |= PM3VideoControl_PIXELSIZE_32BIT;
2965 break;
2966 default:
2967 DPRINTK(1, "Unsupported depth\n");
2968 break;
2969 }
2970 }
2971 (*p) = temp_p;
2972
2973 #ifdef PM3FB_USE_ACCEL
2974 if (var->accel_flags & FB_ACCELF_TEXT)
2975 noaccel[l_fb_info->board_num] = 0;
2976 else
2977 noaccel[l_fb_info->board_num] = 1;
2978 #endif /* PM3FB_USE_ACCEL */
2979
2980 return (0);
2981 }
2982
2983 static void pm3fb_encode_depth(struct fb_var_screeninfo *var, long d)
2984 {
2985 switch (d) {
2986 case 8:
2987 var->red.length = var->green.length = var->blue.length = 8;
2988 var->red.offset = var->green.offset = var->blue.offset = 0;
2989 var->transp.offset = var->transp.length = 0;
2990 break;
2991
2992 case 12:
2993 var->red.offset = 8;
2994 var->red.length = 4;
2995 var->green.offset = 4;
2996 var->green.length = 4;
2997 var->blue.offset = 0;
2998 var->blue.length = 4;
2999 var->transp.offset = 12;
3000 var->transp.length = 4;
3001 break;
3002
3003 case 15:
3004 var->red.offset = 10;
3005 var->red.length = 5;
3006 var->green.offset = 5;
3007 var->green.length = 5;
3008 var->blue.offset = 0;
3009 var->blue.length = 5;
3010 var->transp.offset = 15;
3011 var->transp.length = 1;
3012 break;
3013
3014 case 16:
3015 var->red.offset = 11;
3016 var->red.length = 5;
3017 var->green.offset = 5;
3018 var->green.length = 6;
3019 var->blue.offset = 0;
3020 var->blue.length = 5;
3021 var->transp.offset = var->transp.length = 0;
3022 break;
3023
3024 case 32:
3025 var->transp.offset = 24;
3026 var->red.offset = 16;
3027 var->green.offset = 8;
3028 var->blue.offset = 0;
3029 var->red.length = var->green.length =
3030 var->blue.length = var->transp.length = 8;
3031 break;
3032
3033 default:
3034 DPRINTK(1, "Unsupported depth %ld\n", d);
3035 break;
3036 }
3037 }
3038
3039 static int pm3fb_encode_var(struct fb_var_screeninfo *var,
3040 const void *par, struct fb_info_gen *info)
3041 {
3042 struct pm3fb_par *p = (struct pm3fb_par *) par;
3043 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3044
3045 u32 base;
3046
3047 DTRACE;
3048
3049 DASSERT((var != NULL), "fb_var_screeninfo* not NULL");
3050 DASSERT((p != NULL), "pm3fb_par* not NULL");
3051 DASSERT((info != NULL), "fb_info_gen* not NULL");
3052
3053 memset(var, 0, sizeof(struct fb_var_screeninfo));
3054
3055 #ifdef PM3FB_USE_ACCEL
3056 if (!(noaccel[l_fb_info->board_num]))
3057 var->accel_flags |= FB_ACCELF_TEXT;
3058 #endif /* PM3FB_USE_ACCEL */
3059
3060 var->xres_virtual = p->width;
3061 var->yres_virtual = p->height;
3062 var->xres = p->htotal - p->hbend;
3063 var->yres = p->vtotal - p->vbend;
3064
3065 DPRINTK(2, "xres = %d, yres : %d\n", var->xres, var->yres);
3066
3067 var->right_margin = p->hsstart;
3068 var->hsync_len = p->hsend - p->hsstart;
3069 var->left_margin = p->hbend - p->hsend;
3070 var->lower_margin = p->vsstart;
3071 var->vsync_len = p->vsend - p->vsstart;
3072 var->upper_margin = p->vbend - p->vsend;
3073 var->bits_per_pixel = depth2bpp(p->depth);
3074
3075 pm3fb_encode_depth(var, p->depth);
3076
3077 base = pm3fb_Unshiftbpp(l_fb_info, p->depth, p->base);
3078
3079 var->xoffset = base % var->xres;
3080 var->yoffset = base / var->xres;
3081
3082 var->height = var->width = -1;
3083
3084 var->pixclock = KHZ2PICOS(p->pixclock);
3085
3086 if ((p->video & PM3VideoControl_HSYNC_MASK) ==
3087 PM3VideoControl_HSYNC_ACTIVE_HIGH)
3088 var->sync |= FB_SYNC_HOR_HIGH_ACT;
3089 if ((p->video & PM3VideoControl_VSYNC_MASK) ==
3090 PM3VideoControl_VSYNC_ACTIVE_HIGH)
3091 var->sync |= FB_SYNC_VERT_HIGH_ACT;
3092 if (p->video & PM3VideoControl_LINE_DOUBLE_ON)
3093 var->vmode = FB_VMODE_DOUBLE;
3094
3095 return (0);
3096 }
3097
3098 static void pm3fb_get_par(void *par, struct fb_info_gen *info)
3099 {
3100 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3101
3102 DTRACE;
3103
3104 if (!current_par_valid[l_fb_info->board_num]) {
3105 if (l_fb_info->use_current)
3106 pm3fb_read_mode(l_fb_info, l_fb_info->current_par);
3107 else
3108 memcpy(l_fb_info->current_par,
3109 &(mode_base[0].user_mode),
3110 sizeof(struct pm3fb_par));
3111 current_par_valid[l_fb_info->board_num] = 1;
3112 }
3113 *((struct pm3fb_par *) par) = *(l_fb_info->current_par);
3114 }
3115
3116 static void pm3fb_set_par(const void *par, struct fb_info_gen *info)
3117 {
3118 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3119
3120 DTRACE;
3121
3122 *(l_fb_info->current_par) = *((struct pm3fb_par *) par);
3123 current_par_valid[l_fb_info->board_num] = 1;
3124
3125 pm3fb_write_mode(l_fb_info);
3126
3127 #ifdef PM3FB_USE_ACCEL
3128 pm3fb_init_engine(l_fb_info);
3129 #endif /* PM3FB_USE_ACCEL */
3130 }
3131
3132 static void pm3fb_set_color(struct pm3fb_info *l_fb_info,
3133 unsigned char regno, unsigned char r,
3134 unsigned char g, unsigned char b)
3135 {
3136 DTRACE;
3137
3138 PM3_SLOW_WRITE_REG(PM3RD_PaletteWriteAddress, regno);
3139 PM3_SLOW_WRITE_REG(PM3RD_PaletteData, r);
3140 PM3_SLOW_WRITE_REG(PM3RD_PaletteData, g);
3141 PM3_SLOW_WRITE_REG(PM3RD_PaletteData, b);
3142 }
3143
3144 static int pm3fb_getcolreg(unsigned regno, unsigned *red, unsigned *green,
3145 unsigned *blue, unsigned *transp,
3146 struct fb_info *info)
3147 {
3148 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3149
3150 DTRACE;
3151
3152 if (regno < 256) {
3153 *red =
3154 l_fb_info->palette[regno].red << 8 | l_fb_info->
3155 palette[regno].red;
3156 *green =
3157 l_fb_info->palette[regno].green << 8 | l_fb_info->
3158 palette[regno].green;
3159 *blue =
3160 l_fb_info->palette[regno].blue << 8 | l_fb_info->
3161 palette[regno].blue;
3162 *transp =
3163 l_fb_info->palette[regno].transp << 8 | l_fb_info->
3164 palette[regno].transp;
3165 }
3166 return (regno > 255);
3167 }
3168
3169 static int pm3fb_setcolreg(unsigned regno, unsigned red, unsigned green,
3170 unsigned blue, unsigned transp,
3171 struct fb_info *info)
3172 {
3173 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3174
3175 DTRACE;
3176
3177 if (regno < 16) {
3178 switch (l_fb_info->current_par->depth) {
3179 #ifdef FBCON_HAS_CFB8
3180 case 8:
3181 break;
3182 #endif
3183 #ifdef FBCON_HAS_CFB16
3184 case 12:
3185 l_fb_info->cmap.cmap12[regno] =
3186 (((u32) red & 0xf000) >> 4) |
3187 (((u32) green & 0xf000) >> 8) |
3188 (((u32) blue & 0xf000) >> 12);
3189 break;
3190
3191 case 15:
3192 l_fb_info->cmap.cmap15[regno] =
3193 (((u32) red & 0xf800) >> 1) |
3194 (((u32) green & 0xf800) >> 6) |
3195 (((u32) blue & 0xf800) >> 11);
3196 break;
3197
3198 case 16:
3199 l_fb_info->cmap.cmap16[regno] =
3200 ((u32) red & 0xf800) |
3201 (((u32) green & 0xfc00) >> 5) |
3202 (((u32) blue & 0xf800) >> 11);
3203 break;
3204 #endif
3205 #ifdef FBCON_HAS_CFB32
3206 case 32:
3207 l_fb_info->cmap.cmap32[regno] =
3208 (((u32) transp & 0xff00) << 16) |
3209 (((u32) red & 0xff00) << 8) |
3210 (((u32) green & 0xff00)) |
3211 (((u32) blue & 0xff00) >> 8);
3212 break;
3213 #endif
3214 default:
3215 DPRINTK(1, "bad depth %u\n",
3216 l_fb_info->current_par->depth);
3217 break;
3218 }
3219 }
3220 if (regno < 256) {
3221 l_fb_info->palette[regno].red = red >> 8;
3222 l_fb_info->palette[regno].green = green >> 8;
3223 l_fb_info->palette[regno].blue = blue >> 8;
3224 l_fb_info->palette[regno].transp = transp >> 8;
3225 if (l_fb_info->current_par->depth == 8)
3226 pm3fb_set_color(l_fb_info, regno, red >> 8,
3227 green >> 8, blue >> 8);
3228 }
3229 return (regno > 255);
3230 }
3231
3232 static int pm3fb_blank(int blank_mode, struct fb_info_gen *info)
3233 {
3234 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3235 u32 video;
3236
3237 DTRACE;
3238
3239 if (!current_par_valid[l_fb_info->board_num])
3240 return (1);
3241
3242 video = l_fb_info->current_par->video;
3243
3244 /*
3245 * Oxygen VX1 - it appears that setting PM3VideoControl and
3246 * then PM3RD_SyncControl to the same SYNC settings undoes
3247 * any net change - they seem to xor together. Only set the
3248 * sync options in PM3RD_SyncControl. --rmk
3249 */
3250 video &= ~(PM3VideoControl_HSYNC_MASK |
3251 PM3VideoControl_VSYNC_MASK);
3252 video |= PM3VideoControl_HSYNC_ACTIVE_HIGH |
3253 PM3VideoControl_VSYNC_ACTIVE_HIGH;
3254
3255 if (blank_mode > 0) {
3256 switch (blank_mode - 1) {
3257
3258 case VESA_NO_BLANKING: /* FIXME */
3259 video = video & ~(PM3VideoControl_ENABLE);
3260 break;
3261
3262 case VESA_HSYNC_SUSPEND:
3263 video = video & ~(PM3VideoControl_HSYNC_MASK |
3264 PM3VideoControl_BLANK_ACTIVE_LOW);
3265 break;
3266 case VESA_VSYNC_SUSPEND:
3267 video = video & ~(PM3VideoControl_VSYNC_MASK |
3268 PM3VideoControl_BLANK_ACTIVE_LOW);
3269 break;
3270 case VESA_POWERDOWN:
3271 video = video & ~(PM3VideoControl_HSYNC_MASK |
3272 PM3VideoControl_VSYNC_MASK |
3273 PM3VideoControl_BLANK_ACTIVE_LOW);
3274 break;
3275 default:
3276 DPRINTK(1, "Unsupported blanking %d\n",
3277 blank_mode);
3278 return (1);
3279 break;
3280 }
3281 }
3282
3283 PM3_SLOW_WRITE_REG(PM3VideoControl, video);
3284
3285 return (0);
3286 }
3287
3288 static void pm3fb_set_disp(const void *par, struct display *disp,
3289 struct fb_info_gen *info)
3290 {
3291 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3292 struct pm3fb_par *p = (struct pm3fb_par *) par;
3293 u32 flags;
3294
3295 DTRACE;
3296
3297 local_irq_save(flags);
3298 info->info.screen_base = l_fb_info->v_fb;
3299 switch (p->depth) {
3300 #ifdef FBCON_HAS_CFB8
3301 case 8:
3302 #ifdef PM3FB_USE_ACCEL
3303 if (!(noaccel[l_fb_info->board_num]))
3304 disp->dispsw = &pm3fb_cfb8;
3305 else
3306 #endif /* PM3FB_USE_ACCEL */
3307 disp->dispsw = &fbcon_cfb8;
3308 break;
3309 #endif
3310 #ifdef FBCON_HAS_CFB16
3311 case 12:
3312 #ifdef PM3FB_USE_ACCEL
3313 if (!(noaccel[l_fb_info->board_num]))
3314 disp->dispsw = &pm3fb_cfb16;
3315 else
3316 #endif /* PM3FB_USE_ACCEL */
3317 disp->dispsw = &fbcon_cfb16;
3318 disp->dispsw_data = l_fb_info->cmap.cmap12;
3319 break;
3320 case 15:
3321 #ifdef PM3FB_USE_ACCEL
3322 if (!(noaccel[l_fb_info->board_num]))
3323 disp->dispsw = &pm3fb_cfb16;
3324 else
3325 #endif /* PM3FB_USE_ACCEL */
3326 disp->dispsw = &fbcon_cfb16;
3327 disp->dispsw_data = l_fb_info->cmap.cmap15;
3328 break;
3329 case 16:
3330 #ifdef PM3FB_USE_ACCEL
3331 if (!(noaccel[l_fb_info->board_num]))
3332 disp->dispsw = &pm3fb_cfb16;
3333 else
3334 #endif /* PM3FB_USE_ACCEL */
3335 disp->dispsw = &fbcon_cfb16;
3336 disp->dispsw_data = l_fb_info->cmap.cmap16;
3337 break;
3338 #endif
3339 #ifdef FBCON_HAS_CFB32
3340 case 32:
3341 #ifdef PM3FB_USE_ACCEL
3342 if (!(noaccel[l_fb_info->board_num]))
3343 disp->dispsw = &pm3fb_cfb32;
3344 else
3345 #endif /* PM3FB_USE_ACCEL */
3346 disp->dispsw = &fbcon_cfb32;
3347 disp->dispsw_data = l_fb_info->cmap.cmap32;
3348 break;
3349 #endif /* FBCON_HAS_CFB32 */
3350 default:
3351 disp->dispsw = &fbcon_dummy;
3352 DPRINTK(1, "Invalid depth, using fbcon_dummy\n");
3353 break;
3354 }
3355 local_irq_restore(flags);
3356 }
3357
3358 /* */
3359 static void pm3fb_detect(void)
3360 {
3361 struct pci_dev *dev_array[PM3_MAX_BOARD];
3362 struct pci_dev *dev = NULL;
3363 struct pm3fb_info *l_fb_info = &(fb_info[0]);
3364 unsigned long i, j, done;
3365
3366 DTRACE;
3367
3368 for (i = 0; i < PM3_MAX_BOARD; i++) {
3369 dev_array[i] = NULL;
3370 fb_info[i].dev = NULL;
3371 }
3372
3373 dev =
3374 pci_find_device(PCI_VENDOR_ID_3DLABS,
3375 PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev);
3376
3377 for (i = 0; ((i < PM3_MAX_BOARD) && dev); i++) {
3378 dev_array[i] = dev;
3379 dev =
3380 pci_find_device(PCI_VENDOR_ID_3DLABS,
3381 PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev);
3382 }
3383
3384 if (dev) { /* more than PM3_MAX_BOARD */
3385 printk(KERN_WARNING "pm3fb: Warning: more than %d boards found\n",
3386 PM3_MAX_BOARD);
3387 }
3388
3389 if (!dev_array[0]) { /* not a single board, abort */
3390 return;
3391 }
3392
3393 /* allocate user-defined boards */
3394 for (i = 0; i < PM3_MAX_BOARD; i++) {
3395 if ((bus[i] >= 0) && (slot[i] >= 0) && (func[i] >= 0)) {
3396 for (j = 0; j < PM3_MAX_BOARD; j++) {
3397 if ((dev_array[j] != NULL) &&
3398 (dev_array[j]->bus->number == bus[i])
3399 && (PCI_SLOT(dev_array[j]->devfn) ==
3400 slot[i])
3401 && (PCI_FUNC(dev_array[j]->devfn) ==
3402 func[i])) {
3403 fb_info[i].dev = dev_array[j];
3404 dev_array[j] = NULL;
3405 }
3406 }
3407 }
3408 }
3409 /* allocate remaining boards */
3410 for (i = 0; i < PM3_MAX_BOARD; i++) {
3411 if (fb_info[i].dev == NULL) {
3412 done = 0;
3413 for (j = 0; ((j < PM3_MAX_BOARD) && (!done)); j++) {
3414 if (dev_array[j] != NULL) {
3415 fb_info[i].dev = dev_array[j];
3416 dev_array[j] = NULL;
3417 done = 1;
3418 }
3419 }
3420 }
3421 }
3422
3423 /* at that point, all PCI Permedia3 are detected and allocated */
3424 /* now, initialize... or not */
3425 for (i = 0; i < PM3_MAX_BOARD; i++) {
3426 l_fb_info = &(fb_info[i]);
3427 if ((l_fb_info->dev) && (!disable[i])) { /* PCI device was found and not disabled by user */
3428 #ifdef SUPPORT_FB_OF
3429 struct device_node *dp =
3430 find_pci_device_OFnode(l_fb_info->dev->bus->
3431 number,
3432 l_fb_info->dev->devfn);
3433
3434 if ((dp) && (!strncmp(dp->name, "formacGA12", 10))) {
3435 /* do nothing, init of board is done in pm3fb_of_init */
3436 } else {
3437 #endif
3438 DPRINTK(2,
3439 "found @%lx Vendor %lx Device %lx ; base @ : %lx - %lx - %lx - %lx - %lx - %lx, irq %ld\n",
3440 (unsigned long) l_fb_info->dev,
3441 (unsigned long) l_fb_info->dev->
3442 vendor,
3443 (unsigned long) l_fb_info->dev->
3444 device,
3445 (unsigned long)
3446 pci_resource_start(l_fb_info->dev,
3447 0),
3448 (unsigned long)
3449 pci_resource_start(l_fb_info->dev,
3450 1),
3451 (unsigned long)
3452 pci_resource_start(l_fb_info->dev,
3453 2),
3454 (unsigned long)
3455 pci_resource_start(l_fb_info->dev,
3456 3),
3457 (unsigned long)
3458 pci_resource_start(l_fb_info->dev,
3459 4),
3460 (unsigned long)
3461 pci_resource_start(l_fb_info->dev,
3462 5),
3463 (unsigned long) l_fb_info->dev->
3464 irq);
3465
3466 l_fb_info->pIOBase =
3467 (unsigned char *)
3468 pci_resource_start(l_fb_info->dev, 0);
3469 #ifdef __BIG_ENDIAN
3470 l_fb_info->pIOBase += PM3_REGS_SIZE;
3471 #endif
3472 l_fb_info->vIOBase = (unsigned char *) -1;
3473 l_fb_info->p_fb =
3474 (unsigned char *)
3475 pci_resource_start(l_fb_info->dev, 1);
3476 l_fb_info->v_fb = (unsigned char *) -1;
3477
3478 #if (defined KERNEL_2_4) || (defined KERNEL_2_5) /* full resource management, new in linux-2.4.x */
3479 if (!request_mem_region
3480 ((unsigned long)l_fb_info->p_fb, 64 * 1024 * 1024, /* request full aperture size */
3481 "pm3fb")) {
3482 printk
3483 (KERN_ERR "pm3fb: Error: couldn't request framebuffer memory, board #%ld\n",
3484 l_fb_info->board_num);
3485 continue;
3486 }
3487 if (!request_mem_region
3488 ((unsigned long)l_fb_info->pIOBase, PM3_REGS_SIZE,
3489 "pm3fb I/O regs")) {
3490 printk
3491 (KERN_ERR "pm3fb: Error: couldn't request IObase memory, board #%ld\n",
3492 l_fb_info->board_num);
3493 continue;
3494 }
3495 #endif /* KERNEL_2_4 or KERNEL_2_5 */
3496 if (forcesize[l_fb_info->board_num])
3497 l_fb_info->fb_size = forcesize[l_fb_info->board_num];
3498
3499 l_fb_info->fb_size =
3500 pm3fb_size_memory(l_fb_info);
3501
3502 if (l_fb_info->fb_size) {
3503 (void) pci_enable_device(l_fb_info->dev);
3504 pm3fb_common_init(l_fb_info);
3505 } else
3506 printk(KERN_ERR "pm3fb: memory problem, not enabling board #%ld\n", l_fb_info->board_num);
3507
3508 #ifdef SUPPORT_FB_OF
3509 }
3510 #endif /* SUPPORT_FB_OF */
3511 }
3512 }
3513 }
3514
3515 static int pm3fb_pan_display(const struct fb_var_screeninfo *var,
3516 struct fb_info_gen *info)
3517 {
3518 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3519
3520 DTRACE;
3521
3522 if (!current_par_valid[l_fb_info->board_num])
3523 return -EINVAL;
3524
3525 l_fb_info->current_par->base = /* in 128 bits chunk - i.e. AFTER Shiftbpp */
3526 pm3fb_Shiftbpp(l_fb_info,
3527 l_fb_info->current_par->depth,
3528 (var->yoffset * l_fb_info->current_par->width) +
3529 var->xoffset);
3530 PM3_SLOW_WRITE_REG(PM3ScreenBase, l_fb_info->current_par->base);
3531 return 0;
3532 }
3533
3534 static int pm3fb_ioctl(struct inode *inode, struct file *file,
3535 u_int cmd, u_long arg, int con,
3536 struct fb_info *info)
3537 {
3538 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3539 u32 cm, i;
3540 #ifdef PM3FB_MASTER_DEBUG
3541 char cc[3];
3542 #endif /* PM3FB_MASTER_DEBUG */
3543
3544 switch(cmd)
3545 {
3546 #ifdef PM3FB_MASTER_DEBUG
3547 case PM3FBIO_CLEARMEMORY:
3548 if (copy_from_user(&cm, (void *)arg, sizeof(u32)))
3549 return(-EFAULT);
3550 pm3fb_clear_memory(l_fb_info, cm);
3551 return(0);
3552 break;
3553
3554 case PM3FBIO_CLEARCMAP:
3555 if (copy_from_user(cc, (void*)arg, 3 * sizeof(char)))
3556 return(-EFAULT);
3557 pm3fb_clear_colormap(l_fb_info, cc[0], cc[1], cc[2]);
3558 return(0);
3559 break;
3560 #endif /* PM3FB_MASTER_DEBUG */
3561
3562 case PM3FBIO_RESETCHIP:
3563 cm = 1;
3564 PM3_SLOW_WRITE_REG(PM3ResetStatus, 1);
3565 for (i = 0 ; (i < 10000) && cm ; i++)
3566 {
3567 PM3_DELAY(10);
3568 cm = PM3_READ_REG(PM3ResetStatus);
3569 }
3570 if (cm)
3571 {
3572 printk(KERN_ERR "pm3fb: chip reset failed with status 0x%x\n", cm);
3573 return(-EIO);
3574 }
3575 /* first thing first, reload memory timings */
3576 pm3fb_write_memory_timings(l_fb_info);
3577 #ifdef PM3FB_USE_ACCEL
3578 pm3fb_init_engine(l_fb_info);
3579 #endif /* PM3FB_USE_ACCEL */
3580 pm3fb_write_mode(l_fb_info);
3581 return(0);
3582 break;
3583
3584 default:
3585 DPRINTK(2, "unknown ioctl: %d (%x)\n", cmd, cmd);
3586 return(-EINVAL);
3587 }
3588 }
3589
3590 /* ****************************************** */
3591 /* ***** standard FB API init functions ***** */
3592 /* ****************************************** */
3593
3594 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
3595 int __init pm3fb_setup(char *options)
3596 #endif
3597 #ifdef KERNEL_2_2
3598 __initfunc(void pm3fb_setup(char *options, int *ints))
3599 #endif
3600 {
3601 long opsi = strlen(options);
3602
3603 DTRACE;
3604
3605 memcpy(g_options, options,
3606 ((opsi + 1) >
3607 PM3_OPTIONS_SIZE) ? PM3_OPTIONS_SIZE : (opsi + 1));
3608 g_options[PM3_OPTIONS_SIZE - 1] = 0;
3609
3610 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
3611 return (0);
3612 #endif
3613 }
3614
3615 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
3616 int __init pm3fb_init(void)
3617 #endif
3618 #ifdef KERNEL_2_2
3619 __initfunc(void pm3fb_init(void))
3620 #endif
3621 {
3622 DTRACE;
3623
3624 DPRINTK(2, "This is pm3fb.c, CVS version: $Header: /cvsroot/linux/drivers/video/pm3fb.c,v 1.1 2002/02/25 19:11:06 marcelo Exp $");
3625
3626 pm3fb_real_setup(g_options);
3627
3628 pm3fb_detect();
3629
3630 if (!fb_info[0].dev) { /* not even one board ??? */
3631 DPRINTK(1, "No PCI Permedia3 board detected\n");
3632 }
3633 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
3634 return (0);
3635 #endif
3636 }
3637
3638 #ifdef SUPPORT_FB_OF /* linux-2.2.x only */
3639 __initfunc(void pm3fb_of_init(struct device_node *dp))
3640 {
3641 struct pm3fb_info *l_fb_info = NULL;
3642 unsigned long i;
3643 long bn = -1;
3644 struct device_node *dn;
3645
3646 DTRACE;
3647
3648 DPRINTK(2, "OpenFirmware board : %s\n", dp->full_name);
3649
3650 for (i = 0; i < dp->n_addrs; i++) {
3651 DPRINTK(2, "MemRange : 0x%08x - 0x%x\n",
3652 dp->addrs[i].address, dp->addrs[i].size);
3653 }
3654
3655 for (i = 0; i < PM3_MAX_BOARD; i++) { /* find which PCI board is the OF device */
3656 if (fb_info[i].dev) {
3657 dn = find_pci_device_OFnode(fb_info[i].dev->bus->
3658 number,
3659 fb_info[i].dev->devfn);
3660 if (dn == dp) {
3661 if (bn == -1)
3662 bn = i;
3663 else {
3664 DPRINTK(1,
3665 "Error: Multiple PCI device for a single OpenFirmware node\n");
3666 }
3667 }
3668 }
3669 }
3670
3671 if (bn == -1) {
3672 DPRINTK(1, "Warning: non-PCI Permedia3 found\n");
3673 i = 0;
3674 while (fb_info[i].dev && (i < PM3_MAX_BOARD))
3675 i++;
3676 if (i < PM3_MAX_BOARD)
3677 bn = i;
3678 else {
3679 printk
3680 (KERN_ERR "pm3fb: Error: Couldn't find room for OpenFirmware device");
3681 return;
3682 }
3683 }
3684
3685 l_fb_info = &(fb_info[bn]);
3686
3687 l_fb_info->dn = dp;
3688
3689 l_fb_info->pIOBase = (unsigned char *) dp->addrs[3].address;
3690 #ifdef __BIG_ENDIAN
3691 l_fb_info->pIOBase += PM3_REGS_SIZE;
3692 #endif
3693 l_fb_info->vIOBase = (unsigned char *) -1;
3694 l_fb_info->p_fb = (unsigned char *) dp->addrs[1].address;
3695 l_fb_info->v_fb = (unsigned char *) -1;
3696
3697 l_fb_info->fb_size = pm3fb_size_memory(l_fb_info); /* (unsigned long)dp->addrs[1].size; *//* OF is a liar ! it claims 256 Mb */
3698
3699 DPRINTK(2,
3700 "OpenFirmware board (#%ld) : IOBase 0x%08lx, p_fb 0x%08lx, fb_size %d KB\n",
3701 bn, (unsigned long) l_fb_info->pIOBase,
3702 (unsigned long) l_fb_info->p_fb, l_fb_info->fb_size >> 10);
3703
3704 l_fb_info->use_current = 1; /* will use current mode by default */
3705
3706 pm3fb_common_init(l_fb_info);
3707 }
3708 #endif /* SUPPORT_FB_OF */
3709
3710 /* ************************* */
3711 /* **** Module support ***** */
3712 /* ************************* */
3713
3714 #ifdef MODULE
3715 MODULE_AUTHOR("Romain Dolbeau");
3716 MODULE_DESCRIPTION("Permedia3 framebuffer device driver");
3717 static char *mode[PM3_MAX_BOARD];
3718 MODULE_PARM(mode,PM3_MAX_BOARD_MODULE_ARRAY_STRING);
3719 MODULE_PARM_DESC(mode,"video mode");
3720 MODULE_PARM(disable,PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3721 MODULE_PARM_DESC(disable,"disable board");
3722 static short off[PM3_MAX_BOARD];
3723 MODULE_PARM(off,PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3724 MODULE_PARM_DESC(off,"disable board");
3725 static char *pciid[PM3_MAX_BOARD];
3726 MODULE_PARM(pciid,PM3_MAX_BOARD_MODULE_ARRAY_STRING);
3727 MODULE_PARM_DESC(pciid,"board PCI Id");
3728 MODULE_PARM(noaccel,PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3729 MODULE_PARM_DESC(noaccel,"disable accel");
3730 static char *font[PM3_MAX_BOARD];
3731 MODULE_PARM(font,PM3_MAX_BOARD_MODULE_ARRAY_STRING);
3732 MODULE_PARM_DESC(font,"choose font");
3733 MODULE_PARM(depth,PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3734 MODULE_PARM_DESC(depth,"boot-time depth");
3735 MODULE_PARM(printtimings, "h");
3736 MODULE_PARM_DESC(printtimings, "print the memory timings of the card(s)");
3737 MODULE_PARM(forcesize, PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3738 MODULE_PARM_DESC(forcesize, "force specified memory size");
3739 /*
3740 MODULE_SUPPORTED_DEVICE("Permedia3 PCI boards")
3741 MODULE_GENERIC_TABLE(gtype,name)
3742 MODULE_DEVICE_TABLE(type,name)
3743 */
3744
3745 void pm3fb_build_options(void)
3746 {
3747 int i;
3748 char ts[128];
3749
3750 strcpy(g_options, "pm3fb");
3751 for (i = 0; i < PM3_MAX_BOARD ; i++)
3752 {
3753 if (mode[i])
3754 {
3755 sprintf(ts, ",mode:%d:%s", i, mode[i]);
3756 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3757 }
3758 if (disable[i] || off[i])
3759 {
3760 sprintf(ts, ",disable:%d:", i);
3761 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3762 }
3763 if (pciid[i])
3764 {
3765 sprintf(ts, ",pciid:%d:%s", i, pciid[i]);
3766 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3767 }
3768 if (noaccel[i])
3769 {
3770 sprintf(ts, ",noaccel:%d:", i);
3771 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3772 }
3773 if (font[i])
3774 {
3775 sprintf(ts, ",font:%d:%s", i, font[i]);
3776 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3777 }
3778 if (depth[i])
3779 {
3780 sprintf(ts, ",depth:%d:%d", i, depth[i]);
3781 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3782 }
3783 }
3784 g_options[PM3_OPTIONS_SIZE - 1] = '\0';
3785 DPRINTK(1, "pm3fb use options: %s\n", g_options);
3786 }
3787
3788 int init_module(void)
3789 {
3790 DTRACE;
3791
3792 pm3fb_build_options();
3793
3794 pm3fb_init();
3795
3796 return (0);
3797 }
3798
3799 void cleanup_module(void)
3800 {
3801 DTRACE;
3802 {
3803 unsigned long i;
3804 struct pm3fb_info *l_fb_info;
3805 for (i = 0; i < PM3_MAX_BOARD; i++) {
3806 l_fb_info = &(fb_info[i]);
3807 if ((l_fb_info->dev != NULL)
3808 && (!(disable[l_fb_info->board_num]))) {
3809 if (l_fb_info->vIOBase !=
3810 (unsigned char *) -1) {
3811 pm3fb_unmapIO(l_fb_info);
3812 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
3813 release_mem_region(l_fb_info->p_fb,
3814 l_fb_info->
3815 fb_size);
3816 release_mem_region(l_fb_info->
3817 pIOBase,
3818 PM3_REGS_SIZE);
3819 #endif /* KERNEL_2_4 or KERNEL_2_5 */
3820 }
3821 unregister_framebuffer(&l_fb_info->gen.
3822 info);
3823 }
3824 }
3825 }
3826 return;
3827 }
3828 #endif /* MODULE */
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