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Coarsly sort out 32-bit-only, 64-bit-only and ``portable'' MIPS lib/
[linux-2.6/linux-mips.git] / drivers / video / controlfb.c
blob6cd228f485aa2069806daa989fa08bd7ece9cdab
1 /*
2 * controlfb.c -- frame buffer device for the PowerMac 'control' display
3 *
4 * Created 12 July 1998 by Dan Jacobowitz <dan@debian.org>
5 * Copyright (C) 1998 Dan Jacobowitz
6 * Copyright (C) 2001 Takashi Oe
7 *
8 * Mmap code by Michel Lanners <mlan@cpu.lu>
9 *
10 * Frame buffer structure from:
11 * drivers/video/chipsfb.c -- frame buffer device for
12 * Chips & Technologies 65550 chip.
13 *
14 * Copyright (C) 1998 Paul Mackerras
15 *
16 * This file is derived from the Powermac "chips" driver:
17 * Copyright (C) 1997 Fabio Riccardi.
18 * And from the frame buffer device for Open Firmware-initialized devices:
19 * Copyright (C) 1997 Geert Uytterhoeven.
20 *
21 * Hardware information from:
22 * control.c: Console support for PowerMac "control" display adaptor.
23 * Copyright (C) 1996 Paul Mackerras
24 *
25 * Updated to 2.5 framebuffer API by Ben Herrenschmidt
26 * <benh@kernel.crashing.org>, Paul Mackerras <paulus@samba.org>,
27 * and James Simmons <jsimmons@infradead.org>.
28 *
29 * This file is subject to the terms and conditions of the GNU General Public
30 * License. See the file COPYING in the main directory of this archive for
31 * more details.
32 */
33
34 #include <linux/config.h>
35 #include <linux/module.h>
36 #include <linux/kernel.h>
37 #include <linux/errno.h>
38 #include <linux/string.h>
39 #include <linux/mm.h>
40 #include <linux/tty.h>
41 #include <linux/slab.h>
42 #include <linux/vmalloc.h>
43 #include <linux/delay.h>
44 #include <linux/interrupt.h>
45 #include <linux/fb.h>
46 #include <linux/init.h>
47 #include <linux/pci.h>
48 #include <linux/nvram.h>
49 #include <linux/adb.h>
50 #include <linux/cuda.h>
51 #include <asm/io.h>
52 #include <asm/prom.h>
53 #include <asm/pgtable.h>
54 #include <asm/btext.h>
55
56 #include "macmodes.h"
57 #include "controlfb.h"
58
59 struct fb_par_control {
60 int vmode, cmode;
61 int xres, yres;
62 int vxres, vyres;
63 int xoffset, yoffset;
64 int pitch;
65 struct control_regvals regvals;
66 unsigned long sync;
67 unsigned char ctrl;
68 };
69
70 #define DIRTY(z) ((x)->z != (y)->z)
71 #define DIRTY_CMAP(z) (memcmp(&((x)->z), &((y)->z), sizeof((y)->z)))
72 static inline int PAR_EQUAL(struct fb_par_control *x, struct fb_par_control *y)
73 {
74 int i, results;
75
76 results = 1;
77 for (i = 0; i < 3; i++)
78 results &= !DIRTY(regvals.clock_params[i]);
79 if (!results)
80 return 0;
81 for (i = 0; i < 16; i++)
82 results &= !DIRTY(regvals.regs[i]);
83 if (!results)
84 return 0;
85 return (!DIRTY(cmode) && !DIRTY(xres) && !DIRTY(yres)
86 && !DIRTY(vxres) && !DIRTY(vyres));
87 }
88 static inline int VAR_MATCH(struct fb_var_screeninfo *x, struct fb_var_screeninfo *y)
89 {
90 return (!DIRTY(bits_per_pixel) && !DIRTY(xres)
91 && !DIRTY(yres) && !DIRTY(xres_virtual)
92 && !DIRTY(yres_virtual)
93 && !DIRTY_CMAP(red) && !DIRTY_CMAP(green) && !DIRTY_CMAP(blue));
94 }
95
96 struct fb_info_control {
97 struct fb_info info;
98 struct fb_par_control par;
99 u32 pseudo_palette[17];
100
101 struct cmap_regs *cmap_regs;
102 unsigned long cmap_regs_phys;
103
104 struct control_regs *control_regs;
105 unsigned long control_regs_phys;
106 unsigned long control_regs_size;
107
108 __u8 *frame_buffer;
109 unsigned long frame_buffer_phys;
110 unsigned long fb_orig_base;
111 unsigned long fb_orig_size;
112
113 int control_use_bank2;
114 unsigned long total_vram;
115 unsigned char vram_attr;
116 };
117
118 /* control register access macro */
119 #define CNTRL_REG(INFO,REG) (&(((INFO)->control_regs->REG).r))
120
121
122 /******************** Prototypes for exported functions ********************/
123 /*
124 * struct fb_ops
125 */
126 static int controlfb_pan_display(struct fb_var_screeninfo *var,
127 struct fb_info *info);
128 static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
129 u_int transp, struct fb_info *info);
130 static int controlfb_blank(int blank_mode, struct fb_info *info);
131 static int controlfb_mmap(struct fb_info *info, struct file *file,
132 struct vm_area_struct *vma);
133 static int controlfb_set_par (struct fb_info *info);
134 static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info);
135
136 /*
137 * inititialization
138 */
139 int control_init(void);
140 void control_setup(char *);
141
142 /******************** Prototypes for internal functions **********************/
143
144 static void set_control_clock(unsigned char *params);
145 static int init_control(struct fb_info_control *p);
146 static void control_set_hardware(struct fb_info_control *p,
147 struct fb_par_control *par);
148 static int control_of_init(struct device_node *dp);
149 static void find_vram_size(struct fb_info_control *p);
150 static int read_control_sense(struct fb_info_control *p);
151 static int calc_clock_params(unsigned long clk, unsigned char *param);
152 static int control_var_to_par(struct fb_var_screeninfo *var,
153 struct fb_par_control *par, const struct fb_info *fb_info);
154 static inline void control_par_to_var(struct fb_par_control *par,
155 struct fb_var_screeninfo *var);
156 static void control_init_info(struct fb_info *info, struct fb_info_control *p);
157 static void control_cleanup(void);
158
159
160 /************************** Internal variables *******************************/
161
162 static struct fb_info_control *control_fb;
163
164 static int default_vmode __initdata = VMODE_NVRAM;
165 static int default_cmode __initdata = CMODE_NVRAM;
166
167
168 static struct fb_ops controlfb_ops = {
169 .owner = THIS_MODULE,
170 .fb_check_var = controlfb_check_var,
171 .fb_set_par = controlfb_set_par,
172 .fb_setcolreg = controlfb_setcolreg,
173 .fb_pan_display = controlfb_pan_display,
174 .fb_blank = controlfb_blank,
175 .fb_mmap = controlfb_mmap,
176 .fb_fillrect = cfb_fillrect,
177 .fb_copyarea = cfb_copyarea,
178 .fb_imageblit = cfb_imageblit,
179 .fb_cursor = soft_cursor,
180 };
181
182
183 /******************** The functions for controlfb_ops ********************/
184
185 #ifdef MODULE
186 MODULE_LICENSE("GPL");
187
188 int init_module(void)
189 {
190 struct device_node *dp;
191
192 dp = find_devices("control");
193 if (dp != 0 && !control_of_init(dp))
194 return 0;
195
196 return -ENXIO;
197 }
198
199 void cleanup_module(void)
200 {
201 control_cleanup();
202 }
203 #endif
204
205 /*
206 * Checks a var structure
207 */
208 static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info)
209 {
210 struct fb_par_control par;
211 int err;
212
213 err = control_var_to_par(var, &par, info);
214 if (err)
215 return err;
216 control_par_to_var(&par, var);
217
218 return 0;
219 }
220
221 /*
222 * Applies current var to display
223 */
224 static int controlfb_set_par (struct fb_info *info)
225 {
226 struct fb_info_control *p = (struct fb_info_control *) info;
227 struct fb_par_control par;
228 int err;
229
230 if((err = control_var_to_par(&info->var, &par, info))) {
231 printk (KERN_ERR "controlfb_set_par: error calling"
232 " control_var_to_par: %d.\n", err);
233 return err;
234 }
235
236 control_set_hardware(p, &par);
237
238 info->fix.visual = (p->par.cmode == CMODE_8) ?
239 FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR;
240 info->fix.line_length = p->par.pitch;
241 info->fix.xpanstep = 32 >> p->par.cmode;
242 info->fix.ypanstep = 1;
243
244 return 0;
245 }
246
247 /*
248 * Set screen start address according to var offset values
249 */
250 static inline void set_screen_start(int xoffset, int yoffset,
251 struct fb_info_control *p)
252 {
253 struct fb_par_control *par = &p->par;
254
255 par->xoffset = xoffset;
256 par->yoffset = yoffset;
257 out_le32(CNTRL_REG(p,start_addr),
258 par->yoffset * par->pitch + (par->xoffset << par->cmode));
259 }
260
261
262 static int controlfb_pan_display(struct fb_var_screeninfo *var,
263 struct fb_info *info)
264 {
265 unsigned int xoffset, hstep;
266 struct fb_info_control *p = (struct fb_info_control *)info;
267 struct fb_par_control *par = &p->par;
268
269 /*
270 * make sure start addr will be 32-byte aligned
271 */
272 hstep = 0x1f >> par->cmode;
273 xoffset = (var->xoffset + hstep) & ~hstep;
274
275 if (xoffset+par->xres > par->vxres ||
276 var->yoffset+par->yres > par->vyres)
277 return -EINVAL;
278
279 set_screen_start(xoffset, var->yoffset, p);
280
281 return 0;
282 }
283
284
285 /*
286 * Private mmap since we want to have a different caching on the framebuffer
287 * for controlfb.
288 * Note there's no locking in here; it's done in fb_mmap() in fbmem.c.
289 */
290 static int controlfb_mmap(struct fb_info *info, struct file *file,
291 struct vm_area_struct *vma)
292 {
293 unsigned long off, start;
294 u32 len;
295
296 off = vma->vm_pgoff << PAGE_SHIFT;
297
298 /* frame buffer memory */
299 start = info->fix.smem_start;
300 len = PAGE_ALIGN((start & ~PAGE_MASK)+info->fix.smem_len);
301 if (off >= len) {
302 /* memory mapped io */
303 off -= len;
304 if (info->var.accel_flags)
305 return -EINVAL;
306 start = info->fix.mmio_start;
307 len = PAGE_ALIGN((start & ~PAGE_MASK)+info->fix.mmio_len);
308 pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE|_PAGE_GUARDED;
309 } else {
310 /* framebuffer */
311 pgprot_val(vma->vm_page_prot) |= _PAGE_WRITETHRU;
312 }
313 start &= PAGE_MASK;
314 if ((vma->vm_end - vma->vm_start + off) > len)
315 return -EINVAL;
316 off += start;
317 vma->vm_pgoff = off >> PAGE_SHIFT;
318 if (io_remap_page_range(vma, vma->vm_start, off,
319 vma->vm_end - vma->vm_start, vma->vm_page_prot))
320 return -EAGAIN;
321
322 return 0;
323 }
324
325 static int controlfb_blank(int blank_mode, struct fb_info *info)
326 {
327 struct fb_info_control *p = (struct fb_info_control *) info;
328 unsigned ctrl;
329
330 ctrl = ld_le32(CNTRL_REG(p,ctrl));
331 if (blank_mode > 0)
332 switch (blank_mode - 1) {
333 case VESA_VSYNC_SUSPEND:
334 ctrl &= ~3;
335 break;
336 case VESA_HSYNC_SUSPEND:
337 ctrl &= ~0x30;
338 break;
339 case VESA_POWERDOWN:
340 ctrl &= ~0x33;
341 /* fall through */
342 case VESA_NO_BLANKING:
343 ctrl |= 0x400;
344 break;
345 default:
346 break;
347 }
348 else {
349 ctrl &= ~0x400;
350 ctrl |= 0x33;
351 }
352 out_le32(CNTRL_REG(p,ctrl), ctrl);
353
354 return 0;
355 }
356
357 static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
358 u_int transp, struct fb_info *info)
359 {
360 struct fb_info_control *p = (struct fb_info_control *) info;
361 __u8 r, g, b;
362
363 if (regno > 255)
364 return 1;
365
366 r = red >> 8;
367 g = green >> 8;
368 b = blue >> 8;
369
370 out_8(&p->cmap_regs->addr, regno); /* tell clut what addr to fill */
371 out_8(&p->cmap_regs->lut, r); /* send one color channel at */
372 out_8(&p->cmap_regs->lut, g); /* a time... */
373 out_8(&p->cmap_regs->lut, b);
374
375 if (regno < 16) {
376 int i;
377 switch (p->par.cmode) {
378 case CMODE_16:
379 p->pseudo_palette[regno] =
380 (regno << 10) | (regno << 5) | regno;
381 break;
382 case CMODE_32:
383 i = (regno << 8) | regno;
384 p->pseudo_palette[regno] = (i << 16) | i;
385 break;
386 }
387 }
388
389 return 0;
390 }
391
392
393 /******************** End of controlfb_ops implementation ******************/
394
395
396
397 static void set_control_clock(unsigned char *params)
398 {
399 #ifdef CONFIG_ADB_CUDA
400 struct adb_request req;
401 int i;
402
403 for (i = 0; i < 3; ++i) {
404 cuda_request(&req, NULL, 5, CUDA_PACKET, CUDA_GET_SET_IIC,
405 0x50, i + 1, params[i]);
406 while (!req.complete)
407 cuda_poll();
408 }
409 #endif
410 }
411
412
413 /*
414 * finish off the driver initialization and register
415 */
416 static int __init init_control(struct fb_info_control *p)
417 {
418 int full, sense, vmode, cmode, vyres;
419 struct fb_var_screeninfo var;
420 int rc;
421
422 printk(KERN_INFO "controlfb: ");
423
424 full = p->total_vram == 0x400000;
425
426 /* Try to pick a video mode out of NVRAM if we have one. */
427 if (default_cmode == CMODE_NVRAM){
428 cmode = nvram_read_byte(NV_CMODE);
429 if(cmode < CMODE_8 || cmode > CMODE_32)
430 cmode = CMODE_8;
431 } else
432 cmode=default_cmode;
433
434 if (default_vmode == VMODE_NVRAM) {
435 vmode = nvram_read_byte(NV_VMODE);
436 if (vmode < 1 || vmode > VMODE_MAX ||
437 control_mac_modes[vmode - 1].m[full] < cmode) {
438 sense = read_control_sense(p);
439 printk("Monitor sense value = 0x%x, ", sense);
440 vmode = mac_map_monitor_sense(sense);
441 if (control_mac_modes[vmode - 1].m[full] < cmode)
442 vmode = VMODE_640_480_60;
443 }
444 } else {
445 vmode=default_vmode;
446 if (control_mac_modes[vmode - 1].m[full] < cmode) {
447 if (cmode > CMODE_8)
448 cmode--;
449 else
450 vmode = VMODE_640_480_60;
451 }
452 }
453
454 /* Initialize info structure */
455 control_init_info(&p->info, p);
456
457 /* Setup default var */
458 if (mac_vmode_to_var(vmode, cmode, &var) < 0) {
459 /* This shouldn't happen! */
460 printk("mac_vmode_to_var(%d, %d,) failed\n", vmode, cmode);
461 try_again:
462 vmode = VMODE_640_480_60;
463 cmode = CMODE_8;
464 if (mac_vmode_to_var(vmode, cmode, &var) < 0) {
465 printk(KERN_ERR "controlfb: mac_vmode_to_var() failed\n");
466 return -ENXIO;
467 }
468 printk(KERN_INFO "controlfb: ");
469 }
470 printk("using video mode %d and color mode %d.\n", vmode, cmode);
471
472 vyres = (p->total_vram - CTRLFB_OFF) / (var.xres << cmode);
473 if (vyres > var.yres)
474 var.yres_virtual = vyres;
475
476 /* Apply default var */
477 var.activate = FB_ACTIVATE_NOW;
478 rc = fb_set_var(&var, &p->info);
479 if (rc && (vmode != VMODE_640_480_60 || cmode != CMODE_8))
480 goto try_again;
481
482 /* Register with fbdev layer */
483 if (register_framebuffer(&p->info) < 0)
484 return -ENXIO;
485
486 printk(KERN_INFO "fb%d: control display adapter\n", p->info.node);
487
488 return 0;
489 }
490
491 #define RADACAL_WRITE(a,d) \
492 out_8(&p->cmap_regs->addr, (a)); \
493 out_8(&p->cmap_regs->dat, (d))
494
495 /* Now how about actually saying, Make it so! */
496 /* Some things in here probably don't need to be done each time. */
497 static void control_set_hardware(struct fb_info_control *p, struct fb_par_control *par)
498 {
499 struct control_regvals *r;
500 volatile struct preg *rp;
501 int i, cmode;
502
503 if (PAR_EQUAL(&p->par, par)) {
504 /*
505 * check if only xoffset or yoffset differs.
506 * this prevents flickers in typical VT switch case.
507 */
508 if (p->par.xoffset != par->xoffset ||
509 p->par.yoffset != par->yoffset)
510 set_screen_start(par->xoffset, par->yoffset, p);
511
512 return;
513 }
514
515 p->par = *par;
516 cmode = p->par.cmode;
517 r = &par->regvals;
518
519 /* Turn off display */
520 out_le32(CNTRL_REG(p,ctrl), 0x400 | par->ctrl);
521
522 set_control_clock(r->clock_params);
523
524 RADACAL_WRITE(0x20, r->radacal_ctrl);
525 RADACAL_WRITE(0x21, p->control_use_bank2 ? 0 : 1);
526 RADACAL_WRITE(0x10, 0);
527 RADACAL_WRITE(0x11, 0);
528
529 rp = &p->control_regs->vswin;
530 for (i = 0; i < 16; ++i, ++rp)
531 out_le32(&rp->r, r->regs[i]);
532
533 out_le32(CNTRL_REG(p,pitch), par->pitch);
534 out_le32(CNTRL_REG(p,mode), r->mode);
535 out_le32(CNTRL_REG(p,vram_attr), p->vram_attr);
536 out_le32(CNTRL_REG(p,start_addr), par->yoffset * par->pitch
537 + (par->xoffset << cmode));
538 out_le32(CNTRL_REG(p,rfrcnt), 0x1e5);
539 out_le32(CNTRL_REG(p,intr_ena), 0);
540
541 /* Turn on display */
542 out_le32(CNTRL_REG(p,ctrl), par->ctrl);
543
544 #ifdef CONFIG_BOOTX_TEXT
545 btext_update_display(p->frame_buffer_phys + CTRLFB_OFF,
546 p->par.xres, p->par.yres,
547 (cmode == CMODE_32? 32: cmode == CMODE_16? 16: 8),
548 p->par.pitch);
549 #endif /* CONFIG_BOOTX_TEXT */
550 }
551
552
553 /*
554 * Called from fbmem.c for probing & initializing
555 */
556 int __init control_init(void)
557 {
558 struct device_node *dp;
559
560 dp = find_devices("control");
561 if (dp != 0 && !control_of_init(dp))
562 return 0;
563
564 return -ENXIO;
565 }
566
567
568 /* Work out which banks of VRAM we have installed. */
569 /* danj: I guess the card just ignores writes to nonexistant VRAM... */
570
571 static void __init find_vram_size(struct fb_info_control *p)
572 {
573 int bank1, bank2;
574
575 /*
576 * Set VRAM in 2MB (bank 1) mode
577 * VRAM Bank 2 will be accessible through offset 0x600000 if present
578 * and VRAM Bank 1 will not respond at that offset even if present
579 */
580 out_le32(CNTRL_REG(p,vram_attr), 0x31);
581
582 out_8(&p->frame_buffer[0x600000], 0xb3);
583 out_8(&p->frame_buffer[0x600001], 0x71);
584 asm volatile("eieio; dcbf 0,%0" : : "r" (&p->frame_buffer[0x600000])
585 : "memory" );
586 mb();
587 asm volatile("eieio; dcbi 0,%0" : : "r" (&p->frame_buffer[0x600000])
588 : "memory" );
589 mb();
590
591 bank2 = (in_8(&p->frame_buffer[0x600000]) == 0xb3)
592 && (in_8(&p->frame_buffer[0x600001]) == 0x71);
593
594 /*
595 * Set VRAM in 2MB (bank 2) mode
596 * VRAM Bank 1 will be accessible through offset 0x000000 if present
597 * and VRAM Bank 2 will not respond at that offset even if present
598 */
599 out_le32(CNTRL_REG(p,vram_attr), 0x39);
600
601 out_8(&p->frame_buffer[0], 0x5a);
602 out_8(&p->frame_buffer[1], 0xc7);
603 asm volatile("eieio; dcbf 0,%0" : : "r" (&p->frame_buffer[0])
604 : "memory" );
605 mb();
606 asm volatile("eieio; dcbi 0,%0" : : "r" (&p->frame_buffer[0])
607 : "memory" );
608 mb();
609
610 bank1 = (in_8(&p->frame_buffer[0]) == 0x5a)
611 && (in_8(&p->frame_buffer[1]) == 0xc7);
612
613 if (bank2) {
614 if (!bank1) {
615 /*
616 * vram bank 2 only
617 */
618 p->control_use_bank2 = 1;
619 p->vram_attr = 0x39;
620 p->frame_buffer += 0x600000;
621 p->frame_buffer_phys += 0x600000;
622 } else {
623 /*
624 * 4 MB vram
625 */
626 p->vram_attr = 0x51;
627 }
628 } else {
629 /*
630 * vram bank 1 only
631 */
632 p->vram_attr = 0x31;
633 }
634
635 p->total_vram = (bank1 + bank2) * 0x200000;
636
637 printk(KERN_INFO "controlfb: VRAM Total = %dMB "
638 "(%dMB @ bank 1, %dMB @ bank 2)\n",
639 (bank1 + bank2) << 1, bank1 << 1, bank2 << 1);
640 }
641
642
643 /*
644 * find "control" and initialize
645 */
646 static int __init control_of_init(struct device_node *dp)
647 {
648 struct fb_info_control *p;
649 unsigned long addr;
650 int i;
651
652 if (control_fb) {
653 printk(KERN_ERR "controlfb: only one control is supported\n");
654 return -ENXIO;
655 }
656 if(dp->n_addrs != 2) {
657 printk(KERN_ERR "expecting 2 address for control (got %d)", dp->n_addrs);
658 return -ENXIO;
659 }
660 p = kmalloc(sizeof(*p), GFP_KERNEL);
661 if (p == 0)
662 return -ENXIO;
663 control_fb = p; /* save it for cleanups */
664 memset(p, 0, sizeof(*p));
665
666 /* Map in frame buffer and registers */
667 for (i = 0; i < dp->n_addrs; ++i) {
668 addr = dp->addrs[i].address;
669 if (dp->addrs[i].size >= 0x800000) {
670 p->fb_orig_base = addr;
671 p->fb_orig_size = dp->addrs[i].size;
672 /* use the big-endian aperture (??) */
673 p->frame_buffer_phys = addr + 0x800000;
674 } else {
675 p->control_regs_phys = addr;
676 p->control_regs_size = dp->addrs[i].size;
677 }
678 }
679
680 if (!p->fb_orig_base ||
681 !request_mem_region(p->fb_orig_base,p->fb_orig_size,"controlfb")) {
682 p->fb_orig_base = 0;
683 goto error_out;
684 }
685 /* map at most 8MB for the frame buffer */
686 p->frame_buffer = __ioremap(p->frame_buffer_phys, 0x800000,
687 _PAGE_WRITETHRU);
688
689 if (!p->control_regs_phys ||
690 !request_mem_region(p->control_regs_phys, p->control_regs_size,
691 "controlfb regs")) {
692 p->control_regs_phys = 0;
693 goto error_out;
694 }
695 p->control_regs = ioremap(p->control_regs_phys, p->control_regs_size);
696
697 p->cmap_regs_phys = 0xf301b000; /* XXX not in prom? */
698 if (!request_mem_region(p->cmap_regs_phys, 0x1000, "controlfb cmap")) {
699 p->cmap_regs_phys = 0;
700 goto error_out;
701 }
702 p->cmap_regs = ioremap(p->cmap_regs_phys, 0x1000);
703
704 if (!p->cmap_regs || !p->control_regs || !p->frame_buffer)
705 goto error_out;
706
707 find_vram_size(p);
708 if (!p->total_vram)
709 goto error_out;
710
711 if (init_control(p) < 0)
712 goto error_out;
713
714 return 0;
715
716 error_out:
717 control_cleanup();
718 return -ENXIO;
719 }
720
721 /*
722 * Get the monitor sense value.
723 * Note that this can be called before calibrate_delay,
724 * so we can't use udelay.
725 */
726 static int read_control_sense(struct fb_info_control *p)
727 {
728 int sense;
729
730 out_le32(CNTRL_REG(p,mon_sense), 7); /* drive all lines high */
731 __delay(200);
732 out_le32(CNTRL_REG(p,mon_sense), 077); /* turn off drivers */
733 __delay(2000);
734 sense = (in_le32(CNTRL_REG(p,mon_sense)) & 0x1c0) << 2;
735
736 /* drive each sense line low in turn and collect the other 2 */
737 out_le32(CNTRL_REG(p,mon_sense), 033); /* drive A low */
738 __delay(2000);
739 sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0xc0) >> 2;
740 out_le32(CNTRL_REG(p,mon_sense), 055); /* drive B low */
741 __delay(2000);
742 sense |= ((in_le32(CNTRL_REG(p,mon_sense)) & 0x100) >> 5)
743 | ((in_le32(CNTRL_REG(p,mon_sense)) & 0x40) >> 4);
744 out_le32(CNTRL_REG(p,mon_sense), 066); /* drive C low */
745 __delay(2000);
746 sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0x180) >> 7;
747
748 out_le32(CNTRL_REG(p,mon_sense), 077); /* turn off drivers */
749
750 return sense;
751 }
752
753 /********************** Various translation functions **********************/
754
755 #define CONTROL_PIXCLOCK_BASE 256016
756 #define CONTROL_PIXCLOCK_MIN 5000 /* ~ 200 MHz dot clock */
757
758 /*
759 * calculate the clock paramaters to be sent to CUDA according to given
760 * pixclock in pico second.
761 */
762 static int calc_clock_params(unsigned long clk, unsigned char *param)
763 {
764 unsigned long p0, p1, p2, k, l, m, n, min;
765
766 if (clk > (CONTROL_PIXCLOCK_BASE << 3))
767 return 1;
768
769 p2 = ((clk << 4) < CONTROL_PIXCLOCK_BASE)? 3: 2;
770 l = clk << p2;
771 p0 = 0;
772 p1 = 0;
773 for (k = 1, min = l; k < 32; k++) {
774 unsigned long rem;
775
776 m = CONTROL_PIXCLOCK_BASE * k;
777 n = m / l;
778 rem = m % l;
779 if (n && (n < 128) && rem < min) {
780 p0 = k;
781 p1 = n;
782 min = rem;
783 }
784 }
785 if (!p0 || !p1)
786 return 1;
787
788 param[0] = p0;
789 param[1] = p1;
790 param[2] = p2;
791
792 return 0;
793 }
794
795
796 /*
797 * This routine takes a user-supplied var, and picks the best vmode/cmode
798 * from it.
799 */
800
801 static int control_var_to_par(struct fb_var_screeninfo *var,
802 struct fb_par_control *par, const struct fb_info *fb_info)
803 {
804 int cmode, piped_diff, hstep;
805 unsigned hperiod, hssync, hsblank, hesync, heblank, piped, heq, hlfln,
806 hserr, vperiod, vssync, vesync, veblank, vsblank, vswin, vewin;
807 unsigned long pixclock;
808 struct fb_info_control *p = (struct fb_info_control *) fb_info;
809 struct control_regvals *r = &par->regvals;
810
811 switch (var->bits_per_pixel) {
812 case 8:
813 par->cmode = CMODE_8;
814 if (p->total_vram > 0x200000) {
815 r->mode = 3;
816 r->radacal_ctrl = 0x20;
817 piped_diff = 13;
818 } else {
819 r->mode = 2;
820 r->radacal_ctrl = 0x10;
821 piped_diff = 9;
822 }
823 break;
824 case 15:
825 case 16:
826 par->cmode = CMODE_16;
827 if (p->total_vram > 0x200000) {
828 r->mode = 2;
829 r->radacal_ctrl = 0x24;
830 piped_diff = 5;
831 } else {
832 r->mode = 1;
833 r->radacal_ctrl = 0x14;
834 piped_diff = 3;
835 }
836 break;
837 case 32:
838 par->cmode = CMODE_32;
839 if (p->total_vram > 0x200000) {
840 r->mode = 1;
841 r->radacal_ctrl = 0x28;
842 } else {
843 r->mode = 0;
844 r->radacal_ctrl = 0x18;
845 }
846 piped_diff = 1;
847 break;
848 default:
849 return -EINVAL;
850 }
851
852 /*
853 * adjust xres and vxres so that the corresponding memory widths are
854 * 32-byte aligned
855 */
856 hstep = 31 >> par->cmode;
857 par->xres = (var->xres + hstep) & ~hstep;
858 par->vxres = (var->xres_virtual + hstep) & ~hstep;
859 par->xoffset = (var->xoffset + hstep) & ~hstep;
860 if (par->vxres < par->xres)
861 par->vxres = par->xres;
862 par->pitch = par->vxres << par->cmode;
863
864 par->yres = var->yres;
865 par->vyres = var->yres_virtual;
866 par->yoffset = var->yoffset;
867 if (par->vyres < par->yres)
868 par->vyres = par->yres;
869
870 par->sync = var->sync;
871
872 if (par->pitch * par->vyres + CTRLFB_OFF > p->total_vram)
873 return -EINVAL;
874
875 if (par->xoffset + par->xres > par->vxres)
876 par->xoffset = par->vxres - par->xres;
877 if (par->yoffset + par->yres > par->vyres)
878 par->yoffset = par->vyres - par->yres;
879
880 pixclock = (var->pixclock < CONTROL_PIXCLOCK_MIN)? CONTROL_PIXCLOCK_MIN:
881 var->pixclock;
882 if (calc_clock_params(pixclock, r->clock_params))
883 return -EINVAL;
884
885 hperiod = ((var->left_margin + par->xres + var->right_margin
886 + var->hsync_len) >> 1) - 2;
887 hssync = hperiod + 1;
888 hsblank = hssync - (var->right_margin >> 1);
889 hesync = (var->hsync_len >> 1) - 1;
890 heblank = (var->left_margin >> 1) + hesync;
891 piped = heblank - piped_diff;
892 heq = var->hsync_len >> 2;
893 hlfln = (hperiod+2) >> 1;
894 hserr = hssync-hesync;
895 vperiod = (var->vsync_len + var->lower_margin + par->yres
896 + var->upper_margin) << 1;
897 vssync = vperiod - 2;
898 vesync = (var->vsync_len << 1) - vperiod + vssync;
899 veblank = (var->upper_margin << 1) + vesync;
900 vsblank = vssync - (var->lower_margin << 1);
901 vswin = (vsblank+vssync) >> 1;
902 vewin = (vesync+veblank) >> 1;
903
904 r->regs[0] = vswin;
905 r->regs[1] = vsblank;
906 r->regs[2] = veblank;
907 r->regs[3] = vewin;
908 r->regs[4] = vesync;
909 r->regs[5] = vssync;
910 r->regs[6] = vperiod;
911 r->regs[7] = piped;
912 r->regs[8] = hperiod;
913 r->regs[9] = hsblank;
914 r->regs[10] = heblank;
915 r->regs[11] = hesync;
916 r->regs[12] = hssync;
917 r->regs[13] = heq;
918 r->regs[14] = hlfln;
919 r->regs[15] = hserr;
920
921 if (par->xres >= 1280 && par->cmode >= CMODE_16)
922 par->ctrl = 0x7f;
923 else
924 par->ctrl = 0x3b;
925
926 if (mac_var_to_vmode(var, &par->vmode, &cmode))
927 par->vmode = 0;
928
929 return 0;
930 }
931
932
933 /*
934 * Convert hardware data in par to an fb_var_screeninfo
935 */
936
937 static void control_par_to_var(struct fb_par_control *par, struct fb_var_screeninfo *var)
938 {
939 struct control_regints *rv;
940
941 rv = (struct control_regints *) par->regvals.regs;
942
943 memset(var, 0, sizeof(*var));
944 var->xres = par->xres;
945 var->yres = par->yres;
946 var->xres_virtual = par->vxres;
947 var->yres_virtual = par->vyres;
948 var->xoffset = par->xoffset;
949 var->yoffset = par->yoffset;
950
951 switch(par->cmode) {
952 default:
953 case CMODE_8:
954 var->bits_per_pixel = 8;
955 var->red.length = 8;
956 var->green.length = 8;
957 var->blue.length = 8;
958 break;
959 case CMODE_16: /* RGB 555 */
960 var->bits_per_pixel = 16;
961 var->red.offset = 10;
962 var->red.length = 5;
963 var->green.offset = 5;
964 var->green.length = 5;
965 var->blue.length = 5;
966 break;
967 case CMODE_32: /* RGB 888 */
968 var->bits_per_pixel = 32;
969 var->red.offset = 16;
970 var->red.length = 8;
971 var->green.offset = 8;
972 var->green.length = 8;
973 var->blue.length = 8;
974 var->transp.offset = 24;
975 var->transp.length = 8;
976 break;
977 }
978 var->height = -1;
979 var->width = -1;
980 var->vmode = FB_VMODE_NONINTERLACED;
981
982 var->left_margin = (rv->heblank - rv->hesync) << 1;
983 var->right_margin = (rv->hssync - rv->hsblank) << 1;
984 var->hsync_len = (rv->hperiod + 2 - rv->hssync + rv->hesync) << 1;
985
986 var->upper_margin = (rv->veblank - rv->vesync) >> 1;
987 var->lower_margin = (rv->vssync - rv->vsblank) >> 1;
988 var->vsync_len = (rv->vperiod - rv->vssync + rv->vesync) >> 1;
989
990 var->sync = par->sync;
991
992 /*
993 * 10^12 * clock_params[0] / (3906400 * clock_params[1]
994 * * 2^clock_params[2])
995 * (10^12 * clock_params[0] / (3906400 * clock_params[1]))
996 * >> clock_params[2]
997 */
998 /* (255990.17 * clock_params[0] / clock_params[1]) >> clock_params[2] */
999 var->pixclock = CONTROL_PIXCLOCK_BASE * par->regvals.clock_params[0];
1000 var->pixclock /= par->regvals.clock_params[1];
1001 var->pixclock >>= par->regvals.clock_params[2];
1002 }
1003
1004 /*
1005 * Set misc info vars for this driver
1006 */
1007 static void __init control_init_info(struct fb_info *info, struct fb_info_control *p)
1008 {
1009 /* Fill fb_info */
1010 info->par = &p->par;
1011 info->fbops = &controlfb_ops;
1012 info->pseudo_palette = p->pseudo_palette;
1013 info->flags = FBINFO_FLAG_DEFAULT;
1014 info->screen_base = (char *) p->frame_buffer + CTRLFB_OFF;
1015
1016 fb_alloc_cmap(&info->cmap, 256, 0);
1017
1018 /* Fill fix common fields */
1019 strcpy(info->fix.id, "control");
1020 info->fix.mmio_start = p->control_regs_phys;
1021 info->fix.mmio_len = sizeof(struct control_regs);
1022 info->fix.type = FB_TYPE_PACKED_PIXELS;
1023 info->fix.smem_start = p->frame_buffer_phys + CTRLFB_OFF;
1024 info->fix.smem_len = p->total_vram - CTRLFB_OFF;
1025 info->fix.ywrapstep = 0;
1026 info->fix.type_aux = 0;
1027 info->fix.accel = FB_ACCEL_NONE;
1028 }
1029
1030
1031 static void control_cleanup(void)
1032 {
1033 struct fb_info_control *p = control_fb;
1034
1035 if (!p)
1036 return;
1037
1038 if (p->cmap_regs)
1039 iounmap(p->cmap_regs);
1040 if (p->control_regs)
1041 iounmap(p->control_regs);
1042 if (p->frame_buffer) {
1043 if (p->control_use_bank2)
1044 p->frame_buffer -= 0x600000;
1045 iounmap(p->frame_buffer);
1046 }
1047 if (p->cmap_regs_phys)
1048 release_mem_region(p->cmap_regs_phys, 0x1000);
1049 if (p->control_regs_phys)
1050 release_mem_region(p->control_regs_phys, p->control_regs_size);
1051 if (p->fb_orig_base)
1052 release_mem_region(p->fb_orig_base, p->fb_orig_size);
1053 kfree(p);
1054 }
1055
1056
1057 /*
1058 * Parse user speficied options (`video=controlfb:')
1059 */
1060 void __init control_setup(char *options)
1061 {
1062 char *this_opt;
1063
1064 if (!options || !*options)
1065 return;
1066
1067 while ((this_opt = strsep(&options, ",")) != NULL) {
1068 if (!strncmp(this_opt, "vmode:", 6)) {
1069 int vmode = simple_strtoul(this_opt+6, NULL, 0);
1070 if (vmode > 0 && vmode <= VMODE_MAX &&
1071 control_mac_modes[vmode - 1].m[1] >= 0)
1072 default_vmode = vmode;
1073 } else if (!strncmp(this_opt, "cmode:", 6)) {
1074 int depth = simple_strtoul(this_opt+6, NULL, 0);
1075 switch (depth) {
1076 case CMODE_8:
1077 case CMODE_16:
1078 case CMODE_32:
1079 default_cmode = depth;
1080 break;
1081 case 8:
1082 default_cmode = CMODE_8;
1083 break;
1084 case 15:
1085 case 16:
1086 default_cmode = CMODE_16;
1087 break;
1088 case 24:
1089 case 32:
1090 default_cmode = CMODE_32;
1091 break;
1092 }
1093 }
1094 }
1095 }
1096
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