2 * Copyright (c) 2001-2002 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 /* this file is part of ehci-hcd.c */
21 #define ehci_dbg(ehci, fmt, args...) \
22 dev_dbg (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
23 #define ehci_err(ehci, fmt, args...) \
24 dev_err (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
25 #define ehci_info(ehci, fmt, args...) \
26 dev_info (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
27 #define ehci_warn(ehci, fmt, args...) \
28 dev_warn (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
30 #ifdef EHCI_VERBOSE_DEBUG
32 # define ehci_vdbg ehci_dbg
34 # define vdbg(fmt,args...) do { } while (0)
35 # define ehci_vdbg(ehci, fmt, args...) do { } while (0)
40 /* check the values in the HCSPARAMS register
41 * (host controller _Structural_ parameters)
42 * see EHCI spec, Table 2-4 for each value
44 static void dbg_hcs_params (struct ehci_hcd
*ehci
, char *label
)
46 u32 params
= readl (&ehci
->caps
->hcs_params
);
49 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
51 HCS_DEBUG_PORT (params
),
52 HCS_INDICATOR (params
) ? " ind" : "",
55 HCS_PORTROUTED (params
) ? "" : " ordered",
56 HCS_PPC (params
) ? "" : " !ppc",
59 /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
60 if (HCS_PORTROUTED (params
)) {
62 char buf
[46], tmp
[7], byte
;
65 for (i
= 0; i
< HCS_N_PORTS (params
); i
++) {
66 // FIXME MIPS won't readb() ...
67 byte
= readb (&ehci
->caps
->portroute
[(i
>>1)]);
69 ((i
& 0x1) ? ((byte
)&0xf) : ((byte
>>4)&0xf)));
72 ehci_dbg (ehci
, "%s portroute %s\n",
78 static inline void dbg_hcs_params (struct ehci_hcd
*ehci
, char *label
) {}
84 /* check the values in the HCCPARAMS register
85 * (host controller _Capability_ parameters)
86 * see EHCI Spec, Table 2-5 for each value
88 static void dbg_hcc_params (struct ehci_hcd
*ehci
, char *label
)
90 u32 params
= readl (&ehci
->caps
->hcc_params
);
92 if (HCC_ISOC_CACHE (params
)) {
94 "%s hcc_params %04x caching frame %s%s%s\n",
96 HCC_PGM_FRAMELISTLEN (params
) ? "256/512/1024" : "1024",
97 HCC_CANPARK (params
) ? " park" : "",
98 HCC_64BIT_ADDR (params
) ? " 64 bit addr" : "");
101 "%s hcc_params %04x thresh %d uframes %s%s%s\n",
104 HCC_ISOC_THRES (params
),
105 HCC_PGM_FRAMELISTLEN (params
) ? "256/512/1024" : "1024",
106 HCC_CANPARK (params
) ? " park" : "",
107 HCC_64BIT_ADDR (params
) ? " 64 bit addr" : "");
112 static inline void dbg_hcc_params (struct ehci_hcd
*ehci
, char *label
) {}
118 static void __attribute__((__unused__
))
119 dbg_qtd (const char *label
, struct ehci_hcd
*ehci
, struct ehci_qtd
*qtd
)
121 ehci_dbg (ehci
, "%s td %p n%08x %08x t%08x p0=%08x\n", label
, qtd
,
122 le32_to_cpup (&qtd
->hw_next
),
123 le32_to_cpup (&qtd
->hw_alt_next
),
124 le32_to_cpup (&qtd
->hw_token
),
125 le32_to_cpup (&qtd
->hw_buf
[0]));
127 ehci_dbg (ehci
, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
128 le32_to_cpup (&qtd
->hw_buf
[1]),
129 le32_to_cpup (&qtd
->hw_buf
[2]),
130 le32_to_cpup (&qtd
->hw_buf
[3]),
131 le32_to_cpup (&qtd
->hw_buf
[4]));
134 static void __attribute__((__unused__
))
135 dbg_qh (const char *label
, struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
137 ehci_dbg (ehci
, "%s qh %p n%08x info %x %x qtd %x\n", label
,
138 qh
, qh
->hw_next
, qh
->hw_info1
, qh
->hw_info2
,
140 dbg_qtd ("overlay", ehci
, (struct ehci_qtd
*) &qh
->hw_qtd_next
);
143 static void __attribute__((__unused__
))
144 dbg_itd (const char *label
, struct ehci_hcd
*ehci
, struct ehci_itd
*itd
)
146 ehci_dbg (ehci
, "%s [%d] itd %p, next %08x, urb %p\n",
147 label
, itd
->frame
, itd
, le32_to_cpu(itd
->hw_next
), itd
->urb
);
149 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
150 le32_to_cpu(itd
->hw_transaction
[0]),
151 le32_to_cpu(itd
->hw_transaction
[1]),
152 le32_to_cpu(itd
->hw_transaction
[2]),
153 le32_to_cpu(itd
->hw_transaction
[3]),
154 le32_to_cpu(itd
->hw_transaction
[4]),
155 le32_to_cpu(itd
->hw_transaction
[5]),
156 le32_to_cpu(itd
->hw_transaction
[6]),
157 le32_to_cpu(itd
->hw_transaction
[7]));
159 " buf: %08x %08x %08x %08x %08x %08x %08x\n",
160 le32_to_cpu(itd
->hw_bufp
[0]),
161 le32_to_cpu(itd
->hw_bufp
[1]),
162 le32_to_cpu(itd
->hw_bufp
[2]),
163 le32_to_cpu(itd
->hw_bufp
[3]),
164 le32_to_cpu(itd
->hw_bufp
[4]),
165 le32_to_cpu(itd
->hw_bufp
[5]),
166 le32_to_cpu(itd
->hw_bufp
[6]));
167 ehci_dbg (ehci
, " index: %d %d %d %d %d %d %d %d\n",
168 itd
->index
[0], itd
->index
[1], itd
->index
[2],
169 itd
->index
[3], itd
->index
[4], itd
->index
[5],
170 itd
->index
[6], itd
->index
[7]);
173 static void __attribute__((__unused__
))
174 dbg_sitd (const char *label
, struct ehci_hcd
*ehci
, struct ehci_sitd
*sitd
)
176 ehci_dbg (ehci
, "%s [%d] sitd %p, next %08x, urb %p\n",
177 label
, sitd
->frame
, sitd
, le32_to_cpu(sitd
->hw_next
), sitd
->urb
);
179 " addr %08x sched %04x result %08x buf %08x %08x\n",
180 le32_to_cpu(sitd
->hw_fullspeed_ep
),
181 le32_to_cpu(sitd
->hw_uframe
),
182 le32_to_cpu(sitd
->hw_results
),
183 le32_to_cpu(sitd
->hw_buf
[0]),
184 le32_to_cpu(sitd
->hw_buf
[1]));
187 static int __attribute__((__unused__
))
188 dbg_status_buf (char *buf
, unsigned len
, const char *label
, u32 status
)
190 return scnprintf (buf
, len
,
191 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
192 label
, label
[0] ? " " : "", status
,
193 (status
& STS_ASS
) ? " Async" : "",
194 (status
& STS_PSS
) ? " Periodic" : "",
195 (status
& STS_RECL
) ? " Recl" : "",
196 (status
& STS_HALT
) ? " Halt" : "",
197 (status
& STS_IAA
) ? " IAA" : "",
198 (status
& STS_FATAL
) ? " FATAL" : "",
199 (status
& STS_FLR
) ? " FLR" : "",
200 (status
& STS_PCD
) ? " PCD" : "",
201 (status
& STS_ERR
) ? " ERR" : "",
202 (status
& STS_INT
) ? " INT" : ""
206 static int __attribute__((__unused__
))
207 dbg_intr_buf (char *buf
, unsigned len
, const char *label
, u32 enable
)
209 return scnprintf (buf
, len
,
210 "%s%sintrenable %02x%s%s%s%s%s%s",
211 label
, label
[0] ? " " : "", enable
,
212 (enable
& STS_IAA
) ? " IAA" : "",
213 (enable
& STS_FATAL
) ? " FATAL" : "",
214 (enable
& STS_FLR
) ? " FLR" : "",
215 (enable
& STS_PCD
) ? " PCD" : "",
216 (enable
& STS_ERR
) ? " ERR" : "",
217 (enable
& STS_INT
) ? " INT" : ""
221 static const char *const fls_strings
[] =
222 { "1024", "512", "256", "??" };
225 dbg_command_buf (char *buf
, unsigned len
, const char *label
, u32 command
)
227 return scnprintf (buf
, len
,
228 "%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
229 label
, label
[0] ? " " : "", command
,
230 (command
& CMD_PARK
) ? "park" : "(park)",
231 CMD_PARK_CNT (command
),
232 (command
>> 16) & 0x3f,
233 (command
& CMD_LRESET
) ? " LReset" : "",
234 (command
& CMD_IAAD
) ? " IAAD" : "",
235 (command
& CMD_ASE
) ? " Async" : "",
236 (command
& CMD_PSE
) ? " Periodic" : "",
237 fls_strings
[(command
>> 2) & 0x3],
238 (command
& CMD_RESET
) ? " Reset" : "",
239 (command
& CMD_RUN
) ? "RUN" : "HALT"
244 dbg_port_buf (char *buf
, unsigned len
, const char *label
, int port
, u32 status
)
248 /* signaling state */
249 switch (status
& (3 << 10)) {
250 case 0 << 10: sig
= "se0"; break;
251 case 1 << 10: sig
= "k"; break; /* low speed */
252 case 2 << 10: sig
= "j"; break;
253 default: sig
= "?"; break;
256 return scnprintf (buf
, len
,
257 "%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s",
258 label
, label
[0] ? " " : "", port
, status
,
259 (status
& PORT_POWER
) ? " POWER" : "",
260 (status
& PORT_OWNER
) ? " OWNER" : "",
262 (status
& PORT_RESET
) ? " RESET" : "",
263 (status
& PORT_SUSPEND
) ? " SUSPEND" : "",
264 (status
& PORT_RESUME
) ? " RESUME" : "",
265 (status
& PORT_OCC
) ? " OCC" : "",
266 (status
& PORT_OC
) ? " OC" : "",
267 (status
& PORT_PEC
) ? " PEC" : "",
268 (status
& PORT_PE
) ? " PE" : "",
269 (status
& PORT_CSC
) ? " CSC" : "",
270 (status
& PORT_CONNECT
) ? " CONNECT" : ""
275 static inline void __attribute__((__unused__
))
276 dbg_qh (char *label
, struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
279 static inline int __attribute__((__unused__
))
280 dbg_status_buf (char *buf
, unsigned len
, const char *label
, u32 status
)
283 static inline int __attribute__((__unused__
))
284 dbg_command_buf (char *buf
, unsigned len
, const char *label
, u32 command
)
287 static inline int __attribute__((__unused__
))
288 dbg_intr_buf (char *buf
, unsigned len
, const char *label
, u32 enable
)
291 static inline int __attribute__((__unused__
))
292 dbg_port_buf (char *buf
, unsigned len
, const char *label
, int port
, u32 status
)
297 /* functions have the "wrong" filename when they're output... */
298 #define dbg_status(ehci, label, status) { \
300 dbg_status_buf (_buf, sizeof _buf, label, status); \
301 ehci_dbg (ehci, "%s\n", _buf); \
304 #define dbg_cmd(ehci, label, command) { \
306 dbg_command_buf (_buf, sizeof _buf, label, command); \
307 ehci_dbg (ehci, "%s\n", _buf); \
310 #define dbg_port(ehci, label, port, status) { \
312 dbg_port_buf (_buf, sizeof _buf, label, port, status); \
313 ehci_dbg (ehci, "%s\n", _buf); \
316 /*-------------------------------------------------------------------------*/
318 #ifdef STUB_DEBUG_FILES
320 static inline void create_debug_files (struct ehci_hcd
*bus
) { }
321 static inline void remove_debug_files (struct ehci_hcd
*bus
) { }
325 /* troubleshooting help: expose state in driverfs */
327 #define speed_char(info1) ({ char tmp; \
328 switch (info1 & (3 << 12)) { \
329 case 0 << 12: tmp = 'f'; break; \
330 case 1 << 12: tmp = 'l'; break; \
331 case 2 << 12: tmp = 'h'; break; \
332 default: tmp = '?'; break; \
335 static inline char token_mark (__le32 token
)
337 __u32 v
= le32_to_cpu (token
);
338 if (v
& QTD_STS_ACTIVE
)
340 if (v
& QTD_STS_HALT
)
342 if (!IS_SHORT_READ (v
))
344 /* tries to advance through hw_alt_next */
348 static void qh_lines (
349 struct ehci_hcd
*ehci
,
357 struct list_head
*entry
;
360 unsigned size
= *sizep
;
364 if (qh
->hw_qtd_next
== EHCI_LIST_END
) /* NEC does this */
367 mark
= token_mark (qh
->hw_token
);
368 if (mark
== '/') { /* qh_alt_next controls qh advance? */
369 if ((qh
->hw_alt_next
& QTD_MASK
) == ehci
->async
->hw_alt_next
)
370 mark
= '#'; /* blocked */
371 else if (qh
->hw_alt_next
== EHCI_LIST_END
)
372 mark
= '.'; /* use hw_qtd_next */
373 /* else alt_next points to some other qtd */
375 scratch
= le32_to_cpup (&qh
->hw_info1
);
376 hw_curr
= (mark
== '*') ? le32_to_cpup (&qh
->hw_current
) : 0;
377 temp
= scnprintf (next
, size
,
378 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)",
379 qh
, scratch
& 0x007f,
380 speed_char (scratch
),
381 (scratch
>> 8) & 0x000f,
382 scratch
, le32_to_cpup (&qh
->hw_info2
),
383 le32_to_cpup (&qh
->hw_token
), mark
,
384 (__constant_cpu_to_le32 (QTD_TOGGLE
) & qh
->hw_token
)
386 (le32_to_cpup (&qh
->hw_alt_next
) >> 1) & 0x0f);
390 /* hc may be modifying the list as we read it ... */
391 list_for_each (entry
, &qh
->qtd_list
) {
392 td
= list_entry (entry
, struct ehci_qtd
, qtd_list
);
393 scratch
= le32_to_cpup (&td
->hw_token
);
395 if (hw_curr
== td
->qtd_dma
)
397 else if (qh
->hw_qtd_next
== cpu_to_le32(td
->qtd_dma
))
399 else if (QTD_LENGTH (scratch
)) {
400 if (td
->hw_alt_next
== ehci
->async
->hw_alt_next
)
402 else if (td
->hw_alt_next
!= EHCI_LIST_END
)
405 temp
= snprintf (next
, size
,
406 "\n\t%p%c%s len=%d %08x urb %p",
407 td
, mark
, ({ char *tmp
;
408 switch ((scratch
>>8)&0x03) {
409 case 0: tmp
= "out"; break;
410 case 1: tmp
= "in"; break;
411 case 2: tmp
= "setup"; break;
412 default: tmp
= "?"; break;
414 (scratch
>> 16) & 0x7fff,
419 else if (size
< temp
)
427 temp
= snprintf (next
, size
, "\n");
430 else if (size
< temp
)
441 show_async (struct class_device
*class_dev
, char *buf
)
445 struct ehci_hcd
*ehci
;
453 bus
= class_get_devdata(class_dev
);
454 hcd
= bus_to_hcd(bus
);
455 ehci
= hcd_to_ehci (hcd
);
459 /* dumps a snapshot of the async schedule.
460 * usually empty except for long-term bulk reads, or head.
461 * one QH per line, and TDs we know about
463 spin_lock_irqsave (&ehci
->lock
, flags
);
464 for (qh
= ehci
->async
->qh_next
.qh
; size
> 0 && qh
; qh
= qh
->qh_next
.qh
)
465 qh_lines (ehci
, qh
, &next
, &size
);
466 if (ehci
->reclaim
&& size
> 0) {
467 temp
= scnprintf (next
, size
, "\nreclaim =\n");
471 for (qh
= ehci
->reclaim
; size
> 0 && qh
; qh
= qh
->reclaim
)
472 qh_lines (ehci
, qh
, &next
, &size
);
474 spin_unlock_irqrestore (&ehci
->lock
, flags
);
478 static CLASS_DEVICE_ATTR (async
, S_IRUGO
, show_async
, NULL
);
480 #define DBG_SCHED_LIMIT 64
483 show_periodic (struct class_device
*class_dev
, char *buf
)
487 struct ehci_hcd
*ehci
;
489 union ehci_shadow p
, *seen
;
490 unsigned temp
, size
, seen_count
;
495 if (!(seen
= kmalloc (DBG_SCHED_LIMIT
* sizeof *seen
, SLAB_ATOMIC
)))
499 bus
= class_get_devdata(class_dev
);
500 hcd
= bus_to_hcd(bus
);
501 ehci
= hcd_to_ehci (hcd
);
505 temp
= scnprintf (next
, size
, "size = %d\n", ehci
->periodic_size
);
509 /* dump a snapshot of the periodic schedule.
510 * iso changes, interrupt usually doesn't.
512 spin_lock_irqsave (&ehci
->lock
, flags
);
513 for (i
= 0; i
< ehci
->periodic_size
; i
++) {
514 p
= ehci
->pshadow
[i
];
517 tag
= Q_NEXT_TYPE (ehci
->periodic
[i
]);
519 temp
= scnprintf (next
, size
, "%4d: ", i
);
526 temp
= scnprintf (next
, size
, " qh%d-%04x/%p",
528 le32_to_cpup (&p
.qh
->hw_info2
)
530 & (QH_CMASK
| QH_SMASK
),
534 /* don't repeat what follows this qh */
535 for (temp
= 0; temp
< seen_count
; temp
++) {
536 if (seen
[temp
].ptr
!= p
.ptr
)
538 if (p
.qh
->qh_next
.ptr
)
539 temp
= scnprintf (next
, size
,
544 /* show more info the first time around */
545 if (temp
== seen_count
&& p
.ptr
) {
546 u32 scratch
= le32_to_cpup (
548 struct ehci_qtd
*qtd
;
551 /* count tds, get ep direction */
553 list_for_each_entry (qtd
,
557 switch (0x03 & (le32_to_cpu (
558 qtd
->hw_token
) >> 8)) {
559 case 0: type
= "out"; continue;
560 case 1: type
= "in"; continue;
564 temp
= scnprintf (next
, size
,
567 speed_char (scratch
),
569 (scratch
>> 8) & 0x000f, type
,
570 p
.qh
->usecs
, p
.qh
->c_usecs
,
572 0x7ff & (scratch
>> 16));
574 if (seen_count
< DBG_SCHED_LIMIT
)
575 seen
[seen_count
++].qh
= p
.qh
;
579 tag
= Q_NEXT_TYPE (p
.qh
->hw_next
);
584 temp
= scnprintf (next
, size
,
585 " fstn-%8x/%p", p
.fstn
->hw_prev
,
587 tag
= Q_NEXT_TYPE (p
.fstn
->hw_next
);
588 p
= p
.fstn
->fstn_next
;
591 temp
= scnprintf (next
, size
,
593 tag
= Q_NEXT_TYPE (p
.itd
->hw_next
);
597 temp
= scnprintf (next
, size
,
599 p
.sitd
->stream
->interval
,
600 le32_to_cpup (&p
.sitd
->hw_uframe
)
603 tag
= Q_NEXT_TYPE (p
.sitd
->hw_next
);
604 p
= p
.sitd
->sitd_next
;
611 temp
= scnprintf (next
, size
, "\n");
615 spin_unlock_irqrestore (&ehci
->lock
, flags
);
618 return PAGE_SIZE
- size
;
620 static CLASS_DEVICE_ATTR (periodic
, S_IRUGO
, show_periodic
, NULL
);
622 #undef DBG_SCHED_LIMIT
625 show_registers (struct class_device
*class_dev
, char *buf
)
629 struct ehci_hcd
*ehci
;
631 unsigned temp
, size
, i
;
632 char *next
, scratch
[80];
633 static char fmt
[] = "%*s\n";
634 static char label
[] = "";
636 bus
= class_get_devdata(class_dev
);
637 hcd
= bus_to_hcd(bus
);
638 ehci
= hcd_to_ehci (hcd
);
642 spin_lock_irqsave (&ehci
->lock
, flags
);
644 if (bus
->controller
->power
.power_state
.event
) {
645 size
= scnprintf (next
, size
,
646 "bus %s, device %s (driver " DRIVER_VERSION
")\n"
648 "SUSPENDED (no register access)\n",
649 hcd
->self
.controller
->bus
->name
,
650 hcd
->self
.controller
->bus_id
,
655 /* Capability Registers */
656 i
= HC_VERSION(readl (&ehci
->caps
->hc_capbase
));
657 temp
= scnprintf (next
, size
,
658 "bus %s, device %s (driver " DRIVER_VERSION
")\n"
660 "EHCI %x.%02x, hcd state %d\n",
661 hcd
->self
.controller
->bus
->name
,
662 hcd
->self
.controller
->bus_id
,
664 i
>> 8, i
& 0x0ff, hcd
->state
);
669 /* EHCI 0.96 and later may have "extended capabilities" */
670 if (hcd
->self
.controller
->bus
== &pci_bus_type
) {
671 struct pci_dev
*pdev
;
672 u32 offset
, cap
, cap2
;
673 unsigned count
= 256/4;
675 pdev
= to_pci_dev(ehci_to_hcd(ehci
)->self
.controller
);
676 offset
= HCC_EXT_CAPS (readl (&ehci
->caps
->hcc_params
));
677 while (offset
&& count
--) {
678 pci_read_config_dword (pdev
, offset
, &cap
);
679 switch (cap
& 0xff) {
681 temp
= scnprintf (next
, size
,
682 "ownership %08x%s%s\n", cap
,
683 (cap
& (1 << 24)) ? " linux" : "",
684 (cap
& (1 << 16)) ? " firmware" : "");
689 pci_read_config_dword (pdev
, offset
, &cap2
);
690 temp
= scnprintf (next
, size
,
691 "SMI sts/enable 0x%08x\n", cap2
);
695 case 0: /* illegal reserved capability */
698 default: /* unknown */
701 temp
= (cap
>> 8) & 0xff;
706 // FIXME interpret both types of params
707 i
= readl (&ehci
->caps
->hcs_params
);
708 temp
= scnprintf (next
, size
, "structural params 0x%08x\n", i
);
712 i
= readl (&ehci
->caps
->hcc_params
);
713 temp
= scnprintf (next
, size
, "capability params 0x%08x\n", i
);
717 /* Operational Registers */
718 temp
= dbg_status_buf (scratch
, sizeof scratch
, label
,
719 readl (&ehci
->regs
->status
));
720 temp
= scnprintf (next
, size
, fmt
, temp
, scratch
);
724 temp
= dbg_command_buf (scratch
, sizeof scratch
, label
,
725 readl (&ehci
->regs
->command
));
726 temp
= scnprintf (next
, size
, fmt
, temp
, scratch
);
730 temp
= dbg_intr_buf (scratch
, sizeof scratch
, label
,
731 readl (&ehci
->regs
->intr_enable
));
732 temp
= scnprintf (next
, size
, fmt
, temp
, scratch
);
736 temp
= scnprintf (next
, size
, "uframe %04x\n",
737 readl (&ehci
->regs
->frame_index
));
741 for (i
= 1; i
<= HCS_N_PORTS (ehci
->hcs_params
); i
++) {
742 temp
= dbg_port_buf (scratch
, sizeof scratch
, label
, i
,
743 readl (&ehci
->regs
->port_status
[i
- 1]));
744 temp
= scnprintf (next
, size
, fmt
, temp
, scratch
);
747 if (i
== HCS_DEBUG_PORT(ehci
->hcs_params
) && ehci
->debug
) {
748 temp
= scnprintf (next
, size
,
749 " debug control %08x\n",
750 readl (&ehci
->debug
->control
));
757 temp
= scnprintf (next
, size
, "reclaim qh %p%s\n",
759 ehci
->reclaim_ready
? " ready" : "");
765 temp
= scnprintf (next
, size
,
766 "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
767 ehci
->stats
.normal
, ehci
->stats
.error
, ehci
->stats
.reclaim
,
768 ehci
->stats
.lost_iaa
);
772 temp
= scnprintf (next
, size
, "complete %ld unlink %ld\n",
773 ehci
->stats
.complete
, ehci
->stats
.unlink
);
779 spin_unlock_irqrestore (&ehci
->lock
, flags
);
781 return PAGE_SIZE
- size
;
783 static CLASS_DEVICE_ATTR (registers
, S_IRUGO
, show_registers
, NULL
);
785 static inline void create_debug_files (struct ehci_hcd
*ehci
)
787 struct class_device
*cldev
= ehci_to_hcd(ehci
)->self
.class_dev
;
789 class_device_create_file(cldev
, &class_device_attr_async
);
790 class_device_create_file(cldev
, &class_device_attr_periodic
);
791 class_device_create_file(cldev
, &class_device_attr_registers
);
794 static inline void remove_debug_files (struct ehci_hcd
*ehci
)
796 struct class_device
*cldev
= ehci_to_hcd(ehci
)->self
.class_dev
;
798 class_device_remove_file(cldev
, &class_device_attr_async
);
799 class_device_remove_file(cldev
, &class_device_attr_periodic
);
800 class_device_remove_file(cldev
, &class_device_attr_registers
);
803 #endif /* STUB_DEBUG_FILES */