1 /* via-rhine.c: A Linux Ethernet device driver for VIA Rhine family chips. */
3 Written 1998-2001 by Donald Becker.
5 Current Maintainer: Roger Luethi <rl@hellgate.ch>
7 This software may be used and distributed according to the terms of
8 the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on or derived from this code fall under the GPL and must
10 retain the authorship, copyright and license notice. This file is not
11 a complete program and may only be used when the entire operating
12 system is licensed under the GPL.
14 This driver is designed for the VIA VT86C100A Rhine-I.
15 It also works with the Rhine-II (6102) and Rhine-III (6105/6105L/6105LOM
16 and management NIC 6105M).
18 The author may be reached as becker@scyld.com, or C/O
19 Scyld Computing Corporation
20 410 Severn Ave., Suite 210
24 This driver contains some changes from the original Donald Becker
25 version. He may or may not be interested in bug reports on this
26 code. You can find his versions at:
27 http://www.scyld.com/network/via-rhine.html
30 Linux kernel version history:
33 - Jeff Garzik: softnet 'n stuff
36 - Justin Guyett: softnet and locking fixes
37 - Jeff Garzik: use PCI interface
40 - Urban Widmark: minor cleanups, merges from Becker 1.03a/1.04 versions
43 - Urban Widmark: use PCI DMA interface (with thanks to the eepro100.c
44 code) update "Theory of Operation" with
45 softnet/locking changes
46 - Dave Miller: PCI DMA and endian fixups
47 - Jeff Garzik: MOD_xxx race fixes, updated PCI resource allocation
50 - Urban Widmark: fix gcc 2.95.2 problem and
51 remove writel's to fixed address 0x7c
54 - Urban Widmark: mdio locking, bounce buffer changes
55 merges from Beckers 1.05 version
56 added netif_running_on/off support
59 - Urban Widmark: merges from Beckers 1.08b version (VT6102 + mdio)
60 set netif_running_on/off on startup, del_timer_sync
63 - Manfred Spraul: added reset into tx_timeout
66 - Urban Widmark: merges from Beckers 1.10 version
67 (media selection + eeprom reload)
68 - David Vrabel: merges from D-Link "1.11" version
69 (disable WOL and PME on startup)
72 - Manfred Spraul: use "singlecopy" for unaligned buffers
73 don't allocate bounce buffers for !ReqTxAlign cards
76 - David Woodhouse: Set dev->base_addr before the first time we call
77 wait_for_reset(). It's a lot happier that way.
78 Free np->tx_bufs only if we actually allocated it.
81 - Martin Eriksson: Allow Memory-Mapped IO to be enabled.
85 - Replace some MII-related magic numbers with constants
88 - fixes comments for Rhine-III
89 - removes W_MAX_TIMEOUT (unused)
90 - adds HasDavicomPhy for Rhine-I (basis: linuxfet driver; my card
91 is R-I and has Davicom chip, flag is referenced in kernel driver)
92 - sends chip_id as a parameter to wait_for_reset since np is not
93 initialized on first call
94 - changes mmio "else if (chip_id==VT6102)" to "else" so it will work
95 for Rhine-III's (documentation says same bit is correct)
96 - transmit frame queue message is off by one - fixed
97 - adds IntrNormalSummary to "Something Wicked" exclusion list
98 so normal interrupts will not trigger the message (src: Donald Becker)
100 - show confused chip where to continue after Tx error
101 - location of collision counter is chip specific
102 - allow selecting backoff algorithm (module parameter)
105 - Use new MII lib helper generic_mii_ioctl
107 LK1.1.16 (Roger Luethi)
109 - Handle Tx buffer underrun
110 - Fix bugs in full duplex handling
111 - New reset code uses "force reset" cmd on Rhine-II
114 LK1.1.17 (Roger Luethi)
115 - Fix race in via_rhine_start_tx()
116 - On errors, wait for Tx engine to turn off before scavenging
117 - Handle Tx descriptor write-back race on Rhine-II
118 - Force flushing for PCI posted writes
119 - More reset code changes
121 LK1.1.18 (Roger Luethi)
122 - No filtering multicast in promisc mode (Edward Peng)
123 - Fix for Rhine-I Tx timeouts
127 #define DRV_NAME "via-rhine"
128 #define DRV_VERSION "1.1.18-2.5"
129 #define DRV_RELDATE "July-4-2003"
132 /* A few user-configurable values.
133 These may be modified when a driver module is loaded. */
135 static int debug
= 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
136 static int max_interrupt_work
= 20;
138 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
139 Setting to > 1518 effectively disables this feature. */
140 static int rx_copybreak
;
142 /* Select a backoff algorithm (Ethernet capture effect) */
145 /* Used to pass the media type, etc.
146 Both 'options[]' and 'full_duplex[]' should exist for driver
148 The media type is usually passed in 'options[]'.
149 The default is autonegotiation for speed and duplex.
150 This should rarely be overridden.
151 Use option values 0x10/0x20 for 10Mbps, 0x100,0x200 for 100Mbps.
152 Use option values 0x10 and 0x100 for forcing half duplex fixed speed.
153 Use option values 0x20 and 0x200 for forcing full duplex operation.
155 #define MAX_UNITS 8 /* More are supported, limit only on options */
156 static int options
[MAX_UNITS
] = {-1, -1, -1, -1, -1, -1, -1, -1};
157 static int full_duplex
[MAX_UNITS
] = {-1, -1, -1, -1, -1, -1, -1, -1};
159 /* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
160 The Rhine has a 64 element 8390-like hash table. */
161 static const int multicast_filter_limit
= 32;
164 /* Operational parameters that are set at compile time. */
166 /* Keep the ring sizes a power of two for compile efficiency.
167 The compiler will convert <unsigned>'%'<2^N> into a bit mask.
168 Making the Tx ring too large decreases the effectiveness of channel
169 bonding and packet priority.
170 There are no ill effects from too-large receive rings. */
171 #define TX_RING_SIZE 16
172 #define TX_QUEUE_LEN 10 /* Limit ring entries actually used. */
173 #define RX_RING_SIZE 16
176 /* Operational parameters that usually are not changed. */
178 /* Time in jiffies before concluding the transmitter is hung. */
179 #define TX_TIMEOUT (2*HZ)
181 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
183 #if !defined(__OPTIMIZE__) || !defined(__KERNEL__)
184 #warning You must compile this file with the correct options!
185 #warning See the last lines of the source file.
186 #error You must compile this driver with "-O".
189 #include <linux/module.h>
190 #include <linux/kernel.h>
191 #include <linux/string.h>
192 #include <linux/timer.h>
193 #include <linux/errno.h>
194 #include <linux/ioport.h>
195 #include <linux/slab.h>
196 #include <linux/interrupt.h>
197 #include <linux/pci.h>
198 #include <linux/netdevice.h>
199 #include <linux/etherdevice.h>
200 #include <linux/skbuff.h>
201 #include <linux/init.h>
202 #include <linux/delay.h>
203 #include <linux/mii.h>
204 #include <linux/ethtool.h>
205 #include <linux/crc32.h>
206 #include <asm/processor.h> /* Processor type for cache alignment. */
207 #include <asm/bitops.h>
210 #include <asm/uaccess.h>
212 /* These identify the driver base version and may not be removed. */
213 static char version
[] __devinitdata
=
214 KERN_INFO DRV_NAME
".c:v1.10-LK" DRV_VERSION
" " DRV_RELDATE
" Written by Donald Becker\n"
215 KERN_INFO
" http://www.scyld.com/network/via-rhine.html\n";
217 static char shortname
[] = DRV_NAME
;
220 /* This driver was written to use PCI memory space, however most versions
221 of the Rhine only work correctly with I/O space accesses. */
222 #ifdef CONFIG_VIA_RHINE_MMIO
240 MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
241 MODULE_DESCRIPTION("VIA Rhine PCI Fast Ethernet driver");
242 MODULE_LICENSE("GPL");
244 MODULE_PARM(max_interrupt_work
, "i");
245 MODULE_PARM(debug
, "i");
246 MODULE_PARM(rx_copybreak
, "i");
247 MODULE_PARM(backoff
, "i");
248 MODULE_PARM(options
, "1-" __MODULE_STRING(MAX_UNITS
) "i");
249 MODULE_PARM(full_duplex
, "1-" __MODULE_STRING(MAX_UNITS
) "i");
250 MODULE_PARM_DESC(max_interrupt_work
, "VIA Rhine maximum events handled per interrupt");
251 MODULE_PARM_DESC(debug
, "VIA Rhine debug level (0-7)");
252 MODULE_PARM_DESC(rx_copybreak
, "VIA Rhine copy breakpoint for copy-only-tiny-frames");
253 MODULE_PARM_DESC(backoff
, "VIA Rhine: Bits 0-3: backoff algorithm");
254 MODULE_PARM_DESC(options
, "VIA Rhine: Bits 0-3: media type, bit 17: full duplex");
255 MODULE_PARM_DESC(full_duplex
, "VIA Rhine full duplex setting(s) (1)");
260 I. Board Compatibility
262 This driver is designed for the VIA 86c100A Rhine-II PCI Fast Ethernet
265 II. Board-specific settings
267 Boards with this chip are functional only in a bus-master PCI slot.
269 Many operational settings are loaded from the EEPROM to the Config word at
270 offset 0x78. For most of these settings, this driver assumes that they are
272 If this driver is compiled to use PCI memory space operations the EEPROM
273 must be configured to enable memory ops.
275 III. Driver operation
279 This driver uses two statically allocated fixed-size descriptor lists
280 formed into rings by a branch from the final descriptor to the beginning of
281 the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
283 IIIb/c. Transmit/Receive Structure
285 This driver attempts to use a zero-copy receive and transmit scheme.
287 Alas, all data buffers are required to start on a 32 bit boundary, so
288 the driver must often copy transmit packets into bounce buffers.
290 The driver allocates full frame size skbuffs for the Rx ring buffers at
291 open() time and passes the skb->data field to the chip as receive data
292 buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
293 a fresh skbuff is allocated and the frame is copied to the new skbuff.
294 When the incoming frame is larger, the skbuff is passed directly up the
295 protocol stack. Buffers consumed this way are replaced by newly allocated
296 skbuffs in the last phase of via_rhine_rx().
298 The RX_COPYBREAK value is chosen to trade-off the memory wasted by
299 using a full-sized skbuff for small frames vs. the copying costs of larger
300 frames. New boards are typically used in generously configured machines
301 and the underfilled buffers have negligible impact compared to the benefit of
302 a single allocation size, so the default value of zero results in never
303 copying packets. When copying is done, the cost is usually mitigated by using
304 a combined copy/checksum routine. Copying also preloads the cache, which is
305 most useful with small frames.
307 Since the VIA chips are only able to transfer data to buffers on 32 bit
308 boundaries, the IP header at offset 14 in an ethernet frame isn't
309 longword aligned for further processing. Copying these unaligned buffers
310 has the beneficial effect of 16-byte aligning the IP header.
312 IIId. Synchronization
314 The driver runs as two independent, single-threaded flows of control. One
315 is the send-packet routine, which enforces single-threaded use by the
316 dev->priv->lock spinlock. The other thread is the interrupt handler, which
317 is single threaded by the hardware and interrupt handling software.
319 The send packet thread has partial control over the Tx ring. It locks the
320 dev->priv->lock whenever it's queuing a Tx packet. If the next slot in the ring
321 is not available it stops the transmit queue by calling netif_stop_queue.
323 The interrupt handler has exclusive control over the Rx ring and records stats
324 from the Tx ring. After reaping the stats, it marks the Tx queue entry as
325 empty by incrementing the dirty_tx mark. If at least half of the entries in
326 the Rx ring are available the transmit queue is woken up if it was stopped.
332 Preliminary VT86C100A manual from http://www.via.com.tw/
333 http://www.scyld.com/expert/100mbps.html
334 http://www.scyld.com/expert/NWay.html
335 ftp://ftp.via.com.tw/public/lan/Products/NIC/VT86C100A/Datasheet/VT86C100A03.pdf
336 ftp://ftp.via.com.tw/public/lan/Products/NIC/VT6102/Datasheet/VT6102_021.PDF
341 The VT86C100A manual is not reliable information.
342 The 3043 chip does not handle unaligned transmit or receive buffers, resulting
343 in significant performance degradation for bounce buffer copies on transmit
344 and unaligned IP headers on receive.
345 The chip does not pad to minimum transmit length.
350 /* This table drives the PCI probe routines. It's mostly boilerplate in all
351 of the drivers, and will likely be provided by some future kernel.
352 Note the matching code -- the first table entry matchs all 56** cards but
353 second only the 1234 card.
357 PCI_USES_IO
=1, PCI_USES_MEM
=2, PCI_USES_MASTER
=4,
358 PCI_ADDR0
=0x10<<0, PCI_ADDR1
=0x10<<1, PCI_ADDR2
=0x10<<2, PCI_ADDR3
=0x10<<3,
361 enum via_rhine_chips
{
368 struct via_rhine_chip_info
{
376 enum chip_capability_flags
{
377 CanHaveMII
=1, HasESIPhy
=2, HasDavicomPhy
=4,
378 ReqTxAlign
=0x10, HasWOL
=0x20, };
381 #define RHINE_IOTYPE (PCI_USES_MEM | PCI_USES_MASTER | PCI_ADDR1)
383 #define RHINE_IOTYPE (PCI_USES_IO | PCI_USES_MASTER | PCI_ADDR0)
385 /* Beware of PCI posted writes */
386 #define IOSYNC do { readb(dev->base_addr + StationAddr); } while (0)
388 /* directly indexed by enum via_rhine_chips, above */
389 static struct via_rhine_chip_info via_rhine_chip_info
[] __devinitdata
=
391 { "VIA VT86C100A Rhine", RHINE_IOTYPE
, 128,
392 CanHaveMII
| ReqTxAlign
| HasDavicomPhy
},
393 { "VIA VT6102 Rhine-II", RHINE_IOTYPE
, 256,
394 CanHaveMII
| HasWOL
},
395 { "VIA VT6105 Rhine-III", RHINE_IOTYPE
, 256,
396 CanHaveMII
| HasWOL
},
397 { "VIA VT6105M Rhine-III", RHINE_IOTYPE
, 256,
398 CanHaveMII
| HasWOL
},
401 static struct pci_device_id via_rhine_pci_tbl
[] __devinitdata
=
403 {0x1106, 0x3043, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, VT86C100A
},
404 {0x1106, 0x3065, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, VT6102
},
405 {0x1106, 0x3106, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, VT6105
}, /* 6105{,L,LOM} */
406 {0x1106, 0x3053, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, VT6105M
},
407 {0,} /* terminate list */
409 MODULE_DEVICE_TABLE(pci
, via_rhine_pci_tbl
);
412 /* Offsets to the device registers. */
413 enum register_offsets
{
414 StationAddr
=0x00, RxConfig
=0x06, TxConfig
=0x07, ChipCmd
=0x08,
415 IntrStatus
=0x0C, IntrEnable
=0x0E,
416 MulticastFilter0
=0x10, MulticastFilter1
=0x14,
417 RxRingPtr
=0x18, TxRingPtr
=0x1C, GFIFOTest
=0x54,
418 MIIPhyAddr
=0x6C, MIIStatus
=0x6D, PCIBusConfig
=0x6E,
419 MIICmd
=0x70, MIIRegAddr
=0x71, MIIData
=0x72, MACRegEEcsr
=0x74,
420 ConfigA
=0x78, ConfigB
=0x79, ConfigC
=0x7A, ConfigD
=0x7B,
421 RxMissed
=0x7C, RxCRCErrs
=0x7E, MiscCmd
=0x81,
422 StickyHW
=0x83, IntrStatus2
=0x84, WOLcrClr
=0xA4, WOLcgClr
=0xA7,
426 /* Bits in ConfigD */
428 BackOptional
=0x01, BackModify
=0x02,
429 BackCaptureEffect
=0x04, BackRandom
=0x08
433 /* Registers we check that mmio and reg are the same. */
434 int mmio_verify_registers
[] = {
435 RxConfig
, TxConfig
, IntrEnable
, ConfigA
, ConfigB
, ConfigC
, ConfigD
,
440 /* Bits in the interrupt status/mask registers. */
441 enum intr_status_bits
{
442 IntrRxDone
=0x0001, IntrRxErr
=0x0004, IntrRxEmpty
=0x0020,
443 IntrTxDone
=0x0002, IntrTxError
=0x0008, IntrTxUnderrun
=0x0210,
445 IntrStatsMax
=0x0080, IntrRxEarly
=0x0100,
446 IntrRxOverflow
=0x0400, IntrRxDropped
=0x0800, IntrRxNoBuf
=0x1000,
447 IntrTxAborted
=0x2000, IntrLinkChange
=0x4000,
449 IntrNormalSummary
=0x0003, IntrAbnormalSummary
=0xC260,
450 IntrTxDescRace
=0x080000, /* mapped from IntrStatus2 */
451 IntrTxErrSummary
=0x082218,
454 /* The Rx and Tx buffer descriptors. */
457 u32 desc_length
; /* Chain flag, Buffer/frame length */
463 u32 desc_length
; /* Chain flag, Tx Config, Frame length */
468 /* Initial value for tx_desc.desc_length, Buffer size goes to bits 0-10 */
469 #define TXDESC 0x00e08000
471 enum rx_status_bits
{
472 RxOK
=0x8000, RxWholePkt
=0x0300, RxErr
=0x008F
475 /* Bits in *_desc.*_status */
476 enum desc_status_bits
{
480 /* Bits in ChipCmd. */
482 CmdInit
=0x0001, CmdStart
=0x0002, CmdStop
=0x0004, CmdRxOn
=0x0008,
483 CmdTxOn
=0x0010, CmdTxDemand
=0x0020, CmdRxDemand
=0x0040,
484 CmdEarlyRx
=0x0100, CmdEarlyTx
=0x0200, CmdFDuplex
=0x0400,
485 CmdNoTxPoll
=0x0800, CmdReset
=0x8000,
488 #define MAX_MII_CNT 4
489 struct netdev_private
{
490 /* Descriptor rings */
491 struct rx_desc
*rx_ring
;
492 struct tx_desc
*tx_ring
;
493 dma_addr_t rx_ring_dma
;
494 dma_addr_t tx_ring_dma
;
496 /* The addresses of receive-in-place skbuffs. */
497 struct sk_buff
*rx_skbuff
[RX_RING_SIZE
];
498 dma_addr_t rx_skbuff_dma
[RX_RING_SIZE
];
500 /* The saved address of a sent-in-place packet/buffer, for later free(). */
501 struct sk_buff
*tx_skbuff
[TX_RING_SIZE
];
502 dma_addr_t tx_skbuff_dma
[TX_RING_SIZE
];
504 /* Tx bounce buffers */
505 unsigned char *tx_buf
[TX_RING_SIZE
];
506 unsigned char *tx_bufs
;
507 dma_addr_t tx_bufs_dma
;
509 struct pci_dev
*pdev
;
510 struct net_device_stats stats
;
511 struct timer_list timer
; /* Media monitoring timer. */
514 /* Frequently used values: keep some adjacent for cache effect. */
515 int chip_id
, drv_flags
;
516 struct rx_desc
*rx_head_desc
;
517 unsigned int cur_rx
, dirty_rx
; /* Producer/consumer ring indices */
518 unsigned int cur_tx
, dirty_tx
;
519 unsigned int rx_buf_sz
; /* Based on MTU+slack. */
520 u16 chip_cmd
; /* Current setting for ChipCmd */
522 /* These values are keep track of the transceiver/media in use. */
523 unsigned int default_port
:4; /* Last dev->if_port value. */
524 u8 tx_thresh
, rx_thresh
;
526 /* MII transceiver section. */
527 unsigned char phys
[MAX_MII_CNT
]; /* MII device addresses. */
528 unsigned int mii_cnt
; /* number of MIIs found, but only the first one is used */
529 u16 mii_status
; /* last read MII status */
530 struct mii_if_info mii_if
;
533 static int mdio_read(struct net_device
*dev
, int phy_id
, int location
);
534 static void mdio_write(struct net_device
*dev
, int phy_id
, int location
, int value
);
535 static int via_rhine_open(struct net_device
*dev
);
536 static void via_rhine_check_duplex(struct net_device
*dev
);
537 static void via_rhine_timer(unsigned long data
);
538 static void via_rhine_tx_timeout(struct net_device
*dev
);
539 static int via_rhine_start_tx(struct sk_buff
*skb
, struct net_device
*dev
);
540 static irqreturn_t
via_rhine_interrupt(int irq
, void *dev_instance
, struct pt_regs
*regs
);
541 static void via_rhine_tx(struct net_device
*dev
);
542 static void via_rhine_rx(struct net_device
*dev
);
543 static void via_rhine_error(struct net_device
*dev
, int intr_status
);
544 static void via_rhine_set_rx_mode(struct net_device
*dev
);
545 static struct net_device_stats
*via_rhine_get_stats(struct net_device
*dev
);
546 static int netdev_ioctl(struct net_device
*dev
, struct ifreq
*rq
, int cmd
);
547 static int via_rhine_close(struct net_device
*dev
);
549 static inline u32
get_intr_status(struct net_device
*dev
)
551 long ioaddr
= dev
->base_addr
;
552 struct netdev_private
*np
= dev
->priv
;
555 intr_status
= readw(ioaddr
+ IntrStatus
);
556 /* On Rhine-II, Bit 3 indicates Tx descriptor write-back race. */
557 if (np
->chip_id
== VT6102
)
558 intr_status
|= readb(ioaddr
+ IntrStatus2
) << 16;
562 static void wait_for_reset(struct net_device
*dev
, int chip_id
, char *name
)
564 long ioaddr
= dev
->base_addr
;
569 if (readw(ioaddr
+ ChipCmd
) & CmdReset
) {
570 printk(KERN_INFO
"%s: Reset not complete yet. "
571 "Trying harder.\n", name
);
573 /* Rhine-II needs to be forced sometimes */
574 if (chip_id
== VT6102
)
575 writeb(0x40, ioaddr
+ MiscCmd
);
577 /* VT86C100A may need long delay after reset (dlink) */
578 /* Seen on Rhine-II as well (rl) */
579 while ((readw(ioaddr
+ ChipCmd
) & CmdReset
) && --boguscnt
)
585 printk(KERN_INFO
"%s: Reset %s.\n", name
,
586 boguscnt
? "succeeded" : "failed");
590 static void __devinit
enable_mmio(long ioaddr
, int chip_id
)
593 if (chip_id
== VT86C100A
) {
594 /* More recent docs say that this bit is reserved ... */
595 n
= inb(ioaddr
+ ConfigA
) | 0x20;
596 outb(n
, ioaddr
+ ConfigA
);
598 n
= inb(ioaddr
+ ConfigD
) | 0x80;
599 outb(n
, ioaddr
+ ConfigD
);
604 static void __devinit
reload_eeprom(long ioaddr
)
607 outb(0x20, ioaddr
+ MACRegEEcsr
);
608 /* Typically 2 cycles to reload. */
609 for (i
= 0; i
< 150; i
++)
610 if (! (inb(ioaddr
+ MACRegEEcsr
) & 0x20))
614 static int __devinit
via_rhine_init_one (struct pci_dev
*pdev
,
615 const struct pci_device_id
*ent
)
617 struct net_device
*dev
;
618 struct netdev_private
*np
;
620 int chip_id
= (int) ent
->driver_data
;
621 static int card_idx
= -1;
630 /* when built into the kernel, we only print version if device is found */
632 static int printed_version
;
633 if (!printed_version
++)
638 option
= card_idx
< MAX_UNITS
? options
[card_idx
] : 0;
639 io_size
= via_rhine_chip_info
[chip_id
].io_size
;
640 pci_flags
= via_rhine_chip_info
[chip_id
].pci_flags
;
642 if (pci_enable_device (pdev
))
645 /* this should always be supported */
646 if (pci_set_dma_mask(pdev
, 0xffffffff)) {
647 printk(KERN_ERR
"32-bit PCI DMA addresses not supported by the card!?\n");
652 if ((pci_resource_len (pdev
, 0) < io_size
) ||
653 (pci_resource_len (pdev
, 1) < io_size
)) {
654 printk (KERN_ERR
"Insufficient PCI resources, aborting\n");
658 ioaddr
= pci_resource_start (pdev
, 0);
659 memaddr
= pci_resource_start (pdev
, 1);
661 if (pci_flags
& PCI_USES_MASTER
)
662 pci_set_master (pdev
);
664 dev
= alloc_etherdev(sizeof(*np
));
666 printk (KERN_ERR
"init_ethernet failed for card #%d\n", card_idx
);
669 SET_MODULE_OWNER(dev
);
670 SET_NETDEV_DEV(dev
, &pdev
->dev
);
672 if (pci_request_regions(pdev
, shortname
))
673 goto err_out_free_netdev
;
677 enable_mmio(ioaddr0
, chip_id
);
679 ioaddr
= (long) ioremap (memaddr
, io_size
);
681 printk (KERN_ERR
"ioremap failed for device %s, region 0x%X @ 0x%lX\n",
682 pdev
->slot_name
, io_size
, memaddr
);
683 goto err_out_free_res
;
686 /* Check that selected MMIO registers match the PIO ones */
688 while (mmio_verify_registers
[i
]) {
689 int reg
= mmio_verify_registers
[i
++];
690 unsigned char a
= inb(ioaddr0
+reg
);
691 unsigned char b
= readb(ioaddr
+reg
);
693 printk (KERN_ERR
"MMIO do not match PIO [%02x] (%02x != %02x)\n",
700 /* D-Link provided reset code (with comment additions) */
701 if (via_rhine_chip_info
[chip_id
].drv_flags
& HasWOL
) {
702 unsigned char byOrgValue
;
704 /* clear sticky bit before reset & read ethernet address */
705 byOrgValue
= readb(ioaddr
+ StickyHW
);
706 byOrgValue
= byOrgValue
& 0xFC;
707 writeb(byOrgValue
, ioaddr
+ StickyHW
);
709 /* (bits written are cleared?) */
710 /* disable force PME-enable */
711 writeb(0x80, ioaddr
+ WOLcgClr
);
712 /* disable power-event config bit */
713 writeb(0xFF, ioaddr
+ WOLcrClr
);
714 /* clear power status (undocumented in vt6102 docs?) */
715 writeb(0xFF, ioaddr
+ PwrcsrClr
);
718 /* Reset the chip to erase previous misconfiguration. */
719 writew(CmdReset
, ioaddr
+ ChipCmd
);
721 dev
->base_addr
= ioaddr
;
722 wait_for_reset(dev
, chip_id
, shortname
);
724 /* Reload the station address from the EEPROM. */
726 reload_eeprom(ioaddr
);
728 reload_eeprom(ioaddr0
);
729 /* Reloading from eeprom overwrites cfgA-D, so we must re-enable MMIO.
730 If reload_eeprom() was done first this could be avoided, but it is
731 not known if that still works with the "win98-reboot" problem. */
732 enable_mmio(ioaddr0
, chip_id
);
735 for (i
= 0; i
< 6; i
++)
736 dev
->dev_addr
[i
] = readb(ioaddr
+ StationAddr
+ i
);
738 if (!is_valid_ether_addr(dev
->dev_addr
)) {
739 printk(KERN_ERR
"Invalid MAC address for card #%d\n", card_idx
);
743 if (chip_id
== VT6102
) {
745 * for 3065D, EEPROM reloaded will cause bit 0 in MAC_REG_CFGA
746 * turned on. it makes MAC receive magic packet
747 * automatically. So, we turn it off. (D-Link)
749 writeb(readb(ioaddr
+ ConfigA
) & 0xFE, ioaddr
+ ConfigA
);
752 /* Select backoff algorithm */
754 writeb(readb(ioaddr
+ ConfigD
) & (0xF0 | backoff
),
757 dev
->irq
= pdev
->irq
;
760 spin_lock_init (&np
->lock
);
761 np
->chip_id
= chip_id
;
762 np
->drv_flags
= via_rhine_chip_info
[chip_id
].drv_flags
;
764 np
->mii_if
.dev
= dev
;
765 np
->mii_if
.mdio_read
= mdio_read
;
766 np
->mii_if
.mdio_write
= mdio_write
;
767 np
->mii_if
.phy_id_mask
= 0x1f;
768 np
->mii_if
.reg_num_mask
= 0x1f;
771 option
= dev
->mem_start
;
773 /* The chip-specific entries in the device structure. */
774 dev
->open
= via_rhine_open
;
775 dev
->hard_start_xmit
= via_rhine_start_tx
;
776 dev
->stop
= via_rhine_close
;
777 dev
->get_stats
= via_rhine_get_stats
;
778 dev
->set_multicast_list
= via_rhine_set_rx_mode
;
779 dev
->do_ioctl
= netdev_ioctl
;
780 dev
->tx_timeout
= via_rhine_tx_timeout
;
781 dev
->watchdog_timeo
= TX_TIMEOUT
;
782 if (np
->drv_flags
& ReqTxAlign
)
783 dev
->features
|= NETIF_F_SG
|NETIF_F_HW_CSUM
;
785 /* dev->name not defined before register_netdev()! */
786 i
= register_netdev(dev
);
790 /* The lower four bits are the media type. */
793 np
->mii_if
.full_duplex
= 1;
794 np
->default_port
= option
& 15;
796 if (card_idx
< MAX_UNITS
&& full_duplex
[card_idx
] > 0)
797 np
->mii_if
.full_duplex
= 1;
799 if (np
->mii_if
.full_duplex
) {
800 printk(KERN_INFO
"%s: Set to forced full duplex, autonegotiation"
801 " disabled.\n", dev
->name
);
802 np
->mii_if
.force_media
= 1;
805 printk(KERN_INFO
"%s: %s at 0x%lx, ",
806 dev
->name
, via_rhine_chip_info
[chip_id
].name
,
807 (pci_flags
& PCI_USES_IO
) ? ioaddr
: memaddr
);
809 for (i
= 0; i
< 5; i
++)
810 printk("%2.2x:", dev
->dev_addr
[i
]);
811 printk("%2.2x, IRQ %d.\n", dev
->dev_addr
[i
], pdev
->irq
);
813 pci_set_drvdata(pdev
, dev
);
815 if (np
->drv_flags
& CanHaveMII
) {
816 int phy
, phy_idx
= 0;
817 np
->phys
[0] = 1; /* Standard for this chip. */
818 for (phy
= 1; phy
< 32 && phy_idx
< MAX_MII_CNT
; phy
++) {
819 int mii_status
= mdio_read(dev
, phy
, 1);
820 if (mii_status
!= 0xffff && mii_status
!= 0x0000) {
821 np
->phys
[phy_idx
++] = phy
;
822 np
->mii_if
.advertising
= mdio_read(dev
, phy
, 4);
823 printk(KERN_INFO
"%s: MII PHY found at address %d, status "
824 "0x%4.4x advertising %4.4x Link %4.4x.\n",
825 dev
->name
, phy
, mii_status
, np
->mii_if
.advertising
,
826 mdio_read(dev
, phy
, 5));
828 /* set IFF_RUNNING */
829 if (mii_status
& BMSR_LSTATUS
)
830 netif_carrier_on(dev
);
832 netif_carrier_off(dev
);
835 np
->mii_cnt
= phy_idx
;
836 np
->mii_if
.phy_id
= np
->phys
[0];
839 /* Allow forcing the media type. */
842 np
->mii_if
.full_duplex
= 1;
843 np
->default_port
= option
& 0x3ff;
844 if (np
->default_port
& 0x330) {
845 /* FIXME: shouldn't someone check this variable? */
846 /* np->medialock = 1; */
847 printk(KERN_INFO
" Forcing %dMbs %s-duplex operation.\n",
848 (option
& 0x300 ? 100 : 10),
849 (option
& 0x220 ? "full" : "half"));
851 mdio_write(dev
, np
->phys
[0], MII_BMCR
,
852 ((option
& 0x300) ? 0x2000 : 0) | /* 100mbps? */
853 ((option
& 0x220) ? 0x0100 : 0)); /* Full duplex? */
861 iounmap((void *)ioaddr
);
864 pci_release_regions(pdev
);
871 static int alloc_ring(struct net_device
* dev
)
873 struct netdev_private
*np
= dev
->priv
;
877 ring
= pci_alloc_consistent(np
->pdev
,
878 RX_RING_SIZE
* sizeof(struct rx_desc
) +
879 TX_RING_SIZE
* sizeof(struct tx_desc
),
882 printk(KERN_ERR
"Could not allocate DMA memory.\n");
885 if (np
->drv_flags
& ReqTxAlign
) {
886 np
->tx_bufs
= pci_alloc_consistent(np
->pdev
, PKT_BUF_SZ
* TX_RING_SIZE
,
888 if (np
->tx_bufs
== NULL
) {
889 pci_free_consistent(np
->pdev
,
890 RX_RING_SIZE
* sizeof(struct rx_desc
) +
891 TX_RING_SIZE
* sizeof(struct tx_desc
),
898 np
->tx_ring
= ring
+ RX_RING_SIZE
* sizeof(struct rx_desc
);
899 np
->rx_ring_dma
= ring_dma
;
900 np
->tx_ring_dma
= ring_dma
+ RX_RING_SIZE
* sizeof(struct rx_desc
);
905 void free_ring(struct net_device
* dev
)
907 struct netdev_private
*np
= dev
->priv
;
909 pci_free_consistent(np
->pdev
,
910 RX_RING_SIZE
* sizeof(struct rx_desc
) +
911 TX_RING_SIZE
* sizeof(struct tx_desc
),
912 np
->rx_ring
, np
->rx_ring_dma
);
916 pci_free_consistent(np
->pdev
, PKT_BUF_SZ
* TX_RING_SIZE
,
917 np
->tx_bufs
, np
->tx_bufs_dma
);
923 static void alloc_rbufs(struct net_device
*dev
)
925 struct netdev_private
*np
= dev
->priv
;
929 np
->dirty_rx
= np
->cur_rx
= 0;
931 np
->rx_buf_sz
= (dev
->mtu
<= 1500 ? PKT_BUF_SZ
: dev
->mtu
+ 32);
932 np
->rx_head_desc
= &np
->rx_ring
[0];
933 next
= np
->rx_ring_dma
;
935 /* Init the ring entries */
936 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
937 np
->rx_ring
[i
].rx_status
= 0;
938 np
->rx_ring
[i
].desc_length
= cpu_to_le32(np
->rx_buf_sz
);
939 next
+= sizeof(struct rx_desc
);
940 np
->rx_ring
[i
].next_desc
= cpu_to_le32(next
);
941 np
->rx_skbuff
[i
] = 0;
943 /* Mark the last entry as wrapping the ring. */
944 np
->rx_ring
[i
-1].next_desc
= cpu_to_le32(np
->rx_ring_dma
);
946 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
947 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
948 struct sk_buff
*skb
= dev_alloc_skb(np
->rx_buf_sz
);
949 np
->rx_skbuff
[i
] = skb
;
952 skb
->dev
= dev
; /* Mark as being used by this device. */
954 np
->rx_skbuff_dma
[i
] =
955 pci_map_single(np
->pdev
, skb
->tail
, np
->rx_buf_sz
,
958 np
->rx_ring
[i
].addr
= cpu_to_le32(np
->rx_skbuff_dma
[i
]);
959 np
->rx_ring
[i
].rx_status
= cpu_to_le32(DescOwn
);
961 np
->dirty_rx
= (unsigned int)(i
- RX_RING_SIZE
);
964 static void free_rbufs(struct net_device
* dev
)
966 struct netdev_private
*np
= dev
->priv
;
969 /* Free all the skbuffs in the Rx queue. */
970 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
971 np
->rx_ring
[i
].rx_status
= 0;
972 np
->rx_ring
[i
].addr
= cpu_to_le32(0xBADF00D0); /* An invalid address. */
973 if (np
->rx_skbuff
[i
]) {
974 pci_unmap_single(np
->pdev
,
975 np
->rx_skbuff_dma
[i
],
976 np
->rx_buf_sz
, PCI_DMA_FROMDEVICE
);
977 dev_kfree_skb(np
->rx_skbuff
[i
]);
979 np
->rx_skbuff
[i
] = 0;
983 static void alloc_tbufs(struct net_device
* dev
)
985 struct netdev_private
*np
= dev
->priv
;
989 np
->dirty_tx
= np
->cur_tx
= 0;
990 next
= np
->tx_ring_dma
;
991 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
992 np
->tx_skbuff
[i
] = 0;
993 np
->tx_ring
[i
].tx_status
= 0;
994 np
->tx_ring
[i
].desc_length
= cpu_to_le32(TXDESC
);
995 next
+= sizeof(struct tx_desc
);
996 np
->tx_ring
[i
].next_desc
= cpu_to_le32(next
);
997 np
->tx_buf
[i
] = &np
->tx_bufs
[i
* PKT_BUF_SZ
];
999 np
->tx_ring
[i
-1].next_desc
= cpu_to_le32(np
->tx_ring_dma
);
1003 static void free_tbufs(struct net_device
* dev
)
1005 struct netdev_private
*np
= dev
->priv
;
1008 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
1009 np
->tx_ring
[i
].tx_status
= 0;
1010 np
->tx_ring
[i
].desc_length
= cpu_to_le32(TXDESC
);
1011 np
->tx_ring
[i
].addr
= cpu_to_le32(0xBADF00D0); /* An invalid address. */
1012 if (np
->tx_skbuff
[i
]) {
1013 if (np
->tx_skbuff_dma
[i
]) {
1014 pci_unmap_single(np
->pdev
,
1015 np
->tx_skbuff_dma
[i
],
1016 np
->tx_skbuff
[i
]->len
, PCI_DMA_TODEVICE
);
1018 dev_kfree_skb(np
->tx_skbuff
[i
]);
1020 np
->tx_skbuff
[i
] = 0;
1025 static void init_registers(struct net_device
*dev
)
1027 struct netdev_private
*np
= dev
->priv
;
1028 long ioaddr
= dev
->base_addr
;
1031 for (i
= 0; i
< 6; i
++)
1032 writeb(dev
->dev_addr
[i
], ioaddr
+ StationAddr
+ i
);
1034 /* Initialize other registers. */
1035 writew(0x0006, ioaddr
+ PCIBusConfig
); /* Tune configuration??? */
1036 /* Configure initial FIFO thresholds. */
1037 writeb(0x20, ioaddr
+ TxConfig
);
1038 np
->tx_thresh
= 0x20;
1039 np
->rx_thresh
= 0x60; /* Written in via_rhine_set_rx_mode(). */
1040 np
->mii_if
.full_duplex
= 0;
1042 if (dev
->if_port
== 0)
1043 dev
->if_port
= np
->default_port
;
1045 writel(np
->rx_ring_dma
, ioaddr
+ RxRingPtr
);
1046 writel(np
->tx_ring_dma
, ioaddr
+ TxRingPtr
);
1048 via_rhine_set_rx_mode(dev
);
1050 /* Enable interrupts by setting the interrupt mask. */
1051 writew(IntrRxDone
| IntrRxErr
| IntrRxEmpty
| IntrRxOverflow
|
1052 IntrRxDropped
| IntrRxNoBuf
| IntrTxAborted
|
1053 IntrTxDone
| IntrTxError
| IntrTxUnderrun
|
1054 IntrPCIErr
| IntrStatsMax
| IntrLinkChange
,
1055 ioaddr
+ IntrEnable
);
1057 np
->chip_cmd
= CmdStart
|CmdTxOn
|CmdRxOn
|CmdNoTxPoll
;
1058 if (np
->mii_if
.force_media
)
1059 np
->chip_cmd
|= CmdFDuplex
;
1060 writew(np
->chip_cmd
, ioaddr
+ ChipCmd
);
1062 via_rhine_check_duplex(dev
);
1064 /* The LED outputs of various MII xcvrs should be configured. */
1065 /* For NS or Mison phys, turn on bit 1 in register 0x17 */
1066 /* For ESI phys, turn on bit 7 in register 0x17. */
1067 mdio_write(dev
, np
->phys
[0], 0x17, mdio_read(dev
, np
->phys
[0], 0x17) |
1068 (np
->drv_flags
& HasESIPhy
) ? 0x0080 : 0x0001);
1070 /* Read and write over the MII Management Data I/O (MDIO) interface. */
1072 static int mdio_read(struct net_device
*dev
, int phy_id
, int regnum
)
1074 long ioaddr
= dev
->base_addr
;
1075 int boguscnt
= 1024;
1077 /* Wait for a previous command to complete. */
1078 while ((readb(ioaddr
+ MIICmd
) & 0x60) && --boguscnt
> 0)
1080 writeb(0x00, ioaddr
+ MIICmd
);
1081 writeb(phy_id
, ioaddr
+ MIIPhyAddr
);
1082 writeb(regnum
, ioaddr
+ MIIRegAddr
);
1083 writeb(0x40, ioaddr
+ MIICmd
); /* Trigger read */
1085 while ((readb(ioaddr
+ MIICmd
) & 0x40) && --boguscnt
> 0)
1087 return readw(ioaddr
+ MIIData
);
1090 static void mdio_write(struct net_device
*dev
, int phy_id
, int regnum
, int value
)
1092 struct netdev_private
*np
= dev
->priv
;
1093 long ioaddr
= dev
->base_addr
;
1094 int boguscnt
= 1024;
1096 if (phy_id
== np
->phys
[0]) {
1098 case MII_BMCR
: /* Is user forcing speed/duplex? */
1099 if (value
& 0x9000) /* Autonegotiation. */
1100 np
->mii_if
.force_media
= 0;
1102 np
->mii_if
.full_duplex
= (value
& 0x0100) ? 1 : 0;
1105 np
->mii_if
.advertising
= value
;
1110 /* Wait for a previous command to complete. */
1111 while ((readb(ioaddr
+ MIICmd
) & 0x60) && --boguscnt
> 0)
1113 writeb(0x00, ioaddr
+ MIICmd
);
1114 writeb(phy_id
, ioaddr
+ MIIPhyAddr
);
1115 writeb(regnum
, ioaddr
+ MIIRegAddr
);
1116 writew(value
, ioaddr
+ MIIData
);
1117 writeb(0x20, ioaddr
+ MIICmd
); /* Trigger write. */
1121 static int via_rhine_open(struct net_device
*dev
)
1123 struct netdev_private
*np
= dev
->priv
;
1124 long ioaddr
= dev
->base_addr
;
1127 /* Reset the chip. */
1128 writew(CmdReset
, ioaddr
+ ChipCmd
);
1130 i
= request_irq(np
->pdev
->irq
, &via_rhine_interrupt
, SA_SHIRQ
, dev
->name
, dev
);
1135 printk(KERN_DEBUG
"%s: via_rhine_open() irq %d.\n",
1136 dev
->name
, np
->pdev
->irq
);
1138 i
= alloc_ring(dev
);
1143 wait_for_reset(dev
, np
->chip_id
, dev
->name
);
1144 init_registers(dev
);
1146 printk(KERN_DEBUG
"%s: Done via_rhine_open(), status %4.4x "
1147 "MII status: %4.4x.\n",
1148 dev
->name
, readw(ioaddr
+ ChipCmd
),
1149 mdio_read(dev
, np
->phys
[0], MII_BMSR
));
1151 netif_start_queue(dev
);
1153 /* Set the timer to check for link beat. */
1154 init_timer(&np
->timer
);
1155 np
->timer
.expires
= jiffies
+ 2 * HZ
/100;
1156 np
->timer
.data
= (unsigned long)dev
;
1157 np
->timer
.function
= &via_rhine_timer
; /* timer handler */
1158 add_timer(&np
->timer
);
1163 static void via_rhine_check_duplex(struct net_device
*dev
)
1165 struct netdev_private
*np
= dev
->priv
;
1166 long ioaddr
= dev
->base_addr
;
1167 int mii_lpa
= mdio_read(dev
, np
->phys
[0], MII_LPA
);
1168 int negotiated
= mii_lpa
& np
->mii_if
.advertising
;
1171 if (np
->mii_if
.force_media
|| mii_lpa
== 0xffff)
1173 duplex
= (negotiated
& 0x0100) || (negotiated
& 0x01C0) == 0x0040;
1174 if (np
->mii_if
.full_duplex
!= duplex
) {
1175 np
->mii_if
.full_duplex
= duplex
;
1177 printk(KERN_INFO
"%s: Setting %s-duplex based on MII #%d link"
1178 " partner capability of %4.4x.\n", dev
->name
,
1179 duplex
? "full" : "half", np
->phys
[0], mii_lpa
);
1181 np
->chip_cmd
|= CmdFDuplex
;
1183 np
->chip_cmd
&= ~CmdFDuplex
;
1184 writew(np
->chip_cmd
, ioaddr
+ ChipCmd
);
1189 static void via_rhine_timer(unsigned long data
)
1191 struct net_device
*dev
= (struct net_device
*)data
;
1192 struct netdev_private
*np
= dev
->priv
;
1193 long ioaddr
= dev
->base_addr
;
1194 int next_tick
= 10*HZ
;
1198 printk(KERN_DEBUG
"%s: VIA Rhine monitor tick, status %4.4x.\n",
1199 dev
->name
, readw(ioaddr
+ IntrStatus
));
1202 spin_lock_irq (&np
->lock
);
1204 via_rhine_check_duplex(dev
);
1206 /* make IFF_RUNNING follow the MII status bit "Link established" */
1207 mii_status
= mdio_read(dev
, np
->phys
[0], MII_BMSR
);
1208 if ( (mii_status
& BMSR_LSTATUS
) != (np
->mii_status
& BMSR_LSTATUS
) ) {
1209 if (mii_status
& BMSR_LSTATUS
)
1210 netif_carrier_on(dev
);
1212 netif_carrier_off(dev
);
1214 np
->mii_status
= mii_status
;
1216 spin_unlock_irq (&np
->lock
);
1218 np
->timer
.expires
= jiffies
+ next_tick
;
1219 add_timer(&np
->timer
);
1223 static void via_rhine_tx_timeout (struct net_device
*dev
)
1225 struct netdev_private
*np
= dev
->priv
;
1226 long ioaddr
= dev
->base_addr
;
1228 printk (KERN_WARNING
"%s: Transmit timed out, status %4.4x, PHY status "
1229 "%4.4x, resetting...\n",
1230 dev
->name
, readw (ioaddr
+ IntrStatus
),
1231 mdio_read (dev
, np
->phys
[0], MII_BMSR
));
1235 /* protect against concurrent rx interrupts */
1236 disable_irq(np
->pdev
->irq
);
1238 spin_lock(&np
->lock
);
1240 /* Reset the chip. */
1241 writew(CmdReset
, ioaddr
+ ChipCmd
);
1243 /* clear all descriptors */
1249 /* Reinitialize the hardware. */
1250 wait_for_reset(dev
, np
->chip_id
, dev
->name
);
1251 init_registers(dev
);
1253 spin_unlock(&np
->lock
);
1254 enable_irq(np
->pdev
->irq
);
1256 dev
->trans_start
= jiffies
;
1257 np
->stats
.tx_errors
++;
1258 netif_wake_queue(dev
);
1261 static int via_rhine_start_tx(struct sk_buff
*skb
, struct net_device
*dev
)
1263 struct netdev_private
*np
= dev
->priv
;
1267 /* Caution: the write order is important here, set the field
1268 with the "ownership" bits last. */
1270 /* Calculate the next Tx descriptor entry. */
1271 entry
= np
->cur_tx
% TX_RING_SIZE
;
1273 if (skb
->len
< ETH_ZLEN
) {
1274 skb
= skb_padto(skb
, ETH_ZLEN
);
1279 np
->tx_skbuff
[entry
] = skb
;
1281 if ((np
->drv_flags
& ReqTxAlign
) &&
1282 (((long)skb
->data
& 3) || skb_shinfo(skb
)->nr_frags
!= 0 || skb
->ip_summed
== CHECKSUM_HW
)
1284 /* Must use alignment buffer. */
1285 if (skb
->len
> PKT_BUF_SZ
) {
1286 /* packet too long, drop it */
1288 np
->tx_skbuff
[entry
] = NULL
;
1289 np
->stats
.tx_dropped
++;
1292 skb_copy_and_csum_dev(skb
, np
->tx_buf
[entry
]);
1293 np
->tx_skbuff_dma
[entry
] = 0;
1294 np
->tx_ring
[entry
].addr
= cpu_to_le32(np
->tx_bufs_dma
+
1295 (np
->tx_buf
[entry
] - np
->tx_bufs
));
1297 np
->tx_skbuff_dma
[entry
] =
1298 pci_map_single(np
->pdev
, skb
->data
, skb
->len
, PCI_DMA_TODEVICE
);
1299 np
->tx_ring
[entry
].addr
= cpu_to_le32(np
->tx_skbuff_dma
[entry
]);
1302 np
->tx_ring
[entry
].desc_length
=
1303 cpu_to_le32(TXDESC
| (skb
->len
>= ETH_ZLEN
? skb
->len
: ETH_ZLEN
));
1306 spin_lock_irq (&np
->lock
);
1308 np
->tx_ring
[entry
].tx_status
= cpu_to_le32(DescOwn
);
1313 /* Non-x86 Todo: explicitly flush cache lines here. */
1316 * Wake the potentially-idle transmit channel unless errors are
1317 * pending (the ISR must sort them out first).
1319 intr_status
= get_intr_status(dev
);
1320 if ((intr_status
& IntrTxErrSummary
) == 0) {
1321 writew(CmdTxDemand
| np
->chip_cmd
, dev
->base_addr
+ ChipCmd
);
1325 if (np
->cur_tx
== np
->dirty_tx
+ TX_QUEUE_LEN
)
1326 netif_stop_queue(dev
);
1328 dev
->trans_start
= jiffies
;
1330 spin_unlock_irq (&np
->lock
);
1333 printk(KERN_DEBUG
"%s: Transmit frame #%d queued in slot %d.\n",
1334 dev
->name
, np
->cur_tx
-1, entry
);
1339 /* The interrupt handler does all of the Rx thread work and cleans up
1340 after the Tx thread. */
1341 static irqreturn_t
via_rhine_interrupt(int irq
, void *dev_instance
, struct pt_regs
*rgs
)
1343 struct net_device
*dev
= dev_instance
;
1346 int boguscnt
= max_interrupt_work
;
1349 ioaddr
= dev
->base_addr
;
1351 while ((intr_status
= get_intr_status(dev
))) {
1354 /* Acknowledge all of the current interrupt sources ASAP. */
1355 if (intr_status
& IntrTxDescRace
)
1356 writeb(0x08, ioaddr
+ IntrStatus2
);
1357 writew(intr_status
& 0xffff, ioaddr
+ IntrStatus
);
1361 printk(KERN_DEBUG
"%s: Interrupt, status %8.8x.\n",
1362 dev
->name
, intr_status
);
1364 if (intr_status
& (IntrRxDone
| IntrRxErr
| IntrRxDropped
|
1365 IntrRxWakeUp
| IntrRxEmpty
| IntrRxNoBuf
))
1368 if (intr_status
& (IntrTxErrSummary
| IntrTxDone
)) {
1369 if (intr_status
& IntrTxErrSummary
) {
1371 /* Avoid scavenging before Tx engine turned off */
1372 while ((readw(ioaddr
+ChipCmd
) & CmdTxOn
) && --cnt
)
1374 if (debug
> 2 && !cnt
)
1375 printk(KERN_WARNING
"%s: via_rhine_interrupt() "
1376 "Tx engine still on.\n",
1382 /* Abnormal error summary/uncommon events handlers. */
1383 if (intr_status
& (IntrPCIErr
| IntrLinkChange
|
1384 IntrStatsMax
| IntrTxError
| IntrTxAborted
|
1385 IntrTxUnderrun
| IntrTxDescRace
))
1386 via_rhine_error(dev
, intr_status
);
1388 if (--boguscnt
< 0) {
1389 printk(KERN_WARNING
"%s: Too much work at interrupt, "
1391 dev
->name
, intr_status
);
1397 printk(KERN_DEBUG
"%s: exiting interrupt, status=%8.8x.\n",
1398 dev
->name
, readw(ioaddr
+ IntrStatus
));
1399 return IRQ_RETVAL(handled
);
1402 /* This routine is logically part of the interrupt handler, but isolated
1404 static void via_rhine_tx(struct net_device
*dev
)
1406 struct netdev_private
*np
= dev
->priv
;
1407 int txstatus
= 0, entry
= np
->dirty_tx
% TX_RING_SIZE
;
1409 spin_lock (&np
->lock
);
1411 /* find and cleanup dirty tx descriptors */
1412 while (np
->dirty_tx
!= np
->cur_tx
) {
1413 txstatus
= le32_to_cpu(np
->tx_ring
[entry
].tx_status
);
1415 printk(KERN_DEBUG
" Tx scavenge %d status %8.8x.\n",
1417 if (txstatus
& DescOwn
)
1419 if (txstatus
& 0x8000) {
1421 printk(KERN_DEBUG
"%s: Transmit error, Tx status %8.8x.\n",
1422 dev
->name
, txstatus
);
1423 np
->stats
.tx_errors
++;
1424 if (txstatus
& 0x0400) np
->stats
.tx_carrier_errors
++;
1425 if (txstatus
& 0x0200) np
->stats
.tx_window_errors
++;
1426 if (txstatus
& 0x0100) np
->stats
.tx_aborted_errors
++;
1427 if (txstatus
& 0x0080) np
->stats
.tx_heartbeat_errors
++;
1428 if (((np
->chip_id
== VT86C100A
) && txstatus
& 0x0002) ||
1429 (txstatus
& 0x0800) || (txstatus
& 0x1000)) {
1430 np
->stats
.tx_fifo_errors
++;
1431 np
->tx_ring
[entry
].tx_status
= cpu_to_le32(DescOwn
);
1432 break; /* Keep the skb - we try again */
1434 /* Transmitter restarted in 'abnormal' handler. */
1436 if (np
->chip_id
== VT86C100A
)
1437 np
->stats
.collisions
+= (txstatus
>> 3) & 0x0F;
1439 np
->stats
.collisions
+= txstatus
& 0x0F;
1441 printk(KERN_DEBUG
"collisions: %1.1x:%1.1x\n",
1442 (txstatus
>> 3) & 0xF,
1444 np
->stats
.tx_bytes
+= np
->tx_skbuff
[entry
]->len
;
1445 np
->stats
.tx_packets
++;
1447 /* Free the original skb. */
1448 if (np
->tx_skbuff_dma
[entry
]) {
1449 pci_unmap_single(np
->pdev
,
1450 np
->tx_skbuff_dma
[entry
],
1451 np
->tx_skbuff
[entry
]->len
, PCI_DMA_TODEVICE
);
1453 dev_kfree_skb_irq(np
->tx_skbuff
[entry
]);
1454 np
->tx_skbuff
[entry
] = NULL
;
1455 entry
= (++np
->dirty_tx
) % TX_RING_SIZE
;
1457 if ((np
->cur_tx
- np
->dirty_tx
) < TX_QUEUE_LEN
- 4)
1458 netif_wake_queue (dev
);
1460 spin_unlock (&np
->lock
);
1463 /* This routine is logically part of the interrupt handler, but isolated
1464 for clarity and better register allocation. */
1465 static void via_rhine_rx(struct net_device
*dev
)
1467 struct netdev_private
*np
= dev
->priv
;
1468 int entry
= np
->cur_rx
% RX_RING_SIZE
;
1469 int boguscnt
= np
->dirty_rx
+ RX_RING_SIZE
- np
->cur_rx
;
1472 printk(KERN_DEBUG
"%s: via_rhine_rx(), entry %d status %8.8x.\n",
1473 dev
->name
, entry
, le32_to_cpu(np
->rx_head_desc
->rx_status
));
1476 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1477 while ( ! (np
->rx_head_desc
->rx_status
& cpu_to_le32(DescOwn
))) {
1478 struct rx_desc
*desc
= np
->rx_head_desc
;
1479 u32 desc_status
= le32_to_cpu(desc
->rx_status
);
1480 int data_size
= desc_status
>> 16;
1483 printk(KERN_DEBUG
" via_rhine_rx() status is %8.8x.\n",
1487 if ( (desc_status
& (RxWholePkt
| RxErr
)) != RxWholePkt
) {
1488 if ((desc_status
& RxWholePkt
) != RxWholePkt
) {
1489 printk(KERN_WARNING
"%s: Oversized Ethernet frame spanned "
1490 "multiple buffers, entry %#x length %d status %8.8x!\n",
1491 dev
->name
, entry
, data_size
, desc_status
);
1492 printk(KERN_WARNING
"%s: Oversized Ethernet frame %p vs %p.\n",
1493 dev
->name
, np
->rx_head_desc
, &np
->rx_ring
[entry
]);
1494 np
->stats
.rx_length_errors
++;
1495 } else if (desc_status
& RxErr
) {
1496 /* There was a error. */
1498 printk(KERN_DEBUG
" via_rhine_rx() Rx error was %8.8x.\n",
1500 np
->stats
.rx_errors
++;
1501 if (desc_status
& 0x0030) np
->stats
.rx_length_errors
++;
1502 if (desc_status
& 0x0048) np
->stats
.rx_fifo_errors
++;
1503 if (desc_status
& 0x0004) np
->stats
.rx_frame_errors
++;
1504 if (desc_status
& 0x0002) {
1505 /* this can also be updated outside the interrupt handler */
1506 spin_lock (&np
->lock
);
1507 np
->stats
.rx_crc_errors
++;
1508 spin_unlock (&np
->lock
);
1512 struct sk_buff
*skb
;
1513 /* Length should omit the CRC */
1514 int pkt_len
= data_size
- 4;
1516 /* Check if the packet is long enough to accept without copying
1517 to a minimally-sized skbuff. */
1518 if (pkt_len
< rx_copybreak
&&
1519 (skb
= dev_alloc_skb(pkt_len
+ 2)) != NULL
) {
1521 skb_reserve(skb
, 2); /* 16 byte align the IP header */
1522 pci_dma_sync_single(np
->pdev
, np
->rx_skbuff_dma
[entry
],
1523 np
->rx_buf_sz
, PCI_DMA_FROMDEVICE
);
1525 /* *_IP_COPYSUM isn't defined anywhere and eth_copy_and_sum
1526 is memcpy for all archs so this is kind of pointless right
1528 #if HAS_IP_COPYSUM /* Call copy + cksum if available. */
1529 eth_copy_and_sum(skb
, np
->rx_skbuff
[entry
]->tail
, pkt_len
, 0);
1530 skb_put(skb
, pkt_len
);
1532 memcpy(skb_put(skb
, pkt_len
), np
->rx_skbuff
[entry
]->tail
,
1536 skb
= np
->rx_skbuff
[entry
];
1538 printk(KERN_ERR
"%s: Inconsistent Rx descriptor chain.\n",
1542 np
->rx_skbuff
[entry
] = NULL
;
1543 skb_put(skb
, pkt_len
);
1544 pci_unmap_single(np
->pdev
, np
->rx_skbuff_dma
[entry
],
1545 np
->rx_buf_sz
, PCI_DMA_FROMDEVICE
);
1547 skb
->protocol
= eth_type_trans(skb
, dev
);
1549 dev
->last_rx
= jiffies
;
1550 np
->stats
.rx_bytes
+= pkt_len
;
1551 np
->stats
.rx_packets
++;
1553 entry
= (++np
->cur_rx
) % RX_RING_SIZE
;
1554 np
->rx_head_desc
= &np
->rx_ring
[entry
];
1557 /* Refill the Rx ring buffers. */
1558 for (; np
->cur_rx
- np
->dirty_rx
> 0; np
->dirty_rx
++) {
1559 struct sk_buff
*skb
;
1560 entry
= np
->dirty_rx
% RX_RING_SIZE
;
1561 if (np
->rx_skbuff
[entry
] == NULL
) {
1562 skb
= dev_alloc_skb(np
->rx_buf_sz
);
1563 np
->rx_skbuff
[entry
] = skb
;
1565 break; /* Better luck next round. */
1566 skb
->dev
= dev
; /* Mark as being used by this device. */
1567 np
->rx_skbuff_dma
[entry
] =
1568 pci_map_single(np
->pdev
, skb
->tail
, np
->rx_buf_sz
,
1569 PCI_DMA_FROMDEVICE
);
1570 np
->rx_ring
[entry
].addr
= cpu_to_le32(np
->rx_skbuff_dma
[entry
]);
1572 np
->rx_ring
[entry
].rx_status
= cpu_to_le32(DescOwn
);
1575 /* Pre-emptively restart Rx engine. */
1576 writew(readw(dev
->base_addr
+ ChipCmd
) | CmdRxOn
| CmdRxDemand
,
1577 dev
->base_addr
+ ChipCmd
);
1580 /* Clears the "tally counters" for CRC errors and missed frames(?).
1581 It has been reported that some chips need a write of 0 to clear
1582 these, for others the counters are set to 1 when written to and
1583 instead cleared when read. So we clear them both ways ... */
1584 static inline void clear_tally_counters(const long ioaddr
)
1586 writel(0, ioaddr
+ RxMissed
);
1587 readw(ioaddr
+ RxCRCErrs
);
1588 readw(ioaddr
+ RxMissed
);
1591 static void via_rhine_restart_tx(struct net_device
*dev
) {
1592 struct netdev_private
*np
= dev
->priv
;
1593 long ioaddr
= dev
->base_addr
;
1594 int entry
= np
->dirty_tx
% TX_RING_SIZE
;
1598 * If new errors occured, we need to sort them out before doing Tx.
1599 * In that case the ISR will be back here RSN anyway.
1601 intr_status
= get_intr_status(dev
);
1603 if ((intr_status
& IntrTxErrSummary
) == 0) {
1605 /* We know better than the chip where it should continue. */
1606 writel(np
->tx_ring_dma
+ entry
* sizeof(struct tx_desc
),
1607 ioaddr
+ TxRingPtr
);
1609 writew(CmdTxDemand
| np
->chip_cmd
, ioaddr
+ ChipCmd
);
1613 /* This should never happen */
1615 printk(KERN_WARNING
"%s: via_rhine_restart_tx() "
1616 "Another error occured %8.8x.\n",
1617 dev
->name
, intr_status
);
1622 static void via_rhine_error(struct net_device
*dev
, int intr_status
)
1624 struct netdev_private
*np
= dev
->priv
;
1625 long ioaddr
= dev
->base_addr
;
1627 spin_lock (&np
->lock
);
1629 if (intr_status
& (IntrLinkChange
)) {
1630 if (readb(ioaddr
+ MIIStatus
) & 0x02) {
1631 /* Link failed, restart autonegotiation. */
1632 if (np
->drv_flags
& HasDavicomPhy
)
1633 mdio_write(dev
, np
->phys
[0], MII_BMCR
, 0x3300);
1635 via_rhine_check_duplex(dev
);
1637 printk(KERN_ERR
"%s: MII status changed: Autonegotiation "
1638 "advertising %4.4x partner %4.4x.\n", dev
->name
,
1639 mdio_read(dev
, np
->phys
[0], MII_ADVERTISE
),
1640 mdio_read(dev
, np
->phys
[0], MII_LPA
));
1642 if (intr_status
& IntrStatsMax
) {
1643 np
->stats
.rx_crc_errors
+= readw(ioaddr
+ RxCRCErrs
);
1644 np
->stats
.rx_missed_errors
+= readw(ioaddr
+ RxMissed
);
1645 clear_tally_counters(ioaddr
);
1647 if (intr_status
& IntrTxAborted
) {
1649 printk(KERN_INFO
"%s: Abort %8.8x, frame dropped.\n",
1650 dev
->name
, intr_status
);
1652 if (intr_status
& IntrTxUnderrun
) {
1653 if (np
->tx_thresh
< 0xE0)
1654 writeb(np
->tx_thresh
+= 0x20, ioaddr
+ TxConfig
);
1656 printk(KERN_INFO
"%s: Transmitter underrun, Tx "
1657 "threshold now %2.2x.\n",
1658 dev
->name
, np
->tx_thresh
);
1660 if (intr_status
& IntrTxDescRace
) {
1662 printk(KERN_INFO
"%s: Tx descriptor write-back race.\n",
1665 if ((intr_status
& IntrTxError
) && ~( IntrTxAborted
| IntrTxUnderrun
|
1668 printk(KERN_INFO
"%s: Unspecified error.\n",
1671 if (intr_status
& ( IntrTxAborted
| IntrTxUnderrun
| IntrTxDescRace
|
1673 via_rhine_restart_tx(dev
);
1675 if (intr_status
& ~( IntrLinkChange
| IntrStatsMax
| IntrTxUnderrun
|
1676 IntrTxError
| IntrTxAborted
| IntrNormalSummary
|
1679 printk(KERN_ERR
"%s: Something Wicked happened! %8.8x.\n",
1680 dev
->name
, intr_status
);
1683 spin_unlock (&np
->lock
);
1686 static struct net_device_stats
*via_rhine_get_stats(struct net_device
*dev
)
1688 struct netdev_private
*np
= dev
->priv
;
1689 long ioaddr
= dev
->base_addr
;
1690 unsigned long flags
;
1692 spin_lock_irqsave(&np
->lock
, flags
);
1693 np
->stats
.rx_crc_errors
+= readw(ioaddr
+ RxCRCErrs
);
1694 np
->stats
.rx_missed_errors
+= readw(ioaddr
+ RxMissed
);
1695 clear_tally_counters(ioaddr
);
1696 spin_unlock_irqrestore(&np
->lock
, flags
);
1701 static void via_rhine_set_rx_mode(struct net_device
*dev
)
1703 struct netdev_private
*np
= dev
->priv
;
1704 long ioaddr
= dev
->base_addr
;
1705 u32 mc_filter
[2]; /* Multicast hash filter */
1706 u8 rx_mode
; /* Note: 0x02=accept runt, 0x01=accept errs */
1708 if (dev
->flags
& IFF_PROMISC
) { /* Set promiscuous. */
1709 /* Unconditionally log net taps. */
1710 printk(KERN_NOTICE
"%s: Promiscuous mode enabled.\n", dev
->name
);
1712 writel(0xffffffff, ioaddr
+ MulticastFilter0
);
1713 writel(0xffffffff, ioaddr
+ MulticastFilter1
);
1714 } else if ((dev
->mc_count
> multicast_filter_limit
)
1715 || (dev
->flags
& IFF_ALLMULTI
)) {
1716 /* Too many to match, or accept all multicasts. */
1717 writel(0xffffffff, ioaddr
+ MulticastFilter0
);
1718 writel(0xffffffff, ioaddr
+ MulticastFilter1
);
1721 struct dev_mc_list
*mclist
;
1723 memset(mc_filter
, 0, sizeof(mc_filter
));
1724 for (i
= 0, mclist
= dev
->mc_list
; mclist
&& i
< dev
->mc_count
;
1725 i
++, mclist
= mclist
->next
) {
1726 int bit_nr
= ether_crc(ETH_ALEN
, mclist
->dmi_addr
) >> 26;
1728 mc_filter
[bit_nr
>> 5] |= cpu_to_le32(1 << (bit_nr
& 31));
1730 writel(mc_filter
[0], ioaddr
+ MulticastFilter0
);
1731 writel(mc_filter
[1], ioaddr
+ MulticastFilter1
);
1734 writeb(np
->rx_thresh
| rx_mode
, ioaddr
+ RxConfig
);
1737 static int netdev_ethtool_ioctl (struct net_device
*dev
, void *useraddr
)
1739 struct netdev_private
*np
= dev
->priv
;
1742 if (get_user(ethcmd
, (u32
*)useraddr
))
1746 case ETHTOOL_GDRVINFO
: {
1747 struct ethtool_drvinfo info
= { ETHTOOL_GDRVINFO
};
1748 strcpy (info
.driver
, DRV_NAME
);
1749 strcpy (info
.version
, DRV_VERSION
);
1750 strcpy (info
.bus_info
, np
->pdev
->slot_name
);
1751 if (copy_to_user (useraddr
, &info
, sizeof (info
)))
1757 case ETHTOOL_GSET
: {
1758 struct ethtool_cmd ecmd
= { ETHTOOL_GSET
};
1759 if (!(np
->drv_flags
& CanHaveMII
))
1761 spin_lock_irq(&np
->lock
);
1762 mii_ethtool_gset(&np
->mii_if
, &ecmd
);
1763 spin_unlock_irq(&np
->lock
);
1764 if (copy_to_user(useraddr
, &ecmd
, sizeof(ecmd
)))
1769 case ETHTOOL_SSET
: {
1771 struct ethtool_cmd ecmd
;
1772 if (!(np
->drv_flags
& CanHaveMII
))
1774 if (copy_from_user(&ecmd
, useraddr
, sizeof(ecmd
)))
1776 spin_lock_irq(&np
->lock
);
1777 r
= mii_ethtool_sset(&np
->mii_if
, &ecmd
);
1778 spin_unlock_irq(&np
->lock
);
1781 /* restart autonegotiation */
1782 case ETHTOOL_NWAY_RST
: {
1783 if (!(np
->drv_flags
& CanHaveMII
))
1785 return mii_nway_restart(&np
->mii_if
);
1787 /* get link status */
1788 case ETHTOOL_GLINK
: {
1789 struct ethtool_value edata
= {ETHTOOL_GLINK
};
1790 if (!(np
->drv_flags
& CanHaveMII
))
1792 edata
.data
= mii_link_ok(&np
->mii_if
);
1793 if (copy_to_user(useraddr
, &edata
, sizeof(edata
)))
1798 /* get message-level */
1799 case ETHTOOL_GMSGLVL
: {
1800 struct ethtool_value edata
= {ETHTOOL_GMSGLVL
};
1802 if (copy_to_user(useraddr
, &edata
, sizeof(edata
)))
1806 /* set message-level */
1807 case ETHTOOL_SMSGLVL
: {
1808 struct ethtool_value edata
;
1809 if (copy_from_user(&edata
, useraddr
, sizeof(edata
)))
1821 static int netdev_ioctl(struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
1823 struct netdev_private
*np
= dev
->priv
;
1824 struct mii_ioctl_data
*data
= (struct mii_ioctl_data
*) & rq
->ifr_data
;
1827 if (!netif_running(dev
))
1830 if (cmd
== SIOCETHTOOL
)
1831 rc
= netdev_ethtool_ioctl(dev
, (void *) rq
->ifr_data
);
1834 spin_lock_irq(&np
->lock
);
1835 rc
= generic_mii_ioctl(&np
->mii_if
, data
, cmd
, NULL
);
1836 spin_unlock_irq(&np
->lock
);
1842 static int via_rhine_close(struct net_device
*dev
)
1844 long ioaddr
= dev
->base_addr
;
1845 struct netdev_private
*np
= dev
->priv
;
1847 del_timer_sync(&np
->timer
);
1849 spin_lock_irq(&np
->lock
);
1851 netif_stop_queue(dev
);
1854 printk(KERN_DEBUG
"%s: Shutting down ethercard, status was %4.4x.\n",
1855 dev
->name
, readw(ioaddr
+ ChipCmd
));
1857 /* Switch to loopback mode to avoid hardware races. */
1858 writeb(np
->tx_thresh
| 0x02, ioaddr
+ TxConfig
);
1860 /* Disable interrupts by clearing the interrupt mask. */
1861 writew(0x0000, ioaddr
+ IntrEnable
);
1863 /* Stop the chip's Tx and Rx processes. */
1864 writew(CmdStop
, ioaddr
+ ChipCmd
);
1866 spin_unlock_irq(&np
->lock
);
1868 free_irq(np
->pdev
->irq
, dev
);
1877 static void __devexit
via_rhine_remove_one (struct pci_dev
*pdev
)
1879 struct net_device
*dev
= pci_get_drvdata(pdev
);
1881 unregister_netdev(dev
);
1883 pci_release_regions(pdev
);
1886 iounmap((char *)(dev
->base_addr
));
1890 pci_disable_device(pdev
);
1891 pci_set_drvdata(pdev
, NULL
);
1895 static struct pci_driver via_rhine_driver
= {
1896 .name
= "via-rhine",
1897 .id_table
= via_rhine_pci_tbl
,
1898 .probe
= via_rhine_init_one
,
1899 .remove
= __devexit_p(via_rhine_remove_one
),
1903 static int __init
via_rhine_init (void)
1905 /* when a module, this is printed whether or not devices are found in probe */
1909 return pci_module_init (&via_rhine_driver
);
1913 static void __exit
via_rhine_cleanup (void)
1915 pci_unregister_driver (&via_rhine_driver
);
1919 module_init(via_rhine_init
);
1920 module_exit(via_rhine_cleanup
);
1925 * compile-command: "gcc -DMODULE -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -c via-rhine.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`"