include/asm-sparc64/system.h

   1 /* $Id: system.h,v 1.60 2000/05/29 05:34:02 davem Exp $ */
   2 #ifndef __SPARC64_SYSTEM_H
   3 #define __SPARC64_SYSTEM_H
   4
   5 #include <linux/config.h>
   6 #include <asm/ptrace.h>
   7 #include <asm/processor.h>
   8 #include <asm/asm_offsets.h>
   9 #include <asm/visasm.h>
  10
  11 #ifndef __ASSEMBLY__
  12 /*
  13  * Sparc (general) CPU types
  14  */
  15 enum sparc_cpu {
  16   sun4        = 0x00,
  17   sun4c       = 0x01,
  18   sun4m       = 0x02,
  19   sun4d       = 0x03,
  20   sun4e       = 0x04,
  21   sun4u       = 0x05, /* V8 ploos ploos */
  22   sun_unknown = 0x06,
  23   ap1000      = 0x07, /* almost a sun4m */
  24 };
  25
  26 #define sparc_cpu_model sun4u
  27
  28 /* This cannot ever be a sun4c nor sun4 :) That's just history. */
  29 #define ARCH_SUN4C_SUN4 0
  30 #define ARCH_SUN4 0
  31
  32 extern unsigned long empty_bad_page;
  33 extern unsigned long empty_zero_page;
  34 #endif
  35
  36 #define setipl(__new_ipl) \
  37         __asm__ __volatile__("wrpr      %0, %%pil"  : : "r" (__new_ipl) : "memory")
  38
  39 #define __cli() \
  40         __asm__ __volatile__("wrpr      15, %%pil" : : : "memory")
  41
  42 #define __sti() \
  43         __asm__ __volatile__("wrpr      0, %%pil" : : : "memory")
  44
  45 #define getipl() \
  46 ({ unsigned long retval; __asm__ __volatile__("rdpr     %%pil, %0" : "=r" (retval)); retval; })
  47
  48 #define swap_pil(__new_pil) \
  49 ({      unsigned long retval; \
  50         __asm__ __volatile__("rdpr      %%pil, %0\n\t" \
  51                              "wrpr      %1, %%pil" \
  52                              : "=&r" (retval) \
  53                              : "r" (__new_pil) \
  54                              : "memory"); \
  55         retval; \
  56 })
  57
  58 #define read_pil_and_cli() \
  59 ({      unsigned long retval; \
  60         __asm__ __volatile__("rdpr      %%pil, %0\n\t" \
  61                              "wrpr      15, %%pil" \
  62                              : "=r" (retval) \
  63                              : : "memory"); \
  64         retval; \
  65 })
  66
  67 #define __save_flags(flags)             ((flags) = getipl())
  68 #define __save_and_cli(flags)           ((flags) = read_pil_and_cli())
  69 #define __restore_flags(flags)          setipl((flags))
  70 #define local_irq_disable()             __cli()
  71 #define local_irq_enable()              __sti()
  72 #define local_irq_save(flags)           __save_and_cli(flags)
  73 #define local_irq_restore(flags)        __restore_flags(flags)
  74
  75 #ifndef CONFIG_SMP
  76 #define cli() __cli()
  77 #define sti() __sti()
  78 #define save_flags(x) __save_flags(x)
  79 #define restore_flags(x) __restore_flags(x)
  80 #define save_and_cli(x) __save_and_cli(x)
  81 #else
  82
  83 #ifndef __ASSEMBLY__
  84 extern void __global_cli(void);
  85 extern void __global_sti(void);
  86 extern unsigned long __global_save_flags(void);
  87 extern void __global_restore_flags(unsigned long flags);
  88 #endif
  89
  90 #define cli()                   __global_cli()
  91 #define sti()                   __global_sti()
  92 #define save_flags(x)           ((x) = __global_save_flags())
  93 #define restore_flags(flags)    __global_restore_flags(flags)
  94 #define save_and_cli(flags)     do { save_flags(flags); cli(); } while(0)
  95
  96 #endif
  97
  98 #define mb()            __asm__ __volatile__ ("stbar" : : : "memory")
  99
 100 #define nop()           __asm__ __volatile__ ("nop")
 101
 102 #define membar(type)    __asm__ __volatile__ ("membar " type : : : "memory");
 103 #define rmb()           membar("#LoadLoad | #LoadStore")
 104 #define wmb()           membar("#StoreLoad | #StoreStore")
 105 #define set_mb(__var, __value) \
 106         do { __var = __value; membar("#StoreLoad | #StoreStore"); } while(0)
 107 #define set_wmb(__var, __value) \
 108         do { __var = __value; membar("#StoreStore"); } while(0)
 109
 110 #define flushi(addr)    __asm__ __volatile__ ("flush %0" : : "r" (addr) : "memory")
 111
 112 #define flushw_all()    __asm__ __volatile__("flushw")
 113
 114 /* Performance counter register access. */
 115 #define read_pcr(__p)  __asm__ __volatile__("rd %%pcr, %0" : "=r" (__p))
 116 #define write_pcr(__p) __asm__ __volatile__("wr %0, 0x0, %%pcr" : : "r" (__p));
 117 #define read_pic(__p)  __asm__ __volatile__("rd %%pic, %0" : "=r" (__p))
 118
 119 /* Blackbird errata workaround.  See commentary in
 120  * arch/sparc64/kernel/smp.c:smp_percpu_timer_interrupt()
 121  * for more information.
 122  */
 123 #define reset_pic()                                             \
 124         __asm__ __volatile__("ba,pt     %xcc, 99f\n\t"          \
 125                              ".align    64\n"                   \
 126                           "99:wr        %g0, 0x0, %pic\n\t"     \
 127                              "rd        %pic, %g0")
 128
 129 #ifndef __ASSEMBLY__
 130
 131 extern void synchronize_user_stack(void);
 132
 133 extern void __flushw_user(void);
 134 #define flushw_user() __flushw_user()
 135
 136 #define flush_user_windows flushw_user
 137 #define flush_register_windows flushw_all
 138 #define prepare_to_switch flushw_all
 139
 140         /* See what happens when you design the chip correctly?
 141          *
 142          * We tell gcc we clobber all non-fixed-usage registers except
 143          * for l0/l1.  It will use one for 'next' and the other to hold
 144          * the output value of 'last'.  'next' is not referenced again
 145          * past the invocation of switch_to in the scheduler, so we need
 146          * not preserve it's value.  Hairy, but it lets us remove 2 loads
 147          * and 2 stores in this critical code path.  -DaveM
 148          */
 149 #define switch_to(prev, next, last)                                             \
 150 do {    if (current->thread.flags & SPARC_FLAG_PERFCTR) {                       \
 151                 unsigned long __tmp;                                            \
 152                 read_pcr(__tmp);                                                \
 153                 current->thread.pcr_reg = __tmp;                                \
 154                 read_pic(__tmp);                                                \
 155                 current->thread.kernel_cntd0 += (unsigned int)(__tmp);          \
 156                 current->thread.kernel_cntd1 += ((__tmp) >> 32);                \
 157         }                                                                       \
 158         save_and_clear_fpu();                                                   \
 159         /* If you are tempted to conditionalize the following */                \
 160         /* so that ASI is only written if it changes, think again. */           \
 161         __asm__ __volatile__("wr %%g0, %0, %%asi"                               \
 162                              : : "r" (next->thread.current_ds.seg));            \
 163         __asm__ __volatile__(                                                   \
 164         "mov    %%g6, %%g5\n\t"                                                 \
 165         "wrpr   %%g0, 0x95, %%pstate\n\t"                                       \
 166         "stx    %%i6, [%%sp + 2047 + 0x70]\n\t"                                 \
 167         "stx    %%i7, [%%sp + 2047 + 0x78]\n\t"                                 \
 168         "rdpr   %%wstate, %%o5\n\t"                                             \
 169         "stx    %%o6, [%%g6 + %3]\n\t"                                          \
 170         "stb    %%o5, [%%g6 + %2]\n\t"                                          \
 171         "rdpr   %%cwp, %%o5\n\t"                                                \
 172         "stb    %%o5, [%%g6 + %5]\n\t"                                          \
 173         "mov    %1, %%g6\n\t"                                                   \
 174         "ldub   [%1 + %5], %%g1\n\t"                                            \
 175         "wrpr   %%g1, %%cwp\n\t"                                                \
 176         "ldx    [%%g6 + %3], %%o6\n\t"                                          \
 177         "ldub   [%%g6 + %2], %%o5\n\t"                                          \
 178         "ldub   [%%g6 + %4], %%o7\n\t"                                          \
 179         "mov    %%g6, %%l2\n\t"                                                 \
 180         "wrpr   %%o5, 0x0, %%wstate\n\t"                                        \
 181         "ldx    [%%sp + 2047 + 0x70], %%i6\n\t"                                 \
 182         "ldx    [%%sp + 2047 + 0x78], %%i7\n\t"                                 \
 183         "wrpr   %%g0, 0x94, %%pstate\n\t"                                       \
 184         "mov    %%l2, %%g6\n\t"                                                 \
 185         "wrpr   %%g0, 0x96, %%pstate\n\t"                                       \
 186         "andcc  %%o7, %6, %%g0\n\t"                                             \
 187         "bne,pn %%icc, ret_from_syscall\n\t"                                    \
 188         " mov   %%g5, %0\n\t"                                                   \
 189         : "=&r" (last)                                                          \
 190         : "r" (next),                                                           \
 191           "i" ((const unsigned long)(&((struct task_struct *)0)->thread.wstate)),\
 192           "i" ((const unsigned long)(&((struct task_struct *)0)->thread.ksp)),  \
 193           "i" ((const unsigned long)(&((struct task_struct *)0)->thread.flags)),\
 194           "i" ((const unsigned long)(&((struct task_struct *)0)->thread.cwp)),  \
 195           "i" (SPARC_FLAG_NEWCHILD)                                             \
 196         : "cc", "g1", "g2", "g3", "g5", "g7",                                   \
 197           "l2", "l3", "l4", "l5", "l6", "l7",                                   \
 198           "i0", "i1", "i2", "i3", "i4", "i5",                                   \
 199           "o0", "o1", "o2", "o3", "o4", "o5", "o7");                            \
 200         /* If you fuck with this, update ret_from_syscall code too. */          \
 201         if (current->thread.flags & SPARC_FLAG_PERFCTR) {                       \
 202                 write_pcr(current->thread.pcr_reg);                             \
 203                 reset_pic();                                                    \
 204         }                                                                       \
 205 } while(0)
 206
 207 extern __inline__ unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val)
 208 {
 209         __asm__ __volatile__("
 210         mov             %0, %%g5
 211 1:      lduw            [%2], %%g7
 212         cas             [%2], %%g7, %0
 213         cmp             %%g7, %0
 214         bne,a,pn        %%icc, 1b
 215          mov            %%g5, %0
 216         membar          #StoreLoad | #StoreStore
 217 "       : "=&r" (val)
 218         : "0" (val), "r" (m)
 219         : "g5", "g7", "cc", "memory");
 220         return val;
 221 }
 222
 223 extern __inline__ unsigned long xchg64(__volatile__ unsigned long *m, unsigned long val)
 224 {
 225         __asm__ __volatile__("
 226         mov             %0, %%g5
 227 1:      ldx             [%2], %%g7
 228         casx            [%2], %%g7, %0
 229         cmp             %%g7, %0
 230         bne,a,pn        %%xcc, 1b
 231          mov            %%g5, %0
 232         membar          #StoreLoad | #StoreStore
 233 "       : "=&r" (val)
 234         : "0" (val), "r" (m)
 235         : "g5", "g7", "cc", "memory");
 236         return val;
 237 }
 238
 239 #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
 240 #define tas(ptr) (xchg((ptr),1))
 241
 242 extern void __xchg_called_with_bad_pointer(void);
 243
 244 static __inline__ unsigned long __xchg(unsigned long x, __volatile__ void * ptr,
 245                                        int size)
 246 {
 247         switch (size) {
 248         case 4:
 249                 return xchg32(ptr, x);
 250         case 8:
 251                 return xchg64(ptr, x);
 252         };
 253         __xchg_called_with_bad_pointer();
 254         return x;
 255 }
 256
 257 extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn));
 258
 259 /*
 260  * Atomic compare and exchange.  Compare OLD with MEM, if identical,
 261  * store NEW in MEM.  Return the initial value in MEM.  Success is
 262  * indicated by comparing RETURN with OLD.
 263  */
 264
 265 #define __HAVE_ARCH_CMPXCHG 1
 266
 267 extern __inline__ unsigned long
 268 __cmpxchg_u32(volatile int *m, int old, int new)
 269 {
 270         __asm__ __volatile__("cas [%2], %3, %0\n\t"
 271                              "membar #StoreStore | #StoreLoad"
 272                              : "=&r" (new)
 273                              : "0" (new), "r" (m), "r" (old)
 274                              : "memory");
 275
 276         return new;
 277 }
 278
 279 extern __inline__ unsigned long
 280 __cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
 281 {
 282         __asm__ __volatile__("casx [%2], %3, %0\n\t"
 283                              "membar #StoreStore | #StoreLoad"
 284                              : "=&r" (new)
 285                              : "0" (new), "r" (m), "r" (old)
 286                              : "memory");
 287
 288         return new;
 289 }
 290
 291 /* This function doesn't exist, so you'll get a linker error
 292    if something tries to do an invalid cmpxchg().  */
 293 extern void __cmpxchg_called_with_bad_pointer(void);
 294
 295 static __inline__ unsigned long
 296 __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
 297 {
 298         switch (size) {
 299                 case 4:
 300                         return __cmpxchg_u32(ptr, old, new);
 301                 case 8:
 302                         return __cmpxchg_u64(ptr, old, new);
 303         }
 304         __cmpxchg_called_with_bad_pointer();
 305         return old;
 306 }
 307
 308 #define cmpxchg(ptr,o,n)                                                 \
 309   ({                                                                     \
 310      __typeof__(*(ptr)) _o_ = (o);                                       \
 311      __typeof__(*(ptr)) _n_ = (n);                                       \
 312      (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_,           \
 313                                     (unsigned long)_n_, sizeof(*(ptr))); \
 314   })
 315
 316 #endif /* !(__ASSEMBLY__) */
 317
 318 #endif /* !(__SPARC64_SYSTEM_H) */