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Portability cleanup as required by Linus.
[linux-2.6/linux-mips.git] / drivers / char / stradis.c
blob03ca27a255bcc0b2c53d39eba4f822cf8321269a
1 /*
2 * stradis.c - stradis 4:2:2 mpeg decoder driver
3 *
4 * Stradis 4:2:2 MPEG-2 Decoder Driver
5 * Copyright (C) 1999 Nathan Laredo <laredo@gnu.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/module.h>
23 #include <linux/version.h>
24 #include <linux/delay.h>
25 #include <linux/errno.h>
26 #include <linux/fs.h>
27 #include <linux/kernel.h>
28 #include <linux/major.h>
29 #include <linux/malloc.h>
30 #include <linux/mm.h>
31 #include <linux/init.h>
32 #include <linux/poll.h>
33 #include <linux/pci.h>
34 #include <linux/signal.h>
35 #include <asm/io.h>
36 #include <linux/ioport.h>
37 #include <asm/pgtable.h>
38 #include <asm/page.h>
39 #include <linux/sched.h>
40 #include <asm/segment.h>
41 #include <asm/types.h>
42 #include <linux/types.h>
43 #include <linux/wrapper.h>
44 #include <linux/interrupt.h>
45 #include <asm/uaccess.h>
46 #include <linux/vmalloc.h>
47 #include <linux/videodev.h>
48 #include <linux/i2c-old.h>
49
50 #include "saa7146.h"
51 #include "saa7146reg.h"
52 #include "ibmmpeg2.h"
53 #include "saa7121.h"
54 #include "cs8420.h"
55
56 #define DEBUG(x) /* debug driver */
57 #undef IDEBUG(x) /* debug irq handler */
58 #undef MDEBUG(x) /* debug memory management */
59
60 #define SAA7146_MAX 6
61
62 static struct saa7146 saa7146s[SAA7146_MAX];
63
64 static int saa_num = 0; /* number of SAA7146s in use */
65
66 #define nDebNormal 0x00480000
67 #define nDebNoInc 0x00480000
68 #define nDebVideo 0xd0480000
69 #define nDebAudio 0xd0400000
70 #define nDebDMA 0x02c80000
71
72 #define oDebNormal 0x13c80000
73 #define oDebNoInc 0x13c80000
74 #define oDebVideo 0xd1080000
75 #define oDebAudio 0xd1080000
76 #define oDebDMA 0x03080000
77
78 #define NewCard (saa->boardcfg[3])
79 #define ChipControl (saa->boardcfg[1])
80 #define NTSCFirstActive (saa->boardcfg[4])
81 #define PALFirstActive (saa->boardcfg[5])
82 #define NTSCLastActive (saa->boardcfg[54])
83 #define PALLastActive (saa->boardcfg[55])
84 #define Have2MB (saa->boardcfg[18] & 0x40)
85 #define HaveCS8420 (saa->boardcfg[18] & 0x04)
86 #define IBMMPEGCD20 (saa->boardcfg[18] & 0x20)
87 #define HaveCS3310 (saa->boardcfg[18] & 0x01)
88 #define CS3310MaxLvl ((saa->boardcfg[30] << 8) | saa->boardcfg[31])
89 #define HaveCS4341 (saa->boardcfg[40] == 2)
90 #define SDIType (saa->boardcfg[27])
91 #define CurrentMode (saa->boardcfg[2])
92
93 #define debNormal (NewCard ? nDebNormal : oDebNormal)
94 #define debNoInc (NewCard ? nDebNoInc : oDebNoInc)
95 #define debVideo (NewCard ? nDebVideo : oDebVideo)
96 #define debAudio (NewCard ? nDebAudio : oDebAudio)
97 #define debDMA (NewCard ? nDebDMA : oDebDMA)
98
99 #ifdef DEBUG
100 int stradis_driver(void) /* for the benefit of ksymoops */
101 {
102 return 1;
103 }
104 #endif
105
106 #ifdef USE_RESCUE_EEPROM_SDM275
107 static unsigned char rescue_eeprom[64] = {
108 0x00,0x01,0x04,0x13,0x26,0x0f,0x10,0x00,0x00,0x00,0x43,0x63,0x22,0x01,0x29,0x15,0x73,0x00,0x1f, 'd', 'e', 'c', 'x', 'l', 'd', 'v', 'a',0x02,0x00,0x01,0x00,0xcc,0xa4,0x63,0x09,0xe2,0x10,0x00,0x0a,0x00,0x02,0x02, 'd', 'e', 'c', 'x', 'l', 'a',0x00,0x00,0x42,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
109 };
110 #endif
111
112 /* ----------------------------------------------------------------------- */
113 /* Hardware I2C functions */
114 static void I2CWipe(struct saa7146 *saa)
115 {
116 int i;
117 /* set i2c to ~=100kHz, abort transfer, clear busy */
118 saawrite(0x600 | SAA7146_I2C_ABORT, SAA7146_I2C_STATUS);
119 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
120 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
121 /* wait for i2c registers to be programmed */
122 for (i = 0; i < 1000 &&
123 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
124 schedule();
125 saawrite(0x600, SAA7146_I2C_STATUS);
126 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
127 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
128 /* wait for i2c registers to be programmed */
129 for (i = 0; i < 1000 &&
130 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
131 schedule();
132 saawrite(0x600, SAA7146_I2C_STATUS);
133 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
134 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
135 /* wait for i2c registers to be programmed */
136 for (i = 0; i < 1000 &&
137 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
138 schedule();
139 }
140 /* read I2C */
141 static int I2CRead(struct i2c_bus *bus, unsigned char addr,
142 unsigned char subaddr, int dosub)
143 {
144 struct saa7146 *saa = (struct saa7146 *) bus->data;
145 int i;
146
147
148 if (saaread(SAA7146_I2C_STATUS) & 0x3c)
149 I2CWipe(saa);
150 for (i = 0; i < 1000 &&
151 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
152 schedule();
153 if (i == 1000)
154 I2CWipe(saa);
155 if (dosub)
156 saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 8) |
157 ((subaddr & 0xff) << 16) | 0xed, SAA7146_I2C_TRANSFER);
158 else
159 saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 16) |
160 0xf1, SAA7146_I2C_TRANSFER);
161 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
162 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
163 /* wait for i2c registers to be programmed */
164 for (i = 0; i < 1000 &&
165 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
166 schedule();
167 /* wait for valid data */
168 for (i = 0; i < 1000 &&
169 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
170 schedule();
171 if (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_ERR)
172 return -1;
173 if (i == 1000)
174 printk("i2c setup read timeout\n");
175 saawrite(0x41, SAA7146_I2C_TRANSFER);
176 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
177 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
178 /* wait for i2c registers to be programmed */
179 for (i = 0; i < 1000 &&
180 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
181 schedule();
182 /* wait for valid data */
183 for (i = 0; i < 1000 &&
184 (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_BUSY); i++)
185 schedule();
186 if (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_ERR)
187 return -1;
188 if (i == 1000)
189 printk("i2c read timeout\n");
190 return ((saaread(SAA7146_I2C_TRANSFER) >> 24) & 0xff);
191 }
192 static int I2CReadOld(struct i2c_bus *bus, unsigned char addr)
193 {
194 return I2CRead(bus, addr, 0, 0);
195 }
196
197 /* set both to write both bytes, reset it to write only b1 */
198
199 static int I2CWrite(struct i2c_bus *bus, unsigned char addr, unsigned char b1,
200 unsigned char b2, int both)
201 {
202 struct saa7146 *saa = (struct saa7146 *) bus->data;
203 int i;
204 u32 data;
205
206 if (saaread(SAA7146_I2C_STATUS) & 0x3c)
207 I2CWipe(saa);
208 for (i = 0; i < 1000 &&
209 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
210 schedule();
211 if (i == 1000)
212 I2CWipe(saa);
213 data = ((addr & 0xfe) << 24) | ((b1 & 0xff) << 16);
214 if (both)
215 data |= ((b2 & 0xff) << 8) | 0xe5;
216 else
217 data |= 0xd1;
218 saawrite(data, SAA7146_I2C_TRANSFER);
219 saawrite((SAA7146_MC2_UPLD_I2C << 16) | SAA7146_MC2_UPLD_I2C,
220 SAA7146_MC2);
221 return 0;
222 }
223
224 static void attach_inform(struct i2c_bus *bus, int id)
225 {
226 struct saa7146 *saa = (struct saa7146 *) bus->data;
227 int i;
228
229 DEBUG(printk(KERN_DEBUG "stradis%d: i2c: device found=%02x\n", saa->nr, id));
230 if (id == 0xa0) { /* we have rev2 or later board, fill in info */
231 for (i = 0; i < 64; i++)
232 saa->boardcfg[i] = I2CRead(bus, 0xa0, i, 1);
233 #ifdef USE_RESCUE_EEPROM_SDM275
234 if (saa->boardcfg[0] != 0) {
235 printk("stradis%d: WARNING: EEPROM STORED VALUES HAVE BEEN IGNORED\n", saa->nr);
236 for (i = 0; i < 64; i++)
237 saa->boardcfg[i] = rescue_eeprom[i];
238 }
239 #endif
240 printk("stradis%d: config =", saa->nr);
241 for (i = 0; i < 51; i++) {
242 printk(" %02x",saa->boardcfg[i]);
243 }
244 printk("\n");
245 }
246 }
247
248 static void detach_inform(struct i2c_bus *bus, int id)
249 {
250 struct saa7146 *saa = (struct saa7146 *) bus->data;
251 int i;
252 i = saa->nr;
253 }
254
255 static void I2CBusScan(struct i2c_bus *bus)
256 {
257 int i;
258 for (i = 0; i < 0xff; i += 2)
259 if ((I2CRead(bus, i, 0, 0)) >= 0)
260 attach_inform(bus, i);
261 }
262
263 static struct i2c_bus saa7146_i2c_bus_template =
264 {
265 "saa7146",
266 I2C_BUSID_BT848,
267 NULL,
268 SPIN_LOCK_UNLOCKED,
269 attach_inform,
270 detach_inform,
271 NULL,
272 NULL,
273 I2CReadOld,
274 I2CWrite,
275 };
276
277 static int debiwait_maxwait = 0;
278
279 static int wait_for_debi_done(struct saa7146 *saa)
280 {
281 int i;
282
283 /* wait for registers to be programmed */
284 for (i = 0; i < 100000 &&
285 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_DEBI); i++)
286 saaread(SAA7146_MC2);
287 /* wait for transfer to complete */
288 for (i = 0; i < 500000 &&
289 (saaread(SAA7146_PSR) & SAA7146_PSR_DEBI_S); i++)
290 saaread(SAA7146_MC2);
291 if (i > debiwait_maxwait)
292 printk("wait-for-debi-done maxwait: %d\n",
293 debiwait_maxwait = i);
294
295 if (i == 500000)
296 return -1;
297 return 0;
298 }
299
300 static int debiwrite(struct saa7146 *saa, u32 config, int addr,
301 u32 val, int count)
302 {
303 u32 cmd;
304 if (count <= 0 || count > 32764)
305 return -1;
306 if (wait_for_debi_done(saa) < 0)
307 return -1;
308 saawrite(config, SAA7146_DEBI_CONFIG);
309 if (count <= 4) /* immediate transfer */
310 saawrite(val, SAA7146_DEBI_AD);
311 else /* block transfer */
312 saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
313 saawrite((cmd = (count << 17) | (addr & 0xffff)), SAA7146_DEBI_COMMAND);
314 saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
315 SAA7146_MC2);
316 return 0;
317 }
318
319 static u32 debiread(struct saa7146 *saa, u32 config, int addr, int count)
320 {
321 u32 result = 0;
322
323 if (count > 32764 || count <= 0)
324 return 0;
325 if (wait_for_debi_done(saa) < 0)
326 return 0;
327 saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
328 saawrite((count << 17) | 0x10000 | (addr & 0xffff),
329 SAA7146_DEBI_COMMAND);
330 saawrite(config, SAA7146_DEBI_CONFIG);
331 saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
332 SAA7146_MC2);
333 if (count > 4) /* not an immediate transfer */
334 return count;
335 wait_for_debi_done(saa);
336 result = saaread(SAA7146_DEBI_AD);
337 if (count == 1)
338 result &= 0xff;
339 if (count == 2)
340 result &= 0xffff;
341 if (count == 3)
342 result &= 0xffffff;
343 return result;
344 }
345
346 #if 0 /* unused */
347 /* MUST be a multiple of 8 bytes and 8-byte aligned and < 32768 bytes */
348 /* data copied into saa->dmadebi buffer, caller must re-enable interrupts */
349 static void ibm_block_dram_read(struct saa7146 *saa, int address, int bytes)
350 {
351 int i, j;
352 u32 *buf;
353 buf = (u32 *) saa->dmadebi;
354 if (bytes > 0x7000)
355 bytes = 0x7000;
356 saawrite(0, SAA7146_IER); /* disable interrupts */
357 for (i=0; i < 10000 &&
358 (debiread(saa, debNormal, IBM_MP2_DRAM_CMD_STAT, 2)
359 & 0x8000); i++)
360 saaread(SAA7146_MC2);
361 if (i == 10000)
362 printk(KERN_ERR "stradis%d: dram_busy never cleared\n",
363 saa->nr);
364 debiwrite(saa, debNormal, IBM_MP2_SRC_ADDR, (address<<16) |
365 (address>>16), 4);
366 debiwrite(saa, debNormal, IBM_MP2_BLOCK_SIZE, bytes, 2);
367 debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 0x8a10, 2);
368 for (j = 0; j < bytes/4; j++) {
369 for (i = 0; i < 10000 &&
370 (!(debiread(saa, debNormal, IBM_MP2_DRAM_CMD_STAT, 2)
371 & 0x4000)); i++)
372 saaread(SAA7146_MC2);
373 if (i == 10000)
374 printk(KERN_ERR "stradis%d: dram_ready never set\n",
375 saa->nr);
376 buf[j] = debiread(saa, debNormal, IBM_MP2_DRAM_DATA, 4);
377 }
378 }
379 #endif /* unused */
380
381 static void do_irq_send_data(struct saa7146 *saa)
382 {
383 int split, audbytes, vidbytes;
384
385 saawrite(SAA7146_PSR_PIN1, SAA7146_IER);
386 /* if special feature mode in effect, disable audio sending */
387 if (saa->playmode != VID_PLAY_NORMAL)
388 saa->audtail = saa->audhead = 0;
389 if (saa->audhead <= saa->audtail)
390 audbytes = saa->audtail - saa->audhead;
391 else
392 audbytes = 65536 - (saa->audhead - saa->audtail);
393 if (saa->vidhead <= saa->vidtail)
394 vidbytes = saa->vidtail - saa->vidhead;
395 else
396 vidbytes = 524288 - (saa->vidhead - saa->vidtail);
397 if (audbytes == 0 && vidbytes == 0 && saa->osdtail == saa->osdhead) {
398 saawrite(0, SAA7146_IER);
399 return;
400 }
401 /* if at least 1 block audio waiting and audio fifo isn't full */
402 if (audbytes >= 2048 && (debiread(saa, debNormal,
403 IBM_MP2_AUD_FIFO, 2) & 0xff) < 60) {
404 if (saa->audhead > saa->audtail)
405 split = 65536 - saa->audhead;
406 else
407 split = 0;
408 audbytes = 2048;
409 if (split > 0 && split < 2048) {
410 memcpy(saa->dmadebi, saa->audbuf + saa->audhead,
411 split);
412 saa->audhead = 0;
413 audbytes -= split;
414 } else
415 split = 0;
416 memcpy(saa->dmadebi + split, saa->audbuf + saa->audhead,
417 audbytes);
418 saa->audhead += audbytes;
419 saa->audhead &= 0xffff;
420 debiwrite(saa, debAudio, (NewCard? IBM_MP2_AUD_FIFO :
421 IBM_MP2_AUD_FIFOW), 0, 2048);
422 wake_up_interruptible(&saa->audq);
423 /* if at least 1 block video waiting and video fifo isn't full */
424 } else if (vidbytes >= 30720 && (debiread(saa, debNormal,
425 IBM_MP2_FIFO, 2)) < 16384) {
426 if (saa->vidhead > saa->vidtail)
427 split = 524288 - saa->vidhead;
428 else
429 split = 0;
430 vidbytes = 30720;
431 if (split > 0 && split < 30720) {
432 memcpy(saa->dmadebi, saa->vidbuf + saa->vidhead,
433 split);
434 saa->vidhead = 0;
435 vidbytes -= split;
436 } else
437 split = 0;
438 memcpy(saa->dmadebi + split, saa->vidbuf + saa->vidhead,
439 vidbytes);
440 saa->vidhead += vidbytes;
441 saa->vidhead &= 0x7ffff;
442 debiwrite(saa, debVideo, (NewCard ? IBM_MP2_FIFO :
443 IBM_MP2_FIFOW), 0, 30720);
444 wake_up_interruptible(&saa->vidq);
445 }
446 saawrite(SAA7146_PSR_DEBI_S | SAA7146_PSR_PIN1, SAA7146_IER);
447 }
448
449 static void send_osd_data(struct saa7146 *saa)
450 {
451 int size = saa->osdtail - saa->osdhead;
452 if (size > 30720)
453 size = 30720;
454 /* ensure some multiple of 8 bytes is transferred */
455 size = 8 * ((size + 8)>>3);
456 if (size) {
457 debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR,
458 (saa->osdhead>>3), 2);
459 memcpy(saa->dmadebi, &saa->osdbuf[saa->osdhead], size);
460 saa->osdhead += size;
461 /* block transfer of next 8 bytes to ~32k bytes */
462 debiwrite(saa, debNormal, IBM_MP2_OSD_DATA, 0, size);
463 }
464 if (saa->osdhead >= saa->osdtail) {
465 saa->osdhead = saa->osdtail = 0;
466 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
467 }
468 }
469
470 static void saa7146_irq(int irq, void *dev_id, struct pt_regs *regs)
471 {
472 struct saa7146 *saa = (struct saa7146 *) dev_id;
473 u32 stat, astat;
474 int count;
475
476 count = 0;
477 while (1) {
478 /* get/clear interrupt status bits */
479 stat = saaread(SAA7146_ISR);
480 astat = stat & saaread(SAA7146_IER);
481 if (!astat)
482 return;
483 saawrite(astat, SAA7146_ISR);
484 if (astat & SAA7146_PSR_DEBI_S) {
485 do_irq_send_data(saa);
486 }
487 if (astat & SAA7146_PSR_PIN1) {
488 int istat;
489 /* the following read will trigger DEBI_S */
490 istat = debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
491 if (istat & 1) {
492 saawrite(0, SAA7146_IER);
493 send_osd_data(saa);
494 saawrite(SAA7146_PSR_DEBI_S |
495 SAA7146_PSR_PIN1, SAA7146_IER);
496 }
497 if (istat & 0x20) { /* Video Start */
498 saa->vidinfo.frame_count++;
499 }
500 if (istat & 0x400) { /* Picture Start */
501 /* update temporal reference */
502 }
503 if (istat & 0x200) { /* Picture Resolution Change */
504 /* read new resolution */
505 }
506 if (istat & 0x100) { /* New User Data found */
507 /* read new user data */
508 }
509 if (istat & 0x1000) { /* new GOP/SMPTE */
510 /* read new SMPTE */
511 }
512 if (istat & 0x8000) { /* Sequence Start Code */
513 /* reset frame counter, load sizes */
514 saa->vidinfo.frame_count = 0;
515 saa->vidinfo.h_size = 704;
516 saa->vidinfo.v_size = 480;
517 #if 0
518 if (saa->endmarkhead != saa->endmarktail) {
519 saa->audhead =
520 saa->endmark[saa->endmarkhead];
521 saa->endmarkhead++;
522 if (saa->endmarkhead >= MAX_MARKS)
523 saa->endmarkhead = 0;
524 }
525 #endif
526 }
527 if (istat & 0x4000) { /* Sequence Error Code */
528 if (saa->endmarkhead != saa->endmarktail) {
529 saa->audhead =
530 saa->endmark[saa->endmarkhead];
531 saa->endmarkhead++;
532 if (saa->endmarkhead >= MAX_MARKS)
533 saa->endmarkhead = 0;
534 }
535 }
536 }
537 #ifdef IDEBUG
538 if (astat & SAA7146_PSR_PPEF) {
539 IDEBUG(printk("stradis%d irq: PPEF\n", saa->nr));
540 }
541 if (astat & SAA7146_PSR_PABO) {
542 IDEBUG(printk("stradis%d irq: PABO\n", saa->nr));
543 }
544 if (astat & SAA7146_PSR_PPED) {
545 IDEBUG(printk("stradis%d irq: PPED\n", saa->nr));
546 }
547 if (astat & SAA7146_PSR_RPS_I1) {
548 IDEBUG(printk("stradis%d irq: RPS_I1\n", saa->nr));
549 }
550 if (astat & SAA7146_PSR_RPS_I0) {
551 IDEBUG(printk("stradis%d irq: RPS_I0\n", saa->nr));
552 }
553 if (astat & SAA7146_PSR_RPS_LATE1) {
554 IDEBUG(printk("stradis%d irq: RPS_LATE1\n", saa->nr));
555 }
556 if (astat & SAA7146_PSR_RPS_LATE0) {
557 IDEBUG(printk("stradis%d irq: RPS_LATE0\n", saa->nr));
558 }
559 if (astat & SAA7146_PSR_RPS_E1) {
560 IDEBUG(printk("stradis%d irq: RPS_E1\n", saa->nr));
561 }
562 if (astat & SAA7146_PSR_RPS_E0) {
563 IDEBUG(printk("stradis%d irq: RPS_E0\n", saa->nr));
564 }
565 if (astat & SAA7146_PSR_RPS_TO1) {
566 IDEBUG(printk("stradis%d irq: RPS_TO1\n", saa->nr));
567 }
568 if (astat & SAA7146_PSR_RPS_TO0) {
569 IDEBUG(printk("stradis%d irq: RPS_TO0\n", saa->nr));
570 }
571 if (astat & SAA7146_PSR_UPLD) {
572 IDEBUG(printk("stradis%d irq: UPLD\n", saa->nr));
573 }
574 if (astat & SAA7146_PSR_DEBI_E) {
575 IDEBUG(printk("stradis%d irq: DEBI_E\n", saa->nr));
576 }
577 if (astat & SAA7146_PSR_I2C_S) {
578 IDEBUG(printk("stradis%d irq: I2C_S\n", saa->nr));
579 }
580 if (astat & SAA7146_PSR_I2C_E) {
581 IDEBUG(printk("stradis%d irq: I2C_E\n", saa->nr));
582 }
583 if (astat & SAA7146_PSR_A2_IN) {
584 IDEBUG(printk("stradis%d irq: A2_IN\n", saa->nr));
585 }
586 if (astat & SAA7146_PSR_A2_OUT) {
587 IDEBUG(printk("stradis%d irq: A2_OUT\n", saa->nr));
588 }
589 if (astat & SAA7146_PSR_A1_IN) {
590 IDEBUG(printk("stradis%d irq: A1_IN\n", saa->nr));
591 }
592 if (astat & SAA7146_PSR_A1_OUT) {
593 IDEBUG(printk("stradis%d irq: A1_OUT\n", saa->nr));
594 }
595 if (astat & SAA7146_PSR_AFOU) {
596 IDEBUG(printk("stradis%d irq: AFOU\n", saa->nr));
597 }
598 if (astat & SAA7146_PSR_V_PE) {
599 IDEBUG(printk("stradis%d irq: V_PE\n", saa->nr));
600 }
601 if (astat & SAA7146_PSR_VFOU) {
602 IDEBUG(printk("stradis%d irq: VFOU\n", saa->nr));
603 }
604 if (astat & SAA7146_PSR_FIDA) {
605 IDEBUG(printk("stradis%d irq: FIDA\n", saa->nr));
606 }
607 if (astat & SAA7146_PSR_FIDB) {
608 IDEBUG(printk("stradis%d irq: FIDB\n", saa->nr));
609 }
610 if (astat & SAA7146_PSR_PIN3) {
611 IDEBUG(printk("stradis%d irq: PIN3\n", saa->nr));
612 }
613 if (astat & SAA7146_PSR_PIN2) {
614 IDEBUG(printk("stradis%d irq: PIN2\n", saa->nr));
615 }
616 if (astat & SAA7146_PSR_PIN0) {
617 IDEBUG(printk("stradis%d irq: PIN0\n", saa->nr));
618 }
619 if (astat & SAA7146_PSR_ECS) {
620 IDEBUG(printk("stradis%d irq: ECS\n", saa->nr));
621 }
622 if (astat & SAA7146_PSR_EC3S) {
623 IDEBUG(printk("stradis%d irq: EC3S\n", saa->nr));
624 }
625 if (astat & SAA7146_PSR_EC0S) {
626 IDEBUG(printk("stradis%d irq: EC0S\n", saa->nr));
627 }
628 #endif
629 count++;
630 if (count > 15)
631 printk(KERN_WARNING "stradis%d: irq loop %d\n",
632 saa->nr, count);
633 if (count > 20) {
634 saawrite(0, SAA7146_IER);
635 printk(KERN_ERR
636 "stradis%d: IRQ loop cleared\n", saa->nr);
637 }
638 }
639 }
640
641 static int ibm_send_command(struct saa7146 *saa,
642 int command, int data, int chain)
643 {
644 int i;
645
646 if (chain)
647 debiwrite(saa, debNormal, IBM_MP2_COMMAND, (command << 1) | 1, 2);
648 else
649 debiwrite(saa, debNormal, IBM_MP2_COMMAND, command << 1, 2);
650 debiwrite(saa, debNormal, IBM_MP2_CMD_DATA, data, 2);
651 debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 1, 2);
652 for (i = 0; i < 100 &&
653 (debiread(saa, debNormal, IBM_MP2_CMD_STAT, 2) & 1); i++)
654 schedule();
655 if (i == 100)
656 return -1;
657 return 0;
658 }
659
660 static void cs4341_setlevel(struct saa7146 *saa, int left, int right)
661 {
662 I2CWrite(&(saa->i2c), 0x22, 0x03,
663 left > 94 ? 94 : left, 2);
664 I2CWrite(&(saa->i2c), 0x22, 0x04,
665 right > 94 ? 94 : right, 2);
666 }
667
668 static void initialize_cs4341(struct saa7146 *saa)
669 {
670 int i;
671 for (i = 0; i < 200; i++) {
672 /* auto mute off, power on, no de-emphasis */
673 /* I2S data up to 24-bit 64xFs internal SCLK */
674 I2CWrite(&(saa->i2c), 0x22, 0x01, 0x11, 2);
675 /* ATAPI mixer setings */
676 I2CWrite(&(saa->i2c), 0x22, 0x02, 0x49, 2);
677 /* attenuation left 3db */
678 I2CWrite(&(saa->i2c), 0x22, 0x03, 0x00, 2);
679 /* attenuation right 3db */
680 I2CWrite(&(saa->i2c), 0x22, 0x04, 0x00, 2);
681 I2CWrite(&(saa->i2c), 0x22, 0x01, 0x10, 2);
682 if (I2CRead(&(saa->i2c), 0x22, 0x02, 1) == 0x49)
683 break;
684 schedule();
685 }
686 printk("stradis%d: CS4341 initialized (%d)\n", saa->nr, i);
687 return;
688 }
689
690 static void initialize_cs8420(struct saa7146 *saa, int pro)
691 {
692 int i;
693 u8 *sequence;
694 if (pro)
695 sequence = mode8420pro;
696 else
697 sequence = mode8420con;
698 for (i = 0; i < INIT8420LEN; i++)
699 I2CWrite(&(saa->i2c), 0x20, init8420[i * 2],
700 init8420[i * 2 + 1], 2);
701 for (i = 0; i < MODE8420LEN; i++)
702 I2CWrite(&(saa->i2c), 0x20, sequence[i * 2],
703 sequence[i * 2 + 1], 2);
704 printk("stradis%d: CS8420 initialized\n", saa->nr);
705 }
706
707 static void initialize_saa7121(struct saa7146 *saa, int dopal)
708 {
709 int i, mod;
710 u8 *sequence;
711 if (dopal)
712 sequence = init7121pal;
713 else
714 sequence = init7121ntsc;
715 mod = saaread(SAA7146_PSR) & 0x08;
716 /* initialize PAL/NTSC video encoder */
717 for (i = 0; i < INIT7121LEN; i++) {
718 if (NewCard) { /* handle new card encoder differences */
719 if (sequence[i*2] == 0x3a)
720 I2CWrite(&(saa->i2c), 0x88, 0x3a, 0x13, 2);
721 else if (sequence[i*2] == 0x6b)
722 I2CWrite(&(saa->i2c), 0x88, 0x6b, 0x20, 2);
723 else if (sequence[i*2] == 0x6c)
724 I2CWrite(&(saa->i2c), 0x88, 0x6c,
725 dopal ? 0x09 : 0xf5, 2);
726 else if (sequence[i*2] == 0x6d)
727 I2CWrite(&(saa->i2c), 0x88, 0x6d,
728 dopal ? 0x20 : 0x00, 2);
729 else if (sequence[i*2] == 0x7a)
730 I2CWrite(&(saa->i2c), 0x88, 0x7a,
731 dopal ? (PALFirstActive - 1) :
732 (NTSCFirstActive - 4), 2);
733 else if (sequence[i*2] == 0x7b)
734 I2CWrite(&(saa->i2c), 0x88, 0x7b,
735 dopal ? PALLastActive :
736 NTSCLastActive, 2);
737 else I2CWrite(&(saa->i2c), 0x88, sequence[i * 2],
738 sequence[i * 2 + 1], 2);
739 } else {
740 if (sequence[i*2] == 0x6b && mod)
741 I2CWrite(&(saa->i2c), 0x88, 0x6b,
742 (sequence[i * 2 + 1] ^ 0x09), 2);
743 else if (sequence[i*2] == 0x7a)
744 I2CWrite(&(saa->i2c), 0x88, 0x7a,
745 dopal ? (PALFirstActive - 1) :
746 (NTSCFirstActive - 4), 2);
747 else if (sequence[i*2] == 0x7b)
748 I2CWrite(&(saa->i2c), 0x88, 0x7b,
749 dopal ? PALLastActive :
750 NTSCLastActive, 2);
751 else
752 I2CWrite(&(saa->i2c), 0x88, sequence[i * 2],
753 sequence[i * 2 + 1], 2);
754 }
755 }
756 }
757
758 static void set_genlock_offset(struct saa7146 *saa, int noffset)
759 {
760 int nCode;
761 int PixelsPerLine = 858;
762 if (CurrentMode == VIDEO_MODE_PAL)
763 PixelsPerLine = 864;
764 if (noffset > 500)
765 noffset = 500;
766 else if (noffset < -500)
767 noffset = -500;
768 nCode = noffset + 0x100;
769 if (nCode == 1)
770 nCode = 0x401;
771 else if (nCode < 1) nCode = 0x400 + PixelsPerLine + nCode;
772 debiwrite(saa, debNormal, XILINX_GLDELAY, nCode, 2);
773 }
774
775 static void set_out_format(struct saa7146 *saa, int mode)
776 {
777 initialize_saa7121(saa, (mode == VIDEO_MODE_NTSC ? 0 : 1));
778 saa->boardcfg[2] = mode;
779 /* do not adjust analog video parameters here, use saa7121 init */
780 /* you will affect the SDI output on the new card */
781 if (mode == VIDEO_MODE_PAL) { /* PAL */
782 debiwrite(saa, debNormal, XILINX_CTL0, 0x0808, 2);
783 mdelay(50);
784 saawrite(0x012002c0, SAA7146_NUM_LINE_BYTE1);
785 if (NewCard) {
786 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
787 0xe100, 2);
788 mdelay(50);
789 }
790 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
791 NewCard ? 0xe500: 0x6500, 2);
792 debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
793 (1 << 8) |
794 (NewCard ? PALFirstActive : PALFirstActive-6), 2);
795 } else { /* NTSC */
796 debiwrite(saa, debNormal, XILINX_CTL0, 0x0800, 2);
797 mdelay(50);
798 saawrite(0x00f002c0, SAA7146_NUM_LINE_BYTE1);
799 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
800 NewCard ? 0xe100: 0x6100, 2);
801 debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
802 (1 << 8) |
803 (NewCard ? NTSCFirstActive : NTSCFirstActive-6), 2);
804 }
805 }
806
807
808 /* Intialize bitmangler to map from a byte value to the mangled word that
809 * must be output to program the Xilinx part through the DEBI port.
810 * Xilinx Data Bit->DEBI Bit: 0->15 1->7 2->6 3->12 4->11 5->2 6->1 7->0
811 * transfer FPGA code, init IBM chip, transfer IBM microcode
812 * rev2 card mangles: 0->7 1->6 2->5 3->4 4->3 5->2 6->1 7->0
813 */
814 static u16 bitmangler[256];
815
816 static int initialize_fpga(struct video_code *bitdata)
817 {
818 int i, num, startindex, failure = 0, loadtwo, loadfile = 0;
819 u16 *dmabuf;
820 u8 *newdma;
821 struct saa7146 *saa;
822
823 /* verify fpga code */
824 for (startindex = 0; startindex < bitdata->datasize; startindex++)
825 if (bitdata->data[startindex] == 255)
826 break;
827 if (startindex == bitdata->datasize) {
828 printk(KERN_INFO "stradis: bad fpga code\n");
829 return -1;
830 }
831 /* initialize all detected cards */
832 for (num = 0; num < saa_num; num++) {
833 saa = &saa7146s[num];
834 if (saa->boardcfg[0] > 20)
835 continue; /* card was programmed */
836 loadtwo = (saa->boardcfg[18] & 0x10);
837 if (!NewCard) /* we have an old board */
838 for (i = 0; i < 256; i++)
839 bitmangler[i] = ((i & 0x01) << 15) |
840 ((i & 0x02) << 6) | ((i & 0x04) << 4) |
841 ((i & 0x08) << 9) | ((i & 0x10) << 7) |
842 ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
843 ((i & 0x80) >> 7);
844 else /* else we have a new board */
845 for (i = 0; i < 256; i++)
846 bitmangler[i] = ((i & 0x01) << 7) |
847 ((i & 0x02) << 5) | ((i & 0x04) << 3) |
848 ((i & 0x08) << 1) | ((i & 0x10) >> 1) |
849 ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
850 ((i & 0x80) >> 7);
851
852 dmabuf = (u16 *) saa->dmadebi;
853 newdma = (u8 *) saa->dmadebi;
854 if (NewCard) { /* SDM2xxx */
855 if (!strncmp(bitdata->loadwhat, "decoder2", 8))
856 continue; /* fpga not for this card */
857 if (!strncmp(&saa->boardcfg[42],
858 bitdata->loadwhat, 8)) {
859 loadfile = 1;
860 } else if (loadtwo && !strncmp(&saa->boardcfg[19],
861 bitdata->loadwhat, 8)) {
862 loadfile = 2;
863 } else if (!saa->boardcfg[42] && /* special */
864 !strncmp("decxl", bitdata->loadwhat, 8)) {
865 loadfile = 1;
866 } else
867 continue; /* fpga not for this card */
868 if (loadfile != 1 && loadfile != 2) {
869 continue; /* skip to next card */
870 }
871 if (saa->boardcfg[0] && loadfile == 1 )
872 continue; /* skip to next card */
873 if (saa->boardcfg[0] != 1 && loadfile == 2)
874 continue; /* skip to next card */
875 saa->boardcfg[0]++; /* mark fpga handled */
876 printk("stradis%d: loading %s\n", saa->nr,
877 bitdata->loadwhat);
878 if (loadtwo && loadfile == 2)
879 goto send_fpga_stuff;
880 /* turn on the Audio interface to set PROG low */
881 saawrite(0x00400040, SAA7146_GPIO_CTRL);
882 saaread(SAA7146_PSR); /* ensure posted write */
883 /* wait for everyone to reset */
884 mdelay(10);
885 saawrite(0x00400000, SAA7146_GPIO_CTRL);
886 } else { /* original card */
887 if (strncmp(bitdata->loadwhat, "decoder2", 8))
888 continue; /* fpga not for this card */
889 /* Pull the Xilinx PROG signal WS3 low */
890 saawrite(0x02000200, SAA7146_MC1);
891 /* Turn on the Audio interface so can set PROG low */
892 saawrite(0x000000c0, SAA7146_ACON1);
893 /* Pull the Xilinx INIT signal (GPIO2) low */
894 saawrite(0x00400000, SAA7146_GPIO_CTRL);
895 /* Make sure everybody resets */
896 saaread(SAA7146_PSR); /* ensure posted write */
897 mdelay(10);
898 /* Release the Xilinx PROG signal */
899 saawrite(0x00000000, SAA7146_ACON1);
900 /* Turn off the Audio interface */
901 saawrite(0x02000000, SAA7146_MC1);
902 }
903 /* Release Xilinx INIT signal (WS2) */
904 saawrite(0x00000000, SAA7146_GPIO_CTRL);
905 /* Wait for the INIT to go High */
906 for (i = 0; i < 10000 &&
907 !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2); i++)
908 schedule();
909 if (i == 1000) {
910 printk(KERN_INFO "stradis%d: no fpga INIT\n", saa->nr);
911 return -1;
912 }
913 send_fpga_stuff:
914 if (NewCard) {
915 for (i = startindex; i < bitdata->datasize; i++)
916 newdma[i - startindex] =
917 bitmangler[bitdata->data[i]];
918 debiwrite(saa, 0x01420000, 0, 0,
919 ((bitdata->datasize - startindex) + 5));
920 if (loadtwo) {
921 if (loadfile == 1) {
922 printk("stradis%d: "
923 "awaiting 2nd FPGA bitfile\n",
924 saa->nr);
925 continue; /* skip to next card */
926 }
927
928 }
929 } else {
930 for (i = startindex; i < bitdata->datasize; i++)
931 dmabuf[i - startindex] =
932 bitmangler[bitdata->data[i]];
933 debiwrite(saa, 0x014a0000, 0, 0,
934 ((bitdata->datasize - startindex) + 5) * 2);
935 }
936 for (i = 0; i < 1000 &&
937 !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2); i++)
938 schedule();
939 if (i == 1000) {
940 printk(KERN_INFO "stradis%d: FPGA load failed\n",
941 saa->nr);
942 failure++;
943 continue;
944 }
945 if (!NewCard) {
946 /* Pull the Xilinx INIT signal (GPIO2) low */
947 saawrite(0x00400000, SAA7146_GPIO_CTRL);
948 saaread(SAA7146_PSR); /* ensure posted write */
949 mdelay(2);
950 saawrite(0x00000000, SAA7146_GPIO_CTRL);
951 mdelay(2);
952 }
953 printk(KERN_INFO "stradis%d: FPGA Loaded\n", saa->nr);
954 saa->boardcfg[0] = 26; /* mark fpga programmed */
955 /* set VXCO to its lowest frequency */
956 debiwrite(saa, debNormal, XILINX_PWM, 0, 2);
957 if (NewCard) {
958 /* mute CS3310 */
959 if (HaveCS3310)
960 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT,
961 0, 2);
962 /* set VXCO to PWM mode, release reset, blank on */
963 debiwrite(saa, debNormal, XILINX_CTL0, 0xffc4, 2);
964 mdelay(10);
965 /* unmute CS3310 */
966 if (HaveCS3310)
967 debiwrite(saa, debNormal, XILINX_CTL0,
968 0x2020, 2);
969 }
970 /* set source Black */
971 debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
972 saa->boardcfg[4] = 22; /* set NTSC First Active Line */
973 saa->boardcfg[5] = 23; /* set PAL First Active Line */
974 saa->boardcfg[54] = 2; /* set NTSC Last Active Line - 256 */
975 saa->boardcfg[55] = 54; /* set PAL Last Active Line - 256 */
976 set_out_format(saa, VIDEO_MODE_NTSC);
977 mdelay(50);
978 /* begin IBM chip init */
979 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
980 saaread(SAA7146_PSR); /* wait for reset */
981 mdelay(5);
982 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
983 debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
984 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0x10, 2);
985 debiwrite(saa, debNormal, IBM_MP2_CMD_ADDR, 0, 2);
986 debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
987 if (NewCard) {
988 mdelay(5);
989 /* set i2s rate converter to 48KHz */
990 debiwrite(saa, debNormal, 0x80c0, 6, 2);
991 /* we must init CS8420 first since rev b pulls i2s */
992 /* master clock low and CS4341 needs i2s master to */
993 /* run the i2c port. */
994 if (HaveCS8420) {
995 /* 0=consumer, 1=pro */
996 initialize_cs8420(saa, 0);
997 }
998 mdelay(5);
999 if (HaveCS4341)
1000 initialize_cs4341(saa);
1001 }
1002 debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
1003 debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
1004 debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
1005 debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
1006 if (NewCard)
1007 set_genlock_offset(saa, 0);
1008 debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
1009 #if 0
1010 /* enable genlock */
1011 debiwrite(saa, debNormal, XILINX_CTL0, 0x8000, 2);
1012 #else
1013 /* disable genlock */
1014 debiwrite(saa, debNormal, XILINX_CTL0, 0x8080, 2);
1015 #endif
1016 }
1017 return failure;
1018 }
1019
1020 static int do_ibm_reset(struct saa7146 *saa)
1021 {
1022 /* failure if decoder not previously programmed */
1023 if (saa->boardcfg[0] < 37)
1024 return -EIO;
1025 /* mute CS3310 */
1026 if (HaveCS3310)
1027 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 0, 2);
1028 /* disable interrupts */
1029 saawrite(0, SAA7146_IER);
1030 saa->audhead = saa->audtail = 0;
1031 saa->vidhead = saa->vidtail = 0;
1032 /* tristate debi bus, disable debi transfers */
1033 saawrite(0x00880000, SAA7146_MC1);
1034 /* ensure posted write */
1035 saaread(SAA7146_MC1);
1036 mdelay(50);
1037 /* re-enable debi transfers */
1038 saawrite(0x00880088, SAA7146_MC1);
1039 /* set source Black */
1040 debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
1041 /* begin IBM chip init */
1042 set_out_format(saa, CurrentMode);
1043 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
1044 saaread(SAA7146_PSR); /* wait for reset */
1045 mdelay(5);
1046 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
1047 debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
1048 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
1049 debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
1050 if (NewCard) {
1051 mdelay(5);
1052 /* set i2s rate converter to 48KHz */
1053 debiwrite(saa, debNormal, 0x80c0, 6, 2);
1054 /* we must init CS8420 first since rev b pulls i2s */
1055 /* master clock low and CS4341 needs i2s master to */
1056 /* run the i2c port. */
1057 if (HaveCS8420) {
1058 /* 0=consumer, 1=pro */
1059 initialize_cs8420(saa, 1);
1060 }
1061 mdelay(5);
1062 if (HaveCS4341)
1063 initialize_cs4341(saa);
1064 }
1065 debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
1066 debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
1067 debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
1068 debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
1069 if (NewCard)
1070 set_genlock_offset(saa, 0);
1071 debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
1072 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
1073 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
1074 if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
1075 (ChipControl == 0x43 ? 0xe800 : 0xe000), 1)) {
1076 printk(KERN_ERR "stradis%d: IBM config failed\n", saa->nr);
1077 }
1078 if (HaveCS3310) {
1079 int i = CS3310MaxLvl;
1080 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, ((i<<8)|i), 2);
1081 }
1082 /* start video decoder */
1083 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
1084 /* 256k vid, 3520 bytes aud */
1085 debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037, 2);
1086 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
1087 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
1088 /* enable buffer threshold irq */
1089 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
1090 /* clear pending interrupts */
1091 debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
1092 debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
1093 return 0;
1094 }
1095
1096 /* load the decoder microcode */
1097 static int initialize_ibmmpeg2(struct video_code *microcode)
1098 {
1099 int i, num;
1100 struct saa7146 *saa;
1101
1102 for (num = 0; num < saa_num; num++) {
1103 saa = &saa7146s[num];
1104 /* check that FPGA is loaded */
1105 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0xa55a, 2);
1106 if ((i = debiread(saa, debNormal, IBM_MP2_OSD_SIZE, 2)) !=
1107 0xa55a) {
1108 printk(KERN_INFO "stradis%d: %04x != 0xa55a\n",
1109 saa->nr, i);
1110 #if 0
1111 return -1;
1112 #endif
1113 }
1114 if (!strncmp(microcode->loadwhat, "decoder.vid", 11)) {
1115 if (saa->boardcfg[0] > 27)
1116 continue; /* skip to next card */
1117 /* load video control store */
1118 saa->boardcfg[1] = 0x13; /* no-sync default */
1119 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
1120 debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
1121 for (i = 0; i < microcode->datasize / 2; i++)
1122 debiwrite(saa, debNormal, IBM_MP2_PROC_IDATA,
1123 (microcode->data[i * 2] << 8) |
1124 microcode->data[i * 2 + 1], 2);
1125 debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
1126 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
1127 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
1128 ChipControl, 2);
1129 saa->boardcfg[0] = 28;
1130 }
1131 if (!strncmp(microcode->loadwhat, "decoder.aud", 11)) {
1132 if (saa->boardcfg[0] > 35)
1133 continue; /* skip to next card */
1134 /* load audio control store */
1135 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
1136 debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
1137 for (i = 0; i < microcode->datasize; i++)
1138 debiwrite(saa, debNormal, IBM_MP2_AUD_IDATA,
1139 microcode->data[i], 1);
1140 debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
1141 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
1142 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
1143 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
1144 if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
1145 0xe000, 1)) {
1146 printk(KERN_ERR
1147 "stradis%d: IBM config failed\n",
1148 saa->nr);
1149 return -1;
1150 }
1151 /* set PWM to center value */
1152 if (NewCard) {
1153 debiwrite(saa, debNormal, XILINX_PWM,
1154 saa->boardcfg[14] +
1155 (saa->boardcfg[13]<<8), 2);
1156 } else
1157 debiwrite(saa, debNormal, XILINX_PWM,
1158 0x46, 2);
1159 if (HaveCS3310) {
1160 i = CS3310MaxLvl;
1161 debiwrite(saa, debNormal,
1162 XILINX_CS3310_CMPLT, ((i<<8)|i), 2);
1163 }
1164 printk(KERN_INFO
1165 "stradis%d: IBM MPEGCD%d Initialized\n",
1166 saa->nr, 18 + (debiread(saa, debNormal,
1167 IBM_MP2_CHIP_CONTROL, 2) >> 12));
1168 /* start video decoder */
1169 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
1170 ChipControl, 2);
1171 debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD,
1172 0x4037, 2); /* 256k vid, 3520 bytes aud */
1173 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
1174 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
1175 /* enable buffer threshold irq */
1176 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
1177 debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
1178 /* enable gpio irq */
1179 saawrite(0x00002000, SAA7146_GPIO_CTRL);
1180 /* enable decoder output to HPS */
1181 debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
1182 saa->boardcfg[0] = 37;
1183 }
1184 }
1185 return 0;
1186 }
1187
1188 static u32 palette2fmt[] =
1189 { /* some of these YUV translations are wrong */
1190 0xffffffff, 0x86000000, 0x87000000, 0x80000000, 0x8100000, 0x82000000,
1191 0x83000000, 0x00000000, 0x03000000, 0x03000000, 0x0a00000, 0x03000000,
1192 0x06000000, 0x00000000, 0x03000000, 0x0a000000, 0x0300000
1193 };
1194 static int bpp2fmt[4] =
1195 {
1196 VIDEO_PALETTE_HI240, VIDEO_PALETTE_RGB565, VIDEO_PALETTE_RGB24,
1197 VIDEO_PALETTE_RGB32
1198 };
1199
1200 /* I wish I could find a formula to calculate these... */
1201 static u32 h_prescale[64] =
1202 {
1203 0x10000000, 0x18040202, 0x18080000, 0x380c0606, 0x38100204, 0x38140808,
1204 0x38180000, 0x381c0000, 0x3820161c, 0x38242a3b, 0x38281230, 0x382c4460,
1205 0x38301040, 0x38340080, 0x38380000, 0x383c0000, 0x3840fefe, 0x3844ee9f,
1206 0x3848ee9f, 0x384cee9f, 0x3850ee9f, 0x38542a3b, 0x38581230, 0x385c0000,
1207 0x38600000, 0x38640000, 0x38680000, 0x386c0000, 0x38700000, 0x38740000,
1208 0x38780000, 0x387c0000, 0x30800000, 0x38840000, 0x38880000, 0x388c0000,
1209 0x38900000, 0x38940000, 0x38980000, 0x389c0000, 0x38a00000, 0x38a40000,
1210 0x38a80000, 0x38ac0000, 0x38b00000, 0x38b40000, 0x38b80000, 0x38bc0000,
1211 0x38c00000, 0x38c40000, 0x38c80000, 0x38cc0000, 0x38d00000, 0x38d40000,
1212 0x38d80000, 0x38dc0000, 0x38e00000, 0x38e40000, 0x38e80000, 0x38ec0000,
1213 0x38f00000, 0x38f40000, 0x38f80000, 0x38fc0000,
1214 };
1215 static u32 v_gain[64] =
1216 {
1217 0x016000ff, 0x016100ff, 0x016100ff, 0x016200ff, 0x016200ff, 0x016200ff,
1218 0x016200ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff,
1219 0x016300ff, 0x016300ff, 0x016300ff, 0x016400ff, 0x016400ff, 0x016400ff,
1220 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1221 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1222 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1223 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1224 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1225 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1226 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1227 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1228 };
1229
1230
1231 static void saa7146_set_winsize(struct saa7146 *saa)
1232 {
1233 u32 format;
1234 int offset, yacl, ysci;
1235 saa->win.color_fmt = format =
1236 (saa->win.depth == 15) ? palette2fmt[VIDEO_PALETTE_RGB555] :
1237 palette2fmt[bpp2fmt[(saa->win.bpp - 1) & 3]];
1238 offset = saa->win.x * saa->win.bpp + saa->win.y * saa->win.bpl;
1239 saawrite(saa->win.vidadr + offset, SAA7146_BASE_EVEN1);
1240 saawrite(saa->win.vidadr + offset + saa->win.bpl, SAA7146_BASE_ODD1);
1241 saawrite(saa->win.bpl * 2, SAA7146_PITCH1);
1242 saawrite(saa->win.vidadr + saa->win.bpl * saa->win.sheight,
1243 SAA7146_PROT_ADDR1);
1244 saawrite(0, SAA7146_PAGE1);
1245 saawrite(format|0x60, SAA7146_CLIP_FORMAT_CTRL);
1246 offset = (704 / (saa->win.width - 1)) & 0x3f;
1247 saawrite(h_prescale[offset], SAA7146_HPS_H_PRESCALE);
1248 offset = (720896 / saa->win.width) / (offset + 1);
1249 saawrite((offset<<12)|0x0c, SAA7146_HPS_H_SCALE);
1250 if (CurrentMode == VIDEO_MODE_NTSC) {
1251 yacl = /*(480 / saa->win.height - 1) & 0x3f*/ 0;
1252 ysci = 1024 - (saa->win.height * 1024 / 480);
1253 } else {
1254 yacl = /*(576 / saa->win.height - 1) & 0x3f*/ 0;
1255 ysci = 1024 - (saa->win.height * 1024 / 576);
1256 }
1257 saawrite((1<<31)|(ysci<<21)|(yacl<<15), SAA7146_HPS_V_SCALE);
1258 saawrite(v_gain[yacl], SAA7146_HPS_V_GAIN);
1259 saawrite(((SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_HPS_V |
1260 SAA7146_MC2_UPLD_HPS_H) << 16) | (SAA7146_MC2_UPLD_DMA1 |
1261 SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_HPS_H),
1262 SAA7146_MC2);
1263 }
1264
1265 /* clip_draw_rectangle(cm,x,y,w,h) -- handle clipping an area
1266 * bitmap is fixed width, 128 bytes (1024 pixels represented)
1267 * arranged most-sigificant-bit-left in 32-bit words
1268 * based on saa7146 clipping hardware, it swaps bytes if LE
1269 * much of this makes up for egcs brain damage -- so if you
1270 * are wondering "why did he do this?" it is because the C
1271 * was adjusted to generate the optimal asm output without
1272 * writing non-portable __asm__ directives.
1273 */
1274
1275 static void clip_draw_rectangle(u32 *clipmap, int x, int y, int w, int h)
1276 {
1277 register int startword, endword;
1278 register u32 bitsleft, bitsright;
1279 u32 *temp;
1280 if (x < 0) {
1281 w += x;
1282 x = 0;
1283 }
1284 if (y < 0) {
1285 h += y;
1286 y = 0;
1287 }
1288 if (w <= 0 || h <= 0 || x > 1023 || y > 639)
1289 return; /* throw away bad clips */
1290 if (x + w > 1024)
1291 w = 1024 - x;
1292 if (y + h > 640)
1293 h = 640 - y;
1294 startword = (x >> 5);
1295 endword = ((x + w) >> 5);
1296 bitsleft = (0xffffffff >> (x & 31));
1297 bitsright = (0xffffffff << (~((x + w) - (endword<<5))));
1298 temp = &clipmap[(y<<5) + startword];
1299 w = endword - startword;
1300 if (!w) {
1301 bitsleft |= bitsright;
1302 for (y = 0; y < h; y++) {
1303 *temp |= bitsleft;
1304 temp += 32;
1305 }
1306 } else {
1307 for (y = 0; y < h; y++) {
1308 *temp++ |= bitsleft;
1309 for (x = 1; x < w; x++)
1310 *temp++ = 0xffffffff;
1311 *temp |= bitsright;
1312 temp += (32 - w);
1313 }
1314 }
1315 }
1316
1317 static void make_clip_tab(struct saa7146 *saa, struct video_clip *cr, int ncr)
1318 {
1319 int i, width, height;
1320 u32 *clipmap;
1321
1322 clipmap = saa->dmavid2;
1323 if((width=saa->win.width)>1023)
1324 width = 1023; /* sanity check */
1325 if((height=saa->win.height)>640)
1326 height = 639; /* sanity check */
1327 if (ncr > 0) { /* rectangles pased */
1328 /* convert rectangular clips to a bitmap */
1329 memset(clipmap, 0, VIDEO_CLIPMAP_SIZE); /* clear map */
1330 for (i = 0; i < ncr; i++)
1331 clip_draw_rectangle(clipmap, cr[i].x, cr[i].y,
1332 cr[i].width, cr[i].height);
1333 }
1334 /* clip against viewing window AND screen
1335 so we do not have to rely on the user program
1336 */
1337 clip_draw_rectangle(clipmap,(saa->win.x+width>saa->win.swidth) ?
1338 (saa->win.swidth-saa->win.x) : width, 0, 1024, 768);
1339 clip_draw_rectangle(clipmap,0,(saa->win.y+height>saa->win.sheight) ?
1340 (saa->win.sheight-saa->win.y) : height,1024,768);
1341 if (saa->win.x<0)
1342 clip_draw_rectangle(clipmap, 0, 0, -(saa->win.x), 768);
1343 if (saa->win.y<0)
1344 clip_draw_rectangle(clipmap, 0, 0, 1024, -(saa->win.y));
1345 }
1346
1347 static int saa_ioctl(struct video_device *dev, unsigned int cmd, void *arg)
1348 {
1349 struct saa7146 *saa = (struct saa7146 *) dev;
1350 switch (cmd) {
1351 case VIDIOCGCAP:
1352 {
1353 struct video_capability b;
1354 strcpy(b.name, saa->video_dev.name);
1355 b.type = VID_TYPE_CAPTURE |
1356 VID_TYPE_OVERLAY |
1357 VID_TYPE_CLIPPING |
1358 VID_TYPE_FRAMERAM |
1359 VID_TYPE_SCALES;
1360 b.channels = 1;
1361 b.audios = 1;
1362 b.maxwidth = 768;
1363 b.maxheight = 576;
1364 b.minwidth = 32;
1365 b.minheight = 32;
1366 if (copy_to_user(arg, &b, sizeof(b)))
1367 return -EFAULT;
1368 return 0;
1369 }
1370 case VIDIOCGPICT:
1371 {
1372 struct video_picture p = saa->picture;
1373 if (saa->win.depth == 8)
1374 p.palette = VIDEO_PALETTE_HI240;
1375 if (saa->win.depth == 15)
1376 p.palette = VIDEO_PALETTE_RGB555;
1377 if (saa->win.depth == 16)
1378 p.palette = VIDEO_PALETTE_RGB565;
1379 if (saa->win.depth == 24)
1380 p.palette = VIDEO_PALETTE_RGB24;
1381 if (saa->win.depth == 32)
1382 p.palette = VIDEO_PALETTE_RGB32;
1383 if (copy_to_user(arg, &p, sizeof(p)))
1384 return -EFAULT;
1385 return 0;
1386 }
1387 case VIDIOCSPICT:
1388 {
1389 struct video_picture p;
1390 u32 format;
1391 if (copy_from_user(&p, arg, sizeof(p)))
1392 return -EFAULT;
1393 if (p.palette < sizeof(palette2fmt) / sizeof(u32)) {
1394 format = palette2fmt[p.palette];
1395 saa->win.color_fmt = format;
1396 saawrite(format|0x60, SAA7146_CLIP_FORMAT_CTRL);
1397 }
1398 saawrite(((p.brightness & 0xff00) << 16) |
1399 ((p.contrast & 0xfe00) << 7) |
1400 ((p.colour & 0xfe00) >> 9), SAA7146_BCS_CTRL);
1401 saa->picture = p;
1402 /* upload changed registers */
1403 saawrite(((SAA7146_MC2_UPLD_HPS_H |
1404 SAA7146_MC2_UPLD_HPS_V) << 16) |
1405 SAA7146_MC2_UPLD_HPS_H | SAA7146_MC2_UPLD_HPS_V,
1406 SAA7146_MC2);
1407 return 0;
1408 }
1409 case VIDIOCSWIN:
1410 {
1411 struct video_window vw;
1412 struct video_clip *vcp = NULL;
1413
1414 if (copy_from_user(&vw, arg, sizeof(vw)))
1415 return -EFAULT;
1416
1417 if (vw.flags || vw.width < 16 || vw.height < 16) { /* stop capture */
1418 saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1);
1419 return -EINVAL;
1420 }
1421 if (saa->win.bpp < 4) { /* 32-bit align start and adjust width */
1422 int i = vw.x;
1423 vw.x = (vw.x + 3) & ~3;
1424 i = vw.x - i;
1425 vw.width -= i;
1426 }
1427 saa->win.x = vw.x;
1428 saa->win.y = vw.y;
1429 saa->win.width = vw.width;
1430 if (saa->win.width > 768)
1431 saa->win.width = 768;
1432 saa->win.height = vw.height;
1433 if (CurrentMode == VIDEO_MODE_NTSC) {
1434 if (saa->win.height > 480)
1435 saa->win.height = 480;
1436 } else {
1437 if (saa->win.height > 576)
1438 saa->win.height = 576;
1439 }
1440
1441 /* stop capture */
1442 saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1);
1443 saa7146_set_winsize(saa);
1444
1445 /*
1446 * Do any clips.
1447 */
1448 if (vw.clipcount < 0) {
1449 if (copy_from_user(saa->dmavid2, vw.clips,
1450 VIDEO_CLIPMAP_SIZE))
1451 return -EFAULT;
1452 } else if (vw.clipcount > 0) {
1453 if ((vcp = vmalloc(sizeof(struct video_clip) *
1454 (vw.clipcount))) == NULL)
1455 return -ENOMEM;
1456 if (copy_from_user(vcp, vw.clips,
1457 sizeof(struct video_clip) *
1458 vw.clipcount)) {
1459 vfree(vcp);
1460 return -EFAULT;
1461 }
1462 } else /* nothing clipped */
1463 memset(saa->dmavid2, 0, VIDEO_CLIPMAP_SIZE);
1464 make_clip_tab(saa, vcp, vw.clipcount);
1465 if (vw.clipcount > 0)
1466 vfree(vcp);
1467
1468 /* start capture & clip dma if we have an address */
1469 if ((saa->cap & 3) && saa->win.vidadr != 0)
1470 saawrite(((SAA7146_MC1_TR_E_1 |
1471 SAA7146_MC1_TR_E_2) << 16) | 0xffff,
1472 SAA7146_MC1);
1473 return 0;
1474 }
1475 case VIDIOCGWIN:
1476 {
1477 struct video_window vw;
1478 vw.x = saa->win.x;
1479 vw.y = saa->win.y;
1480 vw.width = saa->win.width;
1481 vw.height = saa->win.height;
1482 vw.chromakey = 0;
1483 vw.flags = 0;
1484 if (copy_to_user(arg, &vw, sizeof(vw)))
1485 return -EFAULT;
1486 return 0;
1487 }
1488 case VIDIOCCAPTURE:
1489 {
1490 int v;
1491 if (copy_from_user(&v, arg, sizeof(v)))
1492 return -EFAULT;
1493 if (v == 0) {
1494 saa->cap &= ~1;
1495 saawrite((SAA7146_MC1_TR_E_1 << 16),
1496 SAA7146_MC1);
1497 } else {
1498 if (saa->win.vidadr == 0 || saa->win.width == 0
1499 || saa->win.height == 0)
1500 return -EINVAL;
1501 saa->cap |= 1;
1502 saawrite((SAA7146_MC1_TR_E_1 << 16) | 0xffff,
1503 SAA7146_MC1);
1504 }
1505 return 0;
1506 }
1507 case VIDIOCGFBUF:
1508 {
1509 struct video_buffer v;
1510 v.base = (void *) saa->win.vidadr;
1511 v.height = saa->win.sheight;
1512 v.width = saa->win.swidth;
1513 v.depth = saa->win.depth;
1514 v.bytesperline = saa->win.bpl;
1515 if (copy_to_user(arg, &v, sizeof(v)))
1516 return -EFAULT;
1517 return 0;
1518
1519 }
1520 case VIDIOCSFBUF:
1521 {
1522 struct video_buffer v;
1523 if (!capable(CAP_SYS_ADMIN))
1524 return -EPERM;
1525 if (copy_from_user(&v, arg, sizeof(v)))
1526 return -EFAULT;
1527 if (v.depth != 8 && v.depth != 15 && v.depth != 16 &&
1528 v.depth != 24 && v.depth != 32 && v.width > 16 &&
1529 v.height > 16 && v.bytesperline > 16)
1530 return -EINVAL;
1531 if (v.base)
1532 saa->win.vidadr = (unsigned long) v.base;
1533 saa->win.sheight = v.height;
1534 saa->win.swidth = v.width;
1535 saa->win.bpp = ((v.depth + 7) & 0x38) / 8;
1536 saa->win.depth = v.depth;
1537 saa->win.bpl = v.bytesperline;
1538
1539 DEBUG(printk("Display at %p is %d by %d, bytedepth %d, bpl %d\n",
1540 v.base, v.width, v.height, saa->win.bpp, saa->win.bpl));
1541 saa7146_set_winsize(saa);
1542 return 0;
1543 }
1544 case VIDIOCKEY:
1545 {
1546 /* Will be handled higher up .. */
1547 return 0;
1548 }
1549
1550 case VIDIOCGAUDIO:
1551 {
1552 struct video_audio v;
1553 v = saa->audio_dev;
1554 v.flags &= ~(VIDEO_AUDIO_MUTE | VIDEO_AUDIO_MUTABLE);
1555 v.flags |= VIDEO_AUDIO_MUTABLE | VIDEO_AUDIO_VOLUME;
1556 strcpy(v.name, "MPEG");
1557 v.mode = VIDEO_SOUND_STEREO;
1558 if (copy_to_user(arg, &v, sizeof(v)))
1559 return -EFAULT;
1560 return 0;
1561 }
1562 case VIDIOCSAUDIO:
1563 {
1564 struct video_audio v;
1565 int i;
1566 if (copy_from_user(&v, arg, sizeof(v)))
1567 return -EFAULT;
1568 i = (~(v.volume>>8))&0xff;
1569 if (!HaveCS4341) {
1570 if (v.flags & VIDEO_AUDIO_MUTE) {
1571 debiwrite(saa, debNormal,
1572 IBM_MP2_FRNT_ATTEN,
1573 0xffff, 2);
1574 }
1575 if (!(v.flags & VIDEO_AUDIO_MUTE))
1576 debiwrite(saa, debNormal,
1577 IBM_MP2_FRNT_ATTEN,
1578 0x0000, 2);
1579 if (v.flags & VIDEO_AUDIO_VOLUME)
1580 debiwrite(saa, debNormal,
1581 IBM_MP2_FRNT_ATTEN,
1582 (i<<8)|i, 2);
1583 } else {
1584 if (v.flags & VIDEO_AUDIO_MUTE)
1585 cs4341_setlevel(saa, 0xff, 0xff);
1586 if (!(v.flags & VIDEO_AUDIO_MUTE))
1587 cs4341_setlevel(saa, 0, 0);
1588 if (v.flags & VIDEO_AUDIO_VOLUME)
1589 cs4341_setlevel(saa, i, i);
1590 }
1591 saa->audio_dev = v;
1592 return 0;
1593 }
1594
1595 case VIDIOCGUNIT:
1596 {
1597 struct video_unit vu;
1598 vu.video = saa->video_dev.minor;
1599 vu.vbi = VIDEO_NO_UNIT;
1600 vu.radio = VIDEO_NO_UNIT;
1601 vu.audio = VIDEO_NO_UNIT;
1602 vu.teletext = VIDEO_NO_UNIT;
1603 if (copy_to_user((void *) arg, (void *) &vu, sizeof(vu)))
1604 return -EFAULT;
1605 return 0;
1606 }
1607 case VIDIOCSPLAYMODE:
1608 {
1609 struct video_play_mode pmode;
1610 if (copy_from_user((void *) &pmode, arg,
1611 sizeof(struct video_play_mode)))
1612 return -EFAULT;
1613 switch (pmode.mode) {
1614 case VID_PLAY_VID_OUT_MODE:
1615 if (pmode.p1 != VIDEO_MODE_NTSC &&
1616 pmode.p1 != VIDEO_MODE_PAL)
1617 return -EINVAL;
1618 set_out_format(saa, pmode.p1);
1619 return 0;
1620 case VID_PLAY_GENLOCK:
1621 debiwrite(saa, debNormal,
1622 XILINX_CTL0,
1623 (pmode.p1 ? 0x8000 : 0x8080),
1624 2);
1625 if (NewCard)
1626 set_genlock_offset(saa,
1627 pmode.p2);
1628 return 0;
1629 case VID_PLAY_NORMAL:
1630 debiwrite(saa, debNormal,
1631 IBM_MP2_CHIP_CONTROL,
1632 ChipControl, 2);
1633 ibm_send_command(saa,
1634 IBM_MP2_PLAY, 0, 0);
1635 saa->playmode = pmode.mode;
1636 return 0;
1637 case VID_PLAY_PAUSE:
1638 /* IBM removed the PAUSE command */
1639 /* they say use SINGLE_FRAME now */
1640 case VID_PLAY_SINGLE_FRAME:
1641 ibm_send_command(saa,
1642 IBM_MP2_SINGLE_FRAME,
1643 0, 0);
1644 if (saa->playmode == pmode.mode) {
1645 debiwrite(saa, debNormal,
1646 IBM_MP2_CHIP_CONTROL,
1647 ChipControl, 2);
1648 }
1649 saa->playmode = pmode.mode;
1650 return 0;
1651 case VID_PLAY_FAST_FORWARD:
1652 ibm_send_command(saa,
1653 IBM_MP2_FAST_FORWARD, 0, 0);
1654 saa->playmode = pmode.mode;
1655 return 0;
1656 case VID_PLAY_SLOW_MOTION:
1657 ibm_send_command(saa,
1658 IBM_MP2_SLOW_MOTION,
1659 pmode.p1, 0);
1660 saa->playmode = pmode.mode;
1661 return 0;
1662 case VID_PLAY_IMMEDIATE_NORMAL:
1663 /* ensure transfers resume */
1664 debiwrite(saa, debNormal,
1665 IBM_MP2_CHIP_CONTROL,
1666 ChipControl, 2);
1667 ibm_send_command(saa,
1668 IBM_MP2_IMED_NORM_PLAY, 0, 0);
1669 saa->playmode = VID_PLAY_NORMAL;
1670 return 0;
1671 case VID_PLAY_SWITCH_CHANNELS:
1672 saa->audhead = saa->audtail = 0;
1673 saa->vidhead = saa->vidtail = 0;
1674 ibm_send_command(saa,
1675 IBM_MP2_FREEZE_FRAME, 0, 1);
1676 ibm_send_command(saa,
1677 IBM_MP2_RESET_AUD_RATE, 0, 1);
1678 debiwrite(saa, debNormal,
1679 IBM_MP2_CHIP_CONTROL, 0, 2);
1680 ibm_send_command(saa,
1681 IBM_MP2_CHANNEL_SWITCH, 0, 1);
1682 debiwrite(saa, debNormal,
1683 IBM_MP2_CHIP_CONTROL,
1684 ChipControl, 2);
1685 ibm_send_command(saa,
1686 IBM_MP2_PLAY, 0, 0);
1687 saa->playmode = VID_PLAY_NORMAL;
1688 return 0;
1689 case VID_PLAY_FREEZE_FRAME:
1690 ibm_send_command(saa,
1691 IBM_MP2_FREEZE_FRAME, 0, 0);
1692 saa->playmode = pmode.mode;
1693 return 0;
1694 case VID_PLAY_STILL_MODE:
1695 ibm_send_command(saa,
1696 IBM_MP2_SET_STILL_MODE, 0, 0);
1697 saa->playmode = pmode.mode;
1698 return 0;
1699 case VID_PLAY_MASTER_MODE:
1700 if (pmode.p1 == VID_PLAY_MASTER_NONE)
1701 saa->boardcfg[1] = 0x13;
1702 else if (pmode.p1 ==
1703 VID_PLAY_MASTER_VIDEO)
1704 saa->boardcfg[1] = 0x23;
1705 else if (pmode.p1 ==
1706 VID_PLAY_MASTER_AUDIO)
1707 saa->boardcfg[1] = 0x43;
1708 else
1709 return -EINVAL;
1710 debiwrite(saa, debNormal,
1711 IBM_MP2_CHIP_CONTROL,
1712 ChipControl, 2);
1713 return 0;
1714 case VID_PLAY_ACTIVE_SCANLINES:
1715 if (CurrentMode == VIDEO_MODE_PAL) {
1716 if (pmode.p1 < 1 ||
1717 pmode.p2 > 625)
1718 return -EINVAL;
1719 saa->boardcfg[5] = pmode.p1;
1720 saa->boardcfg[55] = (pmode.p1 +
1721 (pmode.p2/2) - 1) &
1722 0xff;
1723 } else {
1724 if (pmode.p1 < 4 ||
1725 pmode.p2 > 525)
1726 return -EINVAL;
1727 saa->boardcfg[4] = pmode.p1;
1728 saa->boardcfg[54] = (pmode.p1 +
1729 (pmode.p2/2) - 4) &
1730 0xff;
1731 }
1732 set_out_format(saa, CurrentMode);
1733 case VID_PLAY_RESET:
1734 return do_ibm_reset(saa);
1735 case VID_PLAY_END_MARK:
1736 if (saa->endmarktail <
1737 saa->endmarkhead) {
1738 if (saa->endmarkhead -
1739 saa->endmarktail < 2)
1740 return -ENOSPC;
1741 } else if (saa->endmarkhead <=
1742 saa->endmarktail) {
1743 if (saa->endmarktail -
1744 saa->endmarkhead >
1745 (MAX_MARKS - 2))
1746 return -ENOSPC;
1747 } else
1748 return -ENOSPC;
1749 saa->endmark[saa->endmarktail] =
1750 saa->audtail;
1751 saa->endmarktail++;
1752 if (saa->endmarktail >= MAX_MARKS)
1753 saa->endmarktail = 0;
1754 }
1755 return -EINVAL;
1756 }
1757 case VIDIOCSWRITEMODE:
1758 {
1759 int mode;
1760 if (copy_from_user((void *) &mode, arg, sizeof(int)))
1761 return -EFAULT;
1762 if (mode == VID_WRITE_MPEG_AUD ||
1763 mode == VID_WRITE_MPEG_VID ||
1764 mode == VID_WRITE_CC ||
1765 mode == VID_WRITE_TTX ||
1766 mode == VID_WRITE_OSD) {
1767 saa->writemode = mode;
1768 return 0;
1769 }
1770 return -EINVAL;
1771 }
1772 case VIDIOCSMICROCODE:
1773 {
1774 struct video_code ucode;
1775 __u8 *udata;
1776 int i;
1777 if (copy_from_user((void *) &ucode, arg,
1778 sizeof(ucode)))
1779 return -EFAULT;
1780 if (ucode.datasize > 65536 || ucode.datasize < 1024 ||
1781 strncmp(ucode.loadwhat, "dec", 3))
1782 return -EINVAL;
1783 if ((udata = vmalloc(ucode.datasize)) == NULL)
1784 return -ENOMEM;
1785 if (copy_from_user((void *) udata, ucode.data,
1786 ucode.datasize)) {
1787 vfree(udata);
1788 return -EFAULT;
1789 }
1790 ucode.data = udata;
1791 if (!strncmp(ucode.loadwhat, "decoder.aud", 11)
1792 || !strncmp(ucode.loadwhat, "decoder.vid", 11))
1793 i = initialize_ibmmpeg2(&ucode);
1794 else
1795 i = initialize_fpga(&ucode);
1796 vfree(udata);
1797 if (i)
1798 return -EINVAL;
1799 return 0;
1800
1801 }
1802 case VIDIOCGCHAN: /* this makes xawtv happy */
1803 {
1804 struct video_channel v;
1805 if (copy_from_user(&v, arg, sizeof(v)))
1806 return -EFAULT;
1807 v.flags = VIDEO_VC_AUDIO;
1808 v.tuners = 0;
1809 v.type = VID_TYPE_MPEG_DECODER;
1810 v.norm = CurrentMode;
1811 strcpy(v.name, "MPEG2");
1812 if (copy_to_user(arg, &v, sizeof(v)))
1813 return -EFAULT;
1814 return 0;
1815 }
1816 case VIDIOCSCHAN: /* this makes xawtv happy */
1817 {
1818 struct video_channel v;
1819 if (copy_from_user(&v, arg, sizeof(v)))
1820 return -EFAULT;
1821 /* do nothing */
1822 return 0;
1823 }
1824 default:
1825 return -ENOIOCTLCMD;
1826 }
1827 return 0;
1828 }
1829
1830 static int saa_init_done(struct video_device *dev)
1831 {
1832 return 0;
1833 }
1834
1835 static int saa_mmap(struct video_device *dev, const char *adr,
1836 unsigned long size)
1837 {
1838 struct saa7146 *saa = (struct saa7146 *) dev;
1839 printk(KERN_DEBUG "stradis%d: saa_mmap called\n", saa->nr);
1840 return -EINVAL;
1841 }
1842
1843 static long saa_read(struct video_device *dev, char *buf,
1844 unsigned long count, int nonblock)
1845 {
1846 return -EINVAL;
1847 }
1848
1849 static long saa_write(struct video_device *dev, const char *buf,
1850 unsigned long count, int nonblock)
1851 {
1852 struct saa7146 *saa = (struct saa7146 *) dev;
1853 unsigned long todo = count;
1854 int blocksize, split;
1855 unsigned long flags;
1856
1857 while (todo > 0) {
1858 if (saa->writemode == VID_WRITE_MPEG_AUD) {
1859 spin_lock_irqsave(&saa->lock, flags);
1860 if (saa->audhead <= saa->audtail)
1861 blocksize = 65536-(saa->audtail - saa->audhead);
1862 else
1863 blocksize = saa->audhead - saa->audtail;
1864 spin_unlock_irqrestore(&saa->lock, flags);
1865 if (blocksize < 16384) {
1866 saawrite(SAA7146_PSR_DEBI_S |
1867 SAA7146_PSR_PIN1, SAA7146_IER);
1868 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
1869 /* wait for buffer space to open */
1870 interruptible_sleep_on(&saa->audq);
1871 }
1872 spin_lock_irqsave(&saa->lock, flags);
1873 if (saa->audhead <= saa->audtail) {
1874 blocksize = 65536-(saa->audtail - saa->audhead);
1875 split = 65536 - saa->audtail;
1876 } else {
1877 blocksize = saa->audhead - saa->audtail;
1878 split = 65536;
1879 }
1880 spin_unlock_irqrestore(&saa->lock, flags);
1881 blocksize--;
1882 if (blocksize > todo)
1883 blocksize = todo;
1884 /* double check that we really have space */
1885 if (!blocksize)
1886 return -ENOSPC;
1887 if (split < blocksize) {
1888 if (copy_from_user(saa->audbuf +
1889 saa->audtail, buf, split))
1890 return -EFAULT;
1891 buf += split;
1892 todo -= split;
1893 blocksize -= split;
1894 saa->audtail = 0;
1895 }
1896 if (copy_from_user(saa->audbuf + saa->audtail, buf,
1897 blocksize))
1898 return -EFAULT;
1899 saa->audtail += blocksize;
1900 todo -= blocksize;
1901 buf += blocksize;
1902 saa->audtail &= 0xffff;
1903 } else if (saa->writemode == VID_WRITE_MPEG_VID) {
1904 spin_lock_irqsave(&saa->lock, flags);
1905 if (saa->vidhead <= saa->vidtail)
1906 blocksize=524288-(saa->vidtail - saa->vidhead);
1907 else
1908 blocksize = saa->vidhead - saa->vidtail;
1909 spin_unlock_irqrestore(&saa->lock, flags);
1910 if (blocksize < 65536) {
1911 saawrite(SAA7146_PSR_DEBI_S |
1912 SAA7146_PSR_PIN1, SAA7146_IER);
1913 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
1914 /* wait for buffer space to open */
1915 interruptible_sleep_on(&saa->vidq);
1916 }
1917 spin_lock_irqsave(&saa->lock, flags);
1918 if (saa->vidhead <= saa->vidtail) {
1919 blocksize=524288-(saa->vidtail - saa->vidhead);
1920 split = 524288 - saa->vidtail;
1921 } else {
1922 blocksize = saa->vidhead - saa->vidtail;
1923 split = 524288;
1924 }
1925 spin_unlock_irqrestore(&saa->lock, flags);
1926 blocksize--;
1927 if (blocksize > todo)
1928 blocksize = todo;
1929 /* double check that we really have space */
1930 if (!blocksize)
1931 return -ENOSPC;
1932 if (split < blocksize) {
1933 if (copy_from_user(saa->vidbuf +
1934 saa->vidtail, buf, split))
1935 return -EFAULT;
1936 buf += split;
1937 todo -= split;
1938 blocksize -= split;
1939 saa->vidtail = 0;
1940 }
1941 if (copy_from_user(saa->vidbuf + saa->vidtail, buf,
1942 blocksize))
1943 return -EFAULT;
1944 saa->vidtail += blocksize;
1945 todo -= blocksize;
1946 buf += blocksize;
1947 saa->vidtail &= 0x7ffff;
1948 } else if (saa->writemode == VID_WRITE_OSD) {
1949 if (count > 131072)
1950 return -ENOSPC;
1951 if (copy_from_user(saa->osdbuf, buf, count))
1952 return -EFAULT;
1953 buf += count;
1954 saa->osdhead = 0;
1955 saa->osdtail = count;
1956 debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR, 0, 2);
1957 debiwrite(saa, debNormal, IBM_MP2_OSD_LINK_ADDR, 0, 2);
1958 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00d, 2);
1959 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
1960 debiread(saa, debNormal,
1961 IBM_MP2_DISP_MODE, 2) | 1, 2);
1962 /* trigger osd data transfer */
1963 saawrite(SAA7146_PSR_DEBI_S |
1964 SAA7146_PSR_PIN1, SAA7146_IER);
1965 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
1966 }
1967 }
1968 return count;
1969 }
1970
1971 static int saa_open(struct video_device *dev, int flags)
1972 {
1973 struct saa7146 *saa = (struct saa7146 *) dev;
1974
1975 saa->video_dev.busy = 0;
1976 saa->user++;
1977 if (saa->user > 1)
1978 return 0; /* device open already, don't reset */
1979 saa->writemode = VID_WRITE_MPEG_VID; /* default to video */
1980 return 0;
1981 }
1982
1983 static void saa_close(struct video_device *dev)
1984 {
1985 struct saa7146 *saa = (struct saa7146 *) dev;
1986 saa->user--;
1987 saa->video_dev.busy = 0;
1988 if (saa->user > 0) /* still someone using device */
1989 return;
1990 saawrite(0x007f0000, SAA7146_MC1); /* stop all overlay dma */
1991 }
1992
1993 /* template for video_device-structure */
1994 static struct video_device saa_template =
1995 {
1996 "SAA7146A",
1997 VID_TYPE_CAPTURE | VID_TYPE_OVERLAY,
1998 VID_HARDWARE_SAA7146,
1999 saa_open,
2000 saa_close,
2001 saa_read,
2002 saa_write,
2003 NULL, /* poll */
2004 saa_ioctl,
2005 saa_mmap,
2006 saa_init_done,
2007 NULL,
2008 0,
2009 0
2010 };
2011
2012 static int configure_saa7146(struct pci_dev *dev, int num)
2013 {
2014 int result;
2015 struct saa7146 *saa;
2016
2017 saa = &saa7146s[num];
2018
2019 saa->endmarkhead = saa->endmarktail = 0;
2020 saa->win.x = saa->win.y = 0;
2021 saa->win.width = saa->win.cropwidth = 720;
2022 saa->win.height = saa->win.cropheight = 480;
2023 saa->win.cropx = saa->win.cropy = 0;
2024 saa->win.bpp = 2;
2025 saa->win.depth = 16;
2026 saa->win.color_fmt = palette2fmt[VIDEO_PALETTE_RGB565];
2027 saa->win.bpl = 1024 * saa->win.bpp;
2028 saa->win.swidth = 1024;
2029 saa->win.sheight = 768;
2030 saa->picture.brightness = 32768;
2031 saa->picture.contrast = 38768;
2032 saa->picture.colour = 32768;
2033 saa->cap = 0;
2034 saa->dev = dev;
2035 saa->nr = num;
2036 saa->playmode = VID_PLAY_NORMAL;
2037 memset(saa->boardcfg, 0, 64); /* clear board config area */
2038 saa->saa7146_mem = NULL;
2039 saa->dmavid1 = saa->dmavid2 = saa->dmavid3 = saa->dmaa1in =
2040 saa->dmaa1out = saa->dmaa2in = saa->dmaa2out =
2041 saa->pagevid1 = saa->pagevid2 = saa->pagevid3 = saa->pagea1in =
2042 saa->pagea1out = saa->pagea2in = saa->pagea2out =
2043 saa->pagedebi = saa->dmaRPS1 = saa->dmaRPS2 = saa->pageRPS1 =
2044 saa->pageRPS2 = NULL;
2045 saa->audbuf = saa->vidbuf = saa->osdbuf = saa->dmadebi = NULL;
2046 saa->audhead = saa->vidtail = 0;
2047
2048 init_waitqueue_head(&saa->i2cq);
2049 init_waitqueue_head(&saa->audq);
2050 init_waitqueue_head(&saa->debiq);
2051 init_waitqueue_head(&saa->vidq);
2052 spin_lock_init(&saa->lock);
2053
2054 if (pci_enable_device(dev))
2055 return -EIO;
2056
2057 saa->id = dev->device;
2058 saa->irq = dev->irq;
2059 saa->video_dev.minor = -1;
2060 saa->saa7146_adr = pci_resource_start(dev, 0);
2061 pci_read_config_byte(dev, PCI_CLASS_REVISION, &saa->revision);
2062
2063 saa->saa7146_mem = ioremap(saa->saa7146_adr, 0x200);
2064 if (!saa->saa7146_mem)
2065 return -EIO;
2066
2067 memcpy(&(saa->i2c), &saa7146_i2c_bus_template, sizeof(struct i2c_bus));
2068 memcpy(&saa->video_dev, &saa_template, sizeof(saa_template));
2069 sprintf(saa->i2c.name, "stradis%d", num);
2070 saa->i2c.data = saa;
2071 saawrite(0, SAA7146_IER); /* turn off all interrupts */
2072 result = request_irq(saa->irq, saa7146_irq,
2073 SA_SHIRQ | SA_INTERRUPT, "stradis", (void *) saa);
2074 if (result == -EINVAL)
2075 printk(KERN_ERR "stradis%d: Bad irq number or handler\n",
2076 num);
2077 if (result == -EBUSY)
2078 printk(KERN_ERR "stradis%d: IRQ %ld busy, change your PnP"
2079 " config in BIOS\n", num, saa->irq);
2080 if (result < 0)
2081 return result;
2082 pci_set_master(dev);
2083 if (video_register_device(&saa->video_dev, VFL_TYPE_GRABBER) < 0)
2084 return -1;
2085 #if 0
2086 /* i2c generic interface is currently BROKEN */
2087 i2c_register_bus(&saa->i2c);
2088 #endif
2089 return 0;
2090 }
2091
2092 static int init_saa7146(int i)
2093 {
2094 struct saa7146 *saa = &saa7146s[i];
2095
2096 saa->user = 0;
2097 /* reset the saa7146 */
2098 saawrite(0xffff0000, SAA7146_MC1);
2099 mdelay(5);
2100 /* enable debi and i2c transfers and pins */
2101 saawrite(((SAA7146_MC1_EDP | SAA7146_MC1_EI2C |
2102 SAA7146_MC1_TR_E_DEBI) << 16) | 0xffff, SAA7146_MC1);
2103 /* ensure proper state of chip */
2104 saawrite(0x00000000, SAA7146_PAGE1);
2105 saawrite(0x00f302c0, SAA7146_NUM_LINE_BYTE1);
2106 saawrite(0x00000000, SAA7146_PAGE2);
2107 saawrite(0x01400080, SAA7146_NUM_LINE_BYTE2);
2108 saawrite(0x00000000, SAA7146_DD1_INIT);
2109 saawrite(0x00000000, SAA7146_DD1_STREAM_B);
2110 saawrite(0x00000000, SAA7146_DD1_STREAM_A);
2111 saawrite(0x00000000, SAA7146_BRS_CTRL);
2112 saawrite(0x80400040, SAA7146_BCS_CTRL);
2113 saawrite(0x0000e000 /*| (1<<29)*/, SAA7146_HPS_CTRL);
2114 saawrite(0x00000060, SAA7146_CLIP_FORMAT_CTRL);
2115 saawrite(0x00000000, SAA7146_ACON1);
2116 saawrite(0x00000000, SAA7146_ACON2);
2117 saawrite(0x00000600, SAA7146_I2C_STATUS);
2118 saawrite(((SAA7146_MC2_UPLD_D1_B | SAA7146_MC2_UPLD_D1_A |
2119 SAA7146_MC2_UPLD_BRS | SAA7146_MC2_UPLD_HPS_H |
2120 SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_DMA2 |
2121 SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_I2C) << 16) | 0xffff,
2122 SAA7146_MC2);
2123 /* setup arbitration control registers */
2124 saawrite(0x1412121a, SAA7146_PCI_BT_V1);
2125
2126 /* allocate 32k dma buffer + 4k for page table */
2127 if ((saa->dmadebi = kmalloc(32768 + 4096, GFP_KERNEL)) == NULL) {
2128 printk(KERN_ERR "stradis%d: debi kmalloc failed\n", i);
2129 return -1;
2130 }
2131 #if 0
2132 saa->pagedebi = saa->dmadebi + 32768; /* top 4k is for mmu */
2133 saawrite(virt_to_bus(saa->pagedebi) /*|0x800 */ , SAA7146_DEBI_PAGE);
2134 for (i = 0; i < 12; i++) /* setup mmu page table */
2135 saa->pagedebi[i] = virt_to_bus((saa->dmadebi + i * 4096));
2136 #endif
2137 saa->audhead = saa->vidhead = saa->osdhead = 0;
2138 saa->audtail = saa->vidtail = saa->osdtail = 0;
2139 if (saa->vidbuf == NULL)
2140 if ((saa->vidbuf = vmalloc(524288)) == NULL) {
2141 printk(KERN_ERR "stradis%d: malloc failed\n", saa->nr);
2142 return -ENOMEM;
2143 }
2144 if (saa->audbuf == NULL)
2145 if ((saa->audbuf = vmalloc(65536)) == NULL) {
2146 printk(KERN_ERR "stradis%d: malloc failed\n", saa->nr);
2147 vfree(saa->vidbuf);
2148 saa->vidbuf = NULL;
2149 return -ENOMEM;
2150 }
2151 if (saa->osdbuf == NULL)
2152 if ((saa->osdbuf = vmalloc(131072)) == NULL) {
2153 printk(KERN_ERR "stradis%d: malloc failed\n", saa->nr);
2154 vfree(saa->vidbuf);
2155 vfree(saa->audbuf);
2156 saa->vidbuf = saa->audbuf = NULL;
2157 return -ENOMEM;
2158 }
2159 /* allocate 81920 byte buffer for clipping */
2160 if ((saa->dmavid2 = kmalloc(VIDEO_CLIPMAP_SIZE, GFP_KERNEL)) == NULL) {
2161 printk(KERN_ERR "stradis%d: clip kmalloc failed\n", saa->nr);
2162 vfree(saa->vidbuf);
2163 vfree(saa->audbuf);
2164 vfree(saa->osdbuf);
2165 saa->vidbuf = saa->audbuf = saa->osdbuf = NULL;
2166 saa->dmavid2 = NULL;
2167 return -1;
2168 }
2169 memset(saa->dmavid2, 0x00, VIDEO_CLIPMAP_SIZE); /* clip everything */
2170 /* setup clipping registers */
2171 saawrite(virt_to_bus(saa->dmavid2), SAA7146_BASE_EVEN2);
2172 saawrite(virt_to_bus(saa->dmavid2) + 128, SAA7146_BASE_ODD2);
2173 saawrite(virt_to_bus(saa->dmavid2) + VIDEO_CLIPMAP_SIZE,
2174 SAA7146_PROT_ADDR2);
2175 saawrite(256, SAA7146_PITCH2);
2176 saawrite(4, SAA7146_PAGE2); /* dma direction: read, no byteswap */
2177 saawrite(((SAA7146_MC2_UPLD_DMA2) << 16) | SAA7146_MC2_UPLD_DMA2,
2178 SAA7146_MC2);
2179 I2CBusScan(&(saa->i2c));
2180 return 0;
2181 }
2182
2183 static void release_saa(void)
2184 {
2185 u8 command;
2186 int i;
2187 struct saa7146 *saa;
2188
2189 for (i = 0; i < saa_num; i++) {
2190 saa = &saa7146s[i];
2191
2192 /* turn off all capturing, DMA and IRQs */
2193 saawrite(0xffff0000, SAA7146_MC1); /* reset chip */
2194 saawrite(0, SAA7146_MC2);
2195 saawrite(0, SAA7146_IER);
2196 saawrite(0xffffffffUL, SAA7146_ISR);
2197 #if 0
2198 /* unregister i2c_bus */
2199 i2c_unregister_bus((&saa->i2c));
2200 #endif
2201
2202 /* disable PCI bus-mastering */
2203 pci_read_config_byte(saa->dev, PCI_COMMAND, &command);
2204 /* Should this be &=~ ?? */
2205 command &= ~PCI_COMMAND_MASTER;
2206 pci_write_config_byte(saa->dev, PCI_COMMAND, command);
2207 /* unmap and free memory */
2208 saa->audhead = saa->audtail = saa->osdhead = 0;
2209 saa->vidhead = saa->vidtail = saa->osdtail = 0;
2210 if (saa->vidbuf)
2211 vfree(saa->vidbuf);
2212 if (saa->audbuf)
2213 vfree(saa->audbuf);
2214 if (saa->osdbuf)
2215 vfree(saa->osdbuf);
2216 if (saa->dmavid2)
2217 kfree((void *) saa->dmavid2);
2218 saa->audbuf = saa->vidbuf = saa->osdbuf = NULL;
2219 saa->dmavid2 = NULL;
2220 if (saa->dmadebi)
2221 kfree((void *) saa->dmadebi);
2222 if (saa->dmavid1)
2223 kfree((void *) saa->dmavid1);
2224 if (saa->dmavid2)
2225 kfree((void *) saa->dmavid2);
2226 if (saa->dmavid3)
2227 kfree((void *) saa->dmavid3);
2228 if (saa->dmaa1in)
2229 kfree((void *) saa->dmaa1in);
2230 if (saa->dmaa1out)
2231 kfree((void *) saa->dmaa1out);
2232 if (saa->dmaa2in)
2233 kfree((void *) saa->dmaa2in);
2234 if (saa->dmaa2out)
2235 kfree((void *) saa->dmaa2out);
2236 if (saa->dmaRPS1)
2237 kfree((void *) saa->dmaRPS1);
2238 if (saa->dmaRPS2)
2239 kfree((void *) saa->dmaRPS2);
2240 free_irq(saa->irq, saa);
2241 if (saa->saa7146_mem)
2242 iounmap(saa->saa7146_mem);
2243 if (saa->video_dev.minor != -1)
2244 video_unregister_device(&saa->video_dev);
2245 }
2246 }
2247
2248
2249 static int __init stradis_init (void)
2250 {
2251 struct pci_dev *dev = NULL;
2252 int result = 0, i;
2253
2254 saa_num = 0;
2255
2256 while ((dev = pci_find_device(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA7146, dev))) {
2257 if (!dev->subsystem_vendor)
2258 printk(KERN_INFO "stradis%d: rev1 decoder\n", saa_num);
2259 else
2260 printk(KERN_INFO "stradis%d: SDM2xx found\n", saa_num);
2261 result = configure_saa7146(dev, saa_num++);
2262 if (result)
2263 return result;
2264 }
2265 if (saa_num)
2266 printk(KERN_INFO "stradis: %d card(s) found.\n", saa_num);
2267 else
2268 return -EINVAL;
2269 for (i = 0; i < saa_num; i++)
2270 if (init_saa7146(i) < 0) {
2271 release_saa();
2272 return -EIO;
2273 }
2274 return 0;
2275 }
2276
2277
2278 static void __exit stradis_exit (void)
2279 {
2280 release_saa();
2281 printk(KERN_INFO "stradis: module cleanup complete\n");
2282 }
2283
2284
2285 module_init(stradis_init);
2286 module_exit(stradis_exit);
2287
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