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e1000: add queue restart counter
[linux-2.6/linux-loongson.git] / drivers / net / e1000 / e1000_main.c
blob705e654c368a8513d311e0f2263dda2d98ca1d7e
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30
31 char e1000_driver_name[] = "e1000";
32 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
33 #ifndef CONFIG_E1000_NAPI
34 #define DRIVERNAPI
35 #else
36 #define DRIVERNAPI "-NAPI"
37 #endif
38 #define DRV_VERSION "7.2.9-k4"DRIVERNAPI
39 char e1000_driver_version[] = DRV_VERSION;
40 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
41
42 /* e1000_pci_tbl - PCI Device ID Table
43 *
44 * Last entry must be all 0s
45 *
46 * Macro expands to...
47 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
48 */
49 static struct pci_device_id e1000_pci_tbl[] = {
50 INTEL_E1000_ETHERNET_DEVICE(0x1000),
51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
75 INTEL_E1000_ETHERNET_DEVICE(0x1049),
76 INTEL_E1000_ETHERNET_DEVICE(0x104A),
77 INTEL_E1000_ETHERNET_DEVICE(0x104B),
78 INTEL_E1000_ETHERNET_DEVICE(0x104C),
79 INTEL_E1000_ETHERNET_DEVICE(0x104D),
80 INTEL_E1000_ETHERNET_DEVICE(0x105E),
81 INTEL_E1000_ETHERNET_DEVICE(0x105F),
82 INTEL_E1000_ETHERNET_DEVICE(0x1060),
83 INTEL_E1000_ETHERNET_DEVICE(0x1075),
84 INTEL_E1000_ETHERNET_DEVICE(0x1076),
85 INTEL_E1000_ETHERNET_DEVICE(0x1077),
86 INTEL_E1000_ETHERNET_DEVICE(0x1078),
87 INTEL_E1000_ETHERNET_DEVICE(0x1079),
88 INTEL_E1000_ETHERNET_DEVICE(0x107A),
89 INTEL_E1000_ETHERNET_DEVICE(0x107B),
90 INTEL_E1000_ETHERNET_DEVICE(0x107C),
91 INTEL_E1000_ETHERNET_DEVICE(0x107D),
92 INTEL_E1000_ETHERNET_DEVICE(0x107E),
93 INTEL_E1000_ETHERNET_DEVICE(0x107F),
94 INTEL_E1000_ETHERNET_DEVICE(0x108A),
95 INTEL_E1000_ETHERNET_DEVICE(0x108B),
96 INTEL_E1000_ETHERNET_DEVICE(0x108C),
97 INTEL_E1000_ETHERNET_DEVICE(0x1096),
98 INTEL_E1000_ETHERNET_DEVICE(0x1098),
99 INTEL_E1000_ETHERNET_DEVICE(0x1099),
100 INTEL_E1000_ETHERNET_DEVICE(0x109A),
101 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
102 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
103 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
104 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
106 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
107 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
108 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
109 /* required last entry */
110 {0,}
111 };
112
113 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
114
115 int e1000_up(struct e1000_adapter *adapter);
116 void e1000_down(struct e1000_adapter *adapter);
117 void e1000_reinit_locked(struct e1000_adapter *adapter);
118 void e1000_reset(struct e1000_adapter *adapter);
119 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
120 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
121 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
122 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
123 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
124 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
125 struct e1000_tx_ring *txdr);
126 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
127 struct e1000_rx_ring *rxdr);
128 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
129 struct e1000_tx_ring *tx_ring);
130 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
131 struct e1000_rx_ring *rx_ring);
132 void e1000_update_stats(struct e1000_adapter *adapter);
133
134 static int e1000_init_module(void);
135 static void e1000_exit_module(void);
136 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
137 static void __devexit e1000_remove(struct pci_dev *pdev);
138 static int e1000_alloc_queues(struct e1000_adapter *adapter);
139 static int e1000_sw_init(struct e1000_adapter *adapter);
140 static int e1000_open(struct net_device *netdev);
141 static int e1000_close(struct net_device *netdev);
142 static void e1000_configure_tx(struct e1000_adapter *adapter);
143 static void e1000_configure_rx(struct e1000_adapter *adapter);
144 static void e1000_setup_rctl(struct e1000_adapter *adapter);
145 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
146 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
147 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
148 struct e1000_tx_ring *tx_ring);
149 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
150 struct e1000_rx_ring *rx_ring);
151 static void e1000_set_multi(struct net_device *netdev);
152 static void e1000_update_phy_info(unsigned long data);
153 static void e1000_watchdog(unsigned long data);
154 static void e1000_82547_tx_fifo_stall(unsigned long data);
155 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
156 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
157 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
158 static int e1000_set_mac(struct net_device *netdev, void *p);
159 static irqreturn_t e1000_intr(int irq, void *data);
160 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
161 struct e1000_tx_ring *tx_ring);
162 #ifdef CONFIG_E1000_NAPI
163 static int e1000_clean(struct net_device *poll_dev, int *budget);
164 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
165 struct e1000_rx_ring *rx_ring,
166 int *work_done, int work_to_do);
167 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
168 struct e1000_rx_ring *rx_ring,
169 int *work_done, int work_to_do);
170 #else
171 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
172 struct e1000_rx_ring *rx_ring);
173 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
174 struct e1000_rx_ring *rx_ring);
175 #endif
176 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
177 struct e1000_rx_ring *rx_ring,
178 int cleaned_count);
179 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
180 struct e1000_rx_ring *rx_ring,
181 int cleaned_count);
182 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
183 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
184 int cmd);
185 void e1000_set_ethtool_ops(struct net_device *netdev);
186 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
187 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
188 static void e1000_tx_timeout(struct net_device *dev);
189 static void e1000_reset_task(struct net_device *dev);
190 static void e1000_smartspeed(struct e1000_adapter *adapter);
191 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
192 struct sk_buff *skb);
193
194 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
195 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
196 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
197 static void e1000_restore_vlan(struct e1000_adapter *adapter);
198
199 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
200 #ifdef CONFIG_PM
201 static int e1000_resume(struct pci_dev *pdev);
202 #endif
203 static void e1000_shutdown(struct pci_dev *pdev);
204
205 #ifdef CONFIG_NET_POLL_CONTROLLER
206 /* for netdump / net console */
207 static void e1000_netpoll (struct net_device *netdev);
208 #endif
209
210 extern void e1000_check_options(struct e1000_adapter *adapter);
211
212 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
213 pci_channel_state_t state);
214 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
215 static void e1000_io_resume(struct pci_dev *pdev);
216
217 static struct pci_error_handlers e1000_err_handler = {
218 .error_detected = e1000_io_error_detected,
219 .slot_reset = e1000_io_slot_reset,
220 .resume = e1000_io_resume,
221 };
222
223 static struct pci_driver e1000_driver = {
224 .name = e1000_driver_name,
225 .id_table = e1000_pci_tbl,
226 .probe = e1000_probe,
227 .remove = __devexit_p(e1000_remove),
228 #ifdef CONFIG_PM
229 /* Power Managment Hooks */
230 .suspend = e1000_suspend,
231 .resume = e1000_resume,
232 #endif
233 .shutdown = e1000_shutdown,
234 .err_handler = &e1000_err_handler
235 };
236
237 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
238 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
239 MODULE_LICENSE("GPL");
240 MODULE_VERSION(DRV_VERSION);
241
242 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
243 module_param(debug, int, 0);
244 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
245
246 /**
247 * e1000_init_module - Driver Registration Routine
248 *
249 * e1000_init_module is the first routine called when the driver is
250 * loaded. All it does is register with the PCI subsystem.
251 **/
252
253 static int __init
254 e1000_init_module(void)
255 {
256 int ret;
257 printk(KERN_INFO "%s - version %s\n",
258 e1000_driver_string, e1000_driver_version);
259
260 printk(KERN_INFO "%s\n", e1000_copyright);
261
262 ret = pci_register_driver(&e1000_driver);
263
264 return ret;
265 }
266
267 module_init(e1000_init_module);
268
269 /**
270 * e1000_exit_module - Driver Exit Cleanup Routine
271 *
272 * e1000_exit_module is called just before the driver is removed
273 * from memory.
274 **/
275
276 static void __exit
277 e1000_exit_module(void)
278 {
279 pci_unregister_driver(&e1000_driver);
280 }
281
282 module_exit(e1000_exit_module);
283
284 static int e1000_request_irq(struct e1000_adapter *adapter)
285 {
286 struct net_device *netdev = adapter->netdev;
287 int flags, err = 0;
288
289 flags = IRQF_SHARED;
290 #ifdef CONFIG_PCI_MSI
291 if (adapter->hw.mac_type > e1000_82547_rev_2) {
292 adapter->have_msi = TRUE;
293 if ((err = pci_enable_msi(adapter->pdev))) {
294 DPRINTK(PROBE, ERR,
295 "Unable to allocate MSI interrupt Error: %d\n", err);
296 adapter->have_msi = FALSE;
297 }
298 }
299 if (adapter->have_msi)
300 flags &= ~IRQF_SHARED;
301 #endif
302 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
303 netdev->name, netdev)))
304 DPRINTK(PROBE, ERR,
305 "Unable to allocate interrupt Error: %d\n", err);
306
307 return err;
308 }
309
310 static void e1000_free_irq(struct e1000_adapter *adapter)
311 {
312 struct net_device *netdev = adapter->netdev;
313
314 free_irq(adapter->pdev->irq, netdev);
315
316 #ifdef CONFIG_PCI_MSI
317 if (adapter->have_msi)
318 pci_disable_msi(adapter->pdev);
319 #endif
320 }
321
322 /**
323 * e1000_irq_disable - Mask off interrupt generation on the NIC
324 * @adapter: board private structure
325 **/
326
327 static void
328 e1000_irq_disable(struct e1000_adapter *adapter)
329 {
330 atomic_inc(&adapter->irq_sem);
331 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
332 E1000_WRITE_FLUSH(&adapter->hw);
333 synchronize_irq(adapter->pdev->irq);
334 }
335
336 /**
337 * e1000_irq_enable - Enable default interrupt generation settings
338 * @adapter: board private structure
339 **/
340
341 static void
342 e1000_irq_enable(struct e1000_adapter *adapter)
343 {
344 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
345 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
346 E1000_WRITE_FLUSH(&adapter->hw);
347 }
348 }
349
350 static void
351 e1000_update_mng_vlan(struct e1000_adapter *adapter)
352 {
353 struct net_device *netdev = adapter->netdev;
354 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
355 uint16_t old_vid = adapter->mng_vlan_id;
356 if (adapter->vlgrp) {
357 if (!adapter->vlgrp->vlan_devices[vid]) {
358 if (adapter->hw.mng_cookie.status &
359 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
360 e1000_vlan_rx_add_vid(netdev, vid);
361 adapter->mng_vlan_id = vid;
362 } else
363 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
364
365 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
366 (vid != old_vid) &&
367 !adapter->vlgrp->vlan_devices[old_vid])
368 e1000_vlan_rx_kill_vid(netdev, old_vid);
369 } else
370 adapter->mng_vlan_id = vid;
371 }
372 }
373
374 /**
375 * e1000_release_hw_control - release control of the h/w to f/w
376 * @adapter: address of board private structure
377 *
378 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
379 * For ASF and Pass Through versions of f/w this means that the
380 * driver is no longer loaded. For AMT version (only with 82573) i
381 * of the f/w this means that the network i/f is closed.
382 *
383 **/
384
385 static void
386 e1000_release_hw_control(struct e1000_adapter *adapter)
387 {
388 uint32_t ctrl_ext;
389 uint32_t swsm;
390 uint32_t extcnf;
391
392 /* Let firmware taken over control of h/w */
393 switch (adapter->hw.mac_type) {
394 case e1000_82571:
395 case e1000_82572:
396 case e1000_80003es2lan:
397 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
398 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
399 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
400 break;
401 case e1000_82573:
402 swsm = E1000_READ_REG(&adapter->hw, SWSM);
403 E1000_WRITE_REG(&adapter->hw, SWSM,
404 swsm & ~E1000_SWSM_DRV_LOAD);
405 case e1000_ich8lan:
406 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
407 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
408 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
409 break;
410 default:
411 break;
412 }
413 }
414
415 /**
416 * e1000_get_hw_control - get control of the h/w from f/w
417 * @adapter: address of board private structure
418 *
419 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
420 * For ASF and Pass Through versions of f/w this means that
421 * the driver is loaded. For AMT version (only with 82573)
422 * of the f/w this means that the network i/f is open.
423 *
424 **/
425
426 static void
427 e1000_get_hw_control(struct e1000_adapter *adapter)
428 {
429 uint32_t ctrl_ext;
430 uint32_t swsm;
431 uint32_t extcnf;
432
433 /* Let firmware know the driver has taken over */
434 switch (adapter->hw.mac_type) {
435 case e1000_82571:
436 case e1000_82572:
437 case e1000_80003es2lan:
438 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
439 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
440 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
441 break;
442 case e1000_82573:
443 swsm = E1000_READ_REG(&adapter->hw, SWSM);
444 E1000_WRITE_REG(&adapter->hw, SWSM,
445 swsm | E1000_SWSM_DRV_LOAD);
446 break;
447 case e1000_ich8lan:
448 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
449 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
450 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
451 break;
452 default:
453 break;
454 }
455 }
456
457 int
458 e1000_up(struct e1000_adapter *adapter)
459 {
460 struct net_device *netdev = adapter->netdev;
461 int i;
462
463 /* hardware has been reset, we need to reload some things */
464
465 e1000_set_multi(netdev);
466
467 e1000_restore_vlan(adapter);
468
469 e1000_configure_tx(adapter);
470 e1000_setup_rctl(adapter);
471 e1000_configure_rx(adapter);
472 /* call E1000_DESC_UNUSED which always leaves
473 * at least 1 descriptor unused to make sure
474 * next_to_use != next_to_clean */
475 for (i = 0; i < adapter->num_rx_queues; i++) {
476 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
477 adapter->alloc_rx_buf(adapter, ring,
478 E1000_DESC_UNUSED(ring));
479 }
480
481 adapter->tx_queue_len = netdev->tx_queue_len;
482
483 #ifdef CONFIG_E1000_NAPI
484 netif_poll_enable(netdev);
485 #endif
486 e1000_irq_enable(adapter);
487
488 clear_bit(__E1000_DOWN, &adapter->flags);
489
490 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
491 return 0;
492 }
493
494 /**
495 * e1000_power_up_phy - restore link in case the phy was powered down
496 * @adapter: address of board private structure
497 *
498 * The phy may be powered down to save power and turn off link when the
499 * driver is unloaded and wake on lan is not enabled (among others)
500 * *** this routine MUST be followed by a call to e1000_reset ***
501 *
502 **/
503
504 void e1000_power_up_phy(struct e1000_adapter *adapter)
505 {
506 uint16_t mii_reg = 0;
507
508 /* Just clear the power down bit to wake the phy back up */
509 if (adapter->hw.media_type == e1000_media_type_copper) {
510 /* according to the manual, the phy will retain its
511 * settings across a power-down/up cycle */
512 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
513 mii_reg &= ~MII_CR_POWER_DOWN;
514 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
515 }
516 }
517
518 static void e1000_power_down_phy(struct e1000_adapter *adapter)
519 {
520 /* Power down the PHY so no link is implied when interface is down *
521 * The PHY cannot be powered down if any of the following is TRUE *
522 * (a) WoL is enabled
523 * (b) AMT is active
524 * (c) SoL/IDER session is active */
525 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
526 adapter->hw.media_type == e1000_media_type_copper) {
527 uint16_t mii_reg = 0;
528
529 switch (adapter->hw.mac_type) {
530 case e1000_82540:
531 case e1000_82545:
532 case e1000_82545_rev_3:
533 case e1000_82546:
534 case e1000_82546_rev_3:
535 case e1000_82541:
536 case e1000_82541_rev_2:
537 case e1000_82547:
538 case e1000_82547_rev_2:
539 if (E1000_READ_REG(&adapter->hw, MANC) &
540 E1000_MANC_SMBUS_EN)
541 goto out;
542 break;
543 case e1000_82571:
544 case e1000_82572:
545 case e1000_82573:
546 case e1000_80003es2lan:
547 case e1000_ich8lan:
548 if (e1000_check_mng_mode(&adapter->hw) ||
549 e1000_check_phy_reset_block(&adapter->hw))
550 goto out;
551 break;
552 default:
553 goto out;
554 }
555 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
556 mii_reg |= MII_CR_POWER_DOWN;
557 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
558 mdelay(1);
559 }
560 out:
561 return;
562 }
563
564 void
565 e1000_down(struct e1000_adapter *adapter)
566 {
567 struct net_device *netdev = adapter->netdev;
568
569 /* signal that we're down so the interrupt handler does not
570 * reschedule our watchdog timer */
571 set_bit(__E1000_DOWN, &adapter->flags);
572
573 e1000_irq_disable(adapter);
574
575 del_timer_sync(&adapter->tx_fifo_stall_timer);
576 del_timer_sync(&adapter->watchdog_timer);
577 del_timer_sync(&adapter->phy_info_timer);
578
579 #ifdef CONFIG_E1000_NAPI
580 netif_poll_disable(netdev);
581 #endif
582 netdev->tx_queue_len = adapter->tx_queue_len;
583 adapter->link_speed = 0;
584 adapter->link_duplex = 0;
585 netif_carrier_off(netdev);
586 netif_stop_queue(netdev);
587
588 e1000_reset(adapter);
589 e1000_clean_all_tx_rings(adapter);
590 e1000_clean_all_rx_rings(adapter);
591 }
592
593 void
594 e1000_reinit_locked(struct e1000_adapter *adapter)
595 {
596 WARN_ON(in_interrupt());
597 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
598 msleep(1);
599 e1000_down(adapter);
600 e1000_up(adapter);
601 clear_bit(__E1000_RESETTING, &adapter->flags);
602 }
603
604 void
605 e1000_reset(struct e1000_adapter *adapter)
606 {
607 uint32_t pba, manc;
608 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
609
610 /* Repartition Pba for greater than 9k mtu
611 * To take effect CTRL.RST is required.
612 */
613
614 switch (adapter->hw.mac_type) {
615 case e1000_82547:
616 case e1000_82547_rev_2:
617 pba = E1000_PBA_30K;
618 break;
619 case e1000_82571:
620 case e1000_82572:
621 case e1000_80003es2lan:
622 pba = E1000_PBA_38K;
623 break;
624 case e1000_82573:
625 pba = E1000_PBA_12K;
626 break;
627 case e1000_ich8lan:
628 pba = E1000_PBA_8K;
629 break;
630 default:
631 pba = E1000_PBA_48K;
632 break;
633 }
634
635 if ((adapter->hw.mac_type != e1000_82573) &&
636 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
637 pba -= 8; /* allocate more FIFO for Tx */
638
639
640 if (adapter->hw.mac_type == e1000_82547) {
641 adapter->tx_fifo_head = 0;
642 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
643 adapter->tx_fifo_size =
644 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
645 atomic_set(&adapter->tx_fifo_stall, 0);
646 }
647
648 E1000_WRITE_REG(&adapter->hw, PBA, pba);
649
650 /* flow control settings */
651 /* Set the FC high water mark to 90% of the FIFO size.
652 * Required to clear last 3 LSB */
653 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
654 /* We can't use 90% on small FIFOs because the remainder
655 * would be less than 1 full frame. In this case, we size
656 * it to allow at least a full frame above the high water
657 * mark. */
658 if (pba < E1000_PBA_16K)
659 fc_high_water_mark = (pba * 1024) - 1600;
660
661 adapter->hw.fc_high_water = fc_high_water_mark;
662 adapter->hw.fc_low_water = fc_high_water_mark - 8;
663 if (adapter->hw.mac_type == e1000_80003es2lan)
664 adapter->hw.fc_pause_time = 0xFFFF;
665 else
666 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
667 adapter->hw.fc_send_xon = 1;
668 adapter->hw.fc = adapter->hw.original_fc;
669
670 /* Allow time for pending master requests to run */
671 e1000_reset_hw(&adapter->hw);
672 if (adapter->hw.mac_type >= e1000_82544)
673 E1000_WRITE_REG(&adapter->hw, WUC, 0);
674
675 if (e1000_init_hw(&adapter->hw))
676 DPRINTK(PROBE, ERR, "Hardware Error\n");
677 e1000_update_mng_vlan(adapter);
678 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
679 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
680
681 e1000_reset_adaptive(&adapter->hw);
682 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
683
684 if (!adapter->smart_power_down &&
685 (adapter->hw.mac_type == e1000_82571 ||
686 adapter->hw.mac_type == e1000_82572)) {
687 uint16_t phy_data = 0;
688 /* speed up time to link by disabling smart power down, ignore
689 * the return value of this function because there is nothing
690 * different we would do if it failed */
691 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
692 &phy_data);
693 phy_data &= ~IGP02E1000_PM_SPD;
694 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
695 phy_data);
696 }
697
698 if ((adapter->en_mng_pt) &&
699 (adapter->hw.mac_type >= e1000_82540) &&
700 (adapter->hw.mac_type < e1000_82571) &&
701 (adapter->hw.media_type == e1000_media_type_copper)) {
702 manc = E1000_READ_REG(&adapter->hw, MANC);
703 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
704 E1000_WRITE_REG(&adapter->hw, MANC, manc);
705 }
706 }
707
708 /**
709 * e1000_probe - Device Initialization Routine
710 * @pdev: PCI device information struct
711 * @ent: entry in e1000_pci_tbl
712 *
713 * Returns 0 on success, negative on failure
714 *
715 * e1000_probe initializes an adapter identified by a pci_dev structure.
716 * The OS initialization, configuring of the adapter private structure,
717 * and a hardware reset occur.
718 **/
719
720 static int __devinit
721 e1000_probe(struct pci_dev *pdev,
722 const struct pci_device_id *ent)
723 {
724 struct net_device *netdev;
725 struct e1000_adapter *adapter;
726 unsigned long mmio_start, mmio_len;
727 unsigned long flash_start, flash_len;
728
729 static int cards_found = 0;
730 static int global_quad_port_a = 0; /* global ksp3 port a indication */
731 int i, err, pci_using_dac;
732 uint16_t eeprom_data = 0;
733 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
734 if ((err = pci_enable_device(pdev)))
735 return err;
736
737 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
738 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
739 pci_using_dac = 1;
740 } else {
741 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
742 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
743 E1000_ERR("No usable DMA configuration, aborting\n");
744 goto err_dma;
745 }
746 pci_using_dac = 0;
747 }
748
749 if ((err = pci_request_regions(pdev, e1000_driver_name)))
750 goto err_pci_reg;
751
752 pci_set_master(pdev);
753
754 err = -ENOMEM;
755 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
756 if (!netdev)
757 goto err_alloc_etherdev;
758
759 SET_MODULE_OWNER(netdev);
760 SET_NETDEV_DEV(netdev, &pdev->dev);
761
762 pci_set_drvdata(pdev, netdev);
763 adapter = netdev_priv(netdev);
764 adapter->netdev = netdev;
765 adapter->pdev = pdev;
766 adapter->hw.back = adapter;
767 adapter->msg_enable = (1 << debug) - 1;
768
769 mmio_start = pci_resource_start(pdev, BAR_0);
770 mmio_len = pci_resource_len(pdev, BAR_0);
771
772 err = -EIO;
773 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
774 if (!adapter->hw.hw_addr)
775 goto err_ioremap;
776
777 for (i = BAR_1; i <= BAR_5; i++) {
778 if (pci_resource_len(pdev, i) == 0)
779 continue;
780 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
781 adapter->hw.io_base = pci_resource_start(pdev, i);
782 break;
783 }
784 }
785
786 netdev->open = &e1000_open;
787 netdev->stop = &e1000_close;
788 netdev->hard_start_xmit = &e1000_xmit_frame;
789 netdev->get_stats = &e1000_get_stats;
790 netdev->set_multicast_list = &e1000_set_multi;
791 netdev->set_mac_address = &e1000_set_mac;
792 netdev->change_mtu = &e1000_change_mtu;
793 netdev->do_ioctl = &e1000_ioctl;
794 e1000_set_ethtool_ops(netdev);
795 netdev->tx_timeout = &e1000_tx_timeout;
796 netdev->watchdog_timeo = 5 * HZ;
797 #ifdef CONFIG_E1000_NAPI
798 netdev->poll = &e1000_clean;
799 netdev->weight = 64;
800 #endif
801 netdev->vlan_rx_register = e1000_vlan_rx_register;
802 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
803 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
804 #ifdef CONFIG_NET_POLL_CONTROLLER
805 netdev->poll_controller = e1000_netpoll;
806 #endif
807 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
808
809 netdev->mem_start = mmio_start;
810 netdev->mem_end = mmio_start + mmio_len;
811 netdev->base_addr = adapter->hw.io_base;
812
813 adapter->bd_number = cards_found;
814
815 /* setup the private structure */
816
817 if ((err = e1000_sw_init(adapter)))
818 goto err_sw_init;
819
820 err = -EIO;
821 /* Flash BAR mapping must happen after e1000_sw_init
822 * because it depends on mac_type */
823 if ((adapter->hw.mac_type == e1000_ich8lan) &&
824 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
825 flash_start = pci_resource_start(pdev, 1);
826 flash_len = pci_resource_len(pdev, 1);
827 adapter->hw.flash_address = ioremap(flash_start, flash_len);
828 if (!adapter->hw.flash_address)
829 goto err_flashmap;
830 }
831
832 if (e1000_check_phy_reset_block(&adapter->hw))
833 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
834
835 if (adapter->hw.mac_type >= e1000_82543) {
836 netdev->features = NETIF_F_SG |
837 NETIF_F_HW_CSUM |
838 NETIF_F_HW_VLAN_TX |
839 NETIF_F_HW_VLAN_RX |
840 NETIF_F_HW_VLAN_FILTER;
841 if (adapter->hw.mac_type == e1000_ich8lan)
842 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
843 }
844
845 #ifdef NETIF_F_TSO
846 if ((adapter->hw.mac_type >= e1000_82544) &&
847 (adapter->hw.mac_type != e1000_82547))
848 netdev->features |= NETIF_F_TSO;
849
850 #ifdef NETIF_F_TSO6
851 if (adapter->hw.mac_type > e1000_82547_rev_2)
852 netdev->features |= NETIF_F_TSO6;
853 #endif
854 #endif
855 if (pci_using_dac)
856 netdev->features |= NETIF_F_HIGHDMA;
857
858 netdev->features |= NETIF_F_LLTX;
859
860 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
861
862 /* initialize eeprom parameters */
863
864 if (e1000_init_eeprom_params(&adapter->hw)) {
865 E1000_ERR("EEPROM initialization failed\n");
866 goto err_eeprom;
867 }
868
869 /* before reading the EEPROM, reset the controller to
870 * put the device in a known good starting state */
871
872 e1000_reset_hw(&adapter->hw);
873
874 /* make sure the EEPROM is good */
875
876 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
877 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
878 goto err_eeprom;
879 }
880
881 /* copy the MAC address out of the EEPROM */
882
883 if (e1000_read_mac_addr(&adapter->hw))
884 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
885 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
886 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
887
888 if (!is_valid_ether_addr(netdev->perm_addr)) {
889 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
890 goto err_eeprom;
891 }
892
893 e1000_get_bus_info(&adapter->hw);
894
895 init_timer(&adapter->tx_fifo_stall_timer);
896 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
897 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
898
899 init_timer(&adapter->watchdog_timer);
900 adapter->watchdog_timer.function = &e1000_watchdog;
901 adapter->watchdog_timer.data = (unsigned long) adapter;
902
903 init_timer(&adapter->phy_info_timer);
904 adapter->phy_info_timer.function = &e1000_update_phy_info;
905 adapter->phy_info_timer.data = (unsigned long) adapter;
906
907 INIT_WORK(&adapter->reset_task,
908 (void (*)(void *))e1000_reset_task, netdev);
909
910 e1000_check_options(adapter);
911
912 /* Initial Wake on LAN setting
913 * If APM wake is enabled in the EEPROM,
914 * enable the ACPI Magic Packet filter
915 */
916
917 switch (adapter->hw.mac_type) {
918 case e1000_82542_rev2_0:
919 case e1000_82542_rev2_1:
920 case e1000_82543:
921 break;
922 case e1000_82544:
923 e1000_read_eeprom(&adapter->hw,
924 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
925 eeprom_apme_mask = E1000_EEPROM_82544_APM;
926 break;
927 case e1000_ich8lan:
928 e1000_read_eeprom(&adapter->hw,
929 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
930 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
931 break;
932 case e1000_82546:
933 case e1000_82546_rev_3:
934 case e1000_82571:
935 case e1000_80003es2lan:
936 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
937 e1000_read_eeprom(&adapter->hw,
938 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
939 break;
940 }
941 /* Fall Through */
942 default:
943 e1000_read_eeprom(&adapter->hw,
944 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
945 break;
946 }
947 if (eeprom_data & eeprom_apme_mask)
948 adapter->eeprom_wol |= E1000_WUFC_MAG;
949
950 /* now that we have the eeprom settings, apply the special cases
951 * where the eeprom may be wrong or the board simply won't support
952 * wake on lan on a particular port */
953 switch (pdev->device) {
954 case E1000_DEV_ID_82546GB_PCIE:
955 adapter->eeprom_wol = 0;
956 break;
957 case E1000_DEV_ID_82546EB_FIBER:
958 case E1000_DEV_ID_82546GB_FIBER:
959 case E1000_DEV_ID_82571EB_FIBER:
960 /* Wake events only supported on port A for dual fiber
961 * regardless of eeprom setting */
962 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
963 adapter->eeprom_wol = 0;
964 break;
965 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
966 case E1000_DEV_ID_82571EB_QUAD_COPPER:
967 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
968 /* if quad port adapter, disable WoL on all but port A */
969 if (global_quad_port_a != 0)
970 adapter->eeprom_wol = 0;
971 else
972 adapter->quad_port_a = 1;
973 /* Reset for multiple quad port adapters */
974 if (++global_quad_port_a == 4)
975 global_quad_port_a = 0;
976 break;
977 }
978
979 /* initialize the wol settings based on the eeprom settings */
980 adapter->wol = adapter->eeprom_wol;
981
982 /* print bus type/speed/width info */
983 {
984 struct e1000_hw *hw = &adapter->hw;
985 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
986 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
987 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
988 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
989 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
990 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
991 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
992 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
993 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
994 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
995 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
996 "32-bit"));
997 }
998
999 for (i = 0; i < 6; i++)
1000 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1001
1002 /* reset the hardware with the new settings */
1003 e1000_reset(adapter);
1004
1005 /* If the controller is 82573 and f/w is AMT, do not set
1006 * DRV_LOAD until the interface is up. For all other cases,
1007 * let the f/w know that the h/w is now under the control
1008 * of the driver. */
1009 if (adapter->hw.mac_type != e1000_82573 ||
1010 !e1000_check_mng_mode(&adapter->hw))
1011 e1000_get_hw_control(adapter);
1012
1013 strcpy(netdev->name, "eth%d");
1014 if ((err = register_netdev(netdev)))
1015 goto err_register;
1016
1017 /* tell the stack to leave us alone until e1000_open() is called */
1018 netif_carrier_off(netdev);
1019 netif_stop_queue(netdev);
1020
1021 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1022
1023 cards_found++;
1024 return 0;
1025
1026 err_register:
1027 e1000_release_hw_control(adapter);
1028 err_eeprom:
1029 if (!e1000_check_phy_reset_block(&adapter->hw))
1030 e1000_phy_hw_reset(&adapter->hw);
1031
1032 if (adapter->hw.flash_address)
1033 iounmap(adapter->hw.flash_address);
1034 err_flashmap:
1035 #ifdef CONFIG_E1000_NAPI
1036 for (i = 0; i < adapter->num_rx_queues; i++)
1037 dev_put(&adapter->polling_netdev[i]);
1038 #endif
1039
1040 kfree(adapter->tx_ring);
1041 kfree(adapter->rx_ring);
1042 #ifdef CONFIG_E1000_NAPI
1043 kfree(adapter->polling_netdev);
1044 #endif
1045 err_sw_init:
1046 iounmap(adapter->hw.hw_addr);
1047 err_ioremap:
1048 free_netdev(netdev);
1049 err_alloc_etherdev:
1050 pci_release_regions(pdev);
1051 err_pci_reg:
1052 err_dma:
1053 pci_disable_device(pdev);
1054 return err;
1055 }
1056
1057 /**
1058 * e1000_remove - Device Removal Routine
1059 * @pdev: PCI device information struct
1060 *
1061 * e1000_remove is called by the PCI subsystem to alert the driver
1062 * that it should release a PCI device. The could be caused by a
1063 * Hot-Plug event, or because the driver is going to be removed from
1064 * memory.
1065 **/
1066
1067 static void __devexit
1068 e1000_remove(struct pci_dev *pdev)
1069 {
1070 struct net_device *netdev = pci_get_drvdata(pdev);
1071 struct e1000_adapter *adapter = netdev_priv(netdev);
1072 uint32_t manc;
1073 #ifdef CONFIG_E1000_NAPI
1074 int i;
1075 #endif
1076
1077 flush_scheduled_work();
1078
1079 if (adapter->hw.mac_type >= e1000_82540 &&
1080 adapter->hw.mac_type < e1000_82571 &&
1081 adapter->hw.media_type == e1000_media_type_copper) {
1082 manc = E1000_READ_REG(&adapter->hw, MANC);
1083 if (manc & E1000_MANC_SMBUS_EN) {
1084 manc |= E1000_MANC_ARP_EN;
1085 E1000_WRITE_REG(&adapter->hw, MANC, manc);
1086 }
1087 }
1088
1089 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1090 * would have already happened in close and is redundant. */
1091 e1000_release_hw_control(adapter);
1092
1093 unregister_netdev(netdev);
1094 #ifdef CONFIG_E1000_NAPI
1095 for (i = 0; i < adapter->num_rx_queues; i++)
1096 dev_put(&adapter->polling_netdev[i]);
1097 #endif
1098
1099 if (!e1000_check_phy_reset_block(&adapter->hw))
1100 e1000_phy_hw_reset(&adapter->hw);
1101
1102 kfree(adapter->tx_ring);
1103 kfree(adapter->rx_ring);
1104 #ifdef CONFIG_E1000_NAPI
1105 kfree(adapter->polling_netdev);
1106 #endif
1107
1108 iounmap(adapter->hw.hw_addr);
1109 if (adapter->hw.flash_address)
1110 iounmap(adapter->hw.flash_address);
1111 pci_release_regions(pdev);
1112
1113 free_netdev(netdev);
1114
1115 pci_disable_device(pdev);
1116 }
1117
1118 /**
1119 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1120 * @adapter: board private structure to initialize
1121 *
1122 * e1000_sw_init initializes the Adapter private data structure.
1123 * Fields are initialized based on PCI device information and
1124 * OS network device settings (MTU size).
1125 **/
1126
1127 static int __devinit
1128 e1000_sw_init(struct e1000_adapter *adapter)
1129 {
1130 struct e1000_hw *hw = &adapter->hw;
1131 struct net_device *netdev = adapter->netdev;
1132 struct pci_dev *pdev = adapter->pdev;
1133 #ifdef CONFIG_E1000_NAPI
1134 int i;
1135 #endif
1136
1137 /* PCI config space info */
1138
1139 hw->vendor_id = pdev->vendor;
1140 hw->device_id = pdev->device;
1141 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1142 hw->subsystem_id = pdev->subsystem_device;
1143
1144 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1145
1146 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1147
1148 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1149 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1150 hw->max_frame_size = netdev->mtu +
1151 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1152 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1153
1154 /* identify the MAC */
1155
1156 if (e1000_set_mac_type(hw)) {
1157 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1158 return -EIO;
1159 }
1160
1161 switch (hw->mac_type) {
1162 default:
1163 break;
1164 case e1000_82541:
1165 case e1000_82547:
1166 case e1000_82541_rev_2:
1167 case e1000_82547_rev_2:
1168 hw->phy_init_script = 1;
1169 break;
1170 }
1171
1172 e1000_set_media_type(hw);
1173
1174 hw->wait_autoneg_complete = FALSE;
1175 hw->tbi_compatibility_en = TRUE;
1176 hw->adaptive_ifs = TRUE;
1177
1178 /* Copper options */
1179
1180 if (hw->media_type == e1000_media_type_copper) {
1181 hw->mdix = AUTO_ALL_MODES;
1182 hw->disable_polarity_correction = FALSE;
1183 hw->master_slave = E1000_MASTER_SLAVE;
1184 }
1185
1186 adapter->num_tx_queues = 1;
1187 adapter->num_rx_queues = 1;
1188
1189 if (e1000_alloc_queues(adapter)) {
1190 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1191 return -ENOMEM;
1192 }
1193
1194 #ifdef CONFIG_E1000_NAPI
1195 for (i = 0; i < adapter->num_rx_queues; i++) {
1196 adapter->polling_netdev[i].priv = adapter;
1197 adapter->polling_netdev[i].poll = &e1000_clean;
1198 adapter->polling_netdev[i].weight = 64;
1199 dev_hold(&adapter->polling_netdev[i]);
1200 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1201 }
1202 spin_lock_init(&adapter->tx_queue_lock);
1203 #endif
1204
1205 atomic_set(&adapter->irq_sem, 1);
1206 spin_lock_init(&adapter->stats_lock);
1207
1208 set_bit(__E1000_DOWN, &adapter->flags);
1209
1210 return 0;
1211 }
1212
1213 /**
1214 * e1000_alloc_queues - Allocate memory for all rings
1215 * @adapter: board private structure to initialize
1216 *
1217 * We allocate one ring per queue at run-time since we don't know the
1218 * number of queues at compile-time. The polling_netdev array is
1219 * intended for Multiqueue, but should work fine with a single queue.
1220 **/
1221
1222 static int __devinit
1223 e1000_alloc_queues(struct e1000_adapter *adapter)
1224 {
1225 int size;
1226
1227 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
1228 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1229 if (!adapter->tx_ring)
1230 return -ENOMEM;
1231 memset(adapter->tx_ring, 0, size);
1232
1233 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
1234 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1235 if (!adapter->rx_ring) {
1236 kfree(adapter->tx_ring);
1237 return -ENOMEM;
1238 }
1239 memset(adapter->rx_ring, 0, size);
1240
1241 #ifdef CONFIG_E1000_NAPI
1242 size = sizeof(struct net_device) * adapter->num_rx_queues;
1243 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1244 if (!adapter->polling_netdev) {
1245 kfree(adapter->tx_ring);
1246 kfree(adapter->rx_ring);
1247 return -ENOMEM;
1248 }
1249 memset(adapter->polling_netdev, 0, size);
1250 #endif
1251
1252 return E1000_SUCCESS;
1253 }
1254
1255 /**
1256 * e1000_open - Called when a network interface is made active
1257 * @netdev: network interface device structure
1258 *
1259 * Returns 0 on success, negative value on failure
1260 *
1261 * The open entry point is called when a network interface is made
1262 * active by the system (IFF_UP). At this point all resources needed
1263 * for transmit and receive operations are allocated, the interrupt
1264 * handler is registered with the OS, the watchdog timer is started,
1265 * and the stack is notified that the interface is ready.
1266 **/
1267
1268 static int
1269 e1000_open(struct net_device *netdev)
1270 {
1271 struct e1000_adapter *adapter = netdev_priv(netdev);
1272 int err;
1273
1274 /* disallow open during test */
1275 if (test_bit(__E1000_TESTING, &adapter->flags))
1276 return -EBUSY;
1277
1278 /* allocate transmit descriptors */
1279 if ((err = e1000_setup_all_tx_resources(adapter)))
1280 goto err_setup_tx;
1281
1282 /* allocate receive descriptors */
1283 if ((err = e1000_setup_all_rx_resources(adapter)))
1284 goto err_setup_rx;
1285
1286 err = e1000_request_irq(adapter);
1287 if (err)
1288 goto err_req_irq;
1289
1290 e1000_power_up_phy(adapter);
1291
1292 if ((err = e1000_up(adapter)))
1293 goto err_up;
1294 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1295 if ((adapter->hw.mng_cookie.status &
1296 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1297 e1000_update_mng_vlan(adapter);
1298 }
1299
1300 /* If AMT is enabled, let the firmware know that the network
1301 * interface is now open */
1302 if (adapter->hw.mac_type == e1000_82573 &&
1303 e1000_check_mng_mode(&adapter->hw))
1304 e1000_get_hw_control(adapter);
1305
1306 return E1000_SUCCESS;
1307
1308 err_up:
1309 e1000_power_down_phy(adapter);
1310 e1000_free_irq(adapter);
1311 err_req_irq:
1312 e1000_free_all_rx_resources(adapter);
1313 err_setup_rx:
1314 e1000_free_all_tx_resources(adapter);
1315 err_setup_tx:
1316 e1000_reset(adapter);
1317
1318 return err;
1319 }
1320
1321 /**
1322 * e1000_close - Disables a network interface
1323 * @netdev: network interface device structure
1324 *
1325 * Returns 0, this is not allowed to fail
1326 *
1327 * The close entry point is called when an interface is de-activated
1328 * by the OS. The hardware is still under the drivers control, but
1329 * needs to be disabled. A global MAC reset is issued to stop the
1330 * hardware, and all transmit and receive resources are freed.
1331 **/
1332
1333 static int
1334 e1000_close(struct net_device *netdev)
1335 {
1336 struct e1000_adapter *adapter = netdev_priv(netdev);
1337
1338 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1339 e1000_down(adapter);
1340 e1000_power_down_phy(adapter);
1341 e1000_free_irq(adapter);
1342
1343 e1000_free_all_tx_resources(adapter);
1344 e1000_free_all_rx_resources(adapter);
1345
1346 /* kill manageability vlan ID if supported, but not if a vlan with
1347 * the same ID is registered on the host OS (let 8021q kill it) */
1348 if ((adapter->hw.mng_cookie.status &
1349 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1350 !(adapter->vlgrp &&
1351 adapter->vlgrp->vlan_devices[adapter->mng_vlan_id])) {
1352 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1353 }
1354
1355 /* If AMT is enabled, let the firmware know that the network
1356 * interface is now closed */
1357 if (adapter->hw.mac_type == e1000_82573 &&
1358 e1000_check_mng_mode(&adapter->hw))
1359 e1000_release_hw_control(adapter);
1360
1361 return 0;
1362 }
1363
1364 /**
1365 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1366 * @adapter: address of board private structure
1367 * @start: address of beginning of memory
1368 * @len: length of memory
1369 **/
1370 static boolean_t
1371 e1000_check_64k_bound(struct e1000_adapter *adapter,
1372 void *start, unsigned long len)
1373 {
1374 unsigned long begin = (unsigned long) start;
1375 unsigned long end = begin + len;
1376
1377 /* First rev 82545 and 82546 need to not allow any memory
1378 * write location to cross 64k boundary due to errata 23 */
1379 if (adapter->hw.mac_type == e1000_82545 ||
1380 adapter->hw.mac_type == e1000_82546) {
1381 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1382 }
1383
1384 return TRUE;
1385 }
1386
1387 /**
1388 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1389 * @adapter: board private structure
1390 * @txdr: tx descriptor ring (for a specific queue) to setup
1391 *
1392 * Return 0 on success, negative on failure
1393 **/
1394
1395 static int
1396 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1397 struct e1000_tx_ring *txdr)
1398 {
1399 struct pci_dev *pdev = adapter->pdev;
1400 int size;
1401
1402 size = sizeof(struct e1000_buffer) * txdr->count;
1403 txdr->buffer_info = vmalloc(size);
1404 if (!txdr->buffer_info) {
1405 DPRINTK(PROBE, ERR,
1406 "Unable to allocate memory for the transmit descriptor ring\n");
1407 return -ENOMEM;
1408 }
1409 memset(txdr->buffer_info, 0, size);
1410
1411 /* round up to nearest 4K */
1412
1413 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1414 E1000_ROUNDUP(txdr->size, 4096);
1415
1416 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1417 if (!txdr->desc) {
1418 setup_tx_desc_die:
1419 vfree(txdr->buffer_info);
1420 DPRINTK(PROBE, ERR,
1421 "Unable to allocate memory for the transmit descriptor ring\n");
1422 return -ENOMEM;
1423 }
1424
1425 /* Fix for errata 23, can't cross 64kB boundary */
1426 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1427 void *olddesc = txdr->desc;
1428 dma_addr_t olddma = txdr->dma;
1429 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1430 "at %p\n", txdr->size, txdr->desc);
1431 /* Try again, without freeing the previous */
1432 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1433 /* Failed allocation, critical failure */
1434 if (!txdr->desc) {
1435 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1436 goto setup_tx_desc_die;
1437 }
1438
1439 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1440 /* give up */
1441 pci_free_consistent(pdev, txdr->size, txdr->desc,
1442 txdr->dma);
1443 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1444 DPRINTK(PROBE, ERR,
1445 "Unable to allocate aligned memory "
1446 "for the transmit descriptor ring\n");
1447 vfree(txdr->buffer_info);
1448 return -ENOMEM;
1449 } else {
1450 /* Free old allocation, new allocation was successful */
1451 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1452 }
1453 }
1454 memset(txdr->desc, 0, txdr->size);
1455
1456 txdr->next_to_use = 0;
1457 txdr->next_to_clean = 0;
1458 spin_lock_init(&txdr->tx_lock);
1459
1460 return 0;
1461 }
1462
1463 /**
1464 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1465 * (Descriptors) for all queues
1466 * @adapter: board private structure
1467 *
1468 * Return 0 on success, negative on failure
1469 **/
1470
1471 int
1472 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1473 {
1474 int i, err = 0;
1475
1476 for (i = 0; i < adapter->num_tx_queues; i++) {
1477 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1478 if (err) {
1479 DPRINTK(PROBE, ERR,
1480 "Allocation for Tx Queue %u failed\n", i);
1481 for (i-- ; i >= 0; i--)
1482 e1000_free_tx_resources(adapter,
1483 &adapter->tx_ring[i]);
1484 break;
1485 }
1486 }
1487
1488 return err;
1489 }
1490
1491 /**
1492 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1493 * @adapter: board private structure
1494 *
1495 * Configure the Tx unit of the MAC after a reset.
1496 **/
1497
1498 static void
1499 e1000_configure_tx(struct e1000_adapter *adapter)
1500 {
1501 uint64_t tdba;
1502 struct e1000_hw *hw = &adapter->hw;
1503 uint32_t tdlen, tctl, tipg, tarc;
1504 uint32_t ipgr1, ipgr2;
1505
1506 /* Setup the HW Tx Head and Tail descriptor pointers */
1507
1508 switch (adapter->num_tx_queues) {
1509 case 1:
1510 default:
1511 tdba = adapter->tx_ring[0].dma;
1512 tdlen = adapter->tx_ring[0].count *
1513 sizeof(struct e1000_tx_desc);
1514 E1000_WRITE_REG(hw, TDLEN, tdlen);
1515 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1516 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1517 E1000_WRITE_REG(hw, TDT, 0);
1518 E1000_WRITE_REG(hw, TDH, 0);
1519 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1520 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1521 break;
1522 }
1523
1524 /* Set the default values for the Tx Inter Packet Gap timer */
1525
1526 if (hw->media_type == e1000_media_type_fiber ||
1527 hw->media_type == e1000_media_type_internal_serdes)
1528 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1529 else
1530 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1531
1532 switch (hw->mac_type) {
1533 case e1000_82542_rev2_0:
1534 case e1000_82542_rev2_1:
1535 tipg = DEFAULT_82542_TIPG_IPGT;
1536 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1537 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1538 break;
1539 case e1000_80003es2lan:
1540 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1541 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1542 break;
1543 default:
1544 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1545 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1546 break;
1547 }
1548 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1549 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1550 E1000_WRITE_REG(hw, TIPG, tipg);
1551
1552 /* Set the Tx Interrupt Delay register */
1553
1554 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1555 if (hw->mac_type >= e1000_82540)
1556 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1557
1558 /* Program the Transmit Control Register */
1559
1560 tctl = E1000_READ_REG(hw, TCTL);
1561 tctl &= ~E1000_TCTL_CT;
1562 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1563 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1564
1565 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1566 tarc = E1000_READ_REG(hw, TARC0);
1567 /* set the speed mode bit, we'll clear it if we're not at
1568 * gigabit link later */
1569 tarc |= (1 << 21);
1570 E1000_WRITE_REG(hw, TARC0, tarc);
1571 } else if (hw->mac_type == e1000_80003es2lan) {
1572 tarc = E1000_READ_REG(hw, TARC0);
1573 tarc |= 1;
1574 E1000_WRITE_REG(hw, TARC0, tarc);
1575 tarc = E1000_READ_REG(hw, TARC1);
1576 tarc |= 1;
1577 E1000_WRITE_REG(hw, TARC1, tarc);
1578 }
1579
1580 e1000_config_collision_dist(hw);
1581
1582 /* Setup Transmit Descriptor Settings for eop descriptor */
1583 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1584 E1000_TXD_CMD_IFCS;
1585
1586 if (hw->mac_type < e1000_82543)
1587 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1588 else
1589 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1590
1591 /* Cache if we're 82544 running in PCI-X because we'll
1592 * need this to apply a workaround later in the send path. */
1593 if (hw->mac_type == e1000_82544 &&
1594 hw->bus_type == e1000_bus_type_pcix)
1595 adapter->pcix_82544 = 1;
1596
1597 E1000_WRITE_REG(hw, TCTL, tctl);
1598
1599 }
1600
1601 /**
1602 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1603 * @adapter: board private structure
1604 * @rxdr: rx descriptor ring (for a specific queue) to setup
1605 *
1606 * Returns 0 on success, negative on failure
1607 **/
1608
1609 static int
1610 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1611 struct e1000_rx_ring *rxdr)
1612 {
1613 struct pci_dev *pdev = adapter->pdev;
1614 int size, desc_len;
1615
1616 size = sizeof(struct e1000_buffer) * rxdr->count;
1617 rxdr->buffer_info = vmalloc(size);
1618 if (!rxdr->buffer_info) {
1619 DPRINTK(PROBE, ERR,
1620 "Unable to allocate memory for the receive descriptor ring\n");
1621 return -ENOMEM;
1622 }
1623 memset(rxdr->buffer_info, 0, size);
1624
1625 size = sizeof(struct e1000_ps_page) * rxdr->count;
1626 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1627 if (!rxdr->ps_page) {
1628 vfree(rxdr->buffer_info);
1629 DPRINTK(PROBE, ERR,
1630 "Unable to allocate memory for the receive descriptor ring\n");
1631 return -ENOMEM;
1632 }
1633 memset(rxdr->ps_page, 0, size);
1634
1635 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1636 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1637 if (!rxdr->ps_page_dma) {
1638 vfree(rxdr->buffer_info);
1639 kfree(rxdr->ps_page);
1640 DPRINTK(PROBE, ERR,
1641 "Unable to allocate memory for the receive descriptor ring\n");
1642 return -ENOMEM;
1643 }
1644 memset(rxdr->ps_page_dma, 0, size);
1645
1646 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1647 desc_len = sizeof(struct e1000_rx_desc);
1648 else
1649 desc_len = sizeof(union e1000_rx_desc_packet_split);
1650
1651 /* Round up to nearest 4K */
1652
1653 rxdr->size = rxdr->count * desc_len;
1654 E1000_ROUNDUP(rxdr->size, 4096);
1655
1656 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1657
1658 if (!rxdr->desc) {
1659 DPRINTK(PROBE, ERR,
1660 "Unable to allocate memory for the receive descriptor ring\n");
1661 setup_rx_desc_die:
1662 vfree(rxdr->buffer_info);
1663 kfree(rxdr->ps_page);
1664 kfree(rxdr->ps_page_dma);
1665 return -ENOMEM;
1666 }
1667
1668 /* Fix for errata 23, can't cross 64kB boundary */
1669 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1670 void *olddesc = rxdr->desc;
1671 dma_addr_t olddma = rxdr->dma;
1672 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1673 "at %p\n", rxdr->size, rxdr->desc);
1674 /* Try again, without freeing the previous */
1675 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1676 /* Failed allocation, critical failure */
1677 if (!rxdr->desc) {
1678 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1679 DPRINTK(PROBE, ERR,
1680 "Unable to allocate memory "
1681 "for the receive descriptor ring\n");
1682 goto setup_rx_desc_die;
1683 }
1684
1685 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1686 /* give up */
1687 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1688 rxdr->dma);
1689 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1690 DPRINTK(PROBE, ERR,
1691 "Unable to allocate aligned memory "
1692 "for the receive descriptor ring\n");
1693 goto setup_rx_desc_die;
1694 } else {
1695 /* Free old allocation, new allocation was successful */
1696 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1697 }
1698 }
1699 memset(rxdr->desc, 0, rxdr->size);
1700
1701 rxdr->next_to_clean = 0;
1702 rxdr->next_to_use = 0;
1703
1704 return 0;
1705 }
1706
1707 /**
1708 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1709 * (Descriptors) for all queues
1710 * @adapter: board private structure
1711 *
1712 * Return 0 on success, negative on failure
1713 **/
1714
1715 int
1716 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1717 {
1718 int i, err = 0;
1719
1720 for (i = 0; i < adapter->num_rx_queues; i++) {
1721 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1722 if (err) {
1723 DPRINTK(PROBE, ERR,
1724 "Allocation for Rx Queue %u failed\n", i);
1725 for (i-- ; i >= 0; i--)
1726 e1000_free_rx_resources(adapter,
1727 &adapter->rx_ring[i]);
1728 break;
1729 }
1730 }
1731
1732 return err;
1733 }
1734
1735 /**
1736 * e1000_setup_rctl - configure the receive control registers
1737 * @adapter: Board private structure
1738 **/
1739 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1740 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1741 static void
1742 e1000_setup_rctl(struct e1000_adapter *adapter)
1743 {
1744 uint32_t rctl, rfctl;
1745 uint32_t psrctl = 0;
1746 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1747 uint32_t pages = 0;
1748 #endif
1749
1750 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1751
1752 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1753
1754 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1755 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1756 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1757
1758 if (adapter->hw.tbi_compatibility_on == 1)
1759 rctl |= E1000_RCTL_SBP;
1760 else
1761 rctl &= ~E1000_RCTL_SBP;
1762
1763 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1764 rctl &= ~E1000_RCTL_LPE;
1765 else
1766 rctl |= E1000_RCTL_LPE;
1767
1768 /* Setup buffer sizes */
1769 rctl &= ~E1000_RCTL_SZ_4096;
1770 rctl |= E1000_RCTL_BSEX;
1771 switch (adapter->rx_buffer_len) {
1772 case E1000_RXBUFFER_256:
1773 rctl |= E1000_RCTL_SZ_256;
1774 rctl &= ~E1000_RCTL_BSEX;
1775 break;
1776 case E1000_RXBUFFER_512:
1777 rctl |= E1000_RCTL_SZ_512;
1778 rctl &= ~E1000_RCTL_BSEX;
1779 break;
1780 case E1000_RXBUFFER_1024:
1781 rctl |= E1000_RCTL_SZ_1024;
1782 rctl &= ~E1000_RCTL_BSEX;
1783 break;
1784 case E1000_RXBUFFER_2048:
1785 default:
1786 rctl |= E1000_RCTL_SZ_2048;
1787 rctl &= ~E1000_RCTL_BSEX;
1788 break;
1789 case E1000_RXBUFFER_4096:
1790 rctl |= E1000_RCTL_SZ_4096;
1791 break;
1792 case E1000_RXBUFFER_8192:
1793 rctl |= E1000_RCTL_SZ_8192;
1794 break;
1795 case E1000_RXBUFFER_16384:
1796 rctl |= E1000_RCTL_SZ_16384;
1797 break;
1798 }
1799
1800 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1801 /* 82571 and greater support packet-split where the protocol
1802 * header is placed in skb->data and the packet data is
1803 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1804 * In the case of a non-split, skb->data is linearly filled,
1805 * followed by the page buffers. Therefore, skb->data is
1806 * sized to hold the largest protocol header.
1807 */
1808 /* allocations using alloc_page take too long for regular MTU
1809 * so only enable packet split for jumbo frames */
1810 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1811 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1812 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1813 adapter->rx_ps_pages = pages;
1814 else
1815 adapter->rx_ps_pages = 0;
1816 #endif
1817 if (adapter->rx_ps_pages) {
1818 /* Configure extra packet-split registers */
1819 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1820 rfctl |= E1000_RFCTL_EXTEN;
1821 /* disable packet split support for IPv6 extension headers,
1822 * because some malformed IPv6 headers can hang the RX */
1823 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1824 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1825
1826 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1827
1828 rctl |= E1000_RCTL_DTYP_PS;
1829
1830 psrctl |= adapter->rx_ps_bsize0 >>
1831 E1000_PSRCTL_BSIZE0_SHIFT;
1832
1833 switch (adapter->rx_ps_pages) {
1834 case 3:
1835 psrctl |= PAGE_SIZE <<
1836 E1000_PSRCTL_BSIZE3_SHIFT;
1837 case 2:
1838 psrctl |= PAGE_SIZE <<
1839 E1000_PSRCTL_BSIZE2_SHIFT;
1840 case 1:
1841 psrctl |= PAGE_SIZE >>
1842 E1000_PSRCTL_BSIZE1_SHIFT;
1843 break;
1844 }
1845
1846 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1847 }
1848
1849 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1850 }
1851
1852 /**
1853 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1854 * @adapter: board private structure
1855 *
1856 * Configure the Rx unit of the MAC after a reset.
1857 **/
1858
1859 static void
1860 e1000_configure_rx(struct e1000_adapter *adapter)
1861 {
1862 uint64_t rdba;
1863 struct e1000_hw *hw = &adapter->hw;
1864 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1865
1866 if (adapter->rx_ps_pages) {
1867 /* this is a 32 byte descriptor */
1868 rdlen = adapter->rx_ring[0].count *
1869 sizeof(union e1000_rx_desc_packet_split);
1870 adapter->clean_rx = e1000_clean_rx_irq_ps;
1871 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1872 } else {
1873 rdlen = adapter->rx_ring[0].count *
1874 sizeof(struct e1000_rx_desc);
1875 adapter->clean_rx = e1000_clean_rx_irq;
1876 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1877 }
1878
1879 /* disable receives while setting up the descriptors */
1880 rctl = E1000_READ_REG(hw, RCTL);
1881 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1882
1883 /* set the Receive Delay Timer Register */
1884 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1885
1886 if (hw->mac_type >= e1000_82540) {
1887 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1888 if (adapter->itr > 1)
1889 E1000_WRITE_REG(hw, ITR,
1890 1000000000 / (adapter->itr * 256));
1891 }
1892
1893 if (hw->mac_type >= e1000_82571) {
1894 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1895 /* Reset delay timers after every interrupt */
1896 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1897 #ifdef CONFIG_E1000_NAPI
1898 /* Auto-Mask interrupts upon ICR read. */
1899 ctrl_ext |= E1000_CTRL_EXT_IAME;
1900 #endif
1901 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1902 E1000_WRITE_REG(hw, IAM, ~0);
1903 E1000_WRITE_FLUSH(hw);
1904 }
1905
1906 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1907 * the Base and Length of the Rx Descriptor Ring */
1908 switch (adapter->num_rx_queues) {
1909 case 1:
1910 default:
1911 rdba = adapter->rx_ring[0].dma;
1912 E1000_WRITE_REG(hw, RDLEN, rdlen);
1913 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1914 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1915 E1000_WRITE_REG(hw, RDT, 0);
1916 E1000_WRITE_REG(hw, RDH, 0);
1917 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1918 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
1919 break;
1920 }
1921
1922 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
1923 if (hw->mac_type >= e1000_82543) {
1924 rxcsum = E1000_READ_REG(hw, RXCSUM);
1925 if (adapter->rx_csum == TRUE) {
1926 rxcsum |= E1000_RXCSUM_TUOFL;
1927
1928 /* Enable 82571 IPv4 payload checksum for UDP fragments
1929 * Must be used in conjunction with packet-split. */
1930 if ((hw->mac_type >= e1000_82571) &&
1931 (adapter->rx_ps_pages)) {
1932 rxcsum |= E1000_RXCSUM_IPPCSE;
1933 }
1934 } else {
1935 rxcsum &= ~E1000_RXCSUM_TUOFL;
1936 /* don't need to clear IPPCSE as it defaults to 0 */
1937 }
1938 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1939 }
1940
1941 /* enable early receives on 82573, only takes effect if using > 2048
1942 * byte total frame size. for example only for jumbo frames */
1943 #define E1000_ERT_2048 0x100
1944 if (hw->mac_type == e1000_82573)
1945 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
1946
1947 /* Enable Receives */
1948 E1000_WRITE_REG(hw, RCTL, rctl);
1949 }
1950
1951 /**
1952 * e1000_free_tx_resources - Free Tx Resources per Queue
1953 * @adapter: board private structure
1954 * @tx_ring: Tx descriptor ring for a specific queue
1955 *
1956 * Free all transmit software resources
1957 **/
1958
1959 static void
1960 e1000_free_tx_resources(struct e1000_adapter *adapter,
1961 struct e1000_tx_ring *tx_ring)
1962 {
1963 struct pci_dev *pdev = adapter->pdev;
1964
1965 e1000_clean_tx_ring(adapter, tx_ring);
1966
1967 vfree(tx_ring->buffer_info);
1968 tx_ring->buffer_info = NULL;
1969
1970 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1971
1972 tx_ring->desc = NULL;
1973 }
1974
1975 /**
1976 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1977 * @adapter: board private structure
1978 *
1979 * Free all transmit software resources
1980 **/
1981
1982 void
1983 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1984 {
1985 int i;
1986
1987 for (i = 0; i < adapter->num_tx_queues; i++)
1988 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1989 }
1990
1991 static void
1992 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1993 struct e1000_buffer *buffer_info)
1994 {
1995 if (buffer_info->dma) {
1996 pci_unmap_page(adapter->pdev,
1997 buffer_info->dma,
1998 buffer_info->length,
1999 PCI_DMA_TODEVICE);
2000 buffer_info->dma = 0;
2001 }
2002 if (buffer_info->skb) {
2003 dev_kfree_skb_any(buffer_info->skb);
2004 buffer_info->skb = NULL;
2005 }
2006 /* buffer_info must be completely set up in the transmit path */
2007 }
2008
2009 /**
2010 * e1000_clean_tx_ring - Free Tx Buffers
2011 * @adapter: board private structure
2012 * @tx_ring: ring to be cleaned
2013 **/
2014
2015 static void
2016 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2017 struct e1000_tx_ring *tx_ring)
2018 {
2019 struct e1000_buffer *buffer_info;
2020 unsigned long size;
2021 unsigned int i;
2022
2023 /* Free all the Tx ring sk_buffs */
2024
2025 for (i = 0; i < tx_ring->count; i++) {
2026 buffer_info = &tx_ring->buffer_info[i];
2027 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2028 }
2029
2030 size = sizeof(struct e1000_buffer) * tx_ring->count;
2031 memset(tx_ring->buffer_info, 0, size);
2032
2033 /* Zero out the descriptor ring */
2034
2035 memset(tx_ring->desc, 0, tx_ring->size);
2036
2037 tx_ring->next_to_use = 0;
2038 tx_ring->next_to_clean = 0;
2039 tx_ring->last_tx_tso = 0;
2040
2041 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2042 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2043 }
2044
2045 /**
2046 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2047 * @adapter: board private structure
2048 **/
2049
2050 static void
2051 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2052 {
2053 int i;
2054
2055 for (i = 0; i < adapter->num_tx_queues; i++)
2056 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2057 }
2058
2059 /**
2060 * e1000_free_rx_resources - Free Rx Resources
2061 * @adapter: board private structure
2062 * @rx_ring: ring to clean the resources from
2063 *
2064 * Free all receive software resources
2065 **/
2066
2067 static void
2068 e1000_free_rx_resources(struct e1000_adapter *adapter,
2069 struct e1000_rx_ring *rx_ring)
2070 {
2071 struct pci_dev *pdev = adapter->pdev;
2072
2073 e1000_clean_rx_ring(adapter, rx_ring);
2074
2075 vfree(rx_ring->buffer_info);
2076 rx_ring->buffer_info = NULL;
2077 kfree(rx_ring->ps_page);
2078 rx_ring->ps_page = NULL;
2079 kfree(rx_ring->ps_page_dma);
2080 rx_ring->ps_page_dma = NULL;
2081
2082 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2083
2084 rx_ring->desc = NULL;
2085 }
2086
2087 /**
2088 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2089 * @adapter: board private structure
2090 *
2091 * Free all receive software resources
2092 **/
2093
2094 void
2095 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2096 {
2097 int i;
2098
2099 for (i = 0; i < adapter->num_rx_queues; i++)
2100 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2101 }
2102
2103 /**
2104 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2105 * @adapter: board private structure
2106 * @rx_ring: ring to free buffers from
2107 **/
2108
2109 static void
2110 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2111 struct e1000_rx_ring *rx_ring)
2112 {
2113 struct e1000_buffer *buffer_info;
2114 struct e1000_ps_page *ps_page;
2115 struct e1000_ps_page_dma *ps_page_dma;
2116 struct pci_dev *pdev = adapter->pdev;
2117 unsigned long size;
2118 unsigned int i, j;
2119
2120 /* Free all the Rx ring sk_buffs */
2121 for (i = 0; i < rx_ring->count; i++) {
2122 buffer_info = &rx_ring->buffer_info[i];
2123 if (buffer_info->skb) {
2124 pci_unmap_single(pdev,
2125 buffer_info->dma,
2126 buffer_info->length,
2127 PCI_DMA_FROMDEVICE);
2128
2129 dev_kfree_skb(buffer_info->skb);
2130 buffer_info->skb = NULL;
2131 }
2132 ps_page = &rx_ring->ps_page[i];
2133 ps_page_dma = &rx_ring->ps_page_dma[i];
2134 for (j = 0; j < adapter->rx_ps_pages; j++) {
2135 if (!ps_page->ps_page[j]) break;
2136 pci_unmap_page(pdev,
2137 ps_page_dma->ps_page_dma[j],
2138 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2139 ps_page_dma->ps_page_dma[j] = 0;
2140 put_page(ps_page->ps_page[j]);
2141 ps_page->ps_page[j] = NULL;
2142 }
2143 }
2144
2145 size = sizeof(struct e1000_buffer) * rx_ring->count;
2146 memset(rx_ring->buffer_info, 0, size);
2147 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2148 memset(rx_ring->ps_page, 0, size);
2149 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2150 memset(rx_ring->ps_page_dma, 0, size);
2151
2152 /* Zero out the descriptor ring */
2153
2154 memset(rx_ring->desc, 0, rx_ring->size);
2155
2156 rx_ring->next_to_clean = 0;
2157 rx_ring->next_to_use = 0;
2158
2159 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2160 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2161 }
2162
2163 /**
2164 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2165 * @adapter: board private structure
2166 **/
2167
2168 static void
2169 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2170 {
2171 int i;
2172
2173 for (i = 0; i < adapter->num_rx_queues; i++)
2174 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2175 }
2176
2177 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2178 * and memory write and invalidate disabled for certain operations
2179 */
2180 static void
2181 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2182 {
2183 struct net_device *netdev = adapter->netdev;
2184 uint32_t rctl;
2185
2186 e1000_pci_clear_mwi(&adapter->hw);
2187
2188 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2189 rctl |= E1000_RCTL_RST;
2190 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2191 E1000_WRITE_FLUSH(&adapter->hw);
2192 mdelay(5);
2193
2194 if (netif_running(netdev))
2195 e1000_clean_all_rx_rings(adapter);
2196 }
2197
2198 static void
2199 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2200 {
2201 struct net_device *netdev = adapter->netdev;
2202 uint32_t rctl;
2203
2204 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2205 rctl &= ~E1000_RCTL_RST;
2206 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2207 E1000_WRITE_FLUSH(&adapter->hw);
2208 mdelay(5);
2209
2210 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2211 e1000_pci_set_mwi(&adapter->hw);
2212
2213 if (netif_running(netdev)) {
2214 /* No need to loop, because 82542 supports only 1 queue */
2215 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2216 e1000_configure_rx(adapter);
2217 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2218 }
2219 }
2220
2221 /**
2222 * e1000_set_mac - Change the Ethernet Address of the NIC
2223 * @netdev: network interface device structure
2224 * @p: pointer to an address structure
2225 *
2226 * Returns 0 on success, negative on failure
2227 **/
2228
2229 static int
2230 e1000_set_mac(struct net_device *netdev, void *p)
2231 {
2232 struct e1000_adapter *adapter = netdev_priv(netdev);
2233 struct sockaddr *addr = p;
2234
2235 if (!is_valid_ether_addr(addr->sa_data))
2236 return -EADDRNOTAVAIL;
2237
2238 /* 82542 2.0 needs to be in reset to write receive address registers */
2239
2240 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2241 e1000_enter_82542_rst(adapter);
2242
2243 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2244 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2245
2246 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2247
2248 /* With 82571 controllers, LAA may be overwritten (with the default)
2249 * due to controller reset from the other port. */
2250 if (adapter->hw.mac_type == e1000_82571) {
2251 /* activate the work around */
2252 adapter->hw.laa_is_present = 1;
2253
2254 /* Hold a copy of the LAA in RAR[14] This is done so that
2255 * between the time RAR[0] gets clobbered and the time it
2256 * gets fixed (in e1000_watchdog), the actual LAA is in one
2257 * of the RARs and no incoming packets directed to this port
2258 * are dropped. Eventaully the LAA will be in RAR[0] and
2259 * RAR[14] */
2260 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2261 E1000_RAR_ENTRIES - 1);
2262 }
2263
2264 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2265 e1000_leave_82542_rst(adapter);
2266
2267 return 0;
2268 }
2269
2270 /**
2271 * e1000_set_multi - Multicast and Promiscuous mode set
2272 * @netdev: network interface device structure
2273 *
2274 * The set_multi entry point is called whenever the multicast address
2275 * list or the network interface flags are updated. This routine is
2276 * responsible for configuring the hardware for proper multicast,
2277 * promiscuous mode, and all-multi behavior.
2278 **/
2279
2280 static void
2281 e1000_set_multi(struct net_device *netdev)
2282 {
2283 struct e1000_adapter *adapter = netdev_priv(netdev);
2284 struct e1000_hw *hw = &adapter->hw;
2285 struct dev_mc_list *mc_ptr;
2286 uint32_t rctl;
2287 uint32_t hash_value;
2288 int i, rar_entries = E1000_RAR_ENTRIES;
2289 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2290 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2291 E1000_NUM_MTA_REGISTERS;
2292
2293 if (adapter->hw.mac_type == e1000_ich8lan)
2294 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2295
2296 /* reserve RAR[14] for LAA over-write work-around */
2297 if (adapter->hw.mac_type == e1000_82571)
2298 rar_entries--;
2299
2300 /* Check for Promiscuous and All Multicast modes */
2301
2302 rctl = E1000_READ_REG(hw, RCTL);
2303
2304 if (netdev->flags & IFF_PROMISC) {
2305 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2306 } else if (netdev->flags & IFF_ALLMULTI) {
2307 rctl |= E1000_RCTL_MPE;
2308 rctl &= ~E1000_RCTL_UPE;
2309 } else {
2310 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2311 }
2312
2313 E1000_WRITE_REG(hw, RCTL, rctl);
2314
2315 /* 82542 2.0 needs to be in reset to write receive address registers */
2316
2317 if (hw->mac_type == e1000_82542_rev2_0)
2318 e1000_enter_82542_rst(adapter);
2319
2320 /* load the first 14 multicast address into the exact filters 1-14
2321 * RAR 0 is used for the station MAC adddress
2322 * if there are not 14 addresses, go ahead and clear the filters
2323 * -- with 82571 controllers only 0-13 entries are filled here
2324 */
2325 mc_ptr = netdev->mc_list;
2326
2327 for (i = 1; i < rar_entries; i++) {
2328 if (mc_ptr) {
2329 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2330 mc_ptr = mc_ptr->next;
2331 } else {
2332 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2333 E1000_WRITE_FLUSH(hw);
2334 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2335 E1000_WRITE_FLUSH(hw);
2336 }
2337 }
2338
2339 /* clear the old settings from the multicast hash table */
2340
2341 for (i = 0; i < mta_reg_count; i++) {
2342 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2343 E1000_WRITE_FLUSH(hw);
2344 }
2345
2346 /* load any remaining addresses into the hash table */
2347
2348 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2349 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2350 e1000_mta_set(hw, hash_value);
2351 }
2352
2353 if (hw->mac_type == e1000_82542_rev2_0)
2354 e1000_leave_82542_rst(adapter);
2355 }
2356
2357 /* Need to wait a few seconds after link up to get diagnostic information from
2358 * the phy */
2359
2360 static void
2361 e1000_update_phy_info(unsigned long data)
2362 {
2363 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2364 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2365 }
2366
2367 /**
2368 * e1000_82547_tx_fifo_stall - Timer Call-back
2369 * @data: pointer to adapter cast into an unsigned long
2370 **/
2371
2372 static void
2373 e1000_82547_tx_fifo_stall(unsigned long data)
2374 {
2375 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2376 struct net_device *netdev = adapter->netdev;
2377 uint32_t tctl;
2378
2379 if (atomic_read(&adapter->tx_fifo_stall)) {
2380 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2381 E1000_READ_REG(&adapter->hw, TDH)) &&
2382 (E1000_READ_REG(&adapter->hw, TDFT) ==
2383 E1000_READ_REG(&adapter->hw, TDFH)) &&
2384 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2385 E1000_READ_REG(&adapter->hw, TDFHS))) {
2386 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2387 E1000_WRITE_REG(&adapter->hw, TCTL,
2388 tctl & ~E1000_TCTL_EN);
2389 E1000_WRITE_REG(&adapter->hw, TDFT,
2390 adapter->tx_head_addr);
2391 E1000_WRITE_REG(&adapter->hw, TDFH,
2392 adapter->tx_head_addr);
2393 E1000_WRITE_REG(&adapter->hw, TDFTS,
2394 adapter->tx_head_addr);
2395 E1000_WRITE_REG(&adapter->hw, TDFHS,
2396 adapter->tx_head_addr);
2397 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2398 E1000_WRITE_FLUSH(&adapter->hw);
2399
2400 adapter->tx_fifo_head = 0;
2401 atomic_set(&adapter->tx_fifo_stall, 0);
2402 netif_wake_queue(netdev);
2403 } else {
2404 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2405 }
2406 }
2407 }
2408
2409 /**
2410 * e1000_watchdog - Timer Call-back
2411 * @data: pointer to adapter cast into an unsigned long
2412 **/
2413 static void
2414 e1000_watchdog(unsigned long data)
2415 {
2416 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2417 struct net_device *netdev = adapter->netdev;
2418 struct e1000_tx_ring *txdr = adapter->tx_ring;
2419 uint32_t link, tctl;
2420 int32_t ret_val;
2421
2422 ret_val = e1000_check_for_link(&adapter->hw);
2423 if ((ret_val == E1000_ERR_PHY) &&
2424 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2425 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2426 /* See e1000_kumeran_lock_loss_workaround() */
2427 DPRINTK(LINK, INFO,
2428 "Gigabit has been disabled, downgrading speed\n");
2429 }
2430
2431 if (adapter->hw.mac_type == e1000_82573) {
2432 e1000_enable_tx_pkt_filtering(&adapter->hw);
2433 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2434 e1000_update_mng_vlan(adapter);
2435 }
2436
2437 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2438 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2439 link = !adapter->hw.serdes_link_down;
2440 else
2441 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2442
2443 if (link) {
2444 if (!netif_carrier_ok(netdev)) {
2445 boolean_t txb2b = 1;
2446 e1000_get_speed_and_duplex(&adapter->hw,
2447 &adapter->link_speed,
2448 &adapter->link_duplex);
2449
2450 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2451 adapter->link_speed,
2452 adapter->link_duplex == FULL_DUPLEX ?
2453 "Full Duplex" : "Half Duplex");
2454
2455 /* tweak tx_queue_len according to speed/duplex
2456 * and adjust the timeout factor */
2457 netdev->tx_queue_len = adapter->tx_queue_len;
2458 adapter->tx_timeout_factor = 1;
2459 switch (adapter->link_speed) {
2460 case SPEED_10:
2461 txb2b = 0;
2462 netdev->tx_queue_len = 10;
2463 adapter->tx_timeout_factor = 8;
2464 break;
2465 case SPEED_100:
2466 txb2b = 0;
2467 netdev->tx_queue_len = 100;
2468 /* maybe add some timeout factor ? */
2469 break;
2470 }
2471
2472 if ((adapter->hw.mac_type == e1000_82571 ||
2473 adapter->hw.mac_type == e1000_82572) &&
2474 txb2b == 0) {
2475 uint32_t tarc0;
2476 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2477 tarc0 &= ~(1 << 21);
2478 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2479 }
2480
2481 #ifdef NETIF_F_TSO
2482 /* disable TSO for pcie and 10/100 speeds, to avoid
2483 * some hardware issues */
2484 if (!adapter->tso_force &&
2485 adapter->hw.bus_type == e1000_bus_type_pci_express){
2486 switch (adapter->link_speed) {
2487 case SPEED_10:
2488 case SPEED_100:
2489 DPRINTK(PROBE,INFO,
2490 "10/100 speed: disabling TSO\n");
2491 netdev->features &= ~NETIF_F_TSO;
2492 #ifdef NETIF_F_TSO6
2493 netdev->features &= ~NETIF_F_TSO6;
2494 #endif
2495 break;
2496 case SPEED_1000:
2497 netdev->features |= NETIF_F_TSO;
2498 #ifdef NETIF_F_TSO6
2499 netdev->features |= NETIF_F_TSO6;
2500 #endif
2501 break;
2502 default:
2503 /* oops */
2504 break;
2505 }
2506 }
2507 #endif
2508
2509 /* enable transmits in the hardware, need to do this
2510 * after setting TARC0 */
2511 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2512 tctl |= E1000_TCTL_EN;
2513 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2514
2515 netif_carrier_on(netdev);
2516 netif_wake_queue(netdev);
2517 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2518 adapter->smartspeed = 0;
2519 }
2520 } else {
2521 if (netif_carrier_ok(netdev)) {
2522 adapter->link_speed = 0;
2523 adapter->link_duplex = 0;
2524 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2525 netif_carrier_off(netdev);
2526 netif_stop_queue(netdev);
2527 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2528
2529 /* 80003ES2LAN workaround--
2530 * For packet buffer work-around on link down event;
2531 * disable receives in the ISR and
2532 * reset device here in the watchdog
2533 */
2534 if (adapter->hw.mac_type == e1000_80003es2lan)
2535 /* reset device */
2536 schedule_work(&adapter->reset_task);
2537 }
2538
2539 e1000_smartspeed(adapter);
2540 }
2541
2542 e1000_update_stats(adapter);
2543
2544 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2545 adapter->tpt_old = adapter->stats.tpt;
2546 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2547 adapter->colc_old = adapter->stats.colc;
2548
2549 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2550 adapter->gorcl_old = adapter->stats.gorcl;
2551 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2552 adapter->gotcl_old = adapter->stats.gotcl;
2553
2554 e1000_update_adaptive(&adapter->hw);
2555
2556 if (!netif_carrier_ok(netdev)) {
2557 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2558 /* We've lost link, so the controller stops DMA,
2559 * but we've got queued Tx work that's never going
2560 * to get done, so reset controller to flush Tx.
2561 * (Do the reset outside of interrupt context). */
2562 adapter->tx_timeout_count++;
2563 schedule_work(&adapter->reset_task);
2564 }
2565 }
2566
2567 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
2568 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
2569 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2570 * asymmetrical Tx or Rx gets ITR=8000; everyone
2571 * else is between 2000-8000. */
2572 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
2573 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
2574 adapter->gotcl - adapter->gorcl :
2575 adapter->gorcl - adapter->gotcl) / 10000;
2576 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2577 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2578 }
2579
2580 /* Cause software interrupt to ensure rx ring is cleaned */
2581 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2582
2583 /* Force detection of hung controller every watchdog period */
2584 adapter->detect_tx_hung = TRUE;
2585
2586 /* With 82571 controllers, LAA may be overwritten due to controller
2587 * reset from the other port. Set the appropriate LAA in RAR[0] */
2588 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2589 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2590
2591 /* Reset the timer */
2592 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2593 }
2594
2595 #define E1000_TX_FLAGS_CSUM 0x00000001
2596 #define E1000_TX_FLAGS_VLAN 0x00000002
2597 #define E1000_TX_FLAGS_TSO 0x00000004
2598 #define E1000_TX_FLAGS_IPV4 0x00000008
2599 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2600 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2601
2602 static int
2603 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2604 struct sk_buff *skb)
2605 {
2606 #ifdef NETIF_F_TSO
2607 struct e1000_context_desc *context_desc;
2608 struct e1000_buffer *buffer_info;
2609 unsigned int i;
2610 uint32_t cmd_length = 0;
2611 uint16_t ipcse = 0, tucse, mss;
2612 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2613 int err;
2614
2615 if (skb_is_gso(skb)) {
2616 if (skb_header_cloned(skb)) {
2617 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2618 if (err)
2619 return err;
2620 }
2621
2622 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2623 mss = skb_shinfo(skb)->gso_size;
2624 if (skb->protocol == htons(ETH_P_IP)) {
2625 skb->nh.iph->tot_len = 0;
2626 skb->nh.iph->check = 0;
2627 skb->h.th->check =
2628 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2629 skb->nh.iph->daddr,
2630 0,
2631 IPPROTO_TCP,
2632 0);
2633 cmd_length = E1000_TXD_CMD_IP;
2634 ipcse = skb->h.raw - skb->data - 1;
2635 #ifdef NETIF_F_TSO6
2636 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2637 skb->nh.ipv6h->payload_len = 0;
2638 skb->h.th->check =
2639 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2640 &skb->nh.ipv6h->daddr,
2641 0,
2642 IPPROTO_TCP,
2643 0);
2644 ipcse = 0;
2645 #endif
2646 }
2647 ipcss = skb->nh.raw - skb->data;
2648 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
2649 tucss = skb->h.raw - skb->data;
2650 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2651 tucse = 0;
2652
2653 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2654 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2655
2656 i = tx_ring->next_to_use;
2657 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2658 buffer_info = &tx_ring->buffer_info[i];
2659
2660 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2661 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2662 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2663 context_desc->upper_setup.tcp_fields.tucss = tucss;
2664 context_desc->upper_setup.tcp_fields.tucso = tucso;
2665 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2666 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2667 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2668 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2669
2670 buffer_info->time_stamp = jiffies;
2671 buffer_info->next_to_watch = i;
2672
2673 if (++i == tx_ring->count) i = 0;
2674 tx_ring->next_to_use = i;
2675
2676 return TRUE;
2677 }
2678 #endif
2679
2680 return FALSE;
2681 }
2682
2683 static boolean_t
2684 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2685 struct sk_buff *skb)
2686 {
2687 struct e1000_context_desc *context_desc;
2688 struct e1000_buffer *buffer_info;
2689 unsigned int i;
2690 uint8_t css;
2691
2692 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2693 css = skb->h.raw - skb->data;
2694
2695 i = tx_ring->next_to_use;
2696 buffer_info = &tx_ring->buffer_info[i];
2697 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2698
2699 context_desc->upper_setup.tcp_fields.tucss = css;
2700 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2701 context_desc->upper_setup.tcp_fields.tucse = 0;
2702 context_desc->tcp_seg_setup.data = 0;
2703 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2704
2705 buffer_info->time_stamp = jiffies;
2706 buffer_info->next_to_watch = i;
2707
2708 if (unlikely(++i == tx_ring->count)) i = 0;
2709 tx_ring->next_to_use = i;
2710
2711 return TRUE;
2712 }
2713
2714 return FALSE;
2715 }
2716
2717 #define E1000_MAX_TXD_PWR 12
2718 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2719
2720 static int
2721 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2722 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2723 unsigned int nr_frags, unsigned int mss)
2724 {
2725 struct e1000_buffer *buffer_info;
2726 unsigned int len = skb->len;
2727 unsigned int offset = 0, size, count = 0, i;
2728 unsigned int f;
2729 len -= skb->data_len;
2730
2731 i = tx_ring->next_to_use;
2732
2733 while (len) {
2734 buffer_info = &tx_ring->buffer_info[i];
2735 size = min(len, max_per_txd);
2736 #ifdef NETIF_F_TSO
2737 /* Workaround for Controller erratum --
2738 * descriptor for non-tso packet in a linear SKB that follows a
2739 * tso gets written back prematurely before the data is fully
2740 * DMA'd to the controller */
2741 if (!skb->data_len && tx_ring->last_tx_tso &&
2742 !skb_is_gso(skb)) {
2743 tx_ring->last_tx_tso = 0;
2744 size -= 4;
2745 }
2746
2747 /* Workaround for premature desc write-backs
2748 * in TSO mode. Append 4-byte sentinel desc */
2749 if (unlikely(mss && !nr_frags && size == len && size > 8))
2750 size -= 4;
2751 #endif
2752 /* work-around for errata 10 and it applies
2753 * to all controllers in PCI-X mode
2754 * The fix is to make sure that the first descriptor of a
2755 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2756 */
2757 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2758 (size > 2015) && count == 0))
2759 size = 2015;
2760
2761 /* Workaround for potential 82544 hang in PCI-X. Avoid
2762 * terminating buffers within evenly-aligned dwords. */
2763 if (unlikely(adapter->pcix_82544 &&
2764 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2765 size > 4))
2766 size -= 4;
2767
2768 buffer_info->length = size;
2769 buffer_info->dma =
2770 pci_map_single(adapter->pdev,
2771 skb->data + offset,
2772 size,
2773 PCI_DMA_TODEVICE);
2774 buffer_info->time_stamp = jiffies;
2775 buffer_info->next_to_watch = i;
2776
2777 len -= size;
2778 offset += size;
2779 count++;
2780 if (unlikely(++i == tx_ring->count)) i = 0;
2781 }
2782
2783 for (f = 0; f < nr_frags; f++) {
2784 struct skb_frag_struct *frag;
2785
2786 frag = &skb_shinfo(skb)->frags[f];
2787 len = frag->size;
2788 offset = frag->page_offset;
2789
2790 while (len) {
2791 buffer_info = &tx_ring->buffer_info[i];
2792 size = min(len, max_per_txd);
2793 #ifdef NETIF_F_TSO
2794 /* Workaround for premature desc write-backs
2795 * in TSO mode. Append 4-byte sentinel desc */
2796 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2797 size -= 4;
2798 #endif
2799 /* Workaround for potential 82544 hang in PCI-X.
2800 * Avoid terminating buffers within evenly-aligned
2801 * dwords. */
2802 if (unlikely(adapter->pcix_82544 &&
2803 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2804 size > 4))
2805 size -= 4;
2806
2807 buffer_info->length = size;
2808 buffer_info->dma =
2809 pci_map_page(adapter->pdev,
2810 frag->page,
2811 offset,
2812 size,
2813 PCI_DMA_TODEVICE);
2814 buffer_info->time_stamp = jiffies;
2815 buffer_info->next_to_watch = i;
2816
2817 len -= size;
2818 offset += size;
2819 count++;
2820 if (unlikely(++i == tx_ring->count)) i = 0;
2821 }
2822 }
2823
2824 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2825 tx_ring->buffer_info[i].skb = skb;
2826 tx_ring->buffer_info[first].next_to_watch = i;
2827
2828 return count;
2829 }
2830
2831 static void
2832 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2833 int tx_flags, int count)
2834 {
2835 struct e1000_tx_desc *tx_desc = NULL;
2836 struct e1000_buffer *buffer_info;
2837 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2838 unsigned int i;
2839
2840 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
2841 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2842 E1000_TXD_CMD_TSE;
2843 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2844
2845 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2846 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2847 }
2848
2849 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
2850 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2851 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2852 }
2853
2854 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
2855 txd_lower |= E1000_TXD_CMD_VLE;
2856 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2857 }
2858
2859 i = tx_ring->next_to_use;
2860
2861 while (count--) {
2862 buffer_info = &tx_ring->buffer_info[i];
2863 tx_desc = E1000_TX_DESC(*tx_ring, i);
2864 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2865 tx_desc->lower.data =
2866 cpu_to_le32(txd_lower | buffer_info->length);
2867 tx_desc->upper.data = cpu_to_le32(txd_upper);
2868 if (unlikely(++i == tx_ring->count)) i = 0;
2869 }
2870
2871 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2872
2873 /* Force memory writes to complete before letting h/w
2874 * know there are new descriptors to fetch. (Only
2875 * applicable for weak-ordered memory model archs,
2876 * such as IA-64). */
2877 wmb();
2878
2879 tx_ring->next_to_use = i;
2880 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2881 /* we need this if more than one processor can write to our tail
2882 * at a time, it syncronizes IO on IA64/Altix systems */
2883 mmiowb();
2884 }
2885
2886 /**
2887 * 82547 workaround to avoid controller hang in half-duplex environment.
2888 * The workaround is to avoid queuing a large packet that would span
2889 * the internal Tx FIFO ring boundary by notifying the stack to resend
2890 * the packet at a later time. This gives the Tx FIFO an opportunity to
2891 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2892 * to the beginning of the Tx FIFO.
2893 **/
2894
2895 #define E1000_FIFO_HDR 0x10
2896 #define E1000_82547_PAD_LEN 0x3E0
2897
2898 static int
2899 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2900 {
2901 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2902 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2903
2904 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2905
2906 if (adapter->link_duplex != HALF_DUPLEX)
2907 goto no_fifo_stall_required;
2908
2909 if (atomic_read(&adapter->tx_fifo_stall))
2910 return 1;
2911
2912 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
2913 atomic_set(&adapter->tx_fifo_stall, 1);
2914 return 1;
2915 }
2916
2917 no_fifo_stall_required:
2918 adapter->tx_fifo_head += skb_fifo_len;
2919 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
2920 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2921 return 0;
2922 }
2923
2924 #define MINIMUM_DHCP_PACKET_SIZE 282
2925 static int
2926 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2927 {
2928 struct e1000_hw *hw = &adapter->hw;
2929 uint16_t length, offset;
2930 if (vlan_tx_tag_present(skb)) {
2931 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2932 ( adapter->hw.mng_cookie.status &
2933 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2934 return 0;
2935 }
2936 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2937 struct ethhdr *eth = (struct ethhdr *) skb->data;
2938 if ((htons(ETH_P_IP) == eth->h_proto)) {
2939 const struct iphdr *ip =
2940 (struct iphdr *)((uint8_t *)skb->data+14);
2941 if (IPPROTO_UDP == ip->protocol) {
2942 struct udphdr *udp =
2943 (struct udphdr *)((uint8_t *)ip +
2944 (ip->ihl << 2));
2945 if (ntohs(udp->dest) == 67) {
2946 offset = (uint8_t *)udp + 8 - skb->data;
2947 length = skb->len - offset;
2948
2949 return e1000_mng_write_dhcp_info(hw,
2950 (uint8_t *)udp + 8,
2951 length);
2952 }
2953 }
2954 }
2955 }
2956 return 0;
2957 }
2958
2959 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
2960 {
2961 struct e1000_adapter *adapter = netdev_priv(netdev);
2962 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
2963
2964 netif_stop_queue(netdev);
2965 /* Herbert's original patch had:
2966 * smp_mb__after_netif_stop_queue();
2967 * but since that doesn't exist yet, just open code it. */
2968 smp_mb();
2969
2970 /* We need to check again in a case another CPU has just
2971 * made room available. */
2972 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
2973 return -EBUSY;
2974
2975 /* A reprieve! */
2976 netif_start_queue(netdev);
2977 ++adapter->restart_queue;
2978 return 0;
2979 }
2980
2981 static int e1000_maybe_stop_tx(struct net_device *netdev,
2982 struct e1000_tx_ring *tx_ring, int size)
2983 {
2984 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
2985 return 0;
2986 return __e1000_maybe_stop_tx(netdev, size);
2987 }
2988
2989 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2990 static int
2991 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2992 {
2993 struct e1000_adapter *adapter = netdev_priv(netdev);
2994 struct e1000_tx_ring *tx_ring;
2995 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2996 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2997 unsigned int tx_flags = 0;
2998 unsigned int len = skb->len;
2999 unsigned long flags;
3000 unsigned int nr_frags = 0;
3001 unsigned int mss = 0;
3002 int count = 0;
3003 int tso;
3004 unsigned int f;
3005 len -= skb->data_len;
3006
3007 /* This goes back to the question of how to logically map a tx queue
3008 * to a flow. Right now, performance is impacted slightly negatively
3009 * if using multiple tx queues. If the stack breaks away from a
3010 * single qdisc implementation, we can look at this again. */
3011 tx_ring = adapter->tx_ring;
3012
3013 if (unlikely(skb->len <= 0)) {
3014 dev_kfree_skb_any(skb);
3015 return NETDEV_TX_OK;
3016 }
3017
3018 /* 82571 and newer doesn't need the workaround that limited descriptor
3019 * length to 4kB */
3020 if (adapter->hw.mac_type >= e1000_82571)
3021 max_per_txd = 8192;
3022
3023 #ifdef NETIF_F_TSO
3024 mss = skb_shinfo(skb)->gso_size;
3025 /* The controller does a simple calculation to
3026 * make sure there is enough room in the FIFO before
3027 * initiating the DMA for each buffer. The calc is:
3028 * 4 = ceil(buffer len/mss). To make sure we don't
3029 * overrun the FIFO, adjust the max buffer len if mss
3030 * drops. */
3031 if (mss) {
3032 uint8_t hdr_len;
3033 max_per_txd = min(mss << 2, max_per_txd);
3034 max_txd_pwr = fls(max_per_txd) - 1;
3035
3036 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3037 * points to just header, pull a few bytes of payload from
3038 * frags into skb->data */
3039 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
3040 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3041 switch (adapter->hw.mac_type) {
3042 unsigned int pull_size;
3043 case e1000_82571:
3044 case e1000_82572:
3045 case e1000_82573:
3046 case e1000_ich8lan:
3047 pull_size = min((unsigned int)4, skb->data_len);
3048 if (!__pskb_pull_tail(skb, pull_size)) {
3049 DPRINTK(DRV, ERR,
3050 "__pskb_pull_tail failed.\n");
3051 dev_kfree_skb_any(skb);
3052 return NETDEV_TX_OK;
3053 }
3054 len = skb->len - skb->data_len;
3055 break;
3056 default:
3057 /* do nothing */
3058 break;
3059 }
3060 }
3061 }
3062
3063 /* reserve a descriptor for the offload context */
3064 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3065 count++;
3066 count++;
3067 #else
3068 if (skb->ip_summed == CHECKSUM_PARTIAL)
3069 count++;
3070 #endif
3071
3072 #ifdef NETIF_F_TSO
3073 /* Controller Erratum workaround */
3074 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3075 count++;
3076 #endif
3077
3078 count += TXD_USE_COUNT(len, max_txd_pwr);
3079
3080 if (adapter->pcix_82544)
3081 count++;
3082
3083 /* work-around for errata 10 and it applies to all controllers
3084 * in PCI-X mode, so add one more descriptor to the count
3085 */
3086 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3087 (len > 2015)))
3088 count++;
3089
3090 nr_frags = skb_shinfo(skb)->nr_frags;
3091 for (f = 0; f < nr_frags; f++)
3092 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3093 max_txd_pwr);
3094 if (adapter->pcix_82544)
3095 count += nr_frags;
3096
3097
3098 if (adapter->hw.tx_pkt_filtering &&
3099 (adapter->hw.mac_type == e1000_82573))
3100 e1000_transfer_dhcp_info(adapter, skb);
3101
3102 local_irq_save(flags);
3103 if (!spin_trylock(&tx_ring->tx_lock)) {
3104 /* Collision - tell upper layer to requeue */
3105 local_irq_restore(flags);
3106 return NETDEV_TX_LOCKED;
3107 }
3108
3109 /* need: count + 2 desc gap to keep tail from touching
3110 * head, otherwise try next time */
3111 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3112 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3113 return NETDEV_TX_BUSY;
3114 }
3115
3116 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3117 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3118 netif_stop_queue(netdev);
3119 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3120 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3121 return NETDEV_TX_BUSY;
3122 }
3123 }
3124
3125 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3126 tx_flags |= E1000_TX_FLAGS_VLAN;
3127 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3128 }
3129
3130 first = tx_ring->next_to_use;
3131
3132 tso = e1000_tso(adapter, tx_ring, skb);
3133 if (tso < 0) {
3134 dev_kfree_skb_any(skb);
3135 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3136 return NETDEV_TX_OK;
3137 }
3138
3139 if (likely(tso)) {
3140 tx_ring->last_tx_tso = 1;
3141 tx_flags |= E1000_TX_FLAGS_TSO;
3142 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3143 tx_flags |= E1000_TX_FLAGS_CSUM;
3144
3145 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3146 * 82571 hardware supports TSO capabilities for IPv6 as well...
3147 * no longer assume, we must. */
3148 if (likely(skb->protocol == htons(ETH_P_IP)))
3149 tx_flags |= E1000_TX_FLAGS_IPV4;
3150
3151 e1000_tx_queue(adapter, tx_ring, tx_flags,
3152 e1000_tx_map(adapter, tx_ring, skb, first,
3153 max_per_txd, nr_frags, mss));
3154
3155 netdev->trans_start = jiffies;
3156
3157 /* Make sure there is space in the ring for the next send. */
3158 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3159
3160 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3161 return NETDEV_TX_OK;
3162 }
3163
3164 /**
3165 * e1000_tx_timeout - Respond to a Tx Hang
3166 * @netdev: network interface device structure
3167 **/
3168
3169 static void
3170 e1000_tx_timeout(struct net_device *netdev)
3171 {
3172 struct e1000_adapter *adapter = netdev_priv(netdev);
3173
3174 /* Do the reset outside of interrupt context */
3175 adapter->tx_timeout_count++;
3176 schedule_work(&adapter->reset_task);
3177 }
3178
3179 static void
3180 e1000_reset_task(struct net_device *netdev)
3181 {
3182 struct e1000_adapter *adapter = netdev_priv(netdev);
3183
3184 e1000_reinit_locked(adapter);
3185 }
3186
3187 /**
3188 * e1000_get_stats - Get System Network Statistics
3189 * @netdev: network interface device structure
3190 *
3191 * Returns the address of the device statistics structure.
3192 * The statistics are actually updated from the timer callback.
3193 **/
3194
3195 static struct net_device_stats *
3196 e1000_get_stats(struct net_device *netdev)
3197 {
3198 struct e1000_adapter *adapter = netdev_priv(netdev);
3199
3200 /* only return the current stats */
3201 return &adapter->net_stats;
3202 }
3203
3204 /**
3205 * e1000_change_mtu - Change the Maximum Transfer Unit
3206 * @netdev: network interface device structure
3207 * @new_mtu: new value for maximum frame size
3208 *
3209 * Returns 0 on success, negative on failure
3210 **/
3211
3212 static int
3213 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3214 {
3215 struct e1000_adapter *adapter = netdev_priv(netdev);
3216 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3217 uint16_t eeprom_data = 0;
3218
3219 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3220 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3221 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3222 return -EINVAL;
3223 }
3224
3225 /* Adapter-specific max frame size limits. */
3226 switch (adapter->hw.mac_type) {
3227 case e1000_undefined ... e1000_82542_rev2_1:
3228 case e1000_ich8lan:
3229 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3230 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3231 return -EINVAL;
3232 }
3233 break;
3234 case e1000_82573:
3235 /* Jumbo Frames not supported if:
3236 * - this is not an 82573L device
3237 * - ASPM is enabled in any way (0x1A bits 3:2) */
3238 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3239 &eeprom_data);
3240 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3241 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3242 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3243 DPRINTK(PROBE, ERR,
3244 "Jumbo Frames not supported.\n");
3245 return -EINVAL;
3246 }
3247 break;
3248 }
3249 /* ERT will be enabled later to enable wire speed receives */
3250
3251 /* fall through to get support */
3252 case e1000_82571:
3253 case e1000_82572:
3254 case e1000_80003es2lan:
3255 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3256 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3257 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3258 return -EINVAL;
3259 }
3260 break;
3261 default:
3262 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3263 break;
3264 }
3265
3266 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3267 * means we reserve 2 more, this pushes us to allocate from the next
3268 * larger slab size
3269 * i.e. RXBUFFER_2048 --> size-4096 slab */
3270
3271 if (max_frame <= E1000_RXBUFFER_256)
3272 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3273 else if (max_frame <= E1000_RXBUFFER_512)
3274 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3275 else if (max_frame <= E1000_RXBUFFER_1024)
3276 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3277 else if (max_frame <= E1000_RXBUFFER_2048)
3278 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3279 else if (max_frame <= E1000_RXBUFFER_4096)
3280 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3281 else if (max_frame <= E1000_RXBUFFER_8192)
3282 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3283 else if (max_frame <= E1000_RXBUFFER_16384)
3284 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3285
3286 /* adjust allocation if LPE protects us, and we aren't using SBP */
3287 if (!adapter->hw.tbi_compatibility_on &&
3288 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3289 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3290 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3291
3292 netdev->mtu = new_mtu;
3293
3294 if (netif_running(netdev))
3295 e1000_reinit_locked(adapter);
3296
3297 adapter->hw.max_frame_size = max_frame;
3298
3299 return 0;
3300 }
3301
3302 /**
3303 * e1000_update_stats - Update the board statistics counters
3304 * @adapter: board private structure
3305 **/
3306
3307 void
3308 e1000_update_stats(struct e1000_adapter *adapter)
3309 {
3310 struct e1000_hw *hw = &adapter->hw;
3311 struct pci_dev *pdev = adapter->pdev;
3312 unsigned long flags;
3313 uint16_t phy_tmp;
3314
3315 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3316
3317 /*
3318 * Prevent stats update while adapter is being reset, or if the pci
3319 * connection is down.
3320 */
3321 if (adapter->link_speed == 0)
3322 return;
3323 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
3324 return;
3325
3326 spin_lock_irqsave(&adapter->stats_lock, flags);
3327
3328 /* these counters are modified from e1000_adjust_tbi_stats,
3329 * called from the interrupt context, so they must only
3330 * be written while holding adapter->stats_lock
3331 */
3332
3333 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3334 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3335 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3336 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3337 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3338 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3339 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3340
3341 if (adapter->hw.mac_type != e1000_ich8lan) {
3342 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3343 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3344 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3345 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3346 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3347 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3348 }
3349
3350 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3351 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3352 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3353 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3354 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3355 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3356 adapter->stats.dc += E1000_READ_REG(hw, DC);
3357 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3358 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3359 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3360 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3361 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3362 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3363 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3364 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3365 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3366 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3367 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3368 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3369 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3370 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3371 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3372 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3373 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3374 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3375 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3376
3377 if (adapter->hw.mac_type != e1000_ich8lan) {
3378 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3379 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3380 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3381 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3382 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3383 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3384 }
3385
3386 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3387 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3388
3389 /* used for adaptive IFS */
3390
3391 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3392 adapter->stats.tpt += hw->tx_packet_delta;
3393 hw->collision_delta = E1000_READ_REG(hw, COLC);
3394 adapter->stats.colc += hw->collision_delta;
3395
3396 if (hw->mac_type >= e1000_82543) {
3397 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3398 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3399 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3400 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3401 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3402 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3403 }
3404 if (hw->mac_type > e1000_82547_rev_2) {
3405 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3406 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3407
3408 if (adapter->hw.mac_type != e1000_ich8lan) {
3409 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3410 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3411 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3412 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3413 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3414 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3415 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3416 }
3417 }
3418
3419 /* Fill out the OS statistics structure */
3420 adapter->net_stats.rx_packets = adapter->stats.gprc;
3421 adapter->net_stats.tx_packets = adapter->stats.gptc;
3422 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3423 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3424 adapter->net_stats.multicast = adapter->stats.mprc;
3425 adapter->net_stats.collisions = adapter->stats.colc;
3426
3427 /* Rx Errors */
3428
3429 /* RLEC on some newer hardware can be incorrect so build
3430 * our own version based on RUC and ROC */
3431 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3432 adapter->stats.crcerrs + adapter->stats.algnerrc +
3433 adapter->stats.ruc + adapter->stats.roc +
3434 adapter->stats.cexterr;
3435 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3436 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3437 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3438 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3439 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3440
3441 /* Tx Errors */
3442 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3443 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3444 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3445 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3446 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3447
3448 /* Tx Dropped needs to be maintained elsewhere */
3449
3450 /* Phy Stats */
3451 if (hw->media_type == e1000_media_type_copper) {
3452 if ((adapter->link_speed == SPEED_1000) &&
3453 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3454 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3455 adapter->phy_stats.idle_errors += phy_tmp;
3456 }
3457
3458 if ((hw->mac_type <= e1000_82546) &&
3459 (hw->phy_type == e1000_phy_m88) &&
3460 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3461 adapter->phy_stats.receive_errors += phy_tmp;
3462 }
3463
3464 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3465 }
3466
3467 /**
3468 * e1000_intr - Interrupt Handler
3469 * @irq: interrupt number
3470 * @data: pointer to a network interface device structure
3471 **/
3472
3473 static irqreturn_t
3474 e1000_intr(int irq, void *data)
3475 {
3476 struct net_device *netdev = data;
3477 struct e1000_adapter *adapter = netdev_priv(netdev);
3478 struct e1000_hw *hw = &adapter->hw;
3479 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3480 #ifndef CONFIG_E1000_NAPI
3481 int i;
3482 #else
3483 /* Interrupt Auto-Mask...upon reading ICR,
3484 * interrupts are masked. No need for the
3485 * IMC write, but it does mean we should
3486 * account for it ASAP. */
3487 if (likely(hw->mac_type >= e1000_82571))
3488 atomic_inc(&adapter->irq_sem);
3489 #endif
3490
3491 if (unlikely(!icr)) {
3492 #ifdef CONFIG_E1000_NAPI
3493 if (hw->mac_type >= e1000_82571)
3494 e1000_irq_enable(adapter);
3495 #endif
3496 return IRQ_NONE; /* Not our interrupt */
3497 }
3498
3499 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3500 hw->get_link_status = 1;
3501 /* 80003ES2LAN workaround--
3502 * For packet buffer work-around on link down event;
3503 * disable receives here in the ISR and
3504 * reset adapter in watchdog
3505 */
3506 if (netif_carrier_ok(netdev) &&
3507 (adapter->hw.mac_type == e1000_80003es2lan)) {
3508 /* disable receives */
3509 rctl = E1000_READ_REG(hw, RCTL);
3510 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3511 }
3512 /* guard against interrupt when we're going down */
3513 if (!test_bit(__E1000_DOWN, &adapter->flags))
3514 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3515 }
3516
3517 #ifdef CONFIG_E1000_NAPI
3518 if (unlikely(hw->mac_type < e1000_82571)) {
3519 atomic_inc(&adapter->irq_sem);
3520 E1000_WRITE_REG(hw, IMC, ~0);
3521 E1000_WRITE_FLUSH(hw);
3522 }
3523 if (likely(netif_rx_schedule_prep(netdev)))
3524 __netif_rx_schedule(netdev);
3525 else
3526 /* this really should not happen! if it does it is basically a
3527 * bug, but not a hard error, so enable ints and continue */
3528 e1000_irq_enable(adapter);
3529 #else
3530 /* Writing IMC and IMS is needed for 82547.
3531 * Due to Hub Link bus being occupied, an interrupt
3532 * de-assertion message is not able to be sent.
3533 * When an interrupt assertion message is generated later,
3534 * two messages are re-ordered and sent out.
3535 * That causes APIC to think 82547 is in de-assertion
3536 * state, while 82547 is in assertion state, resulting
3537 * in dead lock. Writing IMC forces 82547 into
3538 * de-assertion state.
3539 */
3540 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3541 atomic_inc(&adapter->irq_sem);
3542 E1000_WRITE_REG(hw, IMC, ~0);
3543 }
3544
3545 for (i = 0; i < E1000_MAX_INTR; i++)
3546 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3547 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3548 break;
3549
3550 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3551 e1000_irq_enable(adapter);
3552
3553 #endif
3554 return IRQ_HANDLED;
3555 }
3556
3557 #ifdef CONFIG_E1000_NAPI
3558 /**
3559 * e1000_clean - NAPI Rx polling callback
3560 * @adapter: board private structure
3561 **/
3562
3563 static int
3564 e1000_clean(struct net_device *poll_dev, int *budget)
3565 {
3566 struct e1000_adapter *adapter;
3567 int work_to_do = min(*budget, poll_dev->quota);
3568 int tx_cleaned = 0, work_done = 0;
3569
3570 /* Must NOT use netdev_priv macro here. */
3571 adapter = poll_dev->priv;
3572
3573 /* Keep link state information with original netdev */
3574 if (!netif_carrier_ok(poll_dev))
3575 goto quit_polling;
3576
3577 /* e1000_clean is called per-cpu. This lock protects
3578 * tx_ring[0] from being cleaned by multiple cpus
3579 * simultaneously. A failure obtaining the lock means
3580 * tx_ring[0] is currently being cleaned anyway. */
3581 if (spin_trylock(&adapter->tx_queue_lock)) {
3582 tx_cleaned = e1000_clean_tx_irq(adapter,
3583 &adapter->tx_ring[0]);
3584 spin_unlock(&adapter->tx_queue_lock);
3585 }
3586
3587 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3588 &work_done, work_to_do);
3589
3590 *budget -= work_done;
3591 poll_dev->quota -= work_done;
3592
3593 /* If no Tx and not enough Rx work done, exit the polling mode */
3594 if ((!tx_cleaned && (work_done == 0)) ||
3595 !netif_running(poll_dev)) {
3596 quit_polling:
3597 netif_rx_complete(poll_dev);
3598 e1000_irq_enable(adapter);
3599 return 0;
3600 }
3601
3602 return 1;
3603 }
3604
3605 #endif
3606 /**
3607 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3608 * @adapter: board private structure
3609 **/
3610
3611 static boolean_t
3612 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3613 struct e1000_tx_ring *tx_ring)
3614 {
3615 struct net_device *netdev = adapter->netdev;
3616 struct e1000_tx_desc *tx_desc, *eop_desc;
3617 struct e1000_buffer *buffer_info;
3618 unsigned int i, eop;
3619 #ifdef CONFIG_E1000_NAPI
3620 unsigned int count = 0;
3621 #endif
3622 boolean_t cleaned = FALSE;
3623
3624 i = tx_ring->next_to_clean;
3625 eop = tx_ring->buffer_info[i].next_to_watch;
3626 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3627
3628 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3629 for (cleaned = FALSE; !cleaned; ) {
3630 tx_desc = E1000_TX_DESC(*tx_ring, i);
3631 buffer_info = &tx_ring->buffer_info[i];
3632 cleaned = (i == eop);
3633
3634 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3635 tx_desc->upper.data = 0;
3636
3637 if (unlikely(++i == tx_ring->count)) i = 0;
3638 }
3639
3640 eop = tx_ring->buffer_info[i].next_to_watch;
3641 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3642 #ifdef CONFIG_E1000_NAPI
3643 #define E1000_TX_WEIGHT 64
3644 /* weight of a sort for tx, to avoid endless transmit cleanup */
3645 if (count++ == E1000_TX_WEIGHT) break;
3646 #endif
3647 }
3648
3649 tx_ring->next_to_clean = i;
3650
3651 #define TX_WAKE_THRESHOLD 32
3652 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3653 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3654 /* Make sure that anybody stopping the queue after this
3655 * sees the new next_to_clean.
3656 */
3657 smp_mb();
3658 if (netif_queue_stopped(netdev)) {
3659 netif_wake_queue(netdev);
3660 ++adapter->restart_queue;
3661 }
3662 }
3663
3664 if (adapter->detect_tx_hung) {
3665 /* Detect a transmit hang in hardware, this serializes the
3666 * check with the clearing of time_stamp and movement of i */
3667 adapter->detect_tx_hung = FALSE;
3668 if (tx_ring->buffer_info[eop].dma &&
3669 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3670 (adapter->tx_timeout_factor * HZ))
3671 && !(E1000_READ_REG(&adapter->hw, STATUS) &
3672 E1000_STATUS_TXOFF)) {
3673
3674 /* detected Tx unit hang */
3675 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3676 " Tx Queue <%lu>\n"
3677 " TDH <%x>\n"
3678 " TDT <%x>\n"
3679 " next_to_use <%x>\n"
3680 " next_to_clean <%x>\n"
3681 "buffer_info[next_to_clean]\n"
3682 " time_stamp <%lx>\n"
3683 " next_to_watch <%x>\n"
3684 " jiffies <%lx>\n"
3685 " next_to_watch.status <%x>\n",
3686 (unsigned long)((tx_ring - adapter->tx_ring) /
3687 sizeof(struct e1000_tx_ring)),
3688 readl(adapter->hw.hw_addr + tx_ring->tdh),
3689 readl(adapter->hw.hw_addr + tx_ring->tdt),
3690 tx_ring->next_to_use,
3691 tx_ring->next_to_clean,
3692 tx_ring->buffer_info[eop].time_stamp,
3693 eop,
3694 jiffies,
3695 eop_desc->upper.fields.status);
3696 netif_stop_queue(netdev);
3697 }
3698 }
3699 return cleaned;
3700 }
3701
3702 /**
3703 * e1000_rx_checksum - Receive Checksum Offload for 82543
3704 * @adapter: board private structure
3705 * @status_err: receive descriptor status and error fields
3706 * @csum: receive descriptor csum field
3707 * @sk_buff: socket buffer with received data
3708 **/
3709
3710 static void
3711 e1000_rx_checksum(struct e1000_adapter *adapter,
3712 uint32_t status_err, uint32_t csum,
3713 struct sk_buff *skb)
3714 {
3715 uint16_t status = (uint16_t)status_err;
3716 uint8_t errors = (uint8_t)(status_err >> 24);
3717 skb->ip_summed = CHECKSUM_NONE;
3718
3719 /* 82543 or newer only */
3720 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
3721 /* Ignore Checksum bit is set */
3722 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
3723 /* TCP/UDP checksum error bit is set */
3724 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
3725 /* let the stack verify checksum errors */
3726 adapter->hw_csum_err++;
3727 return;
3728 }
3729 /* TCP/UDP Checksum has not been calculated */
3730 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3731 if (!(status & E1000_RXD_STAT_TCPCS))
3732 return;
3733 } else {
3734 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3735 return;
3736 }
3737 /* It must be a TCP or UDP packet with a valid checksum */
3738 if (likely(status & E1000_RXD_STAT_TCPCS)) {
3739 /* TCP checksum is good */
3740 skb->ip_summed = CHECKSUM_UNNECESSARY;
3741 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3742 /* IP fragment with UDP payload */
3743 /* Hardware complements the payload checksum, so we undo it
3744 * and then put the value in host order for further stack use.
3745 */
3746 csum = ntohl(csum ^ 0xFFFF);
3747 skb->csum = csum;
3748 skb->ip_summed = CHECKSUM_COMPLETE;
3749 }
3750 adapter->hw_csum_good++;
3751 }
3752
3753 /**
3754 * e1000_clean_rx_irq - Send received data up the network stack; legacy
3755 * @adapter: board private structure
3756 **/
3757
3758 static boolean_t
3759 #ifdef CONFIG_E1000_NAPI
3760 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3761 struct e1000_rx_ring *rx_ring,
3762 int *work_done, int work_to_do)
3763 #else
3764 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3765 struct e1000_rx_ring *rx_ring)
3766 #endif
3767 {
3768 struct net_device *netdev = adapter->netdev;
3769 struct pci_dev *pdev = adapter->pdev;
3770 struct e1000_rx_desc *rx_desc, *next_rxd;
3771 struct e1000_buffer *buffer_info, *next_buffer;
3772 unsigned long flags;
3773 uint32_t length;
3774 uint8_t last_byte;
3775 unsigned int i;
3776 int cleaned_count = 0;
3777 boolean_t cleaned = FALSE;
3778
3779 i = rx_ring->next_to_clean;
3780 rx_desc = E1000_RX_DESC(*rx_ring, i);
3781 buffer_info = &rx_ring->buffer_info[i];
3782
3783 while (rx_desc->status & E1000_RXD_STAT_DD) {
3784 struct sk_buff *skb;
3785 u8 status;
3786
3787 #ifdef CONFIG_E1000_NAPI
3788 if (*work_done >= work_to_do)
3789 break;
3790 (*work_done)++;
3791 #endif
3792 status = rx_desc->status;
3793 skb = buffer_info->skb;
3794 buffer_info->skb = NULL;
3795
3796 prefetch(skb->data - NET_IP_ALIGN);
3797
3798 if (++i == rx_ring->count) i = 0;
3799 next_rxd = E1000_RX_DESC(*rx_ring, i);
3800 prefetch(next_rxd);
3801
3802 next_buffer = &rx_ring->buffer_info[i];
3803
3804 cleaned = TRUE;
3805 cleaned_count++;
3806 pci_unmap_single(pdev,
3807 buffer_info->dma,
3808 buffer_info->length,
3809 PCI_DMA_FROMDEVICE);
3810
3811 length = le16_to_cpu(rx_desc->length);
3812
3813 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3814 /* All receives must fit into a single buffer */
3815 E1000_DBG("%s: Receive packet consumed multiple"
3816 " buffers\n", netdev->name);
3817 /* recycle */
3818 buffer_info->skb = skb;
3819 goto next_desc;
3820 }
3821
3822 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
3823 last_byte = *(skb->data + length - 1);
3824 if (TBI_ACCEPT(&adapter->hw, status,
3825 rx_desc->errors, length, last_byte)) {
3826 spin_lock_irqsave(&adapter->stats_lock, flags);
3827 e1000_tbi_adjust_stats(&adapter->hw,
3828 &adapter->stats,
3829 length, skb->data);
3830 spin_unlock_irqrestore(&adapter->stats_lock,
3831 flags);
3832 length--;
3833 } else {
3834 /* recycle */
3835 buffer_info->skb = skb;
3836 goto next_desc;
3837 }
3838 }
3839
3840 /* adjust length to remove Ethernet CRC, this must be
3841 * done after the TBI_ACCEPT workaround above */
3842 length -= 4;
3843
3844 /* code added for copybreak, this should improve
3845 * performance for small packets with large amounts
3846 * of reassembly being done in the stack */
3847 #define E1000_CB_LENGTH 256
3848 if (length < E1000_CB_LENGTH) {
3849 struct sk_buff *new_skb =
3850 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
3851 if (new_skb) {
3852 skb_reserve(new_skb, NET_IP_ALIGN);
3853 memcpy(new_skb->data - NET_IP_ALIGN,
3854 skb->data - NET_IP_ALIGN,
3855 length + NET_IP_ALIGN);
3856 /* save the skb in buffer_info as good */
3857 buffer_info->skb = skb;
3858 skb = new_skb;
3859 }
3860 /* else just continue with the old one */
3861 }
3862 /* end copybreak code */
3863 skb_put(skb, length);
3864
3865 /* Receive Checksum Offload */
3866 e1000_rx_checksum(adapter,
3867 (uint32_t)(status) |
3868 ((uint32_t)(rx_desc->errors) << 24),
3869 le16_to_cpu(rx_desc->csum), skb);
3870
3871 skb->protocol = eth_type_trans(skb, netdev);
3872 #ifdef CONFIG_E1000_NAPI
3873 if (unlikely(adapter->vlgrp &&
3874 (status & E1000_RXD_STAT_VP))) {
3875 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3876 le16_to_cpu(rx_desc->special) &
3877 E1000_RXD_SPC_VLAN_MASK);
3878 } else {
3879 netif_receive_skb(skb);
3880 }
3881 #else /* CONFIG_E1000_NAPI */
3882 if (unlikely(adapter->vlgrp &&
3883 (status & E1000_RXD_STAT_VP))) {
3884 vlan_hwaccel_rx(skb, adapter->vlgrp,
3885 le16_to_cpu(rx_desc->special) &
3886 E1000_RXD_SPC_VLAN_MASK);
3887 } else {
3888 netif_rx(skb);
3889 }
3890 #endif /* CONFIG_E1000_NAPI */
3891 netdev->last_rx = jiffies;
3892
3893 next_desc:
3894 rx_desc->status = 0;
3895
3896 /* return some buffers to hardware, one at a time is too slow */
3897 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3898 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3899 cleaned_count = 0;
3900 }
3901
3902 /* use prefetched values */
3903 rx_desc = next_rxd;
3904 buffer_info = next_buffer;
3905 }
3906 rx_ring->next_to_clean = i;
3907
3908 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3909 if (cleaned_count)
3910 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3911
3912 return cleaned;
3913 }
3914
3915 /**
3916 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3917 * @adapter: board private structure
3918 **/
3919
3920 static boolean_t
3921 #ifdef CONFIG_E1000_NAPI
3922 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3923 struct e1000_rx_ring *rx_ring,
3924 int *work_done, int work_to_do)
3925 #else
3926 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3927 struct e1000_rx_ring *rx_ring)
3928 #endif
3929 {
3930 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
3931 struct net_device *netdev = adapter->netdev;
3932 struct pci_dev *pdev = adapter->pdev;
3933 struct e1000_buffer *buffer_info, *next_buffer;
3934 struct e1000_ps_page *ps_page;
3935 struct e1000_ps_page_dma *ps_page_dma;
3936 struct sk_buff *skb;
3937 unsigned int i, j;
3938 uint32_t length, staterr;
3939 int cleaned_count = 0;
3940 boolean_t cleaned = FALSE;
3941
3942 i = rx_ring->next_to_clean;
3943 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3944 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3945 buffer_info = &rx_ring->buffer_info[i];
3946
3947 while (staterr & E1000_RXD_STAT_DD) {
3948 ps_page = &rx_ring->ps_page[i];
3949 ps_page_dma = &rx_ring->ps_page_dma[i];
3950 #ifdef CONFIG_E1000_NAPI
3951 if (unlikely(*work_done >= work_to_do))
3952 break;
3953 (*work_done)++;
3954 #endif
3955 skb = buffer_info->skb;
3956
3957 /* in the packet split case this is header only */
3958 prefetch(skb->data - NET_IP_ALIGN);
3959
3960 if (++i == rx_ring->count) i = 0;
3961 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
3962 prefetch(next_rxd);
3963
3964 next_buffer = &rx_ring->buffer_info[i];
3965
3966 cleaned = TRUE;
3967 cleaned_count++;
3968 pci_unmap_single(pdev, buffer_info->dma,
3969 buffer_info->length,
3970 PCI_DMA_FROMDEVICE);
3971
3972 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
3973 E1000_DBG("%s: Packet Split buffers didn't pick up"
3974 " the full packet\n", netdev->name);
3975 dev_kfree_skb_irq(skb);
3976 goto next_desc;
3977 }
3978
3979 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
3980 dev_kfree_skb_irq(skb);
3981 goto next_desc;
3982 }
3983
3984 length = le16_to_cpu(rx_desc->wb.middle.length0);
3985
3986 if (unlikely(!length)) {
3987 E1000_DBG("%s: Last part of the packet spanning"
3988 " multiple descriptors\n", netdev->name);
3989 dev_kfree_skb_irq(skb);
3990 goto next_desc;
3991 }
3992
3993 /* Good Receive */
3994 skb_put(skb, length);
3995
3996 {
3997 /* this looks ugly, but it seems compiler issues make it
3998 more efficient than reusing j */
3999 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4000
4001 /* page alloc/put takes too long and effects small packet
4002 * throughput, so unsplit small packets and save the alloc/put*/
4003 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
4004 u8 *vaddr;
4005 /* there is no documentation about how to call
4006 * kmap_atomic, so we can't hold the mapping
4007 * very long */
4008 pci_dma_sync_single_for_cpu(pdev,
4009 ps_page_dma->ps_page_dma[0],
4010 PAGE_SIZE,
4011 PCI_DMA_FROMDEVICE);
4012 vaddr = kmap_atomic(ps_page->ps_page[0],
4013 KM_SKB_DATA_SOFTIRQ);
4014 memcpy(skb->tail, vaddr, l1);
4015 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4016 pci_dma_sync_single_for_device(pdev,
4017 ps_page_dma->ps_page_dma[0],
4018 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4019 /* remove the CRC */
4020 l1 -= 4;
4021 skb_put(skb, l1);
4022 goto copydone;
4023 } /* if */
4024 }
4025
4026 for (j = 0; j < adapter->rx_ps_pages; j++) {
4027 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4028 break;
4029 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4030 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4031 ps_page_dma->ps_page_dma[j] = 0;
4032 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4033 length);
4034 ps_page->ps_page[j] = NULL;
4035 skb->len += length;
4036 skb->data_len += length;
4037 skb->truesize += length;
4038 }
4039
4040 /* strip the ethernet crc, problem is we're using pages now so
4041 * this whole operation can get a little cpu intensive */
4042 pskb_trim(skb, skb->len - 4);
4043
4044 copydone:
4045 e1000_rx_checksum(adapter, staterr,
4046 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4047 skb->protocol = eth_type_trans(skb, netdev);
4048
4049 if (likely(rx_desc->wb.upper.header_status &
4050 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4051 adapter->rx_hdr_split++;
4052 #ifdef CONFIG_E1000_NAPI
4053 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4054 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4055 le16_to_cpu(rx_desc->wb.middle.vlan) &
4056 E1000_RXD_SPC_VLAN_MASK);
4057 } else {
4058 netif_receive_skb(skb);
4059 }
4060 #else /* CONFIG_E1000_NAPI */
4061 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4062 vlan_hwaccel_rx(skb, adapter->vlgrp,
4063 le16_to_cpu(rx_desc->wb.middle.vlan) &
4064 E1000_RXD_SPC_VLAN_MASK);
4065 } else {
4066 netif_rx(skb);
4067 }
4068 #endif /* CONFIG_E1000_NAPI */
4069 netdev->last_rx = jiffies;
4070
4071 next_desc:
4072 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4073 buffer_info->skb = NULL;
4074
4075 /* return some buffers to hardware, one at a time is too slow */
4076 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4077 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4078 cleaned_count = 0;
4079 }
4080
4081 /* use prefetched values */
4082 rx_desc = next_rxd;
4083 buffer_info = next_buffer;
4084
4085 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4086 }
4087 rx_ring->next_to_clean = i;
4088
4089 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4090 if (cleaned_count)
4091 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4092
4093 return cleaned;
4094 }
4095
4096 /**
4097 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4098 * @adapter: address of board private structure
4099 **/
4100
4101 static void
4102 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4103 struct e1000_rx_ring *rx_ring,
4104 int cleaned_count)
4105 {
4106 struct net_device *netdev = adapter->netdev;
4107 struct pci_dev *pdev = adapter->pdev;
4108 struct e1000_rx_desc *rx_desc;
4109 struct e1000_buffer *buffer_info;
4110 struct sk_buff *skb;
4111 unsigned int i;
4112 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4113
4114 i = rx_ring->next_to_use;
4115 buffer_info = &rx_ring->buffer_info[i];
4116
4117 while (cleaned_count--) {
4118 skb = buffer_info->skb;
4119 if (skb) {
4120 skb_trim(skb, 0);
4121 goto map_skb;
4122 }
4123
4124 skb = netdev_alloc_skb(netdev, bufsz);
4125 if (unlikely(!skb)) {
4126 /* Better luck next round */
4127 adapter->alloc_rx_buff_failed++;
4128 break;
4129 }
4130
4131 /* Fix for errata 23, can't cross 64kB boundary */
4132 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4133 struct sk_buff *oldskb = skb;
4134 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4135 "at %p\n", bufsz, skb->data);
4136 /* Try again, without freeing the previous */
4137 skb = netdev_alloc_skb(netdev, bufsz);
4138 /* Failed allocation, critical failure */
4139 if (!skb) {
4140 dev_kfree_skb(oldskb);
4141 break;
4142 }
4143
4144 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4145 /* give up */
4146 dev_kfree_skb(skb);
4147 dev_kfree_skb(oldskb);
4148 break; /* while !buffer_info->skb */
4149 }
4150
4151 /* Use new allocation */
4152 dev_kfree_skb(oldskb);
4153 }
4154 /* Make buffer alignment 2 beyond a 16 byte boundary
4155 * this will result in a 16 byte aligned IP header after
4156 * the 14 byte MAC header is removed
4157 */
4158 skb_reserve(skb, NET_IP_ALIGN);
4159
4160 buffer_info->skb = skb;
4161 buffer_info->length = adapter->rx_buffer_len;
4162 map_skb:
4163 buffer_info->dma = pci_map_single(pdev,
4164 skb->data,
4165 adapter->rx_buffer_len,
4166 PCI_DMA_FROMDEVICE);
4167
4168 /* Fix for errata 23, can't cross 64kB boundary */
4169 if (!e1000_check_64k_bound(adapter,
4170 (void *)(unsigned long)buffer_info->dma,
4171 adapter->rx_buffer_len)) {
4172 DPRINTK(RX_ERR, ERR,
4173 "dma align check failed: %u bytes at %p\n",
4174 adapter->rx_buffer_len,
4175 (void *)(unsigned long)buffer_info->dma);
4176 dev_kfree_skb(skb);
4177 buffer_info->skb = NULL;
4178
4179 pci_unmap_single(pdev, buffer_info->dma,
4180 adapter->rx_buffer_len,
4181 PCI_DMA_FROMDEVICE);
4182
4183 break; /* while !buffer_info->skb */
4184 }
4185 rx_desc = E1000_RX_DESC(*rx_ring, i);
4186 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4187
4188 if (unlikely(++i == rx_ring->count))
4189 i = 0;
4190 buffer_info = &rx_ring->buffer_info[i];
4191 }
4192
4193 if (likely(rx_ring->next_to_use != i)) {
4194 rx_ring->next_to_use = i;
4195 if (unlikely(i-- == 0))
4196 i = (rx_ring->count - 1);
4197
4198 /* Force memory writes to complete before letting h/w
4199 * know there are new descriptors to fetch. (Only
4200 * applicable for weak-ordered memory model archs,
4201 * such as IA-64). */
4202 wmb();
4203 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4204 }
4205 }
4206
4207 /**
4208 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4209 * @adapter: address of board private structure
4210 **/
4211
4212 static void
4213 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4214 struct e1000_rx_ring *rx_ring,
4215 int cleaned_count)
4216 {
4217 struct net_device *netdev = adapter->netdev;
4218 struct pci_dev *pdev = adapter->pdev;
4219 union e1000_rx_desc_packet_split *rx_desc;
4220 struct e1000_buffer *buffer_info;
4221 struct e1000_ps_page *ps_page;
4222 struct e1000_ps_page_dma *ps_page_dma;
4223 struct sk_buff *skb;
4224 unsigned int i, j;
4225
4226 i = rx_ring->next_to_use;
4227 buffer_info = &rx_ring->buffer_info[i];
4228 ps_page = &rx_ring->ps_page[i];
4229 ps_page_dma = &rx_ring->ps_page_dma[i];
4230
4231 while (cleaned_count--) {
4232 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4233
4234 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4235 if (j < adapter->rx_ps_pages) {
4236 if (likely(!ps_page->ps_page[j])) {
4237 ps_page->ps_page[j] =
4238 alloc_page(GFP_ATOMIC);
4239 if (unlikely(!ps_page->ps_page[j])) {
4240 adapter->alloc_rx_buff_failed++;
4241 goto no_buffers;
4242 }
4243 ps_page_dma->ps_page_dma[j] =
4244 pci_map_page(pdev,
4245 ps_page->ps_page[j],
4246 0, PAGE_SIZE,
4247 PCI_DMA_FROMDEVICE);
4248 }
4249 /* Refresh the desc even if buffer_addrs didn't
4250 * change because each write-back erases
4251 * this info.
4252 */
4253 rx_desc->read.buffer_addr[j+1] =
4254 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4255 } else
4256 rx_desc->read.buffer_addr[j+1] = ~0;
4257 }
4258
4259 skb = netdev_alloc_skb(netdev,
4260 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4261
4262 if (unlikely(!skb)) {
4263 adapter->alloc_rx_buff_failed++;
4264 break;
4265 }
4266
4267 /* Make buffer alignment 2 beyond a 16 byte boundary
4268 * this will result in a 16 byte aligned IP header after
4269 * the 14 byte MAC header is removed
4270 */
4271 skb_reserve(skb, NET_IP_ALIGN);
4272
4273 buffer_info->skb = skb;
4274 buffer_info->length = adapter->rx_ps_bsize0;
4275 buffer_info->dma = pci_map_single(pdev, skb->data,
4276 adapter->rx_ps_bsize0,
4277 PCI_DMA_FROMDEVICE);
4278
4279 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4280
4281 if (unlikely(++i == rx_ring->count)) i = 0;
4282 buffer_info = &rx_ring->buffer_info[i];
4283 ps_page = &rx_ring->ps_page[i];
4284 ps_page_dma = &rx_ring->ps_page_dma[i];
4285 }
4286
4287 no_buffers:
4288 if (likely(rx_ring->next_to_use != i)) {
4289 rx_ring->next_to_use = i;
4290 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4291
4292 /* Force memory writes to complete before letting h/w
4293 * know there are new descriptors to fetch. (Only
4294 * applicable for weak-ordered memory model archs,
4295 * such as IA-64). */
4296 wmb();
4297 /* Hardware increments by 16 bytes, but packet split
4298 * descriptors are 32 bytes...so we increment tail
4299 * twice as much.
4300 */
4301 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4302 }
4303 }
4304
4305 /**
4306 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4307 * @adapter:
4308 **/
4309
4310 static void
4311 e1000_smartspeed(struct e1000_adapter *adapter)
4312 {
4313 uint16_t phy_status;
4314 uint16_t phy_ctrl;
4315
4316 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4317 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4318 return;
4319
4320 if (adapter->smartspeed == 0) {
4321 /* If Master/Slave config fault is asserted twice,
4322 * we assume back-to-back */
4323 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4324 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4325 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4326 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4327 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4328 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4329 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4330 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4331 phy_ctrl);
4332 adapter->smartspeed++;
4333 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4334 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4335 &phy_ctrl)) {
4336 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4337 MII_CR_RESTART_AUTO_NEG);
4338 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4339 phy_ctrl);
4340 }
4341 }
4342 return;
4343 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4344 /* If still no link, perhaps using 2/3 pair cable */
4345 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4346 phy_ctrl |= CR_1000T_MS_ENABLE;
4347 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4348 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4349 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4350 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4351 MII_CR_RESTART_AUTO_NEG);
4352 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4353 }
4354 }
4355 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4356 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4357 adapter->smartspeed = 0;
4358 }
4359
4360 /**
4361 * e1000_ioctl -
4362 * @netdev:
4363 * @ifreq:
4364 * @cmd:
4365 **/
4366
4367 static int
4368 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4369 {
4370 switch (cmd) {
4371 case SIOCGMIIPHY:
4372 case SIOCGMIIREG:
4373 case SIOCSMIIREG:
4374 return e1000_mii_ioctl(netdev, ifr, cmd);
4375 default:
4376 return -EOPNOTSUPP;
4377 }
4378 }
4379
4380 /**
4381 * e1000_mii_ioctl -
4382 * @netdev:
4383 * @ifreq:
4384 * @cmd:
4385 **/
4386
4387 static int
4388 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4389 {
4390 struct e1000_adapter *adapter = netdev_priv(netdev);
4391 struct mii_ioctl_data *data = if_mii(ifr);
4392 int retval;
4393 uint16_t mii_reg;
4394 uint16_t spddplx;
4395 unsigned long flags;
4396
4397 if (adapter->hw.media_type != e1000_media_type_copper)
4398 return -EOPNOTSUPP;
4399
4400 switch (cmd) {
4401 case SIOCGMIIPHY:
4402 data->phy_id = adapter->hw.phy_addr;
4403 break;
4404 case SIOCGMIIREG:
4405 if (!capable(CAP_NET_ADMIN))
4406 return -EPERM;
4407 spin_lock_irqsave(&adapter->stats_lock, flags);
4408 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4409 &data->val_out)) {
4410 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4411 return -EIO;
4412 }
4413 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4414 break;
4415 case SIOCSMIIREG:
4416 if (!capable(CAP_NET_ADMIN))
4417 return -EPERM;
4418 if (data->reg_num & ~(0x1F))
4419 return -EFAULT;
4420 mii_reg = data->val_in;
4421 spin_lock_irqsave(&adapter->stats_lock, flags);
4422 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4423 mii_reg)) {
4424 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4425 return -EIO;
4426 }
4427 if (adapter->hw.media_type == e1000_media_type_copper) {
4428 switch (data->reg_num) {
4429 case PHY_CTRL:
4430 if (mii_reg & MII_CR_POWER_DOWN)
4431 break;
4432 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4433 adapter->hw.autoneg = 1;
4434 adapter->hw.autoneg_advertised = 0x2F;
4435 } else {
4436 if (mii_reg & 0x40)
4437 spddplx = SPEED_1000;
4438 else if (mii_reg & 0x2000)
4439 spddplx = SPEED_100;
4440 else
4441 spddplx = SPEED_10;
4442 spddplx += (mii_reg & 0x100)
4443 ? DUPLEX_FULL :
4444 DUPLEX_HALF;
4445 retval = e1000_set_spd_dplx(adapter,
4446 spddplx);
4447 if (retval) {
4448 spin_unlock_irqrestore(
4449 &adapter->stats_lock,
4450 flags);
4451 return retval;
4452 }
4453 }
4454 if (netif_running(adapter->netdev))
4455 e1000_reinit_locked(adapter);
4456 else
4457 e1000_reset(adapter);
4458 break;
4459 case M88E1000_PHY_SPEC_CTRL:
4460 case M88E1000_EXT_PHY_SPEC_CTRL:
4461 if (e1000_phy_reset(&adapter->hw)) {
4462 spin_unlock_irqrestore(
4463 &adapter->stats_lock, flags);
4464 return -EIO;
4465 }
4466 break;
4467 }
4468 } else {
4469 switch (data->reg_num) {
4470 case PHY_CTRL:
4471 if (mii_reg & MII_CR_POWER_DOWN)
4472 break;
4473 if (netif_running(adapter->netdev))
4474 e1000_reinit_locked(adapter);
4475 else
4476 e1000_reset(adapter);
4477 break;
4478 }
4479 }
4480 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4481 break;
4482 default:
4483 return -EOPNOTSUPP;
4484 }
4485 return E1000_SUCCESS;
4486 }
4487
4488 void
4489 e1000_pci_set_mwi(struct e1000_hw *hw)
4490 {
4491 struct e1000_adapter *adapter = hw->back;
4492 int ret_val = pci_set_mwi(adapter->pdev);
4493
4494 if (ret_val)
4495 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4496 }
4497
4498 void
4499 e1000_pci_clear_mwi(struct e1000_hw *hw)
4500 {
4501 struct e1000_adapter *adapter = hw->back;
4502
4503 pci_clear_mwi(adapter->pdev);
4504 }
4505
4506 void
4507 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4508 {
4509 struct e1000_adapter *adapter = hw->back;
4510
4511 pci_read_config_word(adapter->pdev, reg, value);
4512 }
4513
4514 void
4515 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4516 {
4517 struct e1000_adapter *adapter = hw->back;
4518
4519 pci_write_config_word(adapter->pdev, reg, *value);
4520 }
4521
4522 int32_t
4523 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4524 {
4525 struct e1000_adapter *adapter = hw->back;
4526 uint16_t cap_offset;
4527
4528 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4529 if (!cap_offset)
4530 return -E1000_ERR_CONFIG;
4531
4532 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4533
4534 return E1000_SUCCESS;
4535 }
4536
4537 void
4538 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4539 {
4540 outl(value, port);
4541 }
4542
4543 static void
4544 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4545 {
4546 struct e1000_adapter *adapter = netdev_priv(netdev);
4547 uint32_t ctrl, rctl;
4548
4549 e1000_irq_disable(adapter);
4550 adapter->vlgrp = grp;
4551
4552 if (grp) {
4553 /* enable VLAN tag insert/strip */
4554 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4555 ctrl |= E1000_CTRL_VME;
4556 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4557
4558 if (adapter->hw.mac_type != e1000_ich8lan) {
4559 /* enable VLAN receive filtering */
4560 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4561 rctl |= E1000_RCTL_VFE;
4562 rctl &= ~E1000_RCTL_CFIEN;
4563 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4564 e1000_update_mng_vlan(adapter);
4565 }
4566 } else {
4567 /* disable VLAN tag insert/strip */
4568 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4569 ctrl &= ~E1000_CTRL_VME;
4570 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4571
4572 if (adapter->hw.mac_type != e1000_ich8lan) {
4573 /* disable VLAN filtering */
4574 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4575 rctl &= ~E1000_RCTL_VFE;
4576 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4577 if (adapter->mng_vlan_id !=
4578 (uint16_t)E1000_MNG_VLAN_NONE) {
4579 e1000_vlan_rx_kill_vid(netdev,
4580 adapter->mng_vlan_id);
4581 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4582 }
4583 }
4584 }
4585
4586 e1000_irq_enable(adapter);
4587 }
4588
4589 static void
4590 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4591 {
4592 struct e1000_adapter *adapter = netdev_priv(netdev);
4593 uint32_t vfta, index;
4594
4595 if ((adapter->hw.mng_cookie.status &
4596 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4597 (vid == adapter->mng_vlan_id))
4598 return;
4599 /* add VID to filter table */
4600 index = (vid >> 5) & 0x7F;
4601 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4602 vfta |= (1 << (vid & 0x1F));
4603 e1000_write_vfta(&adapter->hw, index, vfta);
4604 }
4605
4606 static void
4607 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4608 {
4609 struct e1000_adapter *adapter = netdev_priv(netdev);
4610 uint32_t vfta, index;
4611
4612 e1000_irq_disable(adapter);
4613
4614 if (adapter->vlgrp)
4615 adapter->vlgrp->vlan_devices[vid] = NULL;
4616
4617 e1000_irq_enable(adapter);
4618
4619 if ((adapter->hw.mng_cookie.status &
4620 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4621 (vid == adapter->mng_vlan_id)) {
4622 /* release control to f/w */
4623 e1000_release_hw_control(adapter);
4624 return;
4625 }
4626
4627 /* remove VID from filter table */
4628 index = (vid >> 5) & 0x7F;
4629 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4630 vfta &= ~(1 << (vid & 0x1F));
4631 e1000_write_vfta(&adapter->hw, index, vfta);
4632 }
4633
4634 static void
4635 e1000_restore_vlan(struct e1000_adapter *adapter)
4636 {
4637 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4638
4639 if (adapter->vlgrp) {
4640 uint16_t vid;
4641 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4642 if (!adapter->vlgrp->vlan_devices[vid])
4643 continue;
4644 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4645 }
4646 }
4647 }
4648
4649 int
4650 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4651 {
4652 adapter->hw.autoneg = 0;
4653
4654 /* Fiber NICs only allow 1000 gbps Full duplex */
4655 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
4656 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4657 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4658 return -EINVAL;
4659 }
4660
4661 switch (spddplx) {
4662 case SPEED_10 + DUPLEX_HALF:
4663 adapter->hw.forced_speed_duplex = e1000_10_half;
4664 break;
4665 case SPEED_10 + DUPLEX_FULL:
4666 adapter->hw.forced_speed_duplex = e1000_10_full;
4667 break;
4668 case SPEED_100 + DUPLEX_HALF:
4669 adapter->hw.forced_speed_duplex = e1000_100_half;
4670 break;
4671 case SPEED_100 + DUPLEX_FULL:
4672 adapter->hw.forced_speed_duplex = e1000_100_full;
4673 break;
4674 case SPEED_1000 + DUPLEX_FULL:
4675 adapter->hw.autoneg = 1;
4676 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4677 break;
4678 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4679 default:
4680 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4681 return -EINVAL;
4682 }
4683 return 0;
4684 }
4685
4686 #ifdef CONFIG_PM
4687 /* Save/restore 16 or 64 dwords of PCI config space depending on which
4688 * bus we're on (PCI(X) vs. PCI-E)
4689 */
4690 #define PCIE_CONFIG_SPACE_LEN 256
4691 #define PCI_CONFIG_SPACE_LEN 64
4692 static int
4693 e1000_pci_save_state(struct e1000_adapter *adapter)
4694 {
4695 struct pci_dev *dev = adapter->pdev;
4696 int size;
4697 int i;
4698
4699 if (adapter->hw.mac_type >= e1000_82571)
4700 size = PCIE_CONFIG_SPACE_LEN;
4701 else
4702 size = PCI_CONFIG_SPACE_LEN;
4703
4704 WARN_ON(adapter->config_space != NULL);
4705
4706 adapter->config_space = kmalloc(size, GFP_KERNEL);
4707 if (!adapter->config_space) {
4708 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4709 return -ENOMEM;
4710 }
4711 for (i = 0; i < (size / 4); i++)
4712 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4713 return 0;
4714 }
4715
4716 static void
4717 e1000_pci_restore_state(struct e1000_adapter *adapter)
4718 {
4719 struct pci_dev *dev = adapter->pdev;
4720 int size;
4721 int i;
4722
4723 if (adapter->config_space == NULL)
4724 return;
4725
4726 if (adapter->hw.mac_type >= e1000_82571)
4727 size = PCIE_CONFIG_SPACE_LEN;
4728 else
4729 size = PCI_CONFIG_SPACE_LEN;
4730 for (i = 0; i < (size / 4); i++)
4731 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4732 kfree(adapter->config_space);
4733 adapter->config_space = NULL;
4734 return;
4735 }
4736 #endif /* CONFIG_PM */
4737
4738 static int
4739 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4740 {
4741 struct net_device *netdev = pci_get_drvdata(pdev);
4742 struct e1000_adapter *adapter = netdev_priv(netdev);
4743 uint32_t ctrl, ctrl_ext, rctl, manc, status;
4744 uint32_t wufc = adapter->wol;
4745 #ifdef CONFIG_PM
4746 int retval = 0;
4747 #endif
4748
4749 netif_device_detach(netdev);
4750
4751 if (netif_running(netdev)) {
4752 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
4753 e1000_down(adapter);
4754 }
4755
4756 #ifdef CONFIG_PM
4757 /* Implement our own version of pci_save_state(pdev) because pci-
4758 * express adapters have 256-byte config spaces. */
4759 retval = e1000_pci_save_state(adapter);
4760 if (retval)
4761 return retval;
4762 #endif
4763
4764 status = E1000_READ_REG(&adapter->hw, STATUS);
4765 if (status & E1000_STATUS_LU)
4766 wufc &= ~E1000_WUFC_LNKC;
4767
4768 if (wufc) {
4769 e1000_setup_rctl(adapter);
4770 e1000_set_multi(netdev);
4771
4772 /* turn on all-multi mode if wake on multicast is enabled */
4773 if (wufc & E1000_WUFC_MC) {
4774 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4775 rctl |= E1000_RCTL_MPE;
4776 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4777 }
4778
4779 if (adapter->hw.mac_type >= e1000_82540) {
4780 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4781 /* advertise wake from D3Cold */
4782 #define E1000_CTRL_ADVD3WUC 0x00100000
4783 /* phy power management enable */
4784 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4785 ctrl |= E1000_CTRL_ADVD3WUC |
4786 E1000_CTRL_EN_PHY_PWR_MGMT;
4787 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4788 }
4789
4790 if (adapter->hw.media_type == e1000_media_type_fiber ||
4791 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4792 /* keep the laser running in D3 */
4793 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4794 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4795 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4796 }
4797
4798 /* Allow time for pending master requests to run */
4799 e1000_disable_pciex_master(&adapter->hw);
4800
4801 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4802 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
4803 pci_enable_wake(pdev, PCI_D3hot, 1);
4804 pci_enable_wake(pdev, PCI_D3cold, 1);
4805 } else {
4806 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4807 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
4808 pci_enable_wake(pdev, PCI_D3hot, 0);
4809 pci_enable_wake(pdev, PCI_D3cold, 0);
4810 }
4811
4812 if (adapter->hw.mac_type >= e1000_82540 &&
4813 adapter->hw.mac_type < e1000_82571 &&
4814 adapter->hw.media_type == e1000_media_type_copper) {
4815 manc = E1000_READ_REG(&adapter->hw, MANC);
4816 if (manc & E1000_MANC_SMBUS_EN) {
4817 manc |= E1000_MANC_ARP_EN;
4818 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4819 pci_enable_wake(pdev, PCI_D3hot, 1);
4820 pci_enable_wake(pdev, PCI_D3cold, 1);
4821 }
4822 }
4823
4824 if (adapter->hw.phy_type == e1000_phy_igp_3)
4825 e1000_phy_powerdown_workaround(&adapter->hw);
4826
4827 if (netif_running(netdev))
4828 e1000_free_irq(adapter);
4829
4830 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4831 * would have already happened in close and is redundant. */
4832 e1000_release_hw_control(adapter);
4833
4834 pci_disable_device(pdev);
4835
4836 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4837
4838 return 0;
4839 }
4840
4841 #ifdef CONFIG_PM
4842 static int
4843 e1000_resume(struct pci_dev *pdev)
4844 {
4845 struct net_device *netdev = pci_get_drvdata(pdev);
4846 struct e1000_adapter *adapter = netdev_priv(netdev);
4847 uint32_t manc, err;
4848
4849 pci_set_power_state(pdev, PCI_D0);
4850 e1000_pci_restore_state(adapter);
4851 if ((err = pci_enable_device(pdev))) {
4852 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4853 return err;
4854 }
4855 pci_set_master(pdev);
4856
4857 pci_enable_wake(pdev, PCI_D3hot, 0);
4858 pci_enable_wake(pdev, PCI_D3cold, 0);
4859
4860 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
4861 return err;
4862
4863 e1000_power_up_phy(adapter);
4864 e1000_reset(adapter);
4865 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4866
4867 if (netif_running(netdev))
4868 e1000_up(adapter);
4869
4870 netif_device_attach(netdev);
4871
4872 if (adapter->hw.mac_type >= e1000_82540 &&
4873 adapter->hw.mac_type < e1000_82571 &&
4874 adapter->hw.media_type == e1000_media_type_copper) {
4875 manc = E1000_READ_REG(&adapter->hw, MANC);
4876 manc &= ~(E1000_MANC_ARP_EN);
4877 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4878 }
4879
4880 /* If the controller is 82573 and f/w is AMT, do not set
4881 * DRV_LOAD until the interface is up. For all other cases,
4882 * let the f/w know that the h/w is now under the control
4883 * of the driver. */
4884 if (adapter->hw.mac_type != e1000_82573 ||
4885 !e1000_check_mng_mode(&adapter->hw))
4886 e1000_get_hw_control(adapter);
4887
4888 return 0;
4889 }
4890 #endif
4891
4892 static void e1000_shutdown(struct pci_dev *pdev)
4893 {
4894 e1000_suspend(pdev, PMSG_SUSPEND);
4895 }
4896
4897 #ifdef CONFIG_NET_POLL_CONTROLLER
4898 /*
4899 * Polling 'interrupt' - used by things like netconsole to send skbs
4900 * without having to re-enable interrupts. It's not called while
4901 * the interrupt routine is executing.
4902 */
4903 static void
4904 e1000_netpoll(struct net_device *netdev)
4905 {
4906 struct e1000_adapter *adapter = netdev_priv(netdev);
4907
4908 disable_irq(adapter->pdev->irq);
4909 e1000_intr(adapter->pdev->irq, netdev);
4910 e1000_clean_tx_irq(adapter, adapter->tx_ring);
4911 #ifndef CONFIG_E1000_NAPI
4912 adapter->clean_rx(adapter, adapter->rx_ring);
4913 #endif
4914 enable_irq(adapter->pdev->irq);
4915 }
4916 #endif
4917
4918 /**
4919 * e1000_io_error_detected - called when PCI error is detected
4920 * @pdev: Pointer to PCI device
4921 * @state: The current pci conneection state
4922 *
4923 * This function is called after a PCI bus error affecting
4924 * this device has been detected.
4925 */
4926 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4927 {
4928 struct net_device *netdev = pci_get_drvdata(pdev);
4929 struct e1000_adapter *adapter = netdev->priv;
4930
4931 netif_device_detach(netdev);
4932
4933 if (netif_running(netdev))
4934 e1000_down(adapter);
4935 pci_disable_device(pdev);
4936
4937 /* Request a slot slot reset. */
4938 return PCI_ERS_RESULT_NEED_RESET;
4939 }
4940
4941 /**
4942 * e1000_io_slot_reset - called after the pci bus has been reset.
4943 * @pdev: Pointer to PCI device
4944 *
4945 * Restart the card from scratch, as if from a cold-boot. Implementation
4946 * resembles the first-half of the e1000_resume routine.
4947 */
4948 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4949 {
4950 struct net_device *netdev = pci_get_drvdata(pdev);
4951 struct e1000_adapter *adapter = netdev->priv;
4952
4953 if (pci_enable_device(pdev)) {
4954 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4955 return PCI_ERS_RESULT_DISCONNECT;
4956 }
4957 pci_set_master(pdev);
4958
4959 pci_enable_wake(pdev, PCI_D3hot, 0);
4960 pci_enable_wake(pdev, PCI_D3cold, 0);
4961
4962 e1000_reset(adapter);
4963 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4964
4965 return PCI_ERS_RESULT_RECOVERED;
4966 }
4967
4968 /**
4969 * e1000_io_resume - called when traffic can start flowing again.
4970 * @pdev: Pointer to PCI device
4971 *
4972 * This callback is called when the error recovery driver tells us that
4973 * its OK to resume normal operation. Implementation resembles the
4974 * second-half of the e1000_resume routine.
4975 */
4976 static void e1000_io_resume(struct pci_dev *pdev)
4977 {
4978 struct net_device *netdev = pci_get_drvdata(pdev);
4979 struct e1000_adapter *adapter = netdev->priv;
4980 uint32_t manc, swsm;
4981
4982 if (netif_running(netdev)) {
4983 if (e1000_up(adapter)) {
4984 printk("e1000: can't bring device back up after reset\n");
4985 return;
4986 }
4987 }
4988
4989 netif_device_attach(netdev);
4990
4991 if (adapter->hw.mac_type >= e1000_82540 &&
4992 adapter->hw.mac_type < e1000_82571 &&
4993 adapter->hw.media_type == e1000_media_type_copper) {
4994 manc = E1000_READ_REG(&adapter->hw, MANC);
4995 manc &= ~(E1000_MANC_ARP_EN);
4996 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4997 }
4998
4999 switch (adapter->hw.mac_type) {
5000 case e1000_82573:
5001 swsm = E1000_READ_REG(&adapter->hw, SWSM);
5002 E1000_WRITE_REG(&adapter->hw, SWSM,
5003 swsm | E1000_SWSM_DRV_LOAD);
5004 break;
5005 default:
5006 break;
5007 }
5008
5009 if (netif_running(netdev))
5010 mod_timer(&adapter->watchdog_timer, jiffies);
5011 }
5012
5013 /* e1000_main.c */
linux kernel for loongson