arch/powerpc/kernel/setup_64.c

   1 /*
   2  *
   3  * Common boot and setup code.
   4  *
   5  * Copyright (C) 2001 PPC64 Team, IBM Corp
   6  *
   7  *      This program is free software; you can redistribute it and/or
   8  *      modify it under the terms of the GNU General Public License
   9  *      as published by the Free Software Foundation; either version
  10  *      2 of the License, or (at your option) any later version.
  11  */
  12
  13 #undef DEBUG
  14
  15 #include <linux/module.h>
  16 #include <linux/string.h>
  17 #include <linux/sched.h>
  18 #include <linux/init.h>
  19 #include <linux/kernel.h>
  20 #include <linux/reboot.h>
  21 #include <linux/delay.h>
  22 #include <linux/initrd.h>
  23 #include <linux/ide.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/ioport.h>
  26 #include <linux/console.h>
  27 #include <linux/utsname.h>
  28 #include <linux/tty.h>
  29 #include <linux/root_dev.h>
  30 #include <linux/notifier.h>
  31 #include <linux/cpu.h>
  32 #include <linux/unistd.h>
  33 #include <linux/serial.h>
  34 #include <linux/serial_8250.h>
  35 #include <linux/bootmem.h>
  36 #include <asm/io.h>
  37 #include <asm/kdump.h>
  38 #include <asm/prom.h>
  39 #include <asm/processor.h>
  40 #include <asm/pgtable.h>
  41 #include <asm/smp.h>
  42 #include <asm/elf.h>
  43 #include <asm/machdep.h>
  44 #include <asm/paca.h>
  45 #include <asm/time.h>
  46 #include <asm/cputable.h>
  47 #include <asm/sections.h>
  48 #include <asm/btext.h>
  49 #include <asm/nvram.h>
  50 #include <asm/setup.h>
  51 #include <asm/system.h>
  52 #include <asm/rtas.h>
  53 #include <asm/iommu.h>
  54 #include <asm/serial.h>
  55 #include <asm/cache.h>
  56 #include <asm/page.h>
  57 #include <asm/mmu.h>
  58 #include <asm/lmb.h>
  59 #include <asm/firmware.h>
  60 #include <asm/xmon.h>
  61 #include <asm/udbg.h>
  62 #include <asm/kexec.h>
  63
  64 #include "setup.h"
  65
  66 #ifdef DEBUG
  67 #define DBG(fmt...) udbg_printf(fmt)
  68 #else
  69 #define DBG(fmt...)
  70 #endif
  71
  72 int have_of = 1;
  73 int boot_cpuid = 0;
  74 dev_t boot_dev;
  75 u64 ppc64_pft_size;
  76
  77 /* Pick defaults since we might want to patch instructions
  78  * before we've read this from the device tree.
  79  */
  80 struct ppc64_caches ppc64_caches = {
  81         .dline_size = 0x40,
  82         .log_dline_size = 6,
  83         .iline_size = 0x40,
  84         .log_iline_size = 6
  85 };
  86 EXPORT_SYMBOL_GPL(ppc64_caches);
  87
  88 /*
  89  * These are used in binfmt_elf.c to put aux entries on the stack
  90  * for each elf executable being started.
  91  */
  92 int dcache_bsize;
  93 int icache_bsize;
  94 int ucache_bsize;
  95
  96 #ifdef CONFIG_SMP
  97
  98 static int smt_enabled_cmdline;
  99
 100 /* Look for ibm,smt-enabled OF option */
 101 static void check_smt_enabled(void)
 102 {
 103         struct device_node *dn;
 104         const char *smt_option;
 105
 106         /* Allow the command line to overrule the OF option */
 107         if (smt_enabled_cmdline)
 108                 return;
 109
 110         dn = of_find_node_by_path("/options");
 111
 112         if (dn) {
 113                 smt_option = get_property(dn, "ibm,smt-enabled", NULL);
 114
 115                 if (smt_option) {
 116                         if (!strcmp(smt_option, "on"))
 117                                 smt_enabled_at_boot = 1;
 118                         else if (!strcmp(smt_option, "off"))
 119                                 smt_enabled_at_boot = 0;
 120                 }
 121         }
 122 }
 123
 124 /* Look for smt-enabled= cmdline option */
 125 static int __init early_smt_enabled(char *p)
 126 {
 127         smt_enabled_cmdline = 1;
 128
 129         if (!p)
 130                 return 0;
 131
 132         if (!strcmp(p, "on") || !strcmp(p, "1"))
 133                 smt_enabled_at_boot = 1;
 134         else if (!strcmp(p, "off") || !strcmp(p, "0"))
 135                 smt_enabled_at_boot = 0;
 136
 137         return 0;
 138 }
 139 early_param("smt-enabled", early_smt_enabled);
 140
 141 #else
 142 #define check_smt_enabled()
 143 #endif /* CONFIG_SMP */
 144
 145 /* Put the paca pointer into r13 and SPRG3 */
 146 void __init setup_paca(int cpu)
 147 {
 148         local_paca = &paca[cpu];
 149         mtspr(SPRN_SPRG3, local_paca);
 150 }
 151
 152 /*
 153  * Early initialization entry point. This is called by head.S
 154  * with MMU translation disabled. We rely on the "feature" of
 155  * the CPU that ignores the top 2 bits of the address in real
 156  * mode so we can access kernel globals normally provided we
 157  * only toy with things in the RMO region. From here, we do
 158  * some early parsing of the device-tree to setup out LMB
 159  * data structures, and allocate & initialize the hash table
 160  * and segment tables so we can start running with translation
 161  * enabled.
 162  *
 163  * It is this function which will call the probe() callback of
 164  * the various platform types and copy the matching one to the
 165  * global ppc_md structure. Your platform can eventually do
 166  * some very early initializations from the probe() routine, but
 167  * this is not recommended, be very careful as, for example, the
 168  * device-tree is not accessible via normal means at this point.
 169  */
 170
 171 void __init early_setup(unsigned long dt_ptr)
 172 {
 173         /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
 174         setup_paca(0);
 175
 176         /* Enable early debugging if any specified (see udbg.h) */
 177         udbg_early_init();
 178
 179         DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
 180
 181         /*
 182          * Do early initializations using the flattened device
 183          * tree, like retreiving the physical memory map or
 184          * calculating/retreiving the hash table size
 185          */
 186         early_init_devtree(__va(dt_ptr));
 187
 188         /* Now we know the logical id of our boot cpu, setup the paca. */
 189         setup_paca(boot_cpuid);
 190
 191         /* Fix up paca fields required for the boot cpu */
 192         get_paca()->cpu_start = 1;
 193         get_paca()->stab_real = __pa((u64)&initial_stab);
 194         get_paca()->stab_addr = (u64)&initial_stab;
 195
 196         /* Probe the machine type */
 197         probe_machine();
 198
 199         setup_kdump_trampoline();
 200
 201         DBG("Found, Initializing memory management...\n");
 202
 203         /*
 204          * Initialize the MMU Hash table and create the linear mapping
 205          * of memory. Has to be done before stab/slb initialization as
 206          * this is currently where the page size encoding is obtained
 207          */
 208         htab_initialize();
 209
 210         /*
 211          * Initialize stab / SLB management except on iSeries
 212          */
 213         if (cpu_has_feature(CPU_FTR_SLB))
 214                 slb_initialize();
 215         else if (!firmware_has_feature(FW_FEATURE_ISERIES))
 216                 stab_initialize(get_paca()->stab_real);
 217
 218         DBG(" <- early_setup()\n");
 219 }
 220
 221 #ifdef CONFIG_SMP
 222 void early_setup_secondary(void)
 223 {
 224         struct paca_struct *lpaca = get_paca();
 225
 226         /* Mark enabled in PACA */
 227         lpaca->proc_enabled = 0;
 228
 229         /* Initialize hash table for that CPU */
 230         htab_initialize_secondary();
 231
 232         /* Initialize STAB/SLB. We use a virtual address as it works
 233          * in real mode on pSeries and we want a virutal address on
 234          * iSeries anyway
 235          */
 236         if (cpu_has_feature(CPU_FTR_SLB))
 237                 slb_initialize();
 238         else
 239                 stab_initialize(lpaca->stab_addr);
 240 }
 241
 242 #endif /* CONFIG_SMP */
 243
 244 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
 245 void smp_release_cpus(void)
 246 {
 247         extern unsigned long __secondary_hold_spinloop;
 248         unsigned long *ptr;
 249
 250         DBG(" -> smp_release_cpus()\n");
 251
 252         /* All secondary cpus are spinning on a common spinloop, release them
 253          * all now so they can start to spin on their individual paca
 254          * spinloops. For non SMP kernels, the secondary cpus never get out
 255          * of the common spinloop.
 256          * This is useless but harmless on iSeries, secondaries are already
 257          * waiting on their paca spinloops. */
 258
 259         ptr  = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
 260                         - PHYSICAL_START);
 261         *ptr = 1;
 262         mb();
 263
 264         DBG(" <- smp_release_cpus()\n");
 265 }
 266 #endif /* CONFIG_SMP || CONFIG_KEXEC */
 267
 268 /*
 269  * Initialize some remaining members of the ppc64_caches and systemcfg
 270  * structures
 271  * (at least until we get rid of them completely). This is mostly some
 272  * cache informations about the CPU that will be used by cache flush
 273  * routines and/or provided to userland
 274  */
 275 static void __init initialize_cache_info(void)
 276 {
 277         struct device_node *np;
 278         unsigned long num_cpus = 0;
 279
 280         DBG(" -> initialize_cache_info()\n");
 281
 282         for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) {
 283                 num_cpus += 1;
 284
 285                 /* We're assuming *all* of the CPUs have the same
 286                  * d-cache and i-cache sizes... -Peter
 287                  */
 288
 289                 if ( num_cpus == 1 ) {
 290                         const u32 *sizep, *lsizep;
 291                         u32 size, lsize;
 292                         const char *dc, *ic;
 293
 294                         /* Then read cache informations */
 295                         if (machine_is(powermac)) {
 296                                 dc = "d-cache-block-size";
 297                                 ic = "i-cache-block-size";
 298                         } else {
 299                                 dc = "d-cache-line-size";
 300                                 ic = "i-cache-line-size";
 301                         }
 302
 303                         size = 0;
 304                         lsize = cur_cpu_spec->dcache_bsize;
 305                         sizep = get_property(np, "d-cache-size", NULL);
 306                         if (sizep != NULL)
 307                                 size = *sizep;
 308                         lsizep = get_property(np, dc, NULL);
 309                         if (lsizep != NULL)
 310                                 lsize = *lsizep;
 311                         if (sizep == 0 || lsizep == 0)
 312                                 DBG("Argh, can't find dcache properties ! "
 313                                     "sizep: %p, lsizep: %p\n", sizep, lsizep);
 314
 315                         ppc64_caches.dsize = size;
 316                         ppc64_caches.dline_size = lsize;
 317                         ppc64_caches.log_dline_size = __ilog2(lsize);
 318                         ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
 319
 320                         size = 0;
 321                         lsize = cur_cpu_spec->icache_bsize;
 322                         sizep = get_property(np, "i-cache-size", NULL);
 323                         if (sizep != NULL)
 324                                 size = *sizep;
 325                         lsizep = get_property(np, ic, NULL);
 326                         if (lsizep != NULL)
 327                                 lsize = *lsizep;
 328                         if (sizep == 0 || lsizep == 0)
 329                                 DBG("Argh, can't find icache properties ! "
 330                                     "sizep: %p, lsizep: %p\n", sizep, lsizep);
 331
 332                         ppc64_caches.isize = size;
 333                         ppc64_caches.iline_size = lsize;
 334                         ppc64_caches.log_iline_size = __ilog2(lsize);
 335                         ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
 336                 }
 337         }
 338
 339         DBG(" <- initialize_cache_info()\n");
 340 }
 341
 342
 343 /*
 344  * Do some initial setup of the system.  The parameters are those which
 345  * were passed in from the bootloader.
 346  */
 347 void __init setup_system(void)
 348 {
 349         DBG(" -> setup_system()\n");
 350
 351         /*
 352          * Unflatten the device-tree passed by prom_init or kexec
 353          */
 354         unflatten_device_tree();
 355
 356         /*
 357          * Fill the ppc64_caches & systemcfg structures with informations
 358          * retrieved from the device-tree.
 359          */
 360         initialize_cache_info();
 361
 362         /*
 363          * Initialize irq remapping subsystem
 364          */
 365         irq_early_init();
 366
 367 #ifdef CONFIG_PPC_RTAS
 368         /*
 369          * Initialize RTAS if available
 370          */
 371         rtas_initialize();
 372 #endif /* CONFIG_PPC_RTAS */
 373
 374         /*
 375          * Check if we have an initrd provided via the device-tree
 376          */
 377         check_for_initrd();
 378
 379         /*
 380          * Do some platform specific early initializations, that includes
 381          * setting up the hash table pointers. It also sets up some interrupt-mapping
 382          * related options that will be used by finish_device_tree()
 383          */
 384         ppc_md.init_early();
 385
 386         /*
 387          * We can discover serial ports now since the above did setup the
 388          * hash table management for us, thus ioremap works. We do that early
 389          * so that further code can be debugged
 390          */
 391         find_legacy_serial_ports();
 392
 393         /*
 394          * Initialize xmon
 395          */
 396 #ifdef CONFIG_XMON_DEFAULT
 397         xmon_init(1);
 398 #endif
 399         /*
 400          * Register early console
 401          */
 402         register_early_udbg_console();
 403
 404         if (do_early_xmon)
 405                 debugger(NULL);
 406
 407         check_smt_enabled();
 408         smp_setup_cpu_maps();
 409
 410 #ifdef CONFIG_SMP
 411         /* Release secondary cpus out of their spinloops at 0x60 now that
 412          * we can map physical -> logical CPU ids
 413          */
 414         smp_release_cpus();
 415 #endif
 416
 417         printk("Starting Linux PPC64 %s\n", system_utsname.version);
 418
 419         printk("-----------------------------------------------------\n");
 420         printk("ppc64_pft_size                = 0x%lx\n", ppc64_pft_size);
 421         printk("physicalMemorySize            = 0x%lx\n", lmb_phys_mem_size());
 422         printk("ppc64_caches.dcache_line_size = 0x%x\n",
 423                ppc64_caches.dline_size);
 424         printk("ppc64_caches.icache_line_size = 0x%x\n",
 425                ppc64_caches.iline_size);
 426         printk("htab_address                  = 0x%p\n", htab_address);
 427         printk("htab_hash_mask                = 0x%lx\n", htab_hash_mask);
 428 #if PHYSICAL_START > 0
 429         printk("physical_start                = 0x%x\n", PHYSICAL_START);
 430 #endif
 431         printk("-----------------------------------------------------\n");
 432
 433         DBG(" <- setup_system()\n");
 434 }
 435
 436 #ifdef CONFIG_IRQSTACKS
 437 static void __init irqstack_early_init(void)
 438 {
 439         unsigned int i;
 440
 441         /*
 442          * interrupt stacks must be under 256MB, we cannot afford to take
 443          * SLB misses on them.
 444          */
 445         for_each_possible_cpu(i) {
 446                 softirq_ctx[i] = (struct thread_info *)
 447                         __va(lmb_alloc_base(THREAD_SIZE,
 448                                             THREAD_SIZE, 0x10000000));
 449                 hardirq_ctx[i] = (struct thread_info *)
 450                         __va(lmb_alloc_base(THREAD_SIZE,
 451                                             THREAD_SIZE, 0x10000000));
 452         }
 453 }
 454 #else
 455 #define irqstack_early_init()
 456 #endif
 457
 458 /*
 459  * Stack space used when we detect a bad kernel stack pointer, and
 460  * early in SMP boots before relocation is enabled.
 461  */
 462 static void __init emergency_stack_init(void)
 463 {
 464         unsigned long limit;
 465         unsigned int i;
 466
 467         /*
 468          * Emergency stacks must be under 256MB, we cannot afford to take
 469          * SLB misses on them. The ABI also requires them to be 128-byte
 470          * aligned.
 471          *
 472          * Since we use these as temporary stacks during secondary CPU
 473          * bringup, we need to get at them in real mode. This means they
 474          * must also be within the RMO region.
 475          */
 476         limit = min(0x10000000UL, lmb.rmo_size);
 477
 478         for_each_possible_cpu(i)
 479                 paca[i].emergency_sp =
 480                 __va(lmb_alloc_base(HW_PAGE_SIZE, 128, limit)) + HW_PAGE_SIZE;
 481 }
 482
 483 /*
 484  * Called into from start_kernel, after lock_kernel has been called.
 485  * Initializes bootmem, which is unsed to manage page allocation until
 486  * mem_init is called.
 487  */
 488 void __init setup_arch(char **cmdline_p)
 489 {
 490         ppc64_boot_msg(0x12, "Setup Arch");
 491
 492         *cmdline_p = cmd_line;
 493
 494         /*
 495          * Set cache line size based on type of cpu as a default.
 496          * Systems with OF can look in the properties on the cpu node(s)
 497          * for a possibly more accurate value.
 498          */
 499         dcache_bsize = ppc64_caches.dline_size;
 500         icache_bsize = ppc64_caches.iline_size;
 501
 502         /* reboot on panic */
 503         panic_timeout = 180;
 504
 505         if (ppc_md.panic)
 506                 setup_panic();
 507
 508         init_mm.start_code = PAGE_OFFSET;
 509         init_mm.end_code = (unsigned long) _etext;
 510         init_mm.end_data = (unsigned long) _edata;
 511         init_mm.brk = klimit;
 512
 513         irqstack_early_init();
 514         emergency_stack_init();
 515
 516         stabs_alloc();
 517
 518         /* set up the bootmem stuff with available memory */
 519         do_init_bootmem();
 520         sparse_init();
 521
 522 #ifdef CONFIG_DUMMY_CONSOLE
 523         conswitchp = &dummy_con;
 524 #endif
 525
 526         ppc_md.setup_arch();
 527
 528         paging_init();
 529         ppc64_boot_msg(0x15, "Setup Done");
 530 }
 531
 532
 533 /* ToDo: do something useful if ppc_md is not yet setup. */
 534 #define PPC64_LINUX_FUNCTION 0x0f000000
 535 #define PPC64_IPL_MESSAGE 0xc0000000
 536 #define PPC64_TERM_MESSAGE 0xb0000000
 537
 538 static void ppc64_do_msg(unsigned int src, const char *msg)
 539 {
 540         if (ppc_md.progress) {
 541                 char buf[128];
 542
 543                 sprintf(buf, "%08X\n", src);
 544                 ppc_md.progress(buf, 0);
 545                 snprintf(buf, 128, "%s", msg);
 546                 ppc_md.progress(buf, 0);
 547         }
 548 }
 549
 550 /* Print a boot progress message. */
 551 void ppc64_boot_msg(unsigned int src, const char *msg)
 552 {
 553         ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
 554         printk("[boot]%04x %s\n", src, msg);
 555 }
 556
 557 /* Print a termination message (print only -- does not stop the kernel) */
 558 void ppc64_terminate_msg(unsigned int src, const char *msg)
 559 {
 560         ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg);
 561         printk("[terminate]%04x %s\n", src, msg);
 562 }
 563
 564 void cpu_die(void)
 565 {
 566         if (ppc_md.cpu_die)
 567                 ppc_md.cpu_die();
 568 }
 569
 570 #ifdef CONFIG_SMP
 571 void __init setup_per_cpu_areas(void)
 572 {
 573         int i;
 574         unsigned long size;
 575         char *ptr;
 576
 577         /* Copy section for each CPU (we discard the original) */
 578         size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES);
 579 #ifdef CONFIG_MODULES
 580         if (size < PERCPU_ENOUGH_ROOM)
 581                 size = PERCPU_ENOUGH_ROOM;
 582 #endif
 583
 584         for_each_possible_cpu(i) {
 585                 ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size);
 586                 if (!ptr)
 587                         panic("Cannot allocate cpu data for CPU %d\n", i);
 588
 589                 paca[i].data_offset = ptr - __per_cpu_start;
 590                 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
 591         }
 592 }
 593 #endif