2 * linux/arch/i386/kernel/head.S -- the 32-bit startup code.
4 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Enhanced CPU detection and feature setting code by Mike Jagdis
7 * and Martin Mares, November 1997.
11 #include <linux/threads.h>
12 #include <linux/linkage.h>
13 #include <asm/segment.h>
15 #include <asm/pgtable.h>
17 #include <asm/cache.h>
18 #include <asm/thread_info.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/setup.h>
23 * References to members of the new_cpu_data structure.
26 #define X86 new_cpu_data+CPUINFO_x86
27 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
28 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
29 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
30 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
31 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
32 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
33 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
36 * This is how much memory *in addition to the memory covered up to
37 * and including _end* we need mapped initially. We need one bit for
38 * each possible page, but only in low memory, which means
39 * 2^32/4096/8 = 128K worst case (4G/4G split.)
41 * Modulo rounding, each megabyte assigned here requires a kilobyte of
42 * memory, which is currently unreclaimed.
44 * This should be a multiple of a page.
46 #define INIT_MAP_BEYOND_END (128*1024)
50 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
51 * %esi points to the real-mode code as a 32-bit pointer.
52 * CS and DS must be 4 GB flat segments, but we don't depend on
53 * any particular GDT layout, because we load our own as soon as we
59 * Set segments to known values.
62 lgdt boot_gdt_descr - __PAGE_OFFSET
63 movl $(__BOOT_DS),%eax
70 * Clear BSS first so that there are no surprises...
71 * No need to cld as DF is already clear from cld above...
74 movl $__bss_start - __PAGE_OFFSET,%edi
75 movl $__bss_stop - __PAGE_OFFSET,%ecx
80 * Copy bootup parameters out of the way.
81 * Note: %esi still has the pointer to the real-mode data.
82 * With the kexec as boot loader, parameter segment might be loaded beyond
83 * kernel image and might not even be addressable by early boot page tables.
84 * (kexec on panic case). Hence copy out the parameters before initializing
87 movl $(boot_params - __PAGE_OFFSET),%edi
88 movl $(PARAM_SIZE/4),%ecx
92 movl boot_params - __PAGE_OFFSET + NEW_CL_POINTER,%esi
94 jnz 2f # New command line protocol
95 cmpw $(OLD_CL_MAGIC),OLD_CL_MAGIC_ADDR
97 movzwl OLD_CL_OFFSET,%esi
98 addl $(OLD_CL_BASE_ADDR),%esi
100 movl $(saved_command_line - __PAGE_OFFSET),%edi
101 movl $(COMMAND_LINE_SIZE/4),%ecx
107 * Initialize page tables. This creates a PDE and a set of page
108 * tables, which are located immediately beyond _end. The variable
109 * init_pg_tables_end is set up to point to the first "safe" location.
110 * Mappings are created both at virtual address 0 (identity mapping)
111 * and PAGE_OFFSET for up to _end+sizeof(page tables)+INIT_MAP_BEYOND_END.
113 * Warning: don't use %esi or the stack in this code. However, %esp
114 * can be used as a GPR if you really need it...
116 page_pde_offset = (__PAGE_OFFSET >> 20);
118 movl $(pg0 - __PAGE_OFFSET), %edi
119 movl $(swapper_pg_dir - __PAGE_OFFSET), %edx
120 movl $0x007, %eax /* 0x007 = PRESENT+RW+USER */
122 leal 0x007(%edi),%ecx /* Create PDE entry */
123 movl %ecx,(%edx) /* Store identity PDE entry */
124 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
131 /* End condition: we must map up to and including INIT_MAP_BEYOND_END */
132 /* bytes beyond the end of our own page tables; the +0x007 is the attribute bits */
133 leal (INIT_MAP_BEYOND_END+0x007)(%edi),%ebp
136 movl %edi,(init_pg_tables_end - __PAGE_OFFSET)
139 xorl %ebx,%ebx /* This is the boot CPU (BSP) */
143 * Non-boot CPU entry point; entered from trampoline.S
144 * We can't lgdt here, because lgdt itself uses a data segment, but
145 * we know the trampoline has already loaded the boot_gdt_table GDT
148 ENTRY(startup_32_smp)
150 movl $(__BOOT_DS),%eax
157 * New page tables may be in 4Mbyte page mode and may
158 * be using the global pages.
160 * NOTE! If we are on a 486 we may have no cr4 at all!
161 * So we do not try to touch it unless we really have
162 * some bits in it to set. This won't work if the BSP
163 * implements cr4 but this AP does not -- very unlikely
164 * but be warned! The same applies to the pse feature
165 * if not equally supported. --macro
167 * NOTE! We have to correct for the fact that we're
168 * not yet offset PAGE_OFFSET..
170 #define cr4_bits mmu_cr4_features-__PAGE_OFFSET
174 movl %cr4,%eax # Turn on paging options (PSE,PAE,..)
178 btl $5, %eax # check if PAE is enabled
181 /* Check if extended functions are implemented */
182 movl $0x80000000, %eax
184 cmpl $0x80000000, %eax
186 mov $0x80000001, %eax
188 /* Execute Disable bit supported? */
192 /* Setup EFER (Extended Feature Enable Register) */
193 movl $0xc0000080, %ecx
197 /* Make changes effective */
201 /* This is a secondary processor (AP) */
206 #endif /* CONFIG_SMP */
211 movl $swapper_pg_dir-__PAGE_OFFSET,%eax
212 movl %eax,%cr3 /* set the page table pointer.. */
215 movl %eax,%cr0 /* ..and set paging (PG) bit */
216 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
218 /* Set up the stack pointer */
222 * Initialize eflags. Some BIOS's leave bits like NT set. This would
223 * confuse the debugger if this code is traced.
224 * XXX - best to initialize before switching to protected mode.
231 jz 1f /* Initial CPU cleans BSS */
234 #endif /* CONFIG_SMP */
237 * start system 32-bit setup. We need to re-do some of the things done
238 * in 16-bit mode for the "real" operations.
244 movl $-1,X86_CPUID # -1 for no CPUID initially
246 /* check if it is 486 or 386. */
248 * XXX - this does a lot of unnecessary setup. Alignment checks don't
249 * apply at our cpl of 0 and the stack ought to be aligned already, and
250 * we don't need to preserve eflags.
253 movb $3,X86 # at least 386
255 popl %eax # get EFLAGS
256 movl %eax,%ecx # save original EFLAGS
257 xorl $0x240000,%eax # flip AC and ID bits in EFLAGS
258 pushl %eax # copy to EFLAGS
260 pushfl # get new EFLAGS
261 popl %eax # put it in eax
262 xorl %ecx,%eax # change in flags
263 pushl %ecx # restore original EFLAGS
265 testl $0x40000,%eax # check if AC bit changed
268 movb $4,X86 # at least 486
269 testl $0x200000,%eax # check if ID bit changed
272 /* get vendor info */
273 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
275 movl %eax,X86_CPUID # save CPUID level
276 movl %ebx,X86_VENDOR_ID # lo 4 chars
277 movl %edx,X86_VENDOR_ID+4 # next 4 chars
278 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
280 orl %eax,%eax # do we have processor info as well?
283 movl $1,%eax # Use the CPUID instruction to get CPU type
285 movb %al,%cl # save reg for future use
286 andb $0x0f,%ah # mask processor family
288 andb $0xf0,%al # mask model
291 andb $0x0f,%cl # mask mask revision
293 movl %edx,X86_CAPABILITY
295 is486: movl $0x50022,%ecx # set AM, WP, NE and MP
298 is386: movl $2,%ecx # set MP
300 andl $0x80000011,%eax # Save PG,PE,ET
308 ljmp $(__KERNEL_CS),$1f
309 1: movl $(__KERNEL_DS),%eax # reload all the segment registers
310 movl %eax,%ss # after changing gdt.
312 movl $(__USER_DS),%eax # DS/ES contains default USER segment
316 xorl %eax,%eax # Clear FS and LDT
320 movl $(__KERNEL_PDA),%eax
323 cld # gcc2 wants the direction flag cleared at all times
324 pushl $0 # fake return address for unwinder
328 cmpb $0,%cl # the first CPU calls start_kernel
329 jne initialize_secondary # all other CPUs call initialize_secondary
330 #endif /* CONFIG_SMP */
334 * We depend on ET to be correct. This checks for 287/387.
337 movb $0,X86_HARD_MATH
343 movl %cr0,%eax /* no coprocessor: have to set bits */
344 xorl $4,%eax /* set EM */
348 1: movb $1,X86_HARD_MATH
349 .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
353 * Point the GDT at this CPU's PDA. On boot this will be
354 * cpu_gdt_table and boot_pda; for secondary CPUs, these will be
355 * that CPU's GDT and PDA.
358 /* get the PDA pointer */
361 /* slot the PDA address into the GDT */
362 mov cpu_gdt_descr+2, %ecx
363 mov %ax, (__KERNEL_PDA+0+2)(%ecx) /* base & 0x0000ffff */
365 mov %al, (__KERNEL_PDA+4+0)(%ecx) /* base & 0x00ff0000 */
366 mov %ah, (__KERNEL_PDA+4+3)(%ecx) /* base & 0xff000000 */
372 * sets up a idt with 256 entries pointing to
373 * ignore_int, interrupt gates. It doesn't actually load
374 * idt - that can be done only after paging has been enabled
375 * and the kernel moved to PAGE_OFFSET. Interrupts
376 * are enabled elsewhere, when we can be relatively
377 * sure everything is ok.
379 * Warning: %esi is live across this function.
383 movl $(__KERNEL_CS << 16),%eax
384 movw %dx,%ax /* selector = 0x0010 = cs */
385 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
396 .macro set_early_handler handler,trapno
398 movl $(__KERNEL_CS << 16),%eax
400 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
402 movl %eax,8*\trapno(%edi)
403 movl %edx,8*\trapno+4(%edi)
406 set_early_handler handler=early_divide_err,trapno=0
407 set_early_handler handler=early_illegal_opcode,trapno=6
408 set_early_handler handler=early_protection_fault,trapno=13
409 set_early_handler handler=early_page_fault,trapno=14
415 pushl $0 /* fake errcode */
418 early_illegal_opcode:
420 pushl $0 /* fake errcode */
423 early_protection_fault:
434 movl $(__KERNEL_DS),%eax
437 cmpl $2,early_recursion_flag
439 incl early_recursion_flag
442 pushl %edx /* trapno */
444 #ifdef CONFIG_EARLY_PRINTK
454 /* This is the default interrupt "handler" :-) */
464 movl $(__KERNEL_DS),%eax
467 cmpl $2,early_recursion_flag
469 incl early_recursion_flag
475 #ifdef CONFIG_EARLY_PRINTK
490 * Real beginning of normal "text" segment
498 .section ".bss.page_aligned","w"
499 ENTRY(swapper_pg_dir)
501 ENTRY(empty_zero_page)
505 * This starts the data section.
512 .long init_thread_union+THREAD_SIZE
517 early_recursion_flag:
521 .asciz "Unknown interrupt or fault at EIP %p %p %p\n"
524 .ascii "Int %d: CR2 %p err %p EIP %p CS %p flags %p\n"
525 .asciz "Stack: %p %p %p %p %p %p %p %p\n"
528 * The IDT and GDT 'descriptors' are a strange 48-bit object
529 * only used by the lidt and lgdt instructions. They are not
530 * like usual segment descriptors - they consist of a 16-bit
531 * segment size, and 32-bit linear address value:
534 .globl boot_gdt_descr
538 # early boot GDT descriptor (must use 1:1 address mapping)
539 .word 0 # 32 bit align gdt_desc.address
542 .long boot_gdt_table - __PAGE_OFFSET
544 .word 0 # 32-bit align idt_desc.address
546 .word IDT_ENTRIES*8-1 # idt contains 256 entries
549 # boot GDT descriptor (later on used by CPU#0):
550 .word 0 # 32 bit align gdt_desc.address
552 .word GDT_ENTRIES*8-1
556 * The boot_gdt_table must mirror the equivalent in setup.S and is
557 * used only for booting.
559 .align L1_CACHE_BYTES
560 ENTRY(boot_gdt_table)
561 .fill GDT_ENTRY_BOOT_CS,8,0
562 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
563 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */
566 * The Global Descriptor Table contains 28 quadwords, per-CPU.
568 .align L1_CACHE_BYTES
570 .quad 0x0000000000000000 /* NULL descriptor */
571 .quad 0x0000000000000000 /* 0x0b reserved */
572 .quad 0x0000000000000000 /* 0x13 reserved */
573 .quad 0x0000000000000000 /* 0x1b reserved */
574 .quad 0x0000000000000000 /* 0x20 unused */
575 .quad 0x0000000000000000 /* 0x28 unused */
576 .quad 0x0000000000000000 /* 0x33 TLS entry 1 */
577 .quad 0x0000000000000000 /* 0x3b TLS entry 2 */
578 .quad 0x0000000000000000 /* 0x43 TLS entry 3 */
579 .quad 0x0000000000000000 /* 0x4b reserved */
580 .quad 0x0000000000000000 /* 0x53 reserved */
581 .quad 0x0000000000000000 /* 0x5b reserved */
583 .quad 0x00cf9a000000ffff /* 0x60 kernel 4GB code at 0x00000000 */
584 .quad 0x00cf92000000ffff /* 0x68 kernel 4GB data at 0x00000000 */
585 .quad 0x00cffa000000ffff /* 0x73 user 4GB code at 0x00000000 */
586 .quad 0x00cff2000000ffff /* 0x7b user 4GB data at 0x00000000 */
588 .quad 0x0000000000000000 /* 0x80 TSS descriptor */
589 .quad 0x0000000000000000 /* 0x88 LDT descriptor */
592 * Segments used for calling PnP BIOS have byte granularity.
593 * They code segments and data segments have fixed 64k limits,
594 * the transfer segment sizes are set at run time.
596 .quad 0x00409a000000ffff /* 0x90 32-bit code */
597 .quad 0x00009a000000ffff /* 0x98 16-bit code */
598 .quad 0x000092000000ffff /* 0xa0 16-bit data */
599 .quad 0x0000920000000000 /* 0xa8 16-bit data */
600 .quad 0x0000920000000000 /* 0xb0 16-bit data */
603 * The APM segments have byte granularity and their bases
604 * are set at run time. All have 64k limits.
606 .quad 0x00409a000000ffff /* 0xb8 APM CS code */
607 .quad 0x00009a000000ffff /* 0xc0 APM CS 16 code (16 bit) */
608 .quad 0x004092000000ffff /* 0xc8 APM DS data */
610 .quad 0x00c0920000000000 /* 0xd0 - ESPFIX SS */
611 .quad 0x00cf92000000ffff /* 0xd8 - PDA */
612 .quad 0x0000000000000000 /* 0xe0 - unused */
613 .quad 0x0000000000000000 /* 0xe8 - unused */
614 .quad 0x0000000000000000 /* 0xf0 - unused */
615 .quad 0x0000000000000000 /* 0xf8 - GDT entry 31: double-fault TSS */