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[ALSA] hda-codec - Fix surrounds on 3stack mode of AD1988
[linux-2.6/linux-loongson.git] / drivers / serial / sa1100.c
blob25a086458ab9bcb431d06eb6a7d92e71d3e7f405
1 /*
2 * linux/drivers/char/sa1100.c
3 *
4 * Driver for SA11x0 serial ports
5 *
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 *
8 * Copyright (C) 2000 Deep Blue Solutions Ltd.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 * $Id: sa1100.c,v 1.50 2002/07/29 14:41:04 rmk Exp $
25 *
26 */
27 #include <linux/config.h>
28
29 #if defined(CONFIG_SERIAL_SA1100_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
30 #define SUPPORT_SYSRQ
31 #endif
32
33 #include <linux/module.h>
34 #include <linux/ioport.h>
35 #include <linux/init.h>
36 #include <linux/console.h>
37 #include <linux/sysrq.h>
38 #include <linux/platform_device.h>
39 #include <linux/tty.h>
40 #include <linux/tty_flip.h>
41 #include <linux/serial_core.h>
42 #include <linux/serial.h>
43
44 #include <asm/io.h>
45 #include <asm/irq.h>
46 #include <asm/hardware.h>
47 #include <asm/mach/serial_sa1100.h>
48
49 /* We've been assigned a range on the "Low-density serial ports" major */
50 #define SERIAL_SA1100_MAJOR 204
51 #define MINOR_START 5
52
53 #define NR_PORTS 3
54
55 #define SA1100_ISR_PASS_LIMIT 256
56
57 /*
58 * Convert from ignore_status_mask or read_status_mask to UTSR[01]
59 */
60 #define SM_TO_UTSR0(x) ((x) & 0xff)
61 #define SM_TO_UTSR1(x) ((x) >> 8)
62 #define UTSR0_TO_SM(x) ((x))
63 #define UTSR1_TO_SM(x) ((x) << 8)
64
65 #define UART_GET_UTCR0(sport) __raw_readl((sport)->port.membase + UTCR0)
66 #define UART_GET_UTCR1(sport) __raw_readl((sport)->port.membase + UTCR1)
67 #define UART_GET_UTCR2(sport) __raw_readl((sport)->port.membase + UTCR2)
68 #define UART_GET_UTCR3(sport) __raw_readl((sport)->port.membase + UTCR3)
69 #define UART_GET_UTSR0(sport) __raw_readl((sport)->port.membase + UTSR0)
70 #define UART_GET_UTSR1(sport) __raw_readl((sport)->port.membase + UTSR1)
71 #define UART_GET_CHAR(sport) __raw_readl((sport)->port.membase + UTDR)
72
73 #define UART_PUT_UTCR0(sport,v) __raw_writel((v),(sport)->port.membase + UTCR0)
74 #define UART_PUT_UTCR1(sport,v) __raw_writel((v),(sport)->port.membase + UTCR1)
75 #define UART_PUT_UTCR2(sport,v) __raw_writel((v),(sport)->port.membase + UTCR2)
76 #define UART_PUT_UTCR3(sport,v) __raw_writel((v),(sport)->port.membase + UTCR3)
77 #define UART_PUT_UTSR0(sport,v) __raw_writel((v),(sport)->port.membase + UTSR0)
78 #define UART_PUT_UTSR1(sport,v) __raw_writel((v),(sport)->port.membase + UTSR1)
79 #define UART_PUT_CHAR(sport,v) __raw_writel((v),(sport)->port.membase + UTDR)
80
81 /*
82 * This is the size of our serial port register set.
83 */
84 #define UART_PORT_SIZE 0x24
85
86 /*
87 * This determines how often we check the modem status signals
88 * for any change. They generally aren't connected to an IRQ
89 * so we have to poll them. We also check immediately before
90 * filling the TX fifo incase CTS has been dropped.
91 */
92 #define MCTRL_TIMEOUT (250*HZ/1000)
93
94 struct sa1100_port {
95 struct uart_port port;
96 struct timer_list timer;
97 unsigned int old_status;
98 };
99
100 /*
101 * Handle any change of modem status signal since we were last called.
102 */
103 static void sa1100_mctrl_check(struct sa1100_port *sport)
104 {
105 unsigned int status, changed;
106
107 status = sport->port.ops->get_mctrl(&sport->port);
108 changed = status ^ sport->old_status;
109
110 if (changed == 0)
111 return;
112
113 sport->old_status = status;
114
115 if (changed & TIOCM_RI)
116 sport->port.icount.rng++;
117 if (changed & TIOCM_DSR)
118 sport->port.icount.dsr++;
119 if (changed & TIOCM_CAR)
120 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
121 if (changed & TIOCM_CTS)
122 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
123
124 wake_up_interruptible(&sport->port.info->delta_msr_wait);
125 }
126
127 /*
128 * This is our per-port timeout handler, for checking the
129 * modem status signals.
130 */
131 static void sa1100_timeout(unsigned long data)
132 {
133 struct sa1100_port *sport = (struct sa1100_port *)data;
134 unsigned long flags;
135
136 if (sport->port.info) {
137 spin_lock_irqsave(&sport->port.lock, flags);
138 sa1100_mctrl_check(sport);
139 spin_unlock_irqrestore(&sport->port.lock, flags);
140
141 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
142 }
143 }
144
145 /*
146 * interrupts disabled on entry
147 */
148 static void sa1100_stop_tx(struct uart_port *port)
149 {
150 struct sa1100_port *sport = (struct sa1100_port *)port;
151 u32 utcr3;
152
153 utcr3 = UART_GET_UTCR3(sport);
154 UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_TIE);
155 sport->port.read_status_mask &= ~UTSR0_TO_SM(UTSR0_TFS);
156 }
157
158 /*
159 * port locked and interrupts disabled
160 */
161 static void sa1100_start_tx(struct uart_port *port)
162 {
163 struct sa1100_port *sport = (struct sa1100_port *)port;
164 u32 utcr3;
165
166 utcr3 = UART_GET_UTCR3(sport);
167 sport->port.read_status_mask |= UTSR0_TO_SM(UTSR0_TFS);
168 UART_PUT_UTCR3(sport, utcr3 | UTCR3_TIE);
169 }
170
171 /*
172 * Interrupts enabled
173 */
174 static void sa1100_stop_rx(struct uart_port *port)
175 {
176 struct sa1100_port *sport = (struct sa1100_port *)port;
177 u32 utcr3;
178
179 utcr3 = UART_GET_UTCR3(sport);
180 UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_RIE);
181 }
182
183 /*
184 * Set the modem control timer to fire immediately.
185 */
186 static void sa1100_enable_ms(struct uart_port *port)
187 {
188 struct sa1100_port *sport = (struct sa1100_port *)port;
189
190 mod_timer(&sport->timer, jiffies);
191 }
192
193 static void
194 sa1100_rx_chars(struct sa1100_port *sport, struct pt_regs *regs)
195 {
196 struct tty_struct *tty = sport->port.info->tty;
197 unsigned int status, ch, flg;
198
199 status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
200 UTSR0_TO_SM(UART_GET_UTSR0(sport));
201 while (status & UTSR1_TO_SM(UTSR1_RNE)) {
202 ch = UART_GET_CHAR(sport);
203
204 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
205 goto ignore_char;
206 sport->port.icount.rx++;
207
208 flg = TTY_NORMAL;
209
210 /*
211 * note that the error handling code is
212 * out of the main execution path
213 */
214 if (status & UTSR1_TO_SM(UTSR1_PRE | UTSR1_FRE | UTSR1_ROR)) {
215 if (status & UTSR1_TO_SM(UTSR1_PRE))
216 sport->port.icount.parity++;
217 else if (status & UTSR1_TO_SM(UTSR1_FRE))
218 sport->port.icount.frame++;
219 if (status & UTSR1_TO_SM(UTSR1_ROR))
220 sport->port.icount.overrun++;
221
222 status &= sport->port.read_status_mask;
223
224 if (status & UTSR1_TO_SM(UTSR1_PRE))
225 flg = TTY_PARITY;
226 else if (status & UTSR1_TO_SM(UTSR1_FRE))
227 flg = TTY_FRAME;
228
229 #ifdef SUPPORT_SYSRQ
230 sport->port.sysrq = 0;
231 #endif
232 }
233
234 if (uart_handle_sysrq_char(&sport->port, ch, regs))
235 goto ignore_char;
236
237 uart_insert_char(&sport->port, status, UTSR1_TO_SM(UTSR1_ROR), ch, flg);
238
239 ignore_char:
240 status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
241 UTSR0_TO_SM(UART_GET_UTSR0(sport));
242 }
243 tty_flip_buffer_push(tty);
244 }
245
246 static void sa1100_tx_chars(struct sa1100_port *sport)
247 {
248 struct circ_buf *xmit = &sport->port.info->xmit;
249
250 if (sport->port.x_char) {
251 UART_PUT_CHAR(sport, sport->port.x_char);
252 sport->port.icount.tx++;
253 sport->port.x_char = 0;
254 return;
255 }
256
257 /*
258 * Check the modem control lines before
259 * transmitting anything.
260 */
261 sa1100_mctrl_check(sport);
262
263 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
264 sa1100_stop_tx(&sport->port);
265 return;
266 }
267
268 /*
269 * Tried using FIFO (not checking TNF) for fifo fill:
270 * still had the '4 bytes repeated' problem.
271 */
272 while (UART_GET_UTSR1(sport) & UTSR1_TNF) {
273 UART_PUT_CHAR(sport, xmit->buf[xmit->tail]);
274 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
275 sport->port.icount.tx++;
276 if (uart_circ_empty(xmit))
277 break;
278 }
279
280 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
281 uart_write_wakeup(&sport->port);
282
283 if (uart_circ_empty(xmit))
284 sa1100_stop_tx(&sport->port);
285 }
286
287 static irqreturn_t sa1100_int(int irq, void *dev_id, struct pt_regs *regs)
288 {
289 struct sa1100_port *sport = dev_id;
290 unsigned int status, pass_counter = 0;
291
292 spin_lock(&sport->port.lock);
293 status = UART_GET_UTSR0(sport);
294 status &= SM_TO_UTSR0(sport->port.read_status_mask) | ~UTSR0_TFS;
295 do {
296 if (status & (UTSR0_RFS | UTSR0_RID)) {
297 /* Clear the receiver idle bit, if set */
298 if (status & UTSR0_RID)
299 UART_PUT_UTSR0(sport, UTSR0_RID);
300 sa1100_rx_chars(sport, regs);
301 }
302
303 /* Clear the relevant break bits */
304 if (status & (UTSR0_RBB | UTSR0_REB))
305 UART_PUT_UTSR0(sport, status & (UTSR0_RBB | UTSR0_REB));
306
307 if (status & UTSR0_RBB)
308 sport->port.icount.brk++;
309
310 if (status & UTSR0_REB)
311 uart_handle_break(&sport->port);
312
313 if (status & UTSR0_TFS)
314 sa1100_tx_chars(sport);
315 if (pass_counter++ > SA1100_ISR_PASS_LIMIT)
316 break;
317 status = UART_GET_UTSR0(sport);
318 status &= SM_TO_UTSR0(sport->port.read_status_mask) |
319 ~UTSR0_TFS;
320 } while (status & (UTSR0_TFS | UTSR0_RFS | UTSR0_RID));
321 spin_unlock(&sport->port.lock);
322
323 return IRQ_HANDLED;
324 }
325
326 /*
327 * Return TIOCSER_TEMT when transmitter is not busy.
328 */
329 static unsigned int sa1100_tx_empty(struct uart_port *port)
330 {
331 struct sa1100_port *sport = (struct sa1100_port *)port;
332
333 return UART_GET_UTSR1(sport) & UTSR1_TBY ? 0 : TIOCSER_TEMT;
334 }
335
336 static unsigned int sa1100_get_mctrl(struct uart_port *port)
337 {
338 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
339 }
340
341 static void sa1100_set_mctrl(struct uart_port *port, unsigned int mctrl)
342 {
343 }
344
345 /*
346 * Interrupts always disabled.
347 */
348 static void sa1100_break_ctl(struct uart_port *port, int break_state)
349 {
350 struct sa1100_port *sport = (struct sa1100_port *)port;
351 unsigned long flags;
352 unsigned int utcr3;
353
354 spin_lock_irqsave(&sport->port.lock, flags);
355 utcr3 = UART_GET_UTCR3(sport);
356 if (break_state == -1)
357 utcr3 |= UTCR3_BRK;
358 else
359 utcr3 &= ~UTCR3_BRK;
360 UART_PUT_UTCR3(sport, utcr3);
361 spin_unlock_irqrestore(&sport->port.lock, flags);
362 }
363
364 static int sa1100_startup(struct uart_port *port)
365 {
366 struct sa1100_port *sport = (struct sa1100_port *)port;
367 int retval;
368
369 /*
370 * Allocate the IRQ
371 */
372 retval = request_irq(sport->port.irq, sa1100_int, 0,
373 "sa11x0-uart", sport);
374 if (retval)
375 return retval;
376
377 /*
378 * Finally, clear and enable interrupts
379 */
380 UART_PUT_UTSR0(sport, -1);
381 UART_PUT_UTCR3(sport, UTCR3_RXE | UTCR3_TXE | UTCR3_RIE);
382
383 /*
384 * Enable modem status interrupts
385 */
386 spin_lock_irq(&sport->port.lock);
387 sa1100_enable_ms(&sport->port);
388 spin_unlock_irq(&sport->port.lock);
389
390 return 0;
391 }
392
393 static void sa1100_shutdown(struct uart_port *port)
394 {
395 struct sa1100_port *sport = (struct sa1100_port *)port;
396
397 /*
398 * Stop our timer.
399 */
400 del_timer_sync(&sport->timer);
401
402 /*
403 * Free the interrupt
404 */
405 free_irq(sport->port.irq, sport);
406
407 /*
408 * Disable all interrupts, port and break condition.
409 */
410 UART_PUT_UTCR3(sport, 0);
411 }
412
413 static void
414 sa1100_set_termios(struct uart_port *port, struct termios *termios,
415 struct termios *old)
416 {
417 struct sa1100_port *sport = (struct sa1100_port *)port;
418 unsigned long flags;
419 unsigned int utcr0, old_utcr3, baud, quot;
420 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
421
422 /*
423 * We only support CS7 and CS8.
424 */
425 while ((termios->c_cflag & CSIZE) != CS7 &&
426 (termios->c_cflag & CSIZE) != CS8) {
427 termios->c_cflag &= ~CSIZE;
428 termios->c_cflag |= old_csize;
429 old_csize = CS8;
430 }
431
432 if ((termios->c_cflag & CSIZE) == CS8)
433 utcr0 = UTCR0_DSS;
434 else
435 utcr0 = 0;
436
437 if (termios->c_cflag & CSTOPB)
438 utcr0 |= UTCR0_SBS;
439 if (termios->c_cflag & PARENB) {
440 utcr0 |= UTCR0_PE;
441 if (!(termios->c_cflag & PARODD))
442 utcr0 |= UTCR0_OES;
443 }
444
445 /*
446 * Ask the core to calculate the divisor for us.
447 */
448 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
449 quot = uart_get_divisor(port, baud);
450
451 spin_lock_irqsave(&sport->port.lock, flags);
452
453 sport->port.read_status_mask &= UTSR0_TO_SM(UTSR0_TFS);
454 sport->port.read_status_mask |= UTSR1_TO_SM(UTSR1_ROR);
455 if (termios->c_iflag & INPCK)
456 sport->port.read_status_mask |=
457 UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
458 if (termios->c_iflag & (BRKINT | PARMRK))
459 sport->port.read_status_mask |=
460 UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
461
462 /*
463 * Characters to ignore
464 */
465 sport->port.ignore_status_mask = 0;
466 if (termios->c_iflag & IGNPAR)
467 sport->port.ignore_status_mask |=
468 UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
469 if (termios->c_iflag & IGNBRK) {
470 sport->port.ignore_status_mask |=
471 UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
472 /*
473 * If we're ignoring parity and break indicators,
474 * ignore overruns too (for real raw support).
475 */
476 if (termios->c_iflag & IGNPAR)
477 sport->port.ignore_status_mask |=
478 UTSR1_TO_SM(UTSR1_ROR);
479 }
480
481 del_timer_sync(&sport->timer);
482
483 /*
484 * Update the per-port timeout.
485 */
486 uart_update_timeout(port, termios->c_cflag, baud);
487
488 /*
489 * disable interrupts and drain transmitter
490 */
491 old_utcr3 = UART_GET_UTCR3(sport);
492 UART_PUT_UTCR3(sport, old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE));
493
494 while (UART_GET_UTSR1(sport) & UTSR1_TBY)
495 barrier();
496
497 /* then, disable everything */
498 UART_PUT_UTCR3(sport, 0);
499
500 /* set the parity, stop bits and data size */
501 UART_PUT_UTCR0(sport, utcr0);
502
503 /* set the baud rate */
504 quot -= 1;
505 UART_PUT_UTCR1(sport, ((quot & 0xf00) >> 8));
506 UART_PUT_UTCR2(sport, (quot & 0xff));
507
508 UART_PUT_UTSR0(sport, -1);
509
510 UART_PUT_UTCR3(sport, old_utcr3);
511
512 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
513 sa1100_enable_ms(&sport->port);
514
515 spin_unlock_irqrestore(&sport->port.lock, flags);
516 }
517
518 static const char *sa1100_type(struct uart_port *port)
519 {
520 struct sa1100_port *sport = (struct sa1100_port *)port;
521
522 return sport->port.type == PORT_SA1100 ? "SA1100" : NULL;
523 }
524
525 /*
526 * Release the memory region(s) being used by 'port'.
527 */
528 static void sa1100_release_port(struct uart_port *port)
529 {
530 struct sa1100_port *sport = (struct sa1100_port *)port;
531
532 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
533 }
534
535 /*
536 * Request the memory region(s) being used by 'port'.
537 */
538 static int sa1100_request_port(struct uart_port *port)
539 {
540 struct sa1100_port *sport = (struct sa1100_port *)port;
541
542 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
543 "sa11x0-uart") != NULL ? 0 : -EBUSY;
544 }
545
546 /*
547 * Configure/autoconfigure the port.
548 */
549 static void sa1100_config_port(struct uart_port *port, int flags)
550 {
551 struct sa1100_port *sport = (struct sa1100_port *)port;
552
553 if (flags & UART_CONFIG_TYPE &&
554 sa1100_request_port(&sport->port) == 0)
555 sport->port.type = PORT_SA1100;
556 }
557
558 /*
559 * Verify the new serial_struct (for TIOCSSERIAL).
560 * The only change we allow are to the flags and type, and
561 * even then only between PORT_SA1100 and PORT_UNKNOWN
562 */
563 static int
564 sa1100_verify_port(struct uart_port *port, struct serial_struct *ser)
565 {
566 struct sa1100_port *sport = (struct sa1100_port *)port;
567 int ret = 0;
568
569 if (ser->type != PORT_UNKNOWN && ser->type != PORT_SA1100)
570 ret = -EINVAL;
571 if (sport->port.irq != ser->irq)
572 ret = -EINVAL;
573 if (ser->io_type != SERIAL_IO_MEM)
574 ret = -EINVAL;
575 if (sport->port.uartclk / 16 != ser->baud_base)
576 ret = -EINVAL;
577 if ((void *)sport->port.mapbase != ser->iomem_base)
578 ret = -EINVAL;
579 if (sport->port.iobase != ser->port)
580 ret = -EINVAL;
581 if (ser->hub6 != 0)
582 ret = -EINVAL;
583 return ret;
584 }
585
586 static struct uart_ops sa1100_pops = {
587 .tx_empty = sa1100_tx_empty,
588 .set_mctrl = sa1100_set_mctrl,
589 .get_mctrl = sa1100_get_mctrl,
590 .stop_tx = sa1100_stop_tx,
591 .start_tx = sa1100_start_tx,
592 .stop_rx = sa1100_stop_rx,
593 .enable_ms = sa1100_enable_ms,
594 .break_ctl = sa1100_break_ctl,
595 .startup = sa1100_startup,
596 .shutdown = sa1100_shutdown,
597 .set_termios = sa1100_set_termios,
598 .type = sa1100_type,
599 .release_port = sa1100_release_port,
600 .request_port = sa1100_request_port,
601 .config_port = sa1100_config_port,
602 .verify_port = sa1100_verify_port,
603 };
604
605 static struct sa1100_port sa1100_ports[NR_PORTS];
606
607 /*
608 * Setup the SA1100 serial ports. Note that we don't include the IrDA
609 * port here since we have our own SIR/FIR driver (see drivers/net/irda)
610 *
611 * Note also that we support "console=ttySAx" where "x" is either 0 or 1.
612 * Which serial port this ends up being depends on the machine you're
613 * running this kernel on. I'm not convinced that this is a good idea,
614 * but that's the way it traditionally works.
615 *
616 * Note that NanoEngine UART3 becomes UART2, and UART2 is no longer
617 * used here.
618 */
619 static void __init sa1100_init_ports(void)
620 {
621 static int first = 1;
622 int i;
623
624 if (!first)
625 return;
626 first = 0;
627
628 for (i = 0; i < NR_PORTS; i++) {
629 sa1100_ports[i].port.uartclk = 3686400;
630 sa1100_ports[i].port.ops = &sa1100_pops;
631 sa1100_ports[i].port.fifosize = 8;
632 sa1100_ports[i].port.line = i;
633 sa1100_ports[i].port.iotype = SERIAL_IO_MEM;
634 init_timer(&sa1100_ports[i].timer);
635 sa1100_ports[i].timer.function = sa1100_timeout;
636 sa1100_ports[i].timer.data = (unsigned long)&sa1100_ports[i];
637 }
638
639 /*
640 * make transmit lines outputs, so that when the port
641 * is closed, the output is in the MARK state.
642 */
643 PPDR |= PPC_TXD1 | PPC_TXD3;
644 PPSR |= PPC_TXD1 | PPC_TXD3;
645 }
646
647 void __init sa1100_register_uart_fns(struct sa1100_port_fns *fns)
648 {
649 if (fns->get_mctrl)
650 sa1100_pops.get_mctrl = fns->get_mctrl;
651 if (fns->set_mctrl)
652 sa1100_pops.set_mctrl = fns->set_mctrl;
653
654 sa1100_pops.pm = fns->pm;
655 sa1100_pops.set_wake = fns->set_wake;
656 }
657
658 void __init sa1100_register_uart(int idx, int port)
659 {
660 if (idx >= NR_PORTS) {
661 printk(KERN_ERR "%s: bad index number %d\n", __FUNCTION__, idx);
662 return;
663 }
664
665 switch (port) {
666 case 1:
667 sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0;
668 sa1100_ports[idx].port.mapbase = _Ser1UTCR0;
669 sa1100_ports[idx].port.irq = IRQ_Ser1UART;
670 sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF;
671 break;
672
673 case 2:
674 sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0;
675 sa1100_ports[idx].port.mapbase = _Ser2UTCR0;
676 sa1100_ports[idx].port.irq = IRQ_Ser2ICP;
677 sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF;
678 break;
679
680 case 3:
681 sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0;
682 sa1100_ports[idx].port.mapbase = _Ser3UTCR0;
683 sa1100_ports[idx].port.irq = IRQ_Ser3UART;
684 sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF;
685 break;
686
687 default:
688 printk(KERN_ERR "%s: bad port number %d\n", __FUNCTION__, port);
689 }
690 }
691
692
693 #ifdef CONFIG_SERIAL_SA1100_CONSOLE
694
695 /*
696 * Interrupts are disabled on entering
697 */
698 static void
699 sa1100_console_write(struct console *co, const char *s, unsigned int count)
700 {
701 struct sa1100_port *sport = &sa1100_ports[co->index];
702 unsigned int old_utcr3, status, i;
703
704 /*
705 * First, save UTCR3 and then disable interrupts
706 */
707 old_utcr3 = UART_GET_UTCR3(sport);
708 UART_PUT_UTCR3(sport, (old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE)) |
709 UTCR3_TXE);
710
711 /*
712 * Now, do each character
713 */
714 for (i = 0; i < count; i++) {
715 do {
716 status = UART_GET_UTSR1(sport);
717 } while (!(status & UTSR1_TNF));
718 UART_PUT_CHAR(sport, s[i]);
719 if (s[i] == '\n') {
720 do {
721 status = UART_GET_UTSR1(sport);
722 } while (!(status & UTSR1_TNF));
723 UART_PUT_CHAR(sport, '\r');
724 }
725 }
726
727 /*
728 * Finally, wait for transmitter to become empty
729 * and restore UTCR3
730 */
731 do {
732 status = UART_GET_UTSR1(sport);
733 } while (status & UTSR1_TBY);
734 UART_PUT_UTCR3(sport, old_utcr3);
735 }
736
737 /*
738 * If the port was already initialised (eg, by a boot loader),
739 * try to determine the current setup.
740 */
741 static void __init
742 sa1100_console_get_options(struct sa1100_port *sport, int *baud,
743 int *parity, int *bits)
744 {
745 unsigned int utcr3;
746
747 utcr3 = UART_GET_UTCR3(sport) & (UTCR3_RXE | UTCR3_TXE);
748 if (utcr3 == (UTCR3_RXE | UTCR3_TXE)) {
749 /* ok, the port was enabled */
750 unsigned int utcr0, quot;
751
752 utcr0 = UART_GET_UTCR0(sport);
753
754 *parity = 'n';
755 if (utcr0 & UTCR0_PE) {
756 if (utcr0 & UTCR0_OES)
757 *parity = 'e';
758 else
759 *parity = 'o';
760 }
761
762 if (utcr0 & UTCR0_DSS)
763 *bits = 8;
764 else
765 *bits = 7;
766
767 quot = UART_GET_UTCR2(sport) | UART_GET_UTCR1(sport) << 8;
768 quot &= 0xfff;
769 *baud = sport->port.uartclk / (16 * (quot + 1));
770 }
771 }
772
773 static int __init
774 sa1100_console_setup(struct console *co, char *options)
775 {
776 struct sa1100_port *sport;
777 int baud = 9600;
778 int bits = 8;
779 int parity = 'n';
780 int flow = 'n';
781
782 /*
783 * Check whether an invalid uart number has been specified, and
784 * if so, search for the first available port that does have
785 * console support.
786 */
787 if (co->index == -1 || co->index >= NR_PORTS)
788 co->index = 0;
789 sport = &sa1100_ports[co->index];
790
791 if (options)
792 uart_parse_options(options, &baud, &parity, &bits, &flow);
793 else
794 sa1100_console_get_options(sport, &baud, &parity, &bits);
795
796 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
797 }
798
799 static struct uart_driver sa1100_reg;
800 static struct console sa1100_console = {
801 .name = "ttySA",
802 .write = sa1100_console_write,
803 .device = uart_console_device,
804 .setup = sa1100_console_setup,
805 .flags = CON_PRINTBUFFER,
806 .index = -1,
807 .data = &sa1100_reg,
808 };
809
810 static int __init sa1100_rs_console_init(void)
811 {
812 sa1100_init_ports();
813 register_console(&sa1100_console);
814 return 0;
815 }
816 console_initcall(sa1100_rs_console_init);
817
818 #define SA1100_CONSOLE &sa1100_console
819 #else
820 #define SA1100_CONSOLE NULL
821 #endif
822
823 static struct uart_driver sa1100_reg = {
824 .owner = THIS_MODULE,
825 .driver_name = "ttySA",
826 .dev_name = "ttySA",
827 .devfs_name = "ttySA",
828 .major = SERIAL_SA1100_MAJOR,
829 .minor = MINOR_START,
830 .nr = NR_PORTS,
831 .cons = SA1100_CONSOLE,
832 };
833
834 static int sa1100_serial_suspend(struct platform_device *dev, pm_message_t state)
835 {
836 struct sa1100_port *sport = platform_get_drvdata(dev);
837
838 if (sport)
839 uart_suspend_port(&sa1100_reg, &sport->port);
840
841 return 0;
842 }
843
844 static int sa1100_serial_resume(struct platform_device *dev)
845 {
846 struct sa1100_port *sport = platform_get_drvdata(dev);
847
848 if (sport)
849 uart_resume_port(&sa1100_reg, &sport->port);
850
851 return 0;
852 }
853
854 static int sa1100_serial_probe(struct platform_device *dev)
855 {
856 struct resource *res = dev->resource;
857 int i;
858
859 for (i = 0; i < dev->num_resources; i++, res++)
860 if (res->flags & IORESOURCE_MEM)
861 break;
862
863 if (i < dev->num_resources) {
864 for (i = 0; i < NR_PORTS; i++) {
865 if (sa1100_ports[i].port.mapbase != res->start)
866 continue;
867
868 sa1100_ports[i].port.dev = &dev->dev;
869 uart_add_one_port(&sa1100_reg, &sa1100_ports[i].port);
870 platform_set_drvdata(dev, &sa1100_ports[i]);
871 break;
872 }
873 }
874
875 return 0;
876 }
877
878 static int sa1100_serial_remove(struct platform_device *pdev)
879 {
880 struct sa1100_port *sport = platform_get_drvdata(pdev);
881
882 platform_set_drvdata(pdev, NULL);
883
884 if (sport)
885 uart_remove_one_port(&sa1100_reg, &sport->port);
886
887 return 0;
888 }
889
890 static struct platform_driver sa11x0_serial_driver = {
891 .probe = sa1100_serial_probe,
892 .remove = sa1100_serial_remove,
893 .suspend = sa1100_serial_suspend,
894 .resume = sa1100_serial_resume,
895 .driver = {
896 .name = "sa11x0-uart",
897 },
898 };
899
900 static int __init sa1100_serial_init(void)
901 {
902 int ret;
903
904 printk(KERN_INFO "Serial: SA11x0 driver $Revision: 1.50 $\n");
905
906 sa1100_init_ports();
907
908 ret = uart_register_driver(&sa1100_reg);
909 if (ret == 0) {
910 ret = platform_driver_register(&sa11x0_serial_driver);
911 if (ret)
912 uart_unregister_driver(&sa1100_reg);
913 }
914 return ret;
915 }
916
917 static void __exit sa1100_serial_exit(void)
918 {
919 platform_driver_unregister(&sa11x0_serial_driver);
920 uart_unregister_driver(&sa1100_reg);
921 }
922
923 module_init(sa1100_serial_init);
924 module_exit(sa1100_serial_exit);
925
926 MODULE_AUTHOR("Deep Blue Solutions Ltd");
927 MODULE_DESCRIPTION("SA1100 generic serial port driver $Revision: 1.50 $");
928 MODULE_LICENSE("GPL");
929 MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_SA1100_MAJOR);
linux kernel for loongson